Re: [Qemu-devel] [RFC v3 PATCH 09/14] tcg/sparc: Add support for fence

[Sergey Fedorov <serge.fdrv@gmail.com>]

On 18/06/16 07:03, Pranith Kumar wrote:
> Cc: Blue Swirl <blauwirbel@gmail.com>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
> ---
>  tcg/sparc/tcg-target.inc.c | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c
> index 9938a50..af8a300 100644
> --- a/tcg/sparc/tcg-target.inc.c
> +++ b/tcg/sparc/tcg-target.inc.c
> @@ -249,6 +249,8 @@ static const int tcg_target_call_oarg_regs[] = {
>  #define STWA       (INSN_OP(3) | INSN_OP3(0x14))
>  #define STXA       (INSN_OP(3) | INSN_OP3(0x1e))
>  
> +#define MEMBAR     (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(15) | (1 << 13))
> +
>  #ifndef ASI_PRIMARY_LITTLE
>  #define ASI_PRIMARY_LITTLE 0x88
>  #endif
> @@ -825,6 +827,24 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *dest)
>      tcg_out_nop(s);
>  }
>  
> +static void tcg_out_mb(TCGContext *s, TCGArg a0)
> +{
> +    uint8_t bar_opcode;
> +    switch (a0 & TCG_MO_ALL) {
> +    case TCG_MO_LD_LD:
> +        bar_opcode = 0x5; 
> +        break;
> +    case TCG_MO_ST_ST:
> +        bar_opcode = 0xa;
> +        break;
> +    default:
> +        /* #StoreLoad | #LoadStore */
> +        bar_opcode = 0xf;
> +        break;
> +    }
> +    tcg_out32(s, MEMBAR | bar_opcode);

Why don't translate each TCG mb flag to corresponding Sparc MEMBAR mmask
bit exactly here?

Kind regards,
Sergey

> +}
> +
>  #ifdef CONFIG_SOFTMMU
>  static tcg_insn_unit *qemu_ld_trampoline[16];
>  static tcg_insn_unit *qemu_st_trampoline[16];
> @@ -1450,6 +1470,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>  	tcg_out_arithc(s, a0, TCG_REG_G0, a1, const_args[1], c);
>  	break;
>  
> +    case INDEX_op_mb:
> +        tcg_out_mb(s, a0);
> +        break;
> +
>      case INDEX_op_mov_i32:  /* Always emitted via tcg_out_mov.  */
>      case INDEX_op_mov_i64:
>      case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi.  */
> @@ -1551,6 +1575,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
>      { INDEX_op_qemu_st_i32, { "sZ", "A" } },
>      { INDEX_op_qemu_st_i64, { "SZ", "A" } },
>  
> +    { INDEX_op_mb, { } },
>      { -1 },
>  };
>