* [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit
@ 2016-07-28 5:26 Jaehoon Chung
2016-07-28 5:54 ` Ziyuan Xu
2016-08-05 2:27 ` [U-Boot] " Jaehoon Chung
0 siblings, 2 replies; 3+ messages in thread
From: Jaehoon Chung @ 2016-07-28 5:26 UTC (permalink / raw)
To: u-boot
According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to use the FIFO_MASK
as 0x1FFF, not 0x1FF.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
include/dwmmc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 6aebe96..eb03f7f 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -105,7 +105,7 @@
/* Status Register */
#define DWMCI_BUSY (1 << 9)
-#define DWMCI_FIFO_MASK 0x1ff
+#define DWMCI_FIFO_MASK 0x1fff
#define DWMCI_FIFO_SHIFT 17
/* FIFOTH Register */
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit
2016-07-28 5:26 [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit Jaehoon Chung
@ 2016-07-28 5:54 ` Ziyuan Xu
2016-08-05 2:27 ` [U-Boot] " Jaehoon Chung
1 sibling, 0 replies; 3+ messages in thread
From: Ziyuan Xu @ 2016-07-28 5:54 UTC (permalink / raw)
To: u-boot
Hi Jaehoon,
On 2016?07?28? 13:26, Jaehoon Chung wrote:
> According to DesignWare TRM, FIFO_COUNT is bit[29:17].
> If get the correct fifo_count value, it has to use the FIFO_MASK
> as 0x1FFF, not 0x1FF.
Ah, I have no doubt the fifo_count defined. The fifo depth of Rockchip
SoCs is 256, the former work sane coincidentally.:-)
Thanks for fix.
Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>
>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> ---
> include/dwmmc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/dwmmc.h b/include/dwmmc.h
> index 6aebe96..eb03f7f 100644
> --- a/include/dwmmc.h
> +++ b/include/dwmmc.h
> @@ -105,7 +105,7 @@
>
> /* Status Register */
> #define DWMCI_BUSY (1 << 9)
> -#define DWMCI_FIFO_MASK 0x1ff
> +#define DWMCI_FIFO_MASK 0x1fff
> #define DWMCI_FIFO_SHIFT 17
>
> /* FIFOTH Register */
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit
2016-07-28 5:26 [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit Jaehoon Chung
2016-07-28 5:54 ` Ziyuan Xu
@ 2016-08-05 2:27 ` Jaehoon Chung
1 sibling, 0 replies; 3+ messages in thread
From: Jaehoon Chung @ 2016-08-05 2:27 UTC (permalink / raw)
To: u-boot
On 07/28/2016 02:26 PM, Jaehoon Chung wrote:
> According to DesignWare TRM, FIFO_COUNT is bit[29:17].
> If get the correct fifo_count value, it has to use the FIFO_MASK
> as 0x1FFF, not 0x1FF.
>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Applied on u-boot-mmc. Thanks!
Best Regards,
Jaehoon Chung
> ---
> include/dwmmc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/dwmmc.h b/include/dwmmc.h
> index 6aebe96..eb03f7f 100644
> --- a/include/dwmmc.h
> +++ b/include/dwmmc.h
> @@ -105,7 +105,7 @@
>
> /* Status Register */
> #define DWMCI_BUSY (1 << 9)
> -#define DWMCI_FIFO_MASK 0x1ff
> +#define DWMCI_FIFO_MASK 0x1fff
> #define DWMCI_FIFO_SHIFT 17
>
> /* FIFOTH Register */
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2016-07-28 5:26 [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit Jaehoon Chung
2016-07-28 5:54 ` Ziyuan Xu
2016-08-05 2:27 ` [U-Boot] " Jaehoon Chung
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