Re: [PATCH v1 02/13] dt-bindings: clock: Add system-0 domain PLL clock

From: Krzysztof Kozlowski <krzk@kernel.org>
To: Changhuang Liang <changhuang.liang@starfivetech.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>, Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>,
	Alexey Charkov <alchark@gmail.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Keguang Zhang <keguang.zhang@gmail.com>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	Leyfoon Tan <leyfoon.tan@starfivetech.com>
Subject: Re: [PATCH v1 02/13] dt-bindings: clock: Add system-0 domain PLL clock
Date: Tue, 7 Apr 2026 09:02:28 +0200	[thread overview]
Message-ID: <5f2a1946-9ca7-414c-a764-60f46f3b3cf5@kernel.org> (raw)
In-Reply-To: <ZQ4PR01MB120275BC5277C4FF18A738E6F25A2@ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn>

On 07/04/2026 08:56, Changhuang Liang wrote:
> Hi, Krzysztof
> 
> Thanks for the review.
> 
>> On Thu, Apr 02, 2026 at 10:49:34PM -0700, Changhuang Liang wrote:
>>> Add system-0 domain PLL clock for StarFive JHB100 SoC.
>>>
>>> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
>>> ---
>>>  .../bindings/clock/starfive,jhb100-pll.yaml   | 44 +++++++++++++++++++
>>>  .../dt-bindings/clock/starfive,jhb100-crg.h   |  6 +++
>>
>> You did not test your code. Apply patch #1 and test it. Do you see build-level
>> errors?
> 
> I'm very sorry about this. I will reorganize my patch to avoid the related errors.
> 

Anyway this one should be folded into the parent. You have one generic,
system-wide clock as input, so as well this can be the resource of the
parent. And no address spaces.

Other examples have one-register address spaces, so these are not really
separate devices.

Best regards,
Krzysztof