Re: [Intel-gfx] [Intel-xe] [PATCH 1/4] drm/i915/lnl: FBC can be enabled with PSR2

["Govindapillai, Vinod" <vinod.govindapillai@intel.com>]

On Mon, 2023-08-28 at 16:58 -0700, Matt Roper wrote:
> On Mon, Aug 28, 2023 at 09:20:32AM +0300, Vinod Govindapillai wrote:
> > FBC restriction with PSR2 can be removed from LNL onwards
> > 
> > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 66c8aed07bbc..d36499d7e0be 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1169,11 +1169,11 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
> >         }
> >  
> >         /*
> > -        * Display 12+ is not supporting FBC with PSR2.
> > +        * Display 12 to 14 is not supporting FBC with PSR2.
> >          * Recommendation is to keep this combination disabled
> >          * Bspec: 50422 HSD: 14010260002
> >          */
> > -       if (DISPLAY_VER(i915) >= 12 && crtc_state->has_psr2) {
> > +       if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
> 
> According to bspec 68881, the situation is more complicated than just
> flipping this back on.  FBC + PSR2 should only be enabled together if a
> bunch of other conditions are met (multiple planes enabled, selective
> fetch is not enabled, etc.).  Otherwise we may be hurting power usage
> rather than helping it by turning these two on together.
> 
> 
> Matt

Thanks for pointing this out! This patch was done based on the discussions VLK-50754


I can drop this patch for now and can reintroduce later with all the restrictions mentioned in 68881
if needed.

Thanks
Vinod

> 
> >                 plane_state->no_fbc_reason = "PSR2 enabled";
> >                 return 0;
> >         }
> > -- 
> > 2.34.1
> > 
>