From: Jani Nikula <jani.nikula@linux.intel.com>
To: Vinod Govindapillai <vinod.govindapillai@intel.com>,
intel-xe@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org, ville.syrjala@intel.com
Subject: Re: [Intel-gfx] [Intel-xe] [PATCH 3/4] drm/i915/lnl: support FBC on any plane
Date: Mon, 28 Aug 2023 12:00:18 +0300 [thread overview]
Message-ID: <87h6oj35jx.fsf@intel.com> (raw)
In-Reply-To: <20230828062035.6906-4-vinod.govindapillai@intel.com>
On Mon, 28 Aug 2023, Vinod Govindapillai <vinod.govindapillai@intel.com> wrote:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index aefad14ab27a..b207774f3c33 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1327,6 +1327,10 @@
> #define DPFC_CTL_PLANE_IVB(i9xx_plane) REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_IVB, (i9xx_plane))
> #define DPFC_CTL_FENCE_EN_IVB REG_BIT(28) /* ivb+ */
> #define DPFC_CTL_PERSISTENT_MODE REG_BIT(25) /* g4x-snb */
> +#define DPFC_CTL_PLANE_BINDING_MASK REG_GENMASK(12, 11) /* XE */
> +#define DPFC_CTL_PLANE_BINDING_1 REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, 0) /* XE */
> +#define DPFC_CTL_PLANE_BINDING_2 REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, 1) /* XE */
> +#define DPFC_CTL_PLANE_BINDING_3 REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, 2) /* XE */
What's with the /* XE */ comments?
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Vinod Govindapillai <vinod.govindapillai@intel.com>,
intel-xe@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org, ville.syrjala@intel.com
Subject: Re: [Intel-xe] [PATCH 3/4] drm/i915/lnl: support FBC on any plane
Date: Mon, 28 Aug 2023 12:00:18 +0300 [thread overview]
Message-ID: <87h6oj35jx.fsf@intel.com> (raw)
In-Reply-To: <20230828062035.6906-4-vinod.govindapillai@intel.com>
On Mon, 28 Aug 2023, Vinod Govindapillai <vinod.govindapillai@intel.com> wrote:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index aefad14ab27a..b207774f3c33 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1327,6 +1327,10 @@
> #define DPFC_CTL_PLANE_IVB(i9xx_plane) REG_FIELD_PREP(DPFC_CTL_PLANE_MASK_IVB, (i9xx_plane))
> #define DPFC_CTL_FENCE_EN_IVB REG_BIT(28) /* ivb+ */
> #define DPFC_CTL_PERSISTENT_MODE REG_BIT(25) /* g4x-snb */
> +#define DPFC_CTL_PLANE_BINDING_MASK REG_GENMASK(12, 11) /* XE */
> +#define DPFC_CTL_PLANE_BINDING_1 REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, 0) /* XE */
> +#define DPFC_CTL_PLANE_BINDING_2 REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, 1) /* XE */
> +#define DPFC_CTL_PLANE_BINDING_3 REG_FIELD_PREP(DPFC_CTL_PLANE_BINDING_MASK, 2) /* XE */
What's with the /* XE */ comments?
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-08-28 9:00 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-28 6:20 [Intel-gfx] [PATCH 0/4] fbc on any plane Vinod Govindapillai
2023-08-28 6:20 ` [Intel-xe] " Vinod Govindapillai
2023-08-28 6:20 ` [Intel-gfx] [PATCH 1/4] drm/i915/lnl: FBC can be enabled with PSR2 Vinod Govindapillai
2023-08-28 6:20 ` [Intel-xe] " Vinod Govindapillai
2023-08-28 23:58 ` [Intel-gfx] " Matt Roper
2023-08-28 23:58 ` Matt Roper
2023-08-29 12:16 ` [Intel-gfx] " Govindapillai, Vinod
2023-08-29 12:16 ` Govindapillai, Vinod
2023-08-28 6:20 ` [Intel-gfx] [PATCH 2/4] drm/i915/lnl: update FBC debugfs to include plane information Vinod Govindapillai
2023-08-28 6:20 ` [Intel-xe] " Vinod Govindapillai
2023-08-29 0:01 ` [Intel-gfx] " Matt Roper
2023-08-29 0:01 ` Matt Roper
2023-08-29 7:46 ` [Intel-gfx] " Ville Syrjälä
2023-08-29 7:46 ` Ville Syrjälä
2023-08-28 6:20 ` [Intel-gfx] [PATCH 3/4] drm/i915/lnl: support FBC on any plane Vinod Govindapillai
2023-08-28 6:20 ` [Intel-xe] " Vinod Govindapillai
2023-08-28 9:00 ` Jani Nikula [this message]
2023-08-28 9:00 ` Jani Nikula
2023-08-28 10:10 ` [Intel-gfx] " Govindapillai, Vinod
2023-08-28 10:10 ` Govindapillai, Vinod
2023-08-29 0:16 ` [Intel-gfx] " Matt Roper
2023-08-29 0:16 ` Matt Roper
2023-08-29 13:50 ` [Intel-gfx] " Govindapillai, Vinod
2023-08-29 13:50 ` Govindapillai, Vinod
2023-08-29 16:04 ` [Intel-gfx] " Matt Roper
2023-08-29 16:04 ` Matt Roper
2023-08-30 6:06 ` [Intel-gfx] " Ville Syrjälä
2023-08-30 6:06 ` [Intel-xe] [Intel-gfx] " Ville Syrjälä
2023-08-29 7:50 ` [Intel-gfx] [Intel-xe] " Ville Syrjälä
2023-08-29 7:50 ` Ville Syrjälä
2023-08-29 13:34 ` [Intel-gfx] " Govindapillai, Vinod
2023-08-29 13:34 ` Govindapillai, Vinod
2023-08-30 5:34 ` [Intel-gfx] " Ville Syrjälä
2023-08-30 5:34 ` Ville Syrjälä
2023-08-28 6:20 ` [Intel-gfx] [PATCH 4/4] drm/i915/lnl: FBC is supported with per pixel alpha Vinod Govindapillai
2023-08-28 6:20 ` [Intel-xe] " Vinod Govindapillai
2023-08-28 7:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for fbc on any plane Patchwork
2023-08-28 7:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-28 7:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-28 9:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-01 3:28 ` [Intel-xe] ✓ CI.Patch_applied: success for fbc on any plane (rev2) Patchwork
2023-09-01 3:28 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-09-01 3:29 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-09-01 3:36 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-09-01 3:36 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-09-01 3:37 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-09-01 4:09 ` [Intel-xe] ✓ CI.BAT: success " Patchwork
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