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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>,
	Manivannan Sadhasivam <mani@kernel.org>
Cc: "Conor Dooley" <conor+dt@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
	"Heinrich Schuchardt" <heinrich.schuchardt@canonical.com>,
	"E Shattow" <e@freeshell.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/5] dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property
Date: Sun, 23 Nov 2025 15:33:52 +0100	[thread overview]
Message-ID: <83ba64bf-ce77-4a3f-a6df-ff80c5efbc99@kernel.org> (raw)
In-Reply-To: <ZQ2PR01MB1307A802B916620235B87518E6D52@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>

On 21/11/2025 05:23, Hal Feng wrote:
>> On 12.11.25 21:54, Manivannan Sadhasivam wrote:
>> On Thu, Nov 20, 2025 at 04:29:42PM +0800, Hal Feng wrote:
>>> Add enable-gpios property for controlling the PCI bus device power.
>>> This property had been supported in the driver but not added in the
>>> dt-bindings.
>>>
>>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>>> Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe
>>> controller")
>>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>>> ---
>>>  .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml         | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> index 33c80626e8ec..1e36f92ec852 100644
>>> --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> @@ -59,6 +59,10 @@ properties:
>>>      description:
>>>        The phandle to System Register Controller syscon node.
>>>
>>> +  enable-gpios:
>>> +    description: GPIO used to enable the PCI bus device power
>>
>> This feels wrong to me. Is this GPIO associated with the PCIe controller? I bet
>> this is just controlling some regulator that powers the VDD of the PCIe
>> device/slot. If so, this should be added as a part of the regulator node and
>> referenced in the PCIe node using the existing -supply properties.
> 
> This GPIO just controls the power of PCIe devices, not PCIe controller.
> I think there may be no design adding power control GPIOs for the PCIe controller,
> because usually we don't need to control the PCIe controller power but the PCIe
> device power.

So this is not PCIe controller enable gpios...

> 
> I find a similar "pwren-gpios" in
> Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml .
> It uses the GPIO to control the power of PCIe devices too.
> 
> Could I continue to do so? Thanks.

No. You already got response what you are supposed to do. Please read it.

Best regards,
Krzysztof

_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>,
	Manivannan Sadhasivam <mani@kernel.org>
Cc: "Conor Dooley" <conor+dt@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
	"Heinrich Schuchardt" <heinrich.schuchardt@canonical.com>,
	"E Shattow" <e@freeshell.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/5] dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property
Date: Sun, 23 Nov 2025 15:33:52 +0100	[thread overview]
Message-ID: <83ba64bf-ce77-4a3f-a6df-ff80c5efbc99@kernel.org> (raw)
In-Reply-To: <ZQ2PR01MB1307A802B916620235B87518E6D52@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>

On 21/11/2025 05:23, Hal Feng wrote:
>> On 12.11.25 21:54, Manivannan Sadhasivam wrote:
>> On Thu, Nov 20, 2025 at 04:29:42PM +0800, Hal Feng wrote:
>>> Add enable-gpios property for controlling the PCI bus device power.
>>> This property had been supported in the driver but not added in the
>>> dt-bindings.
>>>
>>> Acked-by: Conor Dooley <conor.dooley@microchip.com>
>>> Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe
>>> controller")
>>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>>> ---
>>>  .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml         | 4 ++++
>>>  1 file changed, 4 insertions(+)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> index 33c80626e8ec..1e36f92ec852 100644
>>> --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
>>> @@ -59,6 +59,10 @@ properties:
>>>      description:
>>>        The phandle to System Register Controller syscon node.
>>>
>>> +  enable-gpios:
>>> +    description: GPIO used to enable the PCI bus device power
>>
>> This feels wrong to me. Is this GPIO associated with the PCIe controller? I bet
>> this is just controlling some regulator that powers the VDD of the PCIe
>> device/slot. If so, this should be added as a part of the regulator node and
>> referenced in the PCIe node using the existing -supply properties.
> 
> This GPIO just controls the power of PCIe devices, not PCIe controller.
> I think there may be no design adding power control GPIOs for the PCIe controller,
> because usually we don't need to control the PCIe controller power but the PCIe
> device power.

So this is not PCIe controller enable gpios...

> 
> I find a similar "pwren-gpios" in
> Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml .
> It uses the GPIO to control the power of PCIe devices too.
> 
> Could I continue to do so? Thanks.

No. You already got response what you are supposed to do. Please read it.

Best regards,
Krzysztof

  reply	other threads:[~2025-11-23 14:34 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-20  8:29 [PATCH v3 0/5] Add support for StarFive VisionFive 2 Lite board Hal Feng
2025-11-20  8:29 ` Hal Feng
2025-11-20  8:29 ` [PATCH v3 1/5] dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property Hal Feng
2025-11-20  8:29   ` Hal Feng
2025-11-20 12:52   ` Manivannan Sadhasivam
2025-11-20 12:52     ` Manivannan Sadhasivam
2025-11-21  4:23     ` Hal Feng
2025-11-21  4:23       ` Hal Feng
2025-11-23 14:33       ` Krzysztof Kozlowski [this message]
2025-11-23 14:33         ` Krzysztof Kozlowski
2025-11-20  8:29 ` [PATCH v3 2/5] dt-bindings: riscv: Add StarFive JH7110S SoC and VisionFive 2 Lite board Hal Feng
2025-11-20  8:29   ` Hal Feng
2025-11-20 16:24   ` Rob Herring (Arm)
2025-11-20 16:24     ` Rob Herring (Arm)
2025-11-20  8:29 ` [PATCH v3 3/5] riscv: dts: starfive: Add common board dtsi for VisionFive 2 Lite variants Hal Feng
2025-11-20  8:29   ` Hal Feng
2025-11-21 11:51   ` Emil Renner Berthing
2025-11-21 11:51     ` Emil Renner Berthing
2025-11-22  3:30     ` E Shattow
2025-11-22  3:30       ` E Shattow
2025-11-25  9:54     ` Hal Feng
2025-11-25  9:54       ` Hal Feng
2025-11-20  8:29 ` [PATCH v3 4/5] riscv: dts: starfive: Add VisionFive 2 Lite board device tree Hal Feng
2025-11-20  8:29   ` Hal Feng
2025-11-21 11:51   ` Emil Renner Berthing
2025-11-21 11:51     ` Emil Renner Berthing
2025-11-20  8:29 ` [PATCH v3 5/5] riscv: dts: starfive: Add VisionFive 2 Lite eMMC " Hal Feng
2025-11-20  8:29   ` Hal Feng
2025-11-21 11:52   ` Emil Renner Berthing
2025-11-21 11:52     ` Emil Renner Berthing
2025-11-21 18:23 ` [PATCH v3 0/5] Add support for StarFive VisionFive 2 Lite board Matthias Brugger
2025-11-21 18:23   ` Matthias Brugger

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