From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Miguel Luis <miguel.luis@oracle.com>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Eric Auger <eric.auger@redhat.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 5/5] KVM: arm64: Handle AArch32 SPSR_{irq,abt,und,fiq} as RAZ/WI
Date: Wed, 25 Oct 2023 09:49:39 +0100 [thread overview]
Message-ID: <86edhj3x3w.wl-maz@kernel.org> (raw)
In-Reply-To: <ZTjV1Q05nXXOOyVO@linux.dev>
On Wed, 25 Oct 2023 09:46:13 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
>
> To your point, the SPSR_* accessors still trap even if AArch32 is not
> implemented. I was suggesting in passing that it'd be nice if the
> architecture alternatively allowed for these to read as RES0 (no trap)
> if NV==1 and AArch32 is not implemented, which aligns with your change.
Ah, I see what you mean now. Yeah, I'll put that on the bucket list of
things I need to write up. It has quite a few entries already, and I
really should get to it.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: Miguel Luis <miguel.luis@oracle.com>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Eric Auger <eric.auger@redhat.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 5/5] KVM: arm64: Handle AArch32 SPSR_{irq,abt,und,fiq} as RAZ/WI
Date: Wed, 25 Oct 2023 09:49:39 +0100 [thread overview]
Message-ID: <86edhj3x3w.wl-maz@kernel.org> (raw)
In-Reply-To: <ZTjV1Q05nXXOOyVO@linux.dev>
On Wed, 25 Oct 2023 09:46:13 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
>
> To your point, the SPSR_* accessors still trap even if AArch32 is not
> implemented. I was suggesting in passing that it'd be nice if the
> architecture alternatively allowed for these to read as RES0 (no trap)
> if NV==1 and AArch32 is not implemented, which aligns with your change.
Ah, I see what you mean now. Yeah, I'll put that on the bucket list of
things I need to write up. It has quite a few entries already, and I
really should get to it.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-25 8:49 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 9:54 [PATCH 0/5] KVM: arm64: NV trap forwarding fixes Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 1/5] arm64: Add missing _EL12 encodings Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 2/5] arm64: Add missing _EL2 encodings Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 3/5] KVM: arm64: Refine _EL2 system register list that require trap reinjection Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 4/5] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 5/5] KVM: arm64: Handle AArch32 SPSR_{irq,abt,und,fiq} as RAZ/WI Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 18:55 ` Miguel Luis
2023-10-23 18:55 ` Miguel Luis
2023-10-24 17:25 ` Marc Zyngier
2023-10-24 17:25 ` Marc Zyngier
2023-10-24 22:41 ` Oliver Upton
2023-10-24 22:41 ` Oliver Upton
2023-10-24 23:04 ` Oliver Upton
2023-10-24 23:04 ` Oliver Upton
2023-10-25 8:28 ` Marc Zyngier
2023-10-25 8:28 ` Marc Zyngier
2023-10-25 8:46 ` Oliver Upton
2023-10-25 8:46 ` Oliver Upton
2023-10-25 8:49 ` Marc Zyngier [this message]
2023-10-25 8:49 ` Marc Zyngier
2023-10-25 10:44 ` Miguel Luis
2023-10-25 10:44 ` Miguel Luis
2023-10-25 6:40 ` [PATCH 0/5] KVM: arm64: NV trap forwarding fixes Oliver Upton
2023-10-25 6:40 ` Oliver Upton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=86edhj3x3w.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=eric.auger@redhat.com \
--cc=james.morse@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=miguel.luis@oracle.com \
--cc=oliver.upton@linux.dev \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.