From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: Miguel Luis <miguel.luis@oracle.com>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Eric Auger <eric.auger@redhat.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 5/5] KVM: arm64: Handle AArch32 SPSR_{irq,abt,und,fiq} as RAZ/WI
Date: Tue, 24 Oct 2023 23:04:27 +0000 [thread overview]
Message-ID: <ZThNeyX0muR5yvey@linux.dev> (raw)
In-Reply-To: <ZThINaAfNDNrIAqI@linux.dev>
On Tue, Oct 24, 2023 at 10:41:57PM +0000, Oliver Upton wrote:
> On Tue, Oct 24, 2023 at 06:25:33PM +0100, Marc Zyngier wrote:
> > On Mon, 23 Oct 2023 19:55:10 +0100, Miguel Luis <miguel.luis@oracle.com> wrote:
> > > Also, could you please explain what is happening at PSTATE.EL == EL1
> > > and if EL2Enabled() && HCR_EL2.NV == ‘1’ ?
> >
> > We directly take the trap and not forward it. This isn't exactly the
> > letter of the architecture, but at the same time, treating these
> > registers as RAZ/WI is the only valid implementation. I don't
> > immediately see a problem with taking this shortcut.
>
> Ugh, that's annoying. The other EL2 views of AArch32 state UNDEF if EL1
> doesn't implement AArch32. It'd be nice to get a relaxation in the
> architecture to allow an UNDEF here.
Correction (I wasn't thinking): RES0 behavior should be invariant, much
like the UNDEF behavior of the other AA32-specific registers.
--
Thanks,
Oliver
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: Miguel Luis <miguel.luis@oracle.com>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Eric Auger <eric.auger@redhat.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 5/5] KVM: arm64: Handle AArch32 SPSR_{irq,abt,und,fiq} as RAZ/WI
Date: Tue, 24 Oct 2023 23:04:27 +0000 [thread overview]
Message-ID: <ZThNeyX0muR5yvey@linux.dev> (raw)
In-Reply-To: <ZThINaAfNDNrIAqI@linux.dev>
On Tue, Oct 24, 2023 at 10:41:57PM +0000, Oliver Upton wrote:
> On Tue, Oct 24, 2023 at 06:25:33PM +0100, Marc Zyngier wrote:
> > On Mon, 23 Oct 2023 19:55:10 +0100, Miguel Luis <miguel.luis@oracle.com> wrote:
> > > Also, could you please explain what is happening at PSTATE.EL == EL1
> > > and if EL2Enabled() && HCR_EL2.NV == ‘1’ ?
> >
> > We directly take the trap and not forward it. This isn't exactly the
> > letter of the architecture, but at the same time, treating these
> > registers as RAZ/WI is the only valid implementation. I don't
> > immediately see a problem with taking this shortcut.
>
> Ugh, that's annoying. The other EL2 views of AArch32 state UNDEF if EL1
> doesn't implement AArch32. It'd be nice to get a relaxation in the
> architecture to allow an UNDEF here.
Correction (I wasn't thinking): RES0 behavior should be invariant, much
like the UNDEF behavior of the other AA32-specific registers.
--
Thanks,
Oliver
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next prev parent reply other threads:[~2023-10-24 23:04 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 9:54 [PATCH 0/5] KVM: arm64: NV trap forwarding fixes Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 1/5] arm64: Add missing _EL12 encodings Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 2/5] arm64: Add missing _EL2 encodings Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 3/5] KVM: arm64: Refine _EL2 system register list that require trap reinjection Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 4/5] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 9:54 ` [PATCH 5/5] KVM: arm64: Handle AArch32 SPSR_{irq,abt,und,fiq} as RAZ/WI Marc Zyngier
2023-10-23 9:54 ` Marc Zyngier
2023-10-23 18:55 ` Miguel Luis
2023-10-23 18:55 ` Miguel Luis
2023-10-24 17:25 ` Marc Zyngier
2023-10-24 17:25 ` Marc Zyngier
2023-10-24 22:41 ` Oliver Upton
2023-10-24 22:41 ` Oliver Upton
2023-10-24 23:04 ` Oliver Upton [this message]
2023-10-24 23:04 ` Oliver Upton
2023-10-25 8:28 ` Marc Zyngier
2023-10-25 8:28 ` Marc Zyngier
2023-10-25 8:46 ` Oliver Upton
2023-10-25 8:46 ` Oliver Upton
2023-10-25 8:49 ` Marc Zyngier
2023-10-25 8:49 ` Marc Zyngier
2023-10-25 10:44 ` Miguel Luis
2023-10-25 10:44 ` Miguel Luis
2023-10-25 6:40 ` [PATCH 0/5] KVM: arm64: NV trap forwarding fixes Oliver Upton
2023-10-25 6:40 ` Oliver Upton
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