From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v8 00/13] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU
Date: Mon, 23 Oct 2023 14:09:13 +0100 [thread overview]
Message-ID: <86v8ax4hae.wl-maz@kernel.org> (raw)
In-Reply-To: <20231020214053.2144305-1-rananta@google.com>
On Fri, 20 Oct 2023 22:40:40 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> Hello,
>
> The goal of this series is to allow userspace to limit the number
> of PMU event counters on the vCPU. We need this to support migration
> across systems that implement different numbers of counters.
[...]
I've gone through the initial patches, and stopped before the tests
(which I usually can't be bothered to review anyway).
The comments I have a relatively minor and could be applied as fixes
on top if Oliver can be convinced to do so. Note that patch #4 has an
attribution issue.
> base-commit: 0a3a1665cbc59ee8d6326aa6c0b4a8d1cd67dda3
maz@valley-girl:~/hot-poop/arm-platforms$ git describe 0a3a1665cbc59ee8d6326aa6c0b4a8d1cd67dda3
fatal: 0a3a1665cbc59ee8d6326aa6c0b4a8d1cd67dda3 is neither a commit nor blob
Can you please make an effort to base your postings on a known, stable
commit? A tagged -rc would be best. but certainly not a random commit.
This sort of information is just as useful as "No functional change
intended"...
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v8 00/13] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU
Date: Mon, 23 Oct 2023 14:09:13 +0100 [thread overview]
Message-ID: <86v8ax4hae.wl-maz@kernel.org> (raw)
In-Reply-To: <20231020214053.2144305-1-rananta@google.com>
On Fri, 20 Oct 2023 22:40:40 +0100,
Raghavendra Rao Ananta <rananta@google.com> wrote:
>
> Hello,
>
> The goal of this series is to allow userspace to limit the number
> of PMU event counters on the vCPU. We need this to support migration
> across systems that implement different numbers of counters.
[...]
I've gone through the initial patches, and stopped before the tests
(which I usually can't be bothered to review anyway).
The comments I have a relatively minor and could be applied as fixes
on top if Oliver can be convinced to do so. Note that patch #4 has an
attribution issue.
> base-commit: 0a3a1665cbc59ee8d6326aa6c0b4a8d1cd67dda3
maz@valley-girl:~/hot-poop/arm-platforms$ git describe 0a3a1665cbc59ee8d6326aa6c0b4a8d1cd67dda3
fatal: 0a3a1665cbc59ee8d6326aa6c0b4a8d1cd67dda3 is neither a commit nor blob
Can you please make an effort to base your postings on a known, stable
commit? A tagged -rc would be best. but certainly not a random commit.
This sort of information is just as useful as "No functional change
intended"...
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-10-23 13:09 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-20 21:40 [PATCH v8 00/13] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-20 21:40 ` [PATCH v8 01/13] KVM: arm64: PMU: Introduce helpers to set the guest's PMU Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 15:24 ` Sebastian Ott
2023-10-23 15:24 ` Sebastian Ott
2023-10-20 21:40 ` [PATCH v8 02/13] KVM: arm64: PMU: Set the default PMU for the guest before vCPU reset Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 10:40 ` Marc Zyngier
2023-10-23 10:40 ` Marc Zyngier
2023-10-23 18:24 ` Oliver Upton
2023-10-23 18:24 ` Oliver Upton
2023-10-23 15:25 ` Sebastian Ott
2023-10-23 15:25 ` Sebastian Ott
2023-10-20 21:40 ` [PATCH v8 03/13] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 16:18 ` Sebastian Ott
2023-10-23 16:18 ` Sebastian Ott
2023-10-20 21:40 ` [PATCH v8 04/13] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 11:50 ` Marc Zyngier
2023-10-23 11:50 ` Marc Zyngier
2023-10-23 16:20 ` Sebastian Ott
2023-10-23 16:20 ` Sebastian Ott
2023-10-24 9:22 ` Oliver Upton
2023-10-24 9:22 ` Oliver Upton
2023-10-20 21:40 ` [PATCH v8 05/13] KVM: arm64: Add {get,set}_user for PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR} Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 12:31 ` Marc Zyngier
2023-10-23 12:31 ` Marc Zyngier
2023-10-23 17:28 ` Raghavendra Rao Ananta
2023-10-23 17:28 ` Raghavendra Rao Ananta
2023-10-24 8:59 ` Oliver Upton
2023-10-24 8:59 ` Oliver Upton
2023-10-20 21:40 ` [PATCH v8 06/13] KVM: arm64: Sanitize PM{C,I}NTEN{SET,CLR}, PMOVS{SET,CLR} before first run Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 12:42 ` Marc Zyngier
2023-10-23 12:42 ` Marc Zyngier
2023-10-23 17:42 ` Raghavendra Rao Ananta
2023-10-23 17:42 ` Raghavendra Rao Ananta
2023-10-23 18:07 ` Marc Zyngier
2023-10-23 18:07 ` Marc Zyngier
2023-10-24 19:56 ` kernel test robot
2023-10-20 21:40 ` [PATCH v8 07/13] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-23 13:00 ` Marc Zyngier
2023-10-23 13:00 ` Marc Zyngier
2023-10-23 17:53 ` Raghavendra Rao Ananta
2023-10-23 17:53 ` Raghavendra Rao Ananta
2023-10-24 18:37 ` Oliver Upton
2023-10-24 18:37 ` Oliver Upton
2023-10-20 21:40 ` [PATCH v8 08/13] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-20 21:40 ` [PATCH v8 09/13] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-20 21:40 ` [PATCH v8 10/13] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-20 21:40 ` [PATCH v8 11/13] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-24 18:29 ` Oliver Upton
2023-10-24 18:29 ` Oliver Upton
2023-10-20 21:40 ` [PATCH v8 12/13] KVM: selftests: aarch64: vPMU test for validating user accesses Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-20 21:40 ` [PATCH v8 13/13] KVM: selftests: aarch64: vPMU test for immutability Raghavendra Rao Ananta
2023-10-20 21:40 ` Raghavendra Rao Ananta
2023-10-24 10:36 ` Oliver Upton
2023-10-24 10:36 ` Oliver Upton
2023-10-23 13:09 ` Marc Zyngier [this message]
2023-10-23 13:09 ` [PATCH v8 00/13] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Marc Zyngier
2023-10-23 17:58 ` Raghavendra Rao Ananta
2023-10-23 17:58 ` Raghavendra Rao Ananta
2023-10-23 18:19 ` Marc Zyngier
2023-10-23 18:19 ` Marc Zyngier
2023-10-23 18:35 ` Marc Zyngier
2023-10-23 18:35 ` Marc Zyngier
2023-10-24 19:21 ` Oliver Upton
2023-10-24 19:21 ` Oliver Upton
2023-10-25 0:01 ` Oliver Upton
2023-10-25 0:01 ` Oliver Upton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=86v8ax4hae.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=alexandru.elisei@arm.com \
--cc=coltonlewis@google.com \
--cc=james.morse@arm.com \
--cc=jingzhangos@google.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=oliver.upton@linux.dev \
--cc=pbonzini@redhat.com \
--cc=rananta@google.com \
--cc=reijiw@google.com \
--cc=shahuang@redhat.com \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.