All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v3 0/9] Don't whitelist OA registers unconditionally
@ 2026-06-15 22:42 Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 1/9] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Ashutosh Dixit
                   ` (13 more replies)
  0 siblings, 14 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Whitelisting OA registers unconditionally is a security violation. In this
series we resolve this issue as follows:

* Set the 'deny' bit (bit 30) for all OA registers, ensuring OA registers
  are not whitelisted by default after probe/reset/restart
* Reset the 'deny' bit when an OA stream is opened and certain conditions
  are met, whitelisting OA registers only for the duration when OA streams
  are open for a gt
* Set the 'deny' bit again, when OA streams are closed
* To manage this scheme, separate out OA whitelists from non-OA whitelists
  (into separate save-restore lists)

v2: Address code review from Umesh. Patches changed in v2 have changelog
    appended to commit message
v3: Minor change to Patch 3

Ashutosh Dixit (9):
  drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
  drm/xe/rtp: Maintain OA whitelists separately
  drm/xe/rtp: Keep track of non-OA nonpriv slots
  drm/xe/rtp: Generalize whitelist_apply_to_hwe
  drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
  drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
  drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
  drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
  drm/xe/rtp: Ensure locking/ref counting for OA whitelists

 drivers/gpu/drm/xe/xe_gt_debugfs.c      |  4 +-
 drivers/gpu/drm/xe/xe_hw_engine.c       |  2 +
 drivers/gpu/drm/xe/xe_hw_engine_types.h |  8 +++
 drivers/gpu/drm/xe/xe_oa.c              |  7 ++
 drivers/gpu/drm/xe/xe_oa_types.h        |  3 +
 drivers/gpu/drm/xe/xe_reg_whitelist.c   | 93 ++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_reg_whitelist.h   |  4 ++
 7 files changed, 112 insertions(+), 9 deletions(-)

-- 
2.54.0


^ permalink raw reply	[flat|nested] 17+ messages in thread

* [PATCH v3 1/9] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 2/9] drm/xe/rtp: Maintain OA whitelists separately Ashutosh Dixit
                   ` (12 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Unconditionally whitelisting OA registers is a security violation. Set
RING_FORCE_TO_NONPRIV_DENY bit in OA nonpriv slots, so that OA registers
don't get whitelisted by default after probe, gt reset, resume and engine
reset.

v2: Add WHITELIST_DENY macro
    Reword commit message (Umesh)

Suggested-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 2e84b1c49f374..2d8ddb57412c2 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -104,10 +104,12 @@ static const struct xe_rtp_table_sr register_whitelist = XE_RTP_TABLE_SR(
 				   RING_FORCE_TO_NONPRIV_ACCESS_RW))
 	},
 
+#define WHITELIST_DENY(r, f) WHITELIST(r, (f) | RING_FORCE_TO_NONPRIV_DENY)
+
 #define WHITELIST_OA_MMIO_TRG(trg, status, head) \
-	WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \
-	WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \
-	WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)
+	WHITELIST_DENY(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \
+	WHITELIST_DENY(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \
+	WHITELIST_DENY(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)
 
 #define WHITELIST_OAG_MMIO_TRG \
 	WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR)
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 2/9] drm/xe/rtp: Maintain OA whitelists separately
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 1/9] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 3/9] drm/xe/rtp: Keep track of non-OA nonpriv slots Ashutosh Dixit
                   ` (11 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

OA registers are dynamically whitelisted (and again dewhitelisted) on OA
stream open/close. Maintaining OA whitelists separately from non-OA
register whitlists simplifies this management of OA register
whitelisting/dewhitelisting.

v2: Rebase on upstream changes

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_debugfs.c      | 4 +++-
 drivers/gpu/drm/xe/xe_hw_engine.c       | 2 ++
 drivers/gpu/drm/xe/xe_hw_engine_types.h | 8 ++++++++
 drivers/gpu/drm/xe/xe_reg_whitelist.c   | 5 +++++
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c
index f45306308cd66..c38bcacb27e4a 100644
--- a/drivers/gpu/drm/xe/xe_gt_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c
@@ -149,8 +149,10 @@ static int register_save_restore(struct xe_gt *gt, struct drm_printer *p)
 	drm_printf(p, "\n");
 
 	drm_printf(p, "Whitelist\n");
-	for_each_hw_engine(hwe, gt, id)
+	for_each_hw_engine(hwe, gt, id) {
 		xe_reg_whitelist_dump(&hwe->reg_whitelist, p);
+		xe_reg_whitelist_dump(&hwe->oa_whitelist, p);
+	}
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 98265293f2dce..55632ac4dfe7b 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -572,6 +572,8 @@ static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe,
 	hw_engine_setup_default_state(hwe);
 
 	xe_reg_sr_init(&hwe->reg_whitelist, hwe->name, gt_to_xe(gt));
+	xe_reg_sr_init(&hwe->oa_whitelist, hwe->name, gt_to_xe(gt));
+	xe_reg_sr_init(&hwe->oa_sr, hwe->name, gt_to_xe(gt));
 	xe_reg_whitelist_process_engine(hwe);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index 2cf898e682f55..84c097da9b6f2 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -130,6 +130,14 @@ struct xe_hw_engine {
 	 * @reg_whitelist: table with registers to be whitelisted
 	 */
 	struct xe_reg_sr reg_whitelist;
+	/**
+	 * @oa_whitelist: oa registers to be whitelisted
+	 */
+	struct xe_reg_sr oa_whitelist;
+	/**
+	 * @oa_sr: oa nonpriv whitelist registers, changed on oa stream open/close
+	 */
+	struct xe_reg_sr oa_sr;
 	/**
 	 * @reg_lrc: LRC workaround registers
 	 */
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 2d8ddb57412c2..6d642c2f6fd76 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -103,6 +103,9 @@ static const struct xe_rtp_table_sr register_whitelist = XE_RTP_TABLE_SR(
 			 WHITELIST(VFLSKPD,
 				   RING_FORCE_TO_NONPRIV_ACCESS_RW))
 	},
+);
+
+static const struct xe_rtp_table_sr oa_whitelist = XE_RTP_TABLE_SR(
 
 #define WHITELIST_DENY(r, f) WHITELIST(r, (f) | RING_FORCE_TO_NONPRIV_DENY)
 
@@ -206,6 +209,8 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 
 	xe_rtp_process_to_sr(&ctx, &register_whitelist, &hwe->reg_whitelist, false);
 	whitelist_apply_to_hwe(hwe);
+
+	xe_rtp_process_to_sr(&ctx, &oa_whitelist, &hwe->oa_whitelist, false);
 }
 
 /**
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 3/9] drm/xe/rtp: Keep track of non-OA nonpriv slots
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 1/9] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 2/9] drm/xe/rtp: Maintain OA whitelists separately Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 4/9] drm/xe/rtp: Generalize whitelist_apply_to_hwe Ashutosh Dixit
                   ` (10 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

In order to dynamically whitelist/dewhitelist OA registers on OA stream
open/close, we need to keep track of nonpriv slots occupied by non-OA
register whitelists.

v2: Introduce hwe->nonpriv_slot (Umesh)
v3: Drop hwe->nonpriv_slot (Umesh)

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 6d642c2f6fd76..b5ae7d26e5ba3 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -161,7 +161,7 @@ static const struct xe_rtp_table_sr oa_whitelist = XE_RTP_TABLE_SR(
 	},
 );
 
-static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
+static int whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
 {
 	struct xe_reg_sr *sr = &hwe->reg_whitelist;
 	struct xe_reg_sr_entry *entry;
@@ -193,6 +193,8 @@ static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
 
 		slot++;
 	}
+
+	return slot;
 }
 
 /**
@@ -206,9 +208,10 @@ static void whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
 void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 {
 	struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
+	int first_oa_slot;
 
 	xe_rtp_process_to_sr(&ctx, &register_whitelist, &hwe->reg_whitelist, false);
-	whitelist_apply_to_hwe(hwe);
+	first_oa_slot = whitelist_apply_to_hwe(hwe);
 
 	xe_rtp_process_to_sr(&ctx, &oa_whitelist, &hwe->oa_whitelist, false);
 }
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 4/9] drm/xe/rtp: Generalize whitelist_apply_to_hwe
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (2 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 3/9] drm/xe/rtp: Keep track of non-OA nonpriv slots Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 5/9] drm/xe/rtp: Save OA nonpriv registers to register save/restore lists Ashutosh Dixit
                   ` (9 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Generalize whitelist_apply_to_hwe to construct both non-OA and OA
whitelist nonpriv registers.

v2: Rename slot_in arg of whitelist_apply_to_hwe to first_slot

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index b5ae7d26e5ba3..e9d0a0b82527d 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -161,9 +161,10 @@ static const struct xe_rtp_table_sr oa_whitelist = XE_RTP_TABLE_SR(
 	},
 );
 
-static int whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
+static int whitelist_apply_to_hwe(struct xe_hw_engine *hwe, struct xe_reg_sr *in,
+				  struct xe_reg_sr *out, int first_slot)
 {
-	struct xe_reg_sr *sr = &hwe->reg_whitelist;
+	struct xe_reg_sr *sr = in;
 	struct xe_reg_sr_entry *entry;
 	struct drm_printer p;
 	unsigned long reg;
@@ -172,7 +173,7 @@ static int whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
 	xe_gt_dbg(hwe->gt, "Add %s whitelist to engine\n", sr->name);
 	p = xe_gt_dbg_printer(hwe->gt);
 
-	slot = 0;
+	slot = first_slot;
 	xa_for_each(&sr->xa, reg, entry) {
 		struct xe_reg_sr_entry hwe_entry = {
 			.reg = RING_FORCE_TO_NONPRIV(hwe->mmio_base, slot),
@@ -189,7 +190,7 @@ static int whitelist_apply_to_hwe(struct xe_hw_engine *hwe)
 		}
 
 		xe_reg_whitelist_print_entry(&p, 0, reg, entry);
-		xe_reg_sr_add(&hwe->reg_sr, &hwe_entry, hwe->gt);
+		xe_reg_sr_add(out, &hwe_entry, hwe->gt);
 
 		slot++;
 	}
@@ -211,7 +212,7 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 	int first_oa_slot;
 
 	xe_rtp_process_to_sr(&ctx, &register_whitelist, &hwe->reg_whitelist, false);
-	first_oa_slot = whitelist_apply_to_hwe(hwe);
+	first_oa_slot = whitelist_apply_to_hwe(hwe, &hwe->reg_whitelist, &hwe->reg_sr, 0);
 
 	xe_rtp_process_to_sr(&ctx, &oa_whitelist, &hwe->oa_whitelist, false);
 }
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 5/9] drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (3 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 4/9] drm/xe/rtp: Generalize whitelist_apply_to_hwe Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 6/9] drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs Ashutosh Dixit
                   ` (8 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Now we can save OA whitelisting nonpriv registers to register save/restore
lists. OA nonpriv registers are saved to both hwe->oa_sr as well as
hwe->reg_sr.

During probe, resume and gt-reset flows KMD will apply hwe->reg_sr,
ensuring OA registers are de-whitelisted after these events. For
engine-reset, hwe->reg_sr is registered with GuC and GuC will apply these
registers, ensuring OA registers are de-whitelisted after engine resets.

hwe->oa_sr is used for whitelisting or de-whitelisting OA registers during
OA operation, by toggling the 'deny' bit on oa stream open/close.

v2: Provide more details in commit message (Umesh)

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index e9d0a0b82527d..76ac23644a4df 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -215,6 +215,18 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 	first_oa_slot = whitelist_apply_to_hwe(hwe, &hwe->reg_whitelist, &hwe->reg_sr, 0);
 
 	xe_rtp_process_to_sr(&ctx, &oa_whitelist, &hwe->oa_whitelist, false);
+
+	/*
+	 * Save oa nonpriv registers to hwe->oa_sr, from which oa registers are whitelisted
+	 * or de-whitelisted, by toggling the 'deny' bit on oa stream open/close
+	 */
+	whitelist_apply_to_hwe(hwe, &hwe->oa_whitelist, &hwe->oa_sr, first_oa_slot);
+
+	/*
+	 * Also save oa nonpriv registers to hwe->reg_sr, to ensure oa registers are not
+	 * whitelisted by default after probe, gt reset, resume and engine reset
+	 */
+	whitelist_apply_to_hwe(hwe, &hwe->oa_whitelist, &hwe->reg_sr, first_oa_slot);
 }
 
 /**
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 6/9] drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (4 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 5/9] drm/xe/rtp: Save OA nonpriv registers to register save/restore lists Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 7/9] drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt Ashutosh Dixit
                   ` (7 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Whitelist or de-whitelist OA registers by setting or resetting the 'deny'
bit in OA nonpriv registers and writing new register values to HW.

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 76ac23644a4df..7186998df498c 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -229,6 +229,21 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 	whitelist_apply_to_hwe(hwe, &hwe->oa_whitelist, &hwe->reg_sr, first_oa_slot);
 }
 
+__maybe_unused static void __whitelist_oa_regs(struct xe_hw_engine *hwe, bool whitelist)
+{
+	struct xe_reg_sr_entry *entry;
+	unsigned long reg;
+
+	xa_for_each(&hwe->oa_sr.xa, reg, entry) {
+		if (whitelist)
+			entry->set_bits &= ~RING_FORCE_TO_NONPRIV_DENY;
+		else
+			entry->set_bits |= RING_FORCE_TO_NONPRIV_DENY;
+	}
+
+	xe_reg_sr_apply_mmio(&hwe->oa_sr, hwe->gt);
+}
+
 /**
  * xe_reg_whitelist_print_entry - print one whitelist entry
  * @p: DRM printer
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 7/9] drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (5 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 6/9] drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 8/9] drm/xe/oa: (De-)whitelist OA registers on OA stream open/release Ashutosh Dixit
                   ` (6 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Whitelist or de-whitelist OA registers for all hwe's on the gt on which the
OA stream is opened. This simplifies the case where an oa unit has 0
attached hwe's (but which monitors OA events on the associated GT).

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 32 ++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_reg_whitelist.h |  4 ++++
 2 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 7186998df498c..b2e7aabd19d79 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -229,7 +229,7 @@ void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe)
 	whitelist_apply_to_hwe(hwe, &hwe->oa_whitelist, &hwe->reg_sr, first_oa_slot);
 }
 
-__maybe_unused static void __whitelist_oa_regs(struct xe_hw_engine *hwe, bool whitelist)
+static void __whitelist_oa_regs(struct xe_hw_engine *hwe, bool whitelist)
 {
 	struct xe_reg_sr_entry *entry;
 	unsigned long reg;
@@ -244,6 +244,36 @@ __maybe_unused static void __whitelist_oa_regs(struct xe_hw_engine *hwe, bool wh
 	xe_reg_sr_apply_mmio(&hwe->oa_sr, hwe->gt);
 }
 
+/**
+ * xe_reg_whitelist_oa_regs - whitelist oa registers for gt
+ * @gt: gt to whitelist oa registers for
+ *
+ * Whitelist OA registers by resetting RING_FORCE_TO_NONPRIV_DENY
+ */
+void xe_reg_whitelist_oa_regs(struct xe_gt *gt)
+{
+	struct xe_hw_engine *hwe;
+	enum xe_hw_engine_id id;
+
+	for_each_hw_engine(hwe, gt, id)
+		__whitelist_oa_regs(hwe, true);
+}
+
+/**
+ * xe_reg_dewhitelist_oa_regs - dewhitelist oa registers for gt
+ * @gt: gt to dewhitelist oa registers for
+ *
+ * Dewhitelist OA registers by setting RING_FORCE_TO_NONPRIV_DENY
+ */
+void xe_reg_dewhitelist_oa_regs(struct xe_gt *gt)
+{
+	struct xe_hw_engine *hwe;
+	enum xe_hw_engine_id id;
+
+	for_each_hw_engine(hwe, gt, id)
+		__whitelist_oa_regs(hwe, false);
+}
+
 /**
  * xe_reg_whitelist_print_entry - print one whitelist entry
  * @p: DRM printer
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.h b/drivers/gpu/drm/xe/xe_reg_whitelist.h
index 3b64b42fe96e9..e1eb1b7d5480b 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.h
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.h
@@ -9,12 +9,16 @@
 #include <linux/types.h>
 
 struct drm_printer;
+struct xe_gt;
 struct xe_hw_engine;
 struct xe_reg_sr;
 struct xe_reg_sr_entry;
 
 void xe_reg_whitelist_process_engine(struct xe_hw_engine *hwe);
 
+void xe_reg_whitelist_oa_regs(struct xe_gt *gt);
+void xe_reg_dewhitelist_oa_regs(struct xe_gt *gt);
+
 void xe_reg_whitelist_print_entry(struct drm_printer *p, unsigned int indent,
 				  u32 reg, struct xe_reg_sr_entry *entry);
 
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 8/9] drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (6 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 7/9] drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 22:42 ` [PATCH v3 9/9] drm/xe/rtp: Ensure locking/ref counting for OA whitelists Ashutosh Dixit
                   ` (5 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Whitelist OA registers on stream open and de-whitelist on stream
close/release. Whitelisting is only done when 'stream->sample' is
true. 'stream->sample' is only true when (a) xe_observation_paranoid is set
to false by system admin, or (b) the process is perfmon_capable(). This
therefore enforces the OA register whitelisting security requirements.

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_oa.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 9fbd21b0ef974..b3acbcd678b7c 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -37,6 +37,7 @@
 #include "xe_oa.h"
 #include "xe_observation.h"
 #include "xe_pm.h"
+#include "xe_reg_whitelist.h"
 #include "xe_sched_job.h"
 #include "xe_sriov.h"
 #include "xe_sync.h"
@@ -885,6 +886,9 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
 
 	mutex_destroy(&stream->stream_lock);
 
+	if (stream->sample)
+		xe_reg_dewhitelist_oa_regs(stream->gt);
+
 	xe_oa_disable_metric_set(stream);
 	xe_exec_queue_put(stream->k_exec_q);
 
@@ -1886,6 +1890,9 @@ static int xe_oa_stream_open_ioctl_locked(struct xe_oa *oa,
 		goto err_disable;
 	}
 
+	if (stream->sample)
+		xe_reg_whitelist_oa_regs(stream->gt);
+
 	/* Hold a reference on the drm device till stream_fd is released */
 	drm_dev_get(&stream->oa->xe->drm);
 
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* [PATCH v3 9/9] drm/xe/rtp: Ensure locking/ref counting for OA whitelists
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (7 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 8/9] drm/xe/oa: (De-)whitelist OA registers on OA stream open/release Ashutosh Dixit
@ 2026-06-15 22:42 ` Ashutosh Dixit
  2026-06-15 23:41 ` ✗ CI.checkpatch: warning for Don't whitelist OA registers unconditionally (rev4) Patchwork
                   ` (4 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Ashutosh Dixit @ 2026-06-15 22:42 UTC (permalink / raw)
  To: intel-xe

Since multiple OA streams might be open in parallel on a gt, ensure that
proper locking is in place. Also ensure that OA registers are whitelisted
when the first OA stream is open and de-whitelisted after the last OA
stream is closed.

Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_oa_types.h      | 3 +++
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 9 +++++++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index 3d9ec8490899c..e876e9be92ba5 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -126,6 +126,9 @@ struct xe_oa_gt {
 
 	/** @oa_unit: array of oa_units */
 	struct xe_oa_unit *oa_unit;
+
+	/** @whitelist_count: number of open streams for which oa registers are whitelisted */
+	u32 whitelist_count;
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index b2e7aabd19d79..3d9e3daab01a7 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -255,6 +255,10 @@ void xe_reg_whitelist_oa_regs(struct xe_gt *gt)
 	struct xe_hw_engine *hwe;
 	enum xe_hw_engine_id id;
 
+	lockdep_assert_held(&gt->oa.gt_lock);
+	if (gt->oa.whitelist_count++)
+		return;
+
 	for_each_hw_engine(hwe, gt, id)
 		__whitelist_oa_regs(hwe, true);
 }
@@ -270,6 +274,11 @@ void xe_reg_dewhitelist_oa_regs(struct xe_gt *gt)
 	struct xe_hw_engine *hwe;
 	enum xe_hw_engine_id id;
 
+	lockdep_assert_held(&gt->oa.gt_lock);
+	xe_assert(gt_to_xe(gt), gt->oa.whitelist_count);
+	if (--gt->oa.whitelist_count)
+		return;
+
 	for_each_hw_engine(hwe, gt, id)
 		__whitelist_oa_regs(hwe, false);
 }
-- 
2.54.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread

* ✗ CI.checkpatch: warning for Don't whitelist OA registers unconditionally (rev4)
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (8 preceding siblings ...)
  2026-06-15 22:42 ` [PATCH v3 9/9] drm/xe/rtp: Ensure locking/ref counting for OA whitelists Ashutosh Dixit
@ 2026-06-15 23:41 ` Patchwork
  2026-06-15 23:43 ` ✓ CI.KUnit: success " Patchwork
                   ` (3 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-06-15 23:41 UTC (permalink / raw)
  To: Ashutosh Dixit; +Cc: intel-xe

== Series Details ==

Series: Don't whitelist OA registers unconditionally (rev4)
URL   : https://patchwork.freedesktop.org/series/166809/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 4d85ae4ba934f56a843c39d8c5eb5bd9e53b909d
Author: Ashutosh Dixit <ashutosh.dixit@intel.com>
Date:   Mon Jun 15 15:42:27 2026 -0700

    drm/xe/rtp: Ensure locking/ref counting for OA whitelists
    
    Since multiple OA streams might be open in parallel on a gt, ensure that
    proper locking is in place. Also ensure that OA registers are whitelisted
    when the first OA stream is open and de-whitelisted after the last OA
    stream is closed.
    
    Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
    Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
+ /mt/dim checkpatch c585a0a7e48a48aca80f7c0acb7294c7bf301bb7 drm-intel
d124651dd2c8 drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
ec44f4986e6e drm/xe/rtp: Maintain OA whitelists separately
-:74: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#74: FILE: drivers/gpu/drm/xe/xe_reg_whitelist.c:108:
+static const struct xe_rtp_table_sr oa_whitelist = XE_RTP_TABLE_SR(

total: 0 errors, 0 warnings, 1 checks, 50 lines checked
7e38563088b2 drm/xe/rtp: Keep track of non-OA nonpriv slots
ccc4f836a023 drm/xe/rtp: Generalize whitelist_apply_to_hwe
22d91fdbc1d5 drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
b126d67e9029 drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
fafe4e9f7584 drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
86080ea892f3 drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
4d85ae4ba934 drm/xe/rtp: Ensure locking/ref counting for OA whitelists



^ permalink raw reply	[flat|nested] 17+ messages in thread

* ✓ CI.KUnit: success for Don't whitelist OA registers unconditionally (rev4)
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (9 preceding siblings ...)
  2026-06-15 23:41 ` ✗ CI.checkpatch: warning for Don't whitelist OA registers unconditionally (rev4) Patchwork
@ 2026-06-15 23:43 ` Patchwork
  2026-06-16  0:26 ` ✓ Xe.CI.BAT: " Patchwork
                   ` (2 subsequent siblings)
  13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-06-15 23:43 UTC (permalink / raw)
  To: Ashutosh Dixit; +Cc: intel-xe

== Series Details ==

Series: Don't whitelist OA registers unconditionally (rev4)
URL   : https://patchwork.freedesktop.org/series/166809/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:41:46] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:41:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:42:22] Starting KUnit Kernel (1/1)...
[23:42:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:42:22] ================== guc_buf (11 subtests) ===================
[23:42:22] [PASSED] test_smallest
[23:42:22] [PASSED] test_largest
[23:42:22] [PASSED] test_granular
[23:42:22] [PASSED] test_unique
[23:42:22] [PASSED] test_overlap
[23:42:22] [PASSED] test_reusable
[23:42:22] [PASSED] test_too_big
[23:42:22] [PASSED] test_flush
[23:42:22] [PASSED] test_lookup
[23:42:22] [PASSED] test_data
[23:42:22] [PASSED] test_class
[23:42:22] ===================== [PASSED] guc_buf =====================
[23:42:22] =================== guc_dbm (7 subtests) ===================
[23:42:22] [PASSED] test_empty
[23:42:22] [PASSED] test_default
[23:42:22] ======================== test_size  ========================
[23:42:22] [PASSED] 4
[23:42:22] [PASSED] 8
[23:42:22] [PASSED] 32
[23:42:22] [PASSED] 256
[23:42:22] ==================== [PASSED] test_size ====================
[23:42:22] ======================= test_reuse  ========================
[23:42:22] [PASSED] 4
[23:42:22] [PASSED] 8
[23:42:22] [PASSED] 32
[23:42:22] [PASSED] 256
[23:42:22] =================== [PASSED] test_reuse ====================
[23:42:22] =================== test_range_overlap  ====================
[23:42:22] [PASSED] 4
[23:42:22] [PASSED] 8
[23:42:22] [PASSED] 32
[23:42:22] [PASSED] 256
[23:42:22] =============== [PASSED] test_range_overlap ================
[23:42:22] =================== test_range_compact  ====================
[23:42:22] [PASSED] 4
[23:42:22] [PASSED] 8
[23:42:22] [PASSED] 32
[23:42:22] [PASSED] 256
[23:42:22] =============== [PASSED] test_range_compact ================
[23:42:22] ==================== test_range_spare  =====================
[23:42:22] [PASSED] 4
[23:42:22] [PASSED] 8
[23:42:22] [PASSED] 32
[23:42:22] [PASSED] 256
[23:42:22] ================ [PASSED] test_range_spare =================
[23:42:22] ===================== [PASSED] guc_dbm =====================
[23:42:22] =================== guc_idm (6 subtests) ===================
[23:42:22] [PASSED] bad_init
[23:42:22] [PASSED] no_init
[23:42:22] [PASSED] init_fini
[23:42:22] [PASSED] check_used
[23:42:22] [PASSED] check_quota
[23:42:22] [PASSED] check_all
[23:42:22] ===================== [PASSED] guc_idm =====================
[23:42:22] ================== no_relay (3 subtests) ===================
[23:42:22] [PASSED] xe_drops_guc2pf_if_not_ready
[23:42:22] [PASSED] xe_drops_guc2vf_if_not_ready
[23:42:22] [PASSED] xe_rejects_send_if_not_ready
[23:42:22] ==================== [PASSED] no_relay =====================
[23:42:22] ================== pf_relay (14 subtests) ==================
[23:42:22] [PASSED] pf_rejects_guc2pf_too_short
[23:42:22] [PASSED] pf_rejects_guc2pf_too_long
[23:42:22] [PASSED] pf_rejects_guc2pf_no_payload
[23:42:22] [PASSED] pf_fails_no_payload
[23:42:22] [PASSED] pf_fails_bad_origin
[23:42:22] [PASSED] pf_fails_bad_type
[23:42:22] [PASSED] pf_txn_reports_error
[23:42:22] [PASSED] pf_txn_sends_pf2guc
[23:42:22] [PASSED] pf_sends_pf2guc
[23:42:22] [SKIPPED] pf_loopback_nop
[23:42:22] [SKIPPED] pf_loopback_echo
[23:42:22] [SKIPPED] pf_loopback_fail
[23:42:22] [SKIPPED] pf_loopback_busy
[23:42:22] [SKIPPED] pf_loopback_retry
[23:42:22] ==================== [PASSED] pf_relay =====================
[23:42:22] ================== vf_relay (3 subtests) ===================
[23:42:22] [PASSED] vf_rejects_guc2vf_too_short
[23:42:22] [PASSED] vf_rejects_guc2vf_too_long
[23:42:22] [PASSED] vf_rejects_guc2vf_no_payload
[23:42:22] ==================== [PASSED] vf_relay =====================
[23:42:22] ================ pf_gt_config (9 subtests) =================
[23:42:22] [PASSED] fair_contexts_1vf
[23:42:22] [PASSED] fair_doorbells_1vf
[23:42:22] [PASSED] fair_ggtt_1vf
[23:42:22] ====================== fair_vram_1vf  ======================
[23:42:22] [PASSED] 3.50 GiB
[23:42:22] [PASSED] 11.5 GiB
[23:42:22] [PASSED] 15.5 GiB
[23:42:22] [PASSED] 31.5 GiB
[23:42:22] [PASSED] 63.5 GiB
[23:42:22] [PASSED] 1.91 GiB
[23:42:22] ================== [PASSED] fair_vram_1vf ==================
[23:42:22] ================ fair_vram_1vf_admin_only  =================
[23:42:22] [PASSED] 3.50 GiB
[23:42:22] [PASSED] 11.5 GiB
[23:42:22] [PASSED] 15.5 GiB
[23:42:22] [PASSED] 31.5 GiB
[23:42:22] [PASSED] 63.5 GiB
[23:42:22] [PASSED] 1.91 GiB
[23:42:22] ============ [PASSED] fair_vram_1vf_admin_only =============
[23:42:22] ====================== fair_contexts  ======================
[23:42:22] [PASSED] 1 VF
[23:42:22] [PASSED] 2 VFs
[23:42:22] [PASSED] 3 VFs
[23:42:22] [PASSED] 4 VFs
[23:42:22] [PASSED] 5 VFs
[23:42:22] [PASSED] 6 VFs
[23:42:22] [PASSED] 7 VFs
[23:42:22] [PASSED] 8 VFs
[23:42:22] [PASSED] 9 VFs
[23:42:22] [PASSED] 10 VFs
[23:42:22] [PASSED] 11 VFs
[23:42:22] [PASSED] 12 VFs
[23:42:22] [PASSED] 13 VFs
[23:42:22] [PASSED] 14 VFs
[23:42:22] [PASSED] 15 VFs
[23:42:22] [PASSED] 16 VFs
[23:42:22] [PASSED] 17 VFs
[23:42:22] [PASSED] 18 VFs
[23:42:22] [PASSED] 19 VFs
[23:42:22] [PASSED] 20 VFs
[23:42:22] [PASSED] 21 VFs
[23:42:22] [PASSED] 22 VFs
[23:42:22] [PASSED] 23 VFs
[23:42:22] [PASSED] 24 VFs
[23:42:22] [PASSED] 25 VFs
[23:42:22] [PASSED] 26 VFs
[23:42:22] [PASSED] 27 VFs
[23:42:22] [PASSED] 28 VFs
[23:42:22] [PASSED] 29 VFs
[23:42:22] [PASSED] 30 VFs
[23:42:22] [PASSED] 31 VFs
[23:42:22] [PASSED] 32 VFs
[23:42:22] [PASSED] 33 VFs
[23:42:22] [PASSED] 34 VFs
[23:42:22] [PASSED] 35 VFs
[23:42:22] [PASSED] 36 VFs
[23:42:22] [PASSED] 37 VFs
[23:42:22] [PASSED] 38 VFs
[23:42:22] [PASSED] 39 VFs
[23:42:22] [PASSED] 40 VFs
[23:42:22] [PASSED] 41 VFs
[23:42:22] [PASSED] 42 VFs
[23:42:22] [PASSED] 43 VFs
[23:42:22] [PASSED] 44 VFs
[23:42:22] [PASSED] 45 VFs
[23:42:22] [PASSED] 46 VFs
[23:42:22] [PASSED] 47 VFs
[23:42:22] [PASSED] 48 VFs
[23:42:22] [PASSED] 49 VFs
[23:42:22] [PASSED] 50 VFs
[23:42:22] [PASSED] 51 VFs
[23:42:22] [PASSED] 52 VFs
[23:42:22] [PASSED] 53 VFs
[23:42:22] [PASSED] 54 VFs
[23:42:22] [PASSED] 55 VFs
[23:42:22] [PASSED] 56 VFs
[23:42:22] [PASSED] 57 VFs
[23:42:22] [PASSED] 58 VFs
[23:42:22] [PASSED] 59 VFs
[23:42:22] [PASSED] 60 VFs
[23:42:22] [PASSED] 61 VFs
[23:42:22] [PASSED] 62 VFs
[23:42:22] [PASSED] 63 VFs
[23:42:22] ================== [PASSED] fair_contexts ==================
[23:42:22] ===================== fair_doorbells  ======================
[23:42:22] [PASSED] 1 VF
[23:42:22] [PASSED] 2 VFs
[23:42:22] [PASSED] 3 VFs
[23:42:22] [PASSED] 4 VFs
[23:42:22] [PASSED] 5 VFs
[23:42:22] [PASSED] 6 VFs
[23:42:22] [PASSED] 7 VFs
[23:42:22] [PASSED] 8 VFs
[23:42:22] [PASSED] 9 VFs
[23:42:22] [PASSED] 10 VFs
[23:42:22] [PASSED] 11 VFs
[23:42:22] [PASSED] 12 VFs
[23:42:22] [PASSED] 13 VFs
[23:42:22] [PASSED] 14 VFs
[23:42:22] [PASSED] 15 VFs
[23:42:22] [PASSED] 16 VFs
[23:42:22] [PASSED] 17 VFs
[23:42:22] [PASSED] 18 VFs
[23:42:22] [PASSED] 19 VFs
[23:42:22] [PASSED] 20 VFs
[23:42:22] [PASSED] 21 VFs
[23:42:22] [PASSED] 22 VFs
[23:42:22] [PASSED] 23 VFs
[23:42:22] [PASSED] 24 VFs
[23:42:22] [PASSED] 25 VFs
[23:42:22] [PASSED] 26 VFs
[23:42:22] [PASSED] 27 VFs
[23:42:22] [PASSED] 28 VFs
[23:42:22] [PASSED] 29 VFs
[23:42:22] [PASSED] 30 VFs
[23:42:22] [PASSED] 31 VFs
[23:42:22] [PASSED] 32 VFs
[23:42:22] [PASSED] 33 VFs
[23:42:22] [PASSED] 34 VFs
[23:42:22] [PASSED] 35 VFs
[23:42:22] [PASSED] 36 VFs
[23:42:22] [PASSED] 37 VFs
[23:42:22] [PASSED] 38 VFs
[23:42:22] [PASSED] 39 VFs
[23:42:22] [PASSED] 40 VFs
[23:42:22] [PASSED] 41 VFs
[23:42:22] [PASSED] 42 VFs
[23:42:22] [PASSED] 43 VFs
[23:42:22] [PASSED] 44 VFs
[23:42:22] [PASSED] 45 VFs
[23:42:22] [PASSED] 46 VFs
[23:42:22] [PASSED] 47 VFs
[23:42:22] [PASSED] 48 VFs
[23:42:22] [PASSED] 49 VFs
[23:42:22] [PASSED] 50 VFs
[23:42:22] [PASSED] 51 VFs
[23:42:22] [PASSED] 52 VFs
[23:42:22] [PASSED] 53 VFs
[23:42:22] [PASSED] 54 VFs
[23:42:22] [PASSED] 55 VFs
[23:42:22] [PASSED] 56 VFs
[23:42:22] [PASSED] 57 VFs
[23:42:22] [PASSED] 58 VFs
[23:42:22] [PASSED] 59 VFs
[23:42:22] [PASSED] 60 VFs
[23:42:22] [PASSED] 61 VFs
[23:42:22] [PASSED] 62 VFs
[23:42:22] [PASSED] 63 VFs
[23:42:22] ================= [PASSED] fair_doorbells ==================
[23:42:22] ======================== fair_ggtt  ========================
[23:42:22] [PASSED] 1 VF
[23:42:22] [PASSED] 2 VFs
[23:42:22] [PASSED] 3 VFs
[23:42:22] [PASSED] 4 VFs
[23:42:22] [PASSED] 5 VFs
[23:42:22] [PASSED] 6 VFs
[23:42:22] [PASSED] 7 VFs
[23:42:22] [PASSED] 8 VFs
[23:42:22] [PASSED] 9 VFs
[23:42:22] [PASSED] 10 VFs
[23:42:22] [PASSED] 11 VFs
[23:42:22] [PASSED] 12 VFs
[23:42:22] [PASSED] 13 VFs
[23:42:22] [PASSED] 14 VFs
[23:42:22] [PASSED] 15 VFs
[23:42:22] [PASSED] 16 VFs
[23:42:22] [PASSED] 17 VFs
[23:42:22] [PASSED] 18 VFs
[23:42:22] [PASSED] 19 VFs
[23:42:22] [PASSED] 20 VFs
[23:42:22] [PASSED] 21 VFs
[23:42:22] [PASSED] 22 VFs
[23:42:22] [PASSED] 23 VFs
[23:42:22] [PASSED] 24 VFs
[23:42:22] [PASSED] 25 VFs
[23:42:22] [PASSED] 26 VFs
[23:42:22] [PASSED] 27 VFs
[23:42:22] [PASSED] 28 VFs
[23:42:22] [PASSED] 29 VFs
[23:42:22] [PASSED] 30 VFs
[23:42:22] [PASSED] 31 VFs
[23:42:22] [PASSED] 32 VFs
[23:42:22] [PASSED] 33 VFs
[23:42:22] [PASSED] 34 VFs
[23:42:22] [PASSED] 35 VFs
[23:42:22] [PASSED] 36 VFs
[23:42:22] [PASSED] 37 VFs
[23:42:22] [PASSED] 38 VFs
[23:42:22] [PASSED] 39 VFs
[23:42:22] [PASSED] 40 VFs
[23:42:22] [PASSED] 41 VFs
[23:42:22] [PASSED] 42 VFs
[23:42:22] [PASSED] 43 VFs
[23:42:22] [PASSED] 44 VFs
[23:42:22] [PASSED] 45 VFs
[23:42:22] [PASSED] 46 VFs
[23:42:22] [PASSED] 47 VFs
[23:42:22] [PASSED] 48 VFs
[23:42:22] [PASSED] 49 VFs
[23:42:22] [PASSED] 50 VFs
[23:42:22] [PASSED] 51 VFs
[23:42:22] [PASSED] 52 VFs
[23:42:22] [PASSED] 53 VFs
[23:42:22] [PASSED] 54 VFs
[23:42:22] [PASSED] 55 VFs
[23:42:22] [PASSED] 56 VFs
[23:42:22] [PASSED] 57 VFs
[23:42:22] [PASSED] 58 VFs
[23:42:22] [PASSED] 59 VFs
[23:42:22] [PASSED] 60 VFs
[23:42:22] [PASSED] 61 VFs
[23:42:22] [PASSED] 62 VFs
[23:42:22] [PASSED] 63 VFs
[23:42:22] ==================== [PASSED] fair_ggtt ====================
[23:42:22] ======================== fair_vram  ========================
[23:42:22] [PASSED] 1 VF
[23:42:22] [PASSED] 2 VFs
[23:42:22] [PASSED] 3 VFs
[23:42:22] [PASSED] 4 VFs
[23:42:22] [PASSED] 5 VFs
[23:42:22] [PASSED] 6 VFs
[23:42:22] [PASSED] 7 VFs
[23:42:22] [PASSED] 8 VFs
[23:42:22] [PASSED] 9 VFs
[23:42:22] [PASSED] 10 VFs
[23:42:22] [PASSED] 11 VFs
[23:42:22] [PASSED] 12 VFs
[23:42:22] [PASSED] 13 VFs
[23:42:22] [PASSED] 14 VFs
[23:42:22] [PASSED] 15 VFs
[23:42:22] [PASSED] 16 VFs
[23:42:22] [PASSED] 17 VFs
[23:42:22] [PASSED] 18 VFs
[23:42:22] [PASSED] 19 VFs
[23:42:22] [PASSED] 20 VFs
[23:42:22] [PASSED] 21 VFs
[23:42:22] [PASSED] 22 VFs
[23:42:22] [PASSED] 23 VFs
[23:42:22] [PASSED] 24 VFs
[23:42:22] [PASSED] 25 VFs
[23:42:22] [PASSED] 26 VFs
[23:42:22] [PASSED] 27 VFs
[23:42:22] [PASSED] 28 VFs
[23:42:22] [PASSED] 29 VFs
[23:42:22] [PASSED] 30 VFs
[23:42:22] [PASSED] 31 VFs
[23:42:22] [PASSED] 32 VFs
[23:42:22] [PASSED] 33 VFs
[23:42:22] [PASSED] 34 VFs
[23:42:22] [PASSED] 35 VFs
[23:42:22] [PASSED] 36 VFs
[23:42:22] [PASSED] 37 VFs
[23:42:22] [PASSED] 38 VFs
[23:42:22] [PASSED] 39 VFs
[23:42:22] [PASSED] 40 VFs
[23:42:22] [PASSED] 41 VFs
[23:42:22] [PASSED] 42 VFs
[23:42:22] [PASSED] 43 VFs
[23:42:22] [PASSED] 44 VFs
[23:42:22] [PASSED] 45 VFs
[23:42:22] [PASSED] 46 VFs
[23:42:22] [PASSED] 47 VFs
[23:42:22] [PASSED] 48 VFs
[23:42:22] [PASSED] 49 VFs
[23:42:22] [PASSED] 50 VFs
[23:42:22] [PASSED] 51 VFs
[23:42:22] [PASSED] 52 VFs
[23:42:22] [PASSED] 53 VFs
[23:42:22] [PASSED] 54 VFs
[23:42:22] [PASSED] 55 VFs
[23:42:22] [PASSED] 56 VFs
[23:42:22] [PASSED] 57 VFs
[23:42:22] [PASSED] 58 VFs
[23:42:22] [PASSED] 59 VFs
[23:42:22] [PASSED] 60 VFs
[23:42:22] [PASSED] 61 VFs
[23:42:22] [PASSED] 62 VFs
[23:42:22] [PASSED] 63 VFs
[23:42:22] ==================== [PASSED] fair_vram ====================
[23:42:22] ================== [PASSED] pf_gt_config ===================
[23:42:22] ===================== lmtt (1 subtest) =====================
[23:42:22] ======================== test_ops  =========================
[23:42:22] [PASSED] 2-level
[23:42:22] [PASSED] multi-level
[23:42:22] ==================== [PASSED] test_ops =====================
[23:42:22] ====================== [PASSED] lmtt =======================
[23:42:22] ================= pf_service (11 subtests) =================
[23:42:22] [PASSED] pf_negotiate_any
[23:42:22] [PASSED] pf_negotiate_base_match
[23:42:22] [PASSED] pf_negotiate_base_newer
[23:42:22] [PASSED] pf_negotiate_base_next
[23:42:22] [SKIPPED] pf_negotiate_base_older
[23:42:22] [PASSED] pf_negotiate_base_prev
[23:42:22] [PASSED] pf_negotiate_latest_match
[23:42:22] [PASSED] pf_negotiate_latest_newer
[23:42:22] [PASSED] pf_negotiate_latest_next
[23:42:22] [SKIPPED] pf_negotiate_latest_older
[23:42:22] [SKIPPED] pf_negotiate_latest_prev
[23:42:22] =================== [PASSED] pf_service ====================
[23:42:22] ================= xe_guc_g2g (2 subtests) ==================
[23:42:22] ============== xe_live_guc_g2g_kunit_default  ==============
[23:42:22] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:42:22] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:42:22] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:42:22] =================== [SKIPPED] xe_guc_g2g ===================
[23:42:22] =================== xe_mocs (2 subtests) ===================
[23:42:22] ================ xe_live_mocs_kernel_kunit  ================
[23:42:22] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:42:22] ================ xe_live_mocs_reset_kunit  =================
[23:42:22] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:42:22] ==================== [SKIPPED] xe_mocs =====================
[23:42:22] ================= xe_migrate (2 subtests) ==================
[23:42:22] ================= xe_migrate_sanity_kunit  =================
[23:42:22] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:42:22] ================== xe_validate_ccs_kunit  ==================
[23:42:22] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:42:22] =================== [SKIPPED] xe_migrate ===================
[23:42:22] ================== xe_dma_buf (1 subtest) ==================
[23:42:22] ==================== xe_dma_buf_kunit  =====================
[23:42:22] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:42:22] =================== [SKIPPED] xe_dma_buf ===================
[23:42:22] ================= xe_bo_shrink (1 subtest) =================
[23:42:22] =================== xe_bo_shrink_kunit  ====================
[23:42:22] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:42:22] ================== [SKIPPED] xe_bo_shrink ==================
[23:42:22] ==================== xe_bo (2 subtests) ====================
[23:42:22] ================== xe_ccs_migrate_kunit  ===================
[23:42:22] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:42:22] ==================== xe_bo_evict_kunit  ====================
[23:42:22] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:42:22] ===================== [SKIPPED] xe_bo ======================
[23:42:22] ==================== args (13 subtests) ====================
[23:42:22] [PASSED] count_args_test
[23:42:22] [PASSED] call_args_example
[23:42:22] [PASSED] call_args_test
[23:42:22] [PASSED] drop_first_arg_example
[23:42:22] [PASSED] drop_first_arg_test
[23:42:22] [PASSED] first_arg_example
[23:42:22] [PASSED] first_arg_test
[23:42:22] [PASSED] last_arg_example
[23:42:22] [PASSED] last_arg_test
[23:42:22] [PASSED] pick_arg_example
[23:42:22] [PASSED] if_args_example
[23:42:22] [PASSED] if_args_test
[23:42:22] [PASSED] sep_comma_example
[23:42:22] ====================== [PASSED] args =======================
[23:42:22] =================== xe_pci (3 subtests) ====================
[23:42:22] ==================== check_graphics_ip  ====================
[23:42:22] [PASSED] 12.00 Xe_LP
[23:42:22] [PASSED] 12.10 Xe_LP+
[23:42:22] [PASSED] 12.55 Xe_HPG
[23:42:22] [PASSED] 12.60 Xe_HPC
[23:42:22] [PASSED] 12.70 Xe_LPG
[23:42:22] [PASSED] 12.71 Xe_LPG
[23:42:22] [PASSED] 12.74 Xe_LPG+
[23:42:22] [PASSED] 20.01 Xe2_HPG
[23:42:22] [PASSED] 20.02 Xe2_HPG
[23:42:22] [PASSED] 20.04 Xe2_LPG
[23:42:22] [PASSED] 30.00 Xe3_LPG
[23:42:22] [PASSED] 30.01 Xe3_LPG
[23:42:22] [PASSED] 30.03 Xe3_LPG
[23:42:22] [PASSED] 30.04 Xe3_LPG
[23:42:22] [PASSED] 30.05 Xe3_LPG
[23:42:22] [PASSED] 35.10 Xe3p_LPG
[23:42:22] [PASSED] 35.11 Xe3p_XPC
[23:42:22] ================ [PASSED] check_graphics_ip ================
[23:42:22] ===================== check_media_ip  ======================
[23:42:22] [PASSED] 12.00 Xe_M
[23:42:22] [PASSED] 12.55 Xe_HPM
[23:42:22] [PASSED] 13.00 Xe_LPM+
[23:42:22] [PASSED] 13.01 Xe2_HPM
[23:42:22] [PASSED] 20.00 Xe2_LPM
[23:42:22] [PASSED] 30.00 Xe3_LPM
[23:42:22] [PASSED] 30.02 Xe3_LPM
[23:42:22] [PASSED] 35.00 Xe3p_LPM
[23:42:22] [PASSED] 35.03 Xe3p_HPM
[23:42:22] ================= [PASSED] check_media_ip ==================
[23:42:22] =================== check_platform_desc  ===================
[23:42:22] [PASSED] 0x9A60 (TIGERLAKE)
[23:42:22] [PASSED] 0x9A68 (TIGERLAKE)
[23:42:22] [PASSED] 0x9A70 (TIGERLAKE)
[23:42:22] [PASSED] 0x9A40 (TIGERLAKE)
[23:42:22] [PASSED] 0x9A49 (TIGERLAKE)
[23:42:22] [PASSED] 0x9A59 (TIGERLAKE)
[23:42:22] [PASSED] 0x9A78 (TIGERLAKE)
[23:42:22] [PASSED] 0x9AC0 (TIGERLAKE)
[23:42:22] [PASSED] 0x9AC9 (TIGERLAKE)
[23:42:22] [PASSED] 0x9AD9 (TIGERLAKE)
[23:42:22] [PASSED] 0x9AF8 (TIGERLAKE)
[23:42:22] [PASSED] 0x4C80 (ROCKETLAKE)
[23:42:22] [PASSED] 0x4C8A (ROCKETLAKE)
[23:42:22] [PASSED] 0x4C8B (ROCKETLAKE)
[23:42:22] [PASSED] 0x4C8C (ROCKETLAKE)
[23:42:22] [PASSED] 0x4C90 (ROCKETLAKE)
[23:42:22] [PASSED] 0x4C9A (ROCKETLAKE)
[23:42:22] [PASSED] 0x4680 (ALDERLAKE_S)
[23:42:22] [PASSED] 0x4682 (ALDERLAKE_S)
[23:42:22] [PASSED] 0x4688 (ALDERLAKE_S)
[23:42:22] [PASSED] 0x468A (ALDERLAKE_S)
[23:42:22] [PASSED] 0x468B (ALDERLAKE_S)
[23:42:22] [PASSED] 0x4690 (ALDERLAKE_S)
[23:42:22] [PASSED] 0x4692 (ALDERLAKE_S)
[23:42:22] [PASSED] 0x4693 (ALDERLAKE_S)
[23:42:22] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46AA (ALDERLAKE_P)
[23:42:22] [PASSED] 0x462A (ALDERLAKE_P)
[23:42:22] [PASSED] 0x4626 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x4628 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:42:22] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:42:22] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:42:22] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:42:22] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:42:22] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:42:22] [PASSED] 0xA721 (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA720 (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:42:22] [PASSED] 0xA780 (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA781 (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA782 (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA783 (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA788 (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA789 (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA78A (ALDERLAKE_S)
[23:42:22] [PASSED] 0xA78B (ALDERLAKE_S)
[23:42:22] [PASSED] 0x4905 (DG1)
[23:42:22] [PASSED] 0x4906 (DG1)
[23:42:22] [PASSED] 0x4907 (DG1)
[23:42:22] [PASSED] 0x4908 (DG1)
[23:42:22] [PASSED] 0x4909 (DG1)
[23:42:22] [PASSED] 0x56C0 (DG2)
[23:42:22] [PASSED] 0x56C2 (DG2)
[23:42:22] [PASSED] 0x56C1 (DG2)
[23:42:22] [PASSED] 0x7D51 (METEORLAKE)
[23:42:22] [PASSED] 0x7DD1 (METEORLAKE)
[23:42:22] [PASSED] 0x7D41 (METEORLAKE)
[23:42:22] [PASSED] 0x7D67 (METEORLAKE)
[23:42:22] [PASSED] 0xB640 (METEORLAKE)
[23:42:22] [PASSED] 0x56A0 (DG2)
[23:42:22] [PASSED] 0x56A1 (DG2)
[23:42:22] [PASSED] 0x56A2 (DG2)
[23:42:22] [PASSED] 0x56BE (DG2)
[23:42:22] [PASSED] 0x56BF (DG2)
[23:42:22] [PASSED] 0x5690 (DG2)
[23:42:22] [PASSED] 0x5691 (DG2)
[23:42:22] [PASSED] 0x5692 (DG2)
[23:42:22] [PASSED] 0x56A5 (DG2)
[23:42:22] [PASSED] 0x56A6 (DG2)
[23:42:22] [PASSED] 0x56B0 (DG2)
[23:42:22] [PASSED] 0x56B1 (DG2)
[23:42:22] [PASSED] 0x56BA (DG2)
[23:42:22] [PASSED] 0x56BB (DG2)
[23:42:22] [PASSED] 0x56BC (DG2)
[23:42:22] [PASSED] 0x56BD (DG2)
[23:42:22] [PASSED] 0x5693 (DG2)
[23:42:22] [PASSED] 0x5694 (DG2)
[23:42:22] [PASSED] 0x5695 (DG2)
[23:42:22] [PASSED] 0x56A3 (DG2)
[23:42:22] [PASSED] 0x56A4 (DG2)
[23:42:22] [PASSED] 0x56B2 (DG2)
[23:42:22] [PASSED] 0x56B3 (DG2)
[23:42:22] [PASSED] 0x5696 (DG2)
[23:42:22] [PASSED] 0x5697 (DG2)
[23:42:22] [PASSED] 0xB69 (PVC)
[23:42:22] [PASSED] 0xB6E (PVC)
[23:42:22] [PASSED] 0xBD4 (PVC)
[23:42:22] [PASSED] 0xBD5 (PVC)
[23:42:22] [PASSED] 0xBD6 (PVC)
[23:42:22] [PASSED] 0xBD7 (PVC)
[23:42:22] [PASSED] 0xBD8 (PVC)
[23:42:22] [PASSED] 0xBD9 (PVC)
[23:42:22] [PASSED] 0xBDA (PVC)
[23:42:22] [PASSED] 0xBDB (PVC)
[23:42:22] [PASSED] 0xBE0 (PVC)
[23:42:22] [PASSED] 0xBE1 (PVC)
[23:42:22] [PASSED] 0xBE5 (PVC)
[23:42:22] [PASSED] 0x7D40 (METEORLAKE)
[23:42:22] [PASSED] 0x7D45 (METEORLAKE)
[23:42:22] [PASSED] 0x7D55 (METEORLAKE)
[23:42:22] [PASSED] 0x7D60 (METEORLAKE)
[23:42:22] [PASSED] 0x7DD5 (METEORLAKE)
[23:42:22] [PASSED] 0x6420 (LUNARLAKE)
[23:42:22] [PASSED] 0x64A0 (LUNARLAKE)
[23:42:22] [PASSED] 0x64B0 (LUNARLAKE)
[23:42:22] [PASSED] 0xE202 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE209 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE20B (BATTLEMAGE)
[23:42:22] [PASSED] 0xE20C (BATTLEMAGE)
[23:42:22] [PASSED] 0xE20D (BATTLEMAGE)
[23:42:22] [PASSED] 0xE210 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE211 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE212 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE216 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE220 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE221 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE222 (BATTLEMAGE)
[23:42:22] [PASSED] 0xE223 (BATTLEMAGE)
[23:42:22] [PASSED] 0xB080 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB081 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB082 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB083 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB084 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB085 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB086 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB087 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB08F (PANTHERLAKE)
[23:42:22] [PASSED] 0xB090 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:42:22] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:42:22] [PASSED] 0xFD80 (PANTHERLAKE)
[23:42:22] [PASSED] 0xFD81 (PANTHERLAKE)
[23:42:22] [PASSED] 0xD740 (NOVALAKE_S)
[23:42:22] [PASSED] 0xD741 (NOVALAKE_S)
[23:42:22] [PASSED] 0xD742 (NOVALAKE_S)
[23:42:22] [PASSED] 0xD743 (NOVALAKE_S)
[23:42:22] [PASSED] 0xD745 (NOVALAKE_S)
[23:42:22] [PASSED] 0xD74A (NOVALAKE_S)
[23:42:22] [PASSED] 0xD74B (NOVALAKE_S)
[23:42:22] [PASSED] 0x674C (CRESCENTISLAND)
[23:42:22] [PASSED] 0x674D (CRESCENTISLAND)
[23:42:22] [PASSED] 0x674E (CRESCENTISLAND)
[23:42:22] [PASSED] 0x674F (CRESCENTISLAND)
[23:42:22] [PASSED] 0x6750 (CRESCENTISLAND)
[23:42:22] [PASSED] 0xD750 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD751 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD752 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD753 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD754 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD755 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD756 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD757 (NOVALAKE_P)
[23:42:22] [PASSED] 0xD75F (NOVALAKE_P)
[23:42:22] =============== [PASSED] check_platform_desc ===============
[23:42:22] ===================== [PASSED] xe_pci ======================
[23:42:22] ============= xe_rtp_tables_test (4 subtests) ==============
[23:42:22] ================== xe_rtp_table_gt_test  ===================
[23:42:22] [PASSED] gt_was/14011060649
[23:42:22] [PASSED] gt_was/14011059788
[23:42:22] [PASSED] gt_was/14015795083
[23:42:22] [PASSED] gt_was/16021867713
[23:42:22] [PASSED] gt_was/14019449301
[23:42:22] [PASSED] gt_was/16028005424
[23:42:22] [PASSED] gt_was/14026578760
[23:42:22] [PASSED] gt_was/1409420604
[23:42:22] [PASSED] gt_was/1408615072
[23:42:22] [PASSED] gt_was/22010523718
[23:42:22] [PASSED] gt_was/14011006942
[23:42:22] [PASSED] gt_was/14014830051
[23:42:22] [PASSED] gt_was/18018781329
[23:42:22] [PASSED] gt_was/1509235366
[23:42:22] [PASSED] gt_was/18018781329
[23:42:22] [PASSED] gt_was/16016694945
[23:42:22] [PASSED] gt_was/14018575942
[23:42:22] [PASSED] gt_was/22016670082
[23:42:22] [PASSED] gt_was/22016670082
[23:42:22] [PASSED] gt_was/14017421178
[23:42:22] [PASSED] gt_was/16025250150
[23:42:22] [PASSED] gt_was/14021871409
[23:42:22] [PASSED] gt_was/16021865536
[23:42:22] [PASSED] gt_was/14021486841
[23:42:22] [PASSED] gt_was/14025160223
[23:42:22] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[23:42:22] [PASSED] gt_was/14025635424
[23:42:22] [PASSED] gt_was/16028005424
[23:42:22] ============== [PASSED] xe_rtp_table_gt_test ===============
[23:42:22] ================== xe_rtp_table_gt_test  ===================
[23:42:22] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[23:42:22] [PASSED] gt_tunings/Tuning: 32B Access Enable
[23:42:22] [PASSED] gt_tunings/Tuning: L3 cache
[23:42:22] [PASSED] gt_tunings/Tuning: L3 cache - media
[23:42:22] [PASSED] gt_tunings/Tuning: Compression Overfetch
[23:42:22] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[23:42:22] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[23:42:22] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[23:42:22] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[23:42:22] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[23:42:22] [PASSED] gt_tunings/Tuning: Stateless compression control
[23:42:22] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[23:42:22] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[23:42:22] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[23:42:22] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[23:42:22] ============== [PASSED] xe_rtp_table_gt_test ===============
[23:42:22] ================== xe_rtp_table_oob_test  ==================
[23:42:22] [PASSED] oob_was/1607983814
[23:42:22] [PASSED] oob_was/16010904313
[23:42:22] [PASSED] oob_was/18022495364
[23:42:22] [PASSED] oob_was/22012773006
[23:42:22] [PASSED] oob_was/14014475959
[23:42:22] [PASSED] oob_was/22011391025
[23:42:22] [PASSED] oob_was/22012727170
[23:42:22] [PASSED] oob_was/22012727685
[23:42:22] [PASSED] oob_was/22016596838
[23:42:22] [PASSED] oob_was/18020744125
[23:42:22] [PASSED] oob_was/1409600907
[23:42:22] [PASSED] oob_was/22014953428
[23:42:22] [PASSED] oob_was/16017236439
[23:42:22] [PASSED] oob_was/14019821291
[23:42:22] [PASSED] oob_was/14015076503
[23:42:22] [PASSED] oob_was/14018913170
[23:42:22] [PASSED] oob_was/14018094691
[23:42:22] [PASSED] oob_was/18024947630
[23:42:22] [PASSED] oob_was/16022287689
[23:42:22] [PASSED] oob_was/13011645652
[23:42:22] [PASSED] oob_was/14022293748
[23:42:22] [PASSED] oob_was/22019794406
[23:42:22] [PASSED] oob_was/22019338487
[23:42:22] [PASSED] oob_was/16023588340
[23:42:22] [PASSED] oob_was/14019789679
[23:42:22] [PASSED] oob_was/14022866841
[23:42:22] [PASSED] oob_was/16021333562
[23:42:22] [PASSED] oob_was/14016712196
[23:42:22] [PASSED] oob_was/14015568240
[23:42:22] [PASSED] oob_was/18013179988
[23:42:22] [PASSED] oob_was/1508761755
[23:42:22] [PASSED] oob_was/16023105232
[23:42:22] [PASSED] oob_was/16026508708
[23:42:22] [PASSED] oob_was/14020001231
[23:42:22] [PASSED] oob_was/16023683509
[23:42:22] [PASSED] oob_was/14025515070
[23:42:22] [PASSED] oob_was/15015404425_disable
[23:42:22] [PASSED] oob_was/16026007364
[23:42:22] [PASSED] oob_was/14020316580
[23:42:22] [PASSED] oob_was/14025883347
[23:42:22] [PASSED] oob_was/16029380221
[23:42:22] ============== [PASSED] xe_rtp_table_oob_test ==============
[23:42:22] ================ xe_rtp_table_dev_oob_test  ================
[23:42:22] [PASSED] device_oob_was/22010954014
[23:42:22] [PASSED] device_oob_was/15015404425
[23:42:22] [PASSED] device_oob_was/22019338487_display
[23:42:22] [PASSED] device_oob_was/14022085890
[23:42:22] [PASSED] device_oob_was/14026539277
[23:42:22] [PASSED] device_oob_was/14026633728
[23:42:22] [PASSED] device_oob_was/14026746987
[23:42:22] [PASSED] device_oob_was/14026779378
[23:42:22] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[23:42:22] =============== [PASSED] xe_rtp_tables_test ================
[23:42:22] =================== xe_rtp (3 subtests) ====================
[23:42:22] =================== xe_rtp_rules_tests  ====================
[23:42:22] [PASSED] no
[23:42:22] [PASSED] yes
[23:42:22] [PASSED] no-and-no
[23:42:22] [PASSED] no-and-yes
[23:42:22] [PASSED] yes-and-no
[23:42:22] [PASSED] yes-and-yes
[23:42:22] [PASSED] no-or-no
[23:42:22] [PASSED] no-or-yes
[23:42:22] [PASSED] yes-or-no
[23:42:22] [PASSED] yes-or-yes
[23:42:22] [PASSED] no-yes-or-yes-no
[23:42:22] [PASSED] no-yes-or-yes-yes
[23:42:22] [PASSED] yes-yes-or-no-yes
[23:42:22] [PASSED] yes-yes-or-yes-yes
[23:42:22] [PASSED] no-no-or-yes-or-no
[23:42:22] [PASSED] or
[23:42:22] [PASSED] or-yes
[23:42:22] [PASSED] or-no
[23:42:22] [PASSED] yes-or
[23:42:22] [PASSED] no-or
[23:42:22] [PASSED] no-or-or-yes
[23:42:22] [PASSED] yes-or-or-no
[23:42:22] [PASSED] no-or-or-no
[23:42:22] [PASSED] missing-context-engine-class
[23:42:22] [PASSED] missing-context-engine-class-or-yes
[23:42:22] [PASSED] missing-context-engine-class-or-or-yes
[23:42:22] =============== [PASSED] xe_rtp_rules_tests ================
[23:42:22] =============== xe_rtp_process_to_sr_tests  ================
[23:42:22] [PASSED] coalesce-same-reg
[23:42:22] [PASSED] no-match-no-add
[23:42:22] [PASSED] two-regs-two-entries
[23:42:22] [PASSED] clr-one-set-other
[23:42:22] [PASSED] set-field
[23:42:22] [PASSED] conflict-duplicate
[23:42:22] [PASSED] conflict-not-disjoint
[23:42:22] [PASSED] conflict-reg-type
[23:42:22] [PASSED] bad-mcr-reg-forced-to-regular
[23:42:22] [PASSED] bad-regular-reg-forced-to-mcr
[23:42:22] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:42:22] ================== xe_rtp_process_tests  ===================
[23:42:22] [PASSED] active1
[23:42:22] [PASSED] active2
[23:42:22] [PASSED] active-inactive
[23:42:22] [PASSED] inactive-active
[23:42:22] [PASSED] inactive-active-inactive
[23:42:22] [PASSED] inactive-inactive-inactive
[23:42:22] ============== [PASSED] xe_rtp_process_tests ===============
[23:42:22] ===================== [PASSED] xe_rtp ======================
[23:42:22] ==================== xe_wa (1 subtest) =====================
[23:42:22] ======================== xe_wa_gt  =========================
[23:42:22] [PASSED] TIGERLAKE B0
[23:42:22] [PASSED] DG1 A0
[23:42:22] [PASSED] DG1 B0
[23:42:22] [PASSED] ALDERLAKE_S A0
[23:42:22] [PASSED] ALDERLAKE_S B0
[23:42:22] [PASSED] ALDERLAKE_S C0
[23:42:22] [PASSED] ALDERLAKE_S D0
[23:42:22] [PASSED] ALDERLAKE_P A0
[23:42:22] [PASSED] ALDERLAKE_P B0
[23:42:22] [PASSED] ALDERLAKE_P C0
[23:42:22] [PASSED] ALDERLAKE_S RPLS D0
[23:42:22] [PASSED] ALDERLAKE_P RPLU E0
[23:42:22] [PASSED] DG2 G10 C0
[23:42:22] [PASSED] DG2 G11 B1
[23:42:22] [PASSED] DG2 G12 A1
[23:42:22] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:42:22] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:42:22] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:42:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:42:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:42:22] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:42:22] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:42:22] ==================== [PASSED] xe_wa_gt =====================
[23:42:22] ====================== [PASSED] xe_wa ======================
[23:42:22] ============================================================
[23:42:22] Testing complete. Ran 717 tests: passed: 699, skipped: 18
[23:42:22] Elapsed time: 36.068s total, 4.267s configuring, 31.135s building, 0.643s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:42:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:42:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:42:48] Starting KUnit Kernel (1/1)...
[23:42:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:42:48] ============ drm_test_pick_cmdline (2 subtests) ============
[23:42:48] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:42:48] =============== drm_test_pick_cmdline_named  ===============
[23:42:48] [PASSED] NTSC
[23:42:48] [PASSED] NTSC-J
[23:42:48] [PASSED] PAL
[23:42:48] [PASSED] PAL-M
[23:42:48] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:42:48] ============== [PASSED] drm_test_pick_cmdline ==============
[23:42:48] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:42:48] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:42:48] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:42:48] =========== drm_validate_clone_mode (2 subtests) ===========
[23:42:48] ============== drm_test_check_in_clone_mode  ===============
[23:42:48] [PASSED] in_clone_mode
[23:42:48] [PASSED] not_in_clone_mode
[23:42:48] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:42:48] =============== drm_test_check_valid_clones  ===============
[23:42:48] [PASSED] not_in_clone_mode
[23:42:48] [PASSED] valid_clone
[23:42:48] [PASSED] invalid_clone
[23:42:48] =========== [PASSED] drm_test_check_valid_clones ===========
[23:42:48] ============= [PASSED] drm_validate_clone_mode =============
[23:42:48] ============= drm_validate_modeset (1 subtest) =============
[23:42:48] [PASSED] drm_test_check_connector_changed_modeset
[23:42:48] ============== [PASSED] drm_validate_modeset ===============
[23:42:48] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:42:48] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:42:48] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:42:48] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:42:48] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[23:42:48] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:42:48] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:42:48] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:42:48] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[23:42:48] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:42:48] ============== drm_bridge_alloc (2 subtests) ===============
[23:42:48] [PASSED] drm_test_drm_bridge_alloc_basic
[23:42:48] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:42:48] ================ [PASSED] drm_bridge_alloc =================
[23:42:48] ============= drm_bridge_bus_fmt (5 subtests) ==============
[23:42:48] [PASSED] drm_test_bridge_rgb_yuv_rgb
[23:42:48] [PASSED] drm_test_bridge_must_convert_to_yuv444
[23:42:48] [PASSED] drm_test_bridge_hdmi_auto_rgb
[23:42:48] [PASSED] drm_test_bridge_auto_first
[23:42:48] [PASSED] drm_test_bridge_rgb_yuv_no_path
[23:42:48] =============== [PASSED] drm_bridge_bus_fmt ================
[23:42:48] ============= drm_cmdline_parser (40 subtests) =============
[23:42:48] [PASSED] drm_test_cmdline_force_d_only
[23:42:48] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:42:48] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:42:48] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:42:48] [PASSED] drm_test_cmdline_force_e_only
[23:42:48] [PASSED] drm_test_cmdline_res
[23:42:48] [PASSED] drm_test_cmdline_res_vesa
[23:42:48] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:42:48] [PASSED] drm_test_cmdline_res_rblank
[23:42:48] [PASSED] drm_test_cmdline_res_bpp
[23:42:48] [PASSED] drm_test_cmdline_res_refresh
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:42:48] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:42:48] [PASSED] drm_test_cmdline_res_margins_force_on
[23:42:48] [PASSED] drm_test_cmdline_res_vesa_margins
[23:42:48] [PASSED] drm_test_cmdline_name
[23:42:48] [PASSED] drm_test_cmdline_name_bpp
[23:42:48] [PASSED] drm_test_cmdline_name_option
[23:42:48] [PASSED] drm_test_cmdline_name_bpp_option
[23:42:48] [PASSED] drm_test_cmdline_rotate_0
[23:42:48] [PASSED] drm_test_cmdline_rotate_90
[23:42:48] [PASSED] drm_test_cmdline_rotate_180
[23:42:48] [PASSED] drm_test_cmdline_rotate_270
[23:42:48] [PASSED] drm_test_cmdline_hmirror
[23:42:48] [PASSED] drm_test_cmdline_vmirror
[23:42:48] [PASSED] drm_test_cmdline_margin_options
[23:42:48] [PASSED] drm_test_cmdline_multiple_options
[23:42:48] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:42:48] [PASSED] drm_test_cmdline_extra_and_option
[23:42:48] [PASSED] drm_test_cmdline_freestanding_options
[23:42:48] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:42:48] [PASSED] drm_test_cmdline_panel_orientation
[23:42:48] ================ drm_test_cmdline_invalid  =================
[23:42:48] [PASSED] margin_only
[23:42:48] [PASSED] interlace_only
[23:42:48] [PASSED] res_missing_x
[23:42:48] [PASSED] res_missing_y
[23:42:48] [PASSED] res_bad_y
[23:42:48] [PASSED] res_missing_y_bpp
[23:42:48] [PASSED] res_bad_bpp
[23:42:48] [PASSED] res_bad_refresh
[23:42:48] [PASSED] res_bpp_refresh_force_on_off
[23:42:48] [PASSED] res_invalid_mode
[23:42:48] [PASSED] res_bpp_wrong_place_mode
[23:42:48] [PASSED] name_bpp_refresh
[23:42:48] [PASSED] name_refresh
[23:42:48] [PASSED] name_refresh_wrong_mode
[23:42:48] [PASSED] name_refresh_invalid_mode
[23:42:48] [PASSED] rotate_multiple
[23:42:48] [PASSED] rotate_invalid_val
[23:42:48] [PASSED] rotate_truncated
[23:42:48] [PASSED] invalid_option
[23:42:48] [PASSED] invalid_tv_option
[23:42:48] [PASSED] truncated_tv_option
[23:42:48] ============ [PASSED] drm_test_cmdline_invalid =============
[23:42:48] =============== drm_test_cmdline_tv_options  ===============
[23:42:48] [PASSED] NTSC
[23:42:48] [PASSED] NTSC_443
[23:42:48] [PASSED] NTSC_J
[23:42:48] [PASSED] PAL
[23:42:48] [PASSED] PAL_M
[23:42:48] [PASSED] PAL_N
[23:42:48] [PASSED] SECAM
[23:42:48] [PASSED] MONO_525
[23:42:48] [PASSED] MONO_625
[23:42:48] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:42:48] =============== [PASSED] drm_cmdline_parser ================
[23:42:48] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:42:48] [PASSED] drm_test_connector_hdmi_init_valid
[23:42:48] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:42:48] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:42:48] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:42:48] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:42:48] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:42:48] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:42:48] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:42:48] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:42:48] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:42:48] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:42:48] [PASSED] supported_formats=0x5 yuv420_allowed=1
[23:42:48] [PASSED] supported_formats=0x5 yuv420_allowed=0
[23:42:48] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:42:48] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:42:48] [PASSED] drm_test_connector_hdmi_init_null_product
[23:42:48] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:42:48] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:42:48] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:42:48] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:42:48] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:42:48] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:42:48] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:42:48] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:42:48] [PASSED] HDMI-A
[23:42:48] [PASSED] HDMI-B
[23:42:48] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:42:48] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:42:48] [PASSED] Unknown
[23:42:48] [PASSED] VGA
[23:42:48] [PASSED] DVI-I
[23:42:48] [PASSED] DVI-D
[23:42:48] [PASSED] DVI-A
[23:42:48] [PASSED] Composite
[23:42:48] [PASSED] SVIDEO
[23:42:48] [PASSED] LVDS
[23:42:48] [PASSED] Component
[23:42:48] [PASSED] DIN
[23:42:48] [PASSED] DP
[23:42:48] [PASSED] TV
[23:42:48] [PASSED] eDP
[23:42:48] [PASSED] Virtual
[23:42:48] [PASSED] DSI
[23:42:48] [PASSED] DPI
[23:42:48] [PASSED] Writeback
[23:42:48] [PASSED] SPI
[23:42:48] [PASSED] USB
[23:42:48] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:42:48] ============ [PASSED] drmm_connector_hdmi_init =============
[23:42:48] ============= drmm_connector_init (3 subtests) =============
[23:42:48] [PASSED] drm_test_drmm_connector_init
[23:42:48] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:42:48] ========= drm_test_drmm_connector_init_type_valid  =========
[23:42:48] [PASSED] Unknown
[23:42:48] [PASSED] VGA
[23:42:48] [PASSED] DVI-I
[23:42:48] [PASSED] DVI-D
[23:42:48] [PASSED] DVI-A
[23:42:48] [PASSED] Composite
[23:42:48] [PASSED] SVIDEO
[23:42:48] [PASSED] LVDS
[23:42:48] [PASSED] Component
[23:42:48] [PASSED] DIN
[23:42:48] [PASSED] DP
[23:42:48] [PASSED] HDMI-A
[23:42:48] [PASSED] HDMI-B
[23:42:48] [PASSED] TV
[23:42:48] [PASSED] eDP
[23:42:48] [PASSED] Virtual
[23:42:48] [PASSED] DSI
[23:42:48] [PASSED] DPI
[23:42:48] [PASSED] Writeback
[23:42:48] [PASSED] SPI
[23:42:48] [PASSED] USB
[23:42:48] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:42:48] =============== [PASSED] drmm_connector_init ===============
[23:42:48] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_init
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:42:48] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:42:48] [PASSED] Unknown
[23:42:48] [PASSED] VGA
[23:42:48] [PASSED] DVI-I
[23:42:48] [PASSED] DVI-D
[23:42:48] [PASSED] DVI-A
[23:42:48] [PASSED] Composite
[23:42:48] [PASSED] SVIDEO
[23:42:48] [PASSED] LVDS
[23:42:48] [PASSED] Component
[23:42:48] [PASSED] DIN
[23:42:48] [PASSED] DP
[23:42:48] [PASSED] HDMI-A
[23:42:48] [PASSED] HDMI-B
[23:42:48] [PASSED] TV
[23:42:48] [PASSED] eDP
[23:42:48] [PASSED] Virtual
[23:42:48] [PASSED] DSI
[23:42:48] [PASSED] DPI
[23:42:48] [PASSED] Writeback
[23:42:48] [PASSED] SPI
[23:42:48] [PASSED] USB
[23:42:48] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:42:48] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:42:48] [PASSED] Unknown
[23:42:48] [PASSED] VGA
[23:42:48] [PASSED] DVI-I
[23:42:48] [PASSED] DVI-D
[23:42:48] [PASSED] DVI-A
[23:42:48] [PASSED] Composite
[23:42:48] [PASSED] SVIDEO
[23:42:48] [PASSED] LVDS
[23:42:48] [PASSED] Component
[23:42:48] [PASSED] DIN
[23:42:48] [PASSED] DP
[23:42:48] [PASSED] HDMI-A
[23:42:48] [PASSED] HDMI-B
[23:42:48] [PASSED] TV
[23:42:48] [PASSED] eDP
[23:42:48] [PASSED] Virtual
[23:42:48] [PASSED] DSI
[23:42:48] [PASSED] DPI
[23:42:48] [PASSED] Writeback
[23:42:48] [PASSED] SPI
[23:42:48] [PASSED] USB
[23:42:48] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:42:48] =========== [PASSED] drm_connector_dynamic_init ============
[23:42:48] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:42:48] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:42:48] ======= drm_connector_dynamic_register (7 subtests) ========
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:42:48] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:42:48] ========= [PASSED] drm_connector_dynamic_register ==========
[23:42:48] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:42:48] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:42:48] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:42:48] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:42:48] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:42:48] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:42:48] [PASSED] NTSC
[23:42:48] [PASSED] NTSC-443
[23:42:48] [PASSED] NTSC-J
[23:42:48] [PASSED] PAL
[23:42:48] [PASSED] PAL-M
[23:42:48] [PASSED] PAL-N
[23:42:48] [PASSED] SECAM
[23:42:48] [PASSED] Mono
[23:42:48] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:42:48] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:42:48] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:42:48] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:42:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:42:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:42:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:42:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:42:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:42:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:42:48] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:42:48] [PASSED] VIC 96
[23:42:48] [PASSED] VIC 97
[23:42:48] [PASSED] VIC 101
[23:42:48] [PASSED] VIC 102
[23:42:48] [PASSED] VIC 106
[23:42:48] [PASSED] VIC 107
[23:42:48] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:42:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:42:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:42:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:42:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:42:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:42:48] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:42:48] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:42:48] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:42:48] [PASSED] Automatic
[23:42:48] [PASSED] Full
[23:42:48] [PASSED] Limited 16:235
[23:42:48] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:42:48] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:42:48] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:42:48] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:42:48] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:42:48] [PASSED] RGB
[23:42:48] [PASSED] YUV 4:2:0
[23:42:48] [PASSED] YUV 4:2:2
[23:42:48] [PASSED] YUV 4:4:4
[23:42:48] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:42:48] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:42:48] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:42:48] ============= drm_damage_helper (21 subtests) ==============
[23:42:48] [PASSED] drm_test_damage_iter_no_damage
[23:42:48] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:42:48] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:42:48] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:42:48] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:42:48] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:42:48] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:42:48] [PASSED] drm_test_damage_iter_simple_damage
[23:42:48] [PASSED] drm_test_damage_iter_single_damage
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:42:48] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:42:48] [PASSED] drm_test_damage_iter_damage
[23:42:48] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:42:48] [PASSED] drm_test_damage_iter_damage_one_outside
[23:42:48] [PASSED] drm_test_damage_iter_damage_src_moved
[23:42:48] [PASSED] drm_test_damage_iter_damage_not_visible
[23:42:48] ================ [PASSED] drm_damage_helper ================
[23:42:48] ============== drm_dp_mst_helper (3 subtests) ==============
[23:42:48] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:42:48] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:42:48] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:42:48] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:42:48] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:42:48] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:42:48] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:42:48] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:42:48] [PASSED] Link rate 2000000 lane count 4
[23:42:48] [PASSED] Link rate 2000000 lane count 2
[23:42:48] [PASSED] Link rate 2000000 lane count 1
[23:42:48] [PASSED] Link rate 1350000 lane count 4
[23:42:48] [PASSED] Link rate 1350000 lane count 2
[23:42:48] [PASSED] Link rate 1350000 lane count 1
[23:42:48] [PASSED] Link rate 1000000 lane count 4
[23:42:48] [PASSED] Link rate 1000000 lane count 2
[23:42:48] [PASSED] Link rate 1000000 lane count 1
[23:42:48] [PASSED] Link rate 810000 lane count 4
[23:42:48] [PASSED] Link rate 810000 lane count 2
[23:42:48] [PASSED] Link rate 810000 lane count 1
[23:42:48] [PASSED] Link rate 540000 lane count 4
[23:42:48] [PASSED] Link rate 540000 lane count 2
[23:42:48] [PASSED] Link rate 540000 lane count 1
[23:42:48] [PASSED] Link rate 270000 lane count 4
[23:42:48] [PASSED] Link rate 270000 lane count 2
[23:42:48] [PASSED] Link rate 270000 lane count 1
[23:42:48] [PASSED] Link rate 162000 lane count 4
[23:42:48] [PASSED] Link rate 162000 lane count 2
[23:42:48] [PASSED] Link rate 162000 lane count 1
[23:42:48] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:42:48] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:42:48] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:42:48] [PASSED] DP_POWER_UP_PHY with port number
[23:42:48] [PASSED] DP_POWER_DOWN_PHY with port number
[23:42:48] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:42:48] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:42:48] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:42:48] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:42:48] [PASSED] DP_QUERY_PAYLOAD with port number
[23:42:48] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:42:48] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:42:48] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:42:48] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:42:48] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:42:48] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:42:48] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:42:48] [PASSED] DP_REMOTE_I2C_READ with port number
[23:42:48] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:42:48] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:42:48] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:42:48] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:42:48] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:42:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:42:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:42:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:42:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:42:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:42:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:42:48] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:42:48] ================ [PASSED] drm_dp_mst_helper ================
[23:42:48] ================== drm_exec (7 subtests) ===================
[23:42:48] [PASSED] sanitycheck
[23:42:48] [PASSED] test_lock
[23:42:48] [PASSED] test_lock_unlock
[23:42:48] [PASSED] test_duplicates
[23:42:48] [PASSED] test_prepare
[23:42:48] [PASSED] test_prepare_array
[23:42:48] [PASSED] test_multiple_loops
[23:42:48] ==================== [PASSED] drm_exec =====================
[23:42:48] =========== drm_format_helper_test (17 subtests) ===========
[23:42:48] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:42:48] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:42:48] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:42:48] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:42:48] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:42:48] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:42:48] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:42:48] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:42:48] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:42:48] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:42:48] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:42:48] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:42:48] ==================== drm_test_fb_swab  =====================
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ================ [PASSED] drm_test_fb_swab =================
[23:42:48] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:42:48] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:42:48] [PASSED] single_pixel_source_buffer
[23:42:48] [PASSED] single_pixel_clip_rectangle
[23:42:48] [PASSED] well_known_colors
[23:42:48] [PASSED] destination_pitch
[23:42:48] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:42:48] ================= drm_test_fb_clip_offset  =================
[23:42:48] [PASSED] pass through
[23:42:48] [PASSED] horizontal offset
[23:42:48] [PASSED] vertical offset
[23:42:48] [PASSED] horizontal and vertical offset
[23:42:48] [PASSED] horizontal offset (custom pitch)
[23:42:48] [PASSED] vertical offset (custom pitch)
[23:42:48] [PASSED] horizontal and vertical offset (custom pitch)
[23:42:48] ============= [PASSED] drm_test_fb_clip_offset =============
[23:42:48] =================== drm_test_fb_memcpy  ====================
[23:42:48] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:42:48] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:42:48] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:42:48] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:42:48] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:42:48] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:42:48] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:42:48] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:42:48] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:42:48] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:42:48] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:42:48] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:42:48] =============== [PASSED] drm_test_fb_memcpy ================
[23:42:48] ============= [PASSED] drm_format_helper_test ==============
[23:42:48] ================= drm_format (18 subtests) =================
[23:42:48] [PASSED] drm_test_format_block_width_invalid
[23:42:48] [PASSED] drm_test_format_block_width_one_plane
[23:42:48] [PASSED] drm_test_format_block_width_two_plane
[23:42:48] [PASSED] drm_test_format_block_width_three_plane
[23:42:48] [PASSED] drm_test_format_block_width_tiled
[23:42:48] [PASSED] drm_test_format_block_height_invalid
[23:42:48] [PASSED] drm_test_format_block_height_one_plane
[23:42:48] [PASSED] drm_test_format_block_height_two_plane
[23:42:48] [PASSED] drm_test_format_block_height_three_plane
[23:42:48] [PASSED] drm_test_format_block_height_tiled
[23:42:48] [PASSED] drm_test_format_min_pitch_invalid
[23:42:48] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:42:48] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:42:48] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:42:48] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:42:48] [PASSED] drm_test_format_min_pitch_two_plane
[23:42:48] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:42:48] [PASSED] drm_test_format_min_pitch_tiled
[23:42:48] =================== [PASSED] drm_format ====================
[23:42:48] ============== drm_framebuffer (10 subtests) ===============
[23:42:48] ========== drm_test_framebuffer_check_src_coords  ==========
[23:42:48] [PASSED] Success: source fits into fb
[23:42:48] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:42:48] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:42:48] [PASSED] Fail: overflowing fb with source width
[23:42:48] [PASSED] Fail: overflowing fb with source height
[23:42:48] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:42:48] [PASSED] drm_test_framebuffer_cleanup
[23:42:48] =============== drm_test_framebuffer_create  ===============
[23:42:48] [PASSED] ABGR8888 normal sizes
[23:42:48] [PASSED] ABGR8888 max sizes
[23:42:48] [PASSED] ABGR8888 pitch greater than min required
[23:42:48] [PASSED] ABGR8888 pitch less than min required
[23:42:48] [PASSED] ABGR8888 Invalid width
[23:42:48] [PASSED] ABGR8888 Invalid buffer handle
[23:42:48] [PASSED] No pixel format
[23:42:48] [PASSED] ABGR8888 Width 0
[23:42:48] [PASSED] ABGR8888 Height 0
[23:42:48] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:42:48] [PASSED] ABGR8888 Large buffer offset
[23:42:48] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:42:48] [PASSED] ABGR8888 Invalid flag
[23:42:48] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:42:48] [PASSED] ABGR8888 Valid buffer modifier
[23:42:48] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:42:48] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] NV12 Normal sizes
[23:42:48] [PASSED] NV12 Max sizes
[23:42:48] [PASSED] NV12 Invalid pitch
[23:42:48] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:42:48] [PASSED] NV12 different  modifier per-plane
[23:42:48] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:42:48] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] NV12 Modifier for inexistent plane
[23:42:48] [PASSED] NV12 Handle for inexistent plane
[23:42:48] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:42:48] [PASSED] YVU420 Normal sizes
[23:42:48] [PASSED] YVU420 Max sizes
[23:42:48] [PASSED] YVU420 Invalid pitch
[23:42:48] [PASSED] YVU420 Different pitches
[23:42:48] [PASSED] YVU420 Different buffer offsets/pitches
[23:42:48] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:42:48] [PASSED] YVU420 Valid modifier
[23:42:48] [PASSED] YVU420 Different modifiers per plane
[23:42:48] [PASSED] YVU420 Modifier for inexistent plane
[23:42:48] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:42:48] [PASSED] X0L2 Normal sizes
[23:42:48] [PASSED] X0L2 Max sizes
[23:42:48] [PASSED] X0L2 Invalid pitch
[23:42:48] [PASSED] X0L2 Pitch greater than minimum required
[23:42:48] [PASSED] X0L2 Handle for inexistent plane
[23:42:48] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:42:48] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:42:48] [PASSED] X0L2 Valid modifier
[23:42:48] [PASSED] X0L2 Modifier for inexistent plane
[23:42:48] =========== [PASSED] drm_test_framebuffer_create ===========
[23:42:48] [PASSED] drm_test_framebuffer_free
[23:42:48] [PASSED] drm_test_framebuffer_init
[23:42:48] [PASSED] drm_test_framebuffer_init_bad_format
[23:42:48] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:42:48] [PASSED] drm_test_framebuffer_lookup
[23:42:48] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:42:48] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:42:48] ================= [PASSED] drm_framebuffer =================
[23:42:48] ================ drm_gem_shmem (8 subtests) ================
[23:42:48] [PASSED] drm_gem_shmem_test_obj_create
[23:42:48] [PASSED] drm_gem_shmem_test_obj_create_private
[23:42:48] [PASSED] drm_gem_shmem_test_pin_pages
[23:42:48] [PASSED] drm_gem_shmem_test_vmap
[23:42:48] [PASSED] drm_gem_shmem_test_get_sg_table
[23:42:48] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:42:48] [PASSED] drm_gem_shmem_test_madvise
[23:42:48] [PASSED] drm_gem_shmem_test_purge
[23:42:48] ================== [PASSED] drm_gem_shmem ==================
[23:42:48] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:42:48] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:42:48] [PASSED] Automatic
[23:42:48] [PASSED] Full
[23:42:48] [PASSED] Limited 16:235
[23:42:48] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:42:48] [PASSED] drm_test_check_disable_connector
[23:42:48] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:42:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:42:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:42:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:42:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:42:48] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:42:48] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:42:48] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:42:48] [PASSED] drm_test_check_output_bpc_dvi
[23:42:48] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:42:48] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:42:48] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:42:48] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:42:48] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:42:48] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:42:48] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:42:48] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:42:48] ============ drm_test_check_hdmi_color_format  =============
[23:42:48] [PASSED] AUTO -> RGB
[23:42:48] [PASSED] YCBCR422 -> YUV422
[23:42:48] [PASSED] YCBCR420 -> YUV420
[23:42:48] [PASSED] YCBCR444 -> YUV444
[23:42:48] [PASSED] RGB -> RGB
[23:42:48] ======== [PASSED] drm_test_check_hdmi_color_format =========
[23:42:48] ======== drm_test_check_hdmi_color_format_420_only  ========
[23:42:48] [PASSED] RGB should fail
[23:42:48] [PASSED] YUV444 should fail
[23:42:48] [PASSED] YUV422 should fail
[23:42:48] [PASSED] YUV420 should work
[23:42:48] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[23:42:48] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:42:48] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:42:48] [PASSED] drm_test_check_broadcast_rgb_value
[23:42:48] [PASSED] drm_test_check_bpc_8_value
[23:42:48] [PASSED] drm_test_check_bpc_10_value
[23:42:48] [PASSED] drm_test_check_bpc_12_value
[23:42:48] [PASSED] drm_test_check_format_value
[23:42:48] [PASSED] drm_test_check_tmds_char_value
[23:42:48] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:42:48] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[23:42:48] [PASSED] drm_test_check_mode_valid
[23:42:48] [PASSED] drm_test_check_mode_valid_reject
[23:42:48] [PASSED] drm_test_check_mode_valid_reject_rate
[23:42:48] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:42:48] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[23:42:48] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[23:42:48] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[23:42:48] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:42:48] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:42:48] [PASSED] drm_test_check_infoframes
[23:42:48] [PASSED] drm_test_check_reject_avi_infoframe
[23:42:48] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:42:48] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:42:48] [PASSED] drm_test_check_reject_audio_infoframe
[23:42:48] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:42:48] ================= drm_managed (2 subtests) =================
[23:42:48] [PASSED] drm_test_managed_release_action
[23:42:48] [PASSED] drm_test_managed_run_action
[23:42:48] =================== [PASSED] drm_managed ===================
[23:42:48] =================== drm_mm (6 subtests) ====================
[23:42:48] [PASSED] drm_test_mm_init
[23:42:48] [PASSED] drm_test_mm_debug
[23:42:48] [PASSED] drm_test_mm_align32
[23:42:48] [PASSED] drm_test_mm_align64
[23:42:48] [PASSED] drm_test_mm_lowest
[23:42:48] [PASSED] drm_test_mm_highest
[23:42:48] ===================== [PASSED] drm_mm ======================
[23:42:48] ============= drm_modes_analog_tv (5 subtests) =============
[23:42:48] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:42:48] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:42:48] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:42:48] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:42:48] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:42:48] =============== [PASSED] drm_modes_analog_tv ===============
[23:42:48] ============== drm_plane_helper (2 subtests) ===============
[23:42:48] =============== drm_test_check_plane_state  ================
[23:42:48] [PASSED] clipping_simple
[23:42:48] [PASSED] clipping_rotate_reflect
[23:42:48] [PASSED] positioning_simple
[23:42:48] [PASSED] upscaling
[23:42:48] [PASSED] downscaling
[23:42:48] [PASSED] rounding1
[23:42:48] [PASSED] rounding2
[23:42:48] [PASSED] rounding3
[23:42:48] [PASSED] rounding4
[23:42:48] =========== [PASSED] drm_test_check_plane_state ============
[23:42:48] =========== drm_test_check_invalid_plane_state  ============
[23:42:48] [PASSED] positioning_invalid
[23:42:48] [PASSED] upscaling_invalid
[23:42:48] [PASSED] downscaling_invalid
[23:42:48] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:42:48] ================ [PASSED] drm_plane_helper =================
[23:42:48] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:42:48] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:42:48] [PASSED] None
[23:42:48] [PASSED] PAL
[23:42:48] [PASSED] NTSC
[23:42:48] [PASSED] Both, NTSC Default
[23:42:48] [PASSED] Both, PAL Default
[23:42:48] [PASSED] Both, NTSC Default, with PAL on command-line
[23:42:48] [PASSED] Both, PAL Default, with NTSC on command-line
[23:42:48] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:42:48] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:42:48] ================== drm_rect (9 subtests) ===================
[23:42:48] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:42:48] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:42:48] [PASSED] drm_test_rect_clip_scaled_clipped
[23:42:48] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:42:48] ================= drm_test_rect_intersect  =================
[23:42:48] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:42:48] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:42:48] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:42:48] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:42:48] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:42:48] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:42:48] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:42:48] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:42:48] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:42:48] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:42:48] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:42:48] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:42:48] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:42:48] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:42:48] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:42:48] ============= [PASSED] drm_test_rect_intersect =============
[23:42:48] ================ drm_test_rect_calc_hscale  ================
[23:42:48] [PASSED] normal use
[23:42:48] [PASSED] out of max range
[23:42:48] [PASSED] out of min range
[23:42:48] [PASSED] zero dst
[23:42:48] [PASSED] negative src
[23:42:48] [PASSED] negative dst
[23:42:48] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:42:48] ================ drm_test_rect_calc_vscale  ================
[23:42:48] [PASSED] normal use
[23:42:48] [PASSED] out of max range
[23:42:48] [PASSED] out of min range
[23:42:48] [PASSED] zero dst
[23:42:48] [PASSED] negative src
[23:42:48] [PASSED] negative dst
[23:42:48] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:42:48] ================== drm_test_rect_rotate  ===================
[23:42:48] [PASSED] reflect-x
[23:42:48] [PASSED] reflect-y
[23:42:48] [PASSED] rotate-0
[23:42:48] [PASSED] rotate-90
[23:42:48] [PASSED] rotate-180
[23:42:48] [PASSED] rotate-270
[23:42:48] ============== [PASSED] drm_test_rect_rotate ===============
[23:42:48] ================ drm_test_rect_rotate_inv  =================
[23:42:48] [PASSED] reflect-x
[23:42:48] [PASSED] reflect-y
[23:42:48] [PASSED] rotate-0
[23:42:48] [PASSED] rotate-90
[23:42:48] [PASSED] rotate-180
[23:42:48] [PASSED] rotate-270
[23:42:48] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:42:48] ==================== [PASSED] drm_rect =====================
[23:42:48] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:42:48] ============ drm_test_sysfb_build_fourcc_list  =============
[23:42:48] [PASSED] no native formats
[23:42:48] [PASSED] XRGB8888 as native format
[23:42:48] [PASSED] remove duplicates
[23:42:48] [PASSED] convert alpha formats
[23:42:48] [PASSED] random formats
[23:42:48] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:42:48] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:42:48] ================== drm_fixp (2 subtests) ===================
[23:42:48] [PASSED] drm_test_int2fixp
[23:42:48] [PASSED] drm_test_sm2fixp
[23:42:48] ==================== [PASSED] drm_fixp =====================
[23:42:48] ============================================================
[23:42:48] Testing complete. Ran 639 tests: passed: 639
[23:42:48] Elapsed time: 25.769s total, 1.760s configuring, 23.838s building, 0.149s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:42:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:42:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:43:00] Starting KUnit Kernel (1/1)...
[23:43:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:43:00] ================= ttm_device (5 subtests) ==================
[23:43:00] [PASSED] ttm_device_init_basic
[23:43:00] [PASSED] ttm_device_init_multiple
[23:43:00] [PASSED] ttm_device_fini_basic
[23:43:00] [PASSED] ttm_device_init_no_vma_man
[23:43:00] ================== ttm_device_init_pools  ==================
[23:43:00] [PASSED] No DMA allocations, no DMA32 required
[23:43:00] [PASSED] DMA allocations, DMA32 required
[23:43:00] [PASSED] No DMA allocations, DMA32 required
[23:43:00] [PASSED] DMA allocations, no DMA32 required
[23:43:00] ============== [PASSED] ttm_device_init_pools ==============
[23:43:00] =================== [PASSED] ttm_device ====================
[23:43:00] ================== ttm_pool (8 subtests) ===================
[23:43:00] ================== ttm_pool_alloc_basic  ===================
[23:43:00] [PASSED] One page
[23:43:00] [PASSED] More than one page
[23:43:00] [PASSED] Above the allocation limit
[23:43:00] [PASSED] One page, with coherent DMA mappings enabled
[23:43:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:43:00] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:43:00] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:43:00] [PASSED] One page
[23:43:00] [PASSED] More than one page
[23:43:00] [PASSED] Above the allocation limit
[23:43:00] [PASSED] One page, with coherent DMA mappings enabled
[23:43:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:43:00] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:43:00] [PASSED] ttm_pool_alloc_order_caching_match
[23:43:00] [PASSED] ttm_pool_alloc_caching_mismatch
[23:43:00] [PASSED] ttm_pool_alloc_order_mismatch
[23:43:00] [PASSED] ttm_pool_free_dma_alloc
[23:43:00] [PASSED] ttm_pool_free_no_dma_alloc
[23:43:00] [PASSED] ttm_pool_fini_basic
[23:43:00] ==================== [PASSED] ttm_pool =====================
[23:43:00] ================ ttm_resource (8 subtests) =================
[23:43:00] ================= ttm_resource_init_basic  =================
[23:43:00] [PASSED] Init resource in TTM_PL_SYSTEM
[23:43:00] [PASSED] Init resource in TTM_PL_VRAM
[23:43:00] [PASSED] Init resource in a private placement
[23:43:00] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:43:00] ============= [PASSED] ttm_resource_init_basic =============
[23:43:00] [PASSED] ttm_resource_init_pinned
[23:43:00] [PASSED] ttm_resource_fini_basic
[23:43:00] [PASSED] ttm_resource_manager_init_basic
[23:43:00] [PASSED] ttm_resource_manager_usage_basic
[23:43:00] [PASSED] ttm_resource_manager_set_used_basic
[23:43:00] [PASSED] ttm_sys_man_alloc_basic
[23:43:00] [PASSED] ttm_sys_man_free_basic
[23:43:00] ================== [PASSED] ttm_resource ===================
[23:43:00] =================== ttm_tt (15 subtests) ===================
[23:43:00] ==================== ttm_tt_init_basic  ====================
[23:43:00] [PASSED] Page-aligned size
[23:43:00] [PASSED] Extra pages requested
[23:43:00] ================ [PASSED] ttm_tt_init_basic ================
[23:43:00] [PASSED] ttm_tt_init_misaligned
[23:43:00] [PASSED] ttm_tt_fini_basic
[23:43:00] [PASSED] ttm_tt_fini_sg
[23:43:00] [PASSED] ttm_tt_fini_shmem
[23:43:00] [PASSED] ttm_tt_create_basic
[23:43:00] [PASSED] ttm_tt_create_invalid_bo_type
[23:43:00] [PASSED] ttm_tt_create_ttm_exists
[23:43:00] [PASSED] ttm_tt_create_failed
[23:43:00] [PASSED] ttm_tt_destroy_basic
[23:43:00] [PASSED] ttm_tt_populate_null_ttm
[23:43:00] [PASSED] ttm_tt_populate_populated_ttm
[23:43:00] [PASSED] ttm_tt_unpopulate_basic
[23:43:00] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:43:00] [PASSED] ttm_tt_swapin_basic
[23:43:00] ===================== [PASSED] ttm_tt ======================
[23:43:00] =================== ttm_bo (14 subtests) ===================
[23:43:00] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:43:00] [PASSED] Cannot be interrupted and sleeps
[23:43:00] [PASSED] Cannot be interrupted, locks straight away
[23:43:00] [PASSED] Can be interrupted, sleeps
[23:43:00] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:43:00] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:43:00] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:43:00] [PASSED] ttm_bo_reserve_double_resv
[23:43:00] [PASSED] ttm_bo_reserve_interrupted
[23:43:00] [PASSED] ttm_bo_reserve_deadlock
[23:43:00] [PASSED] ttm_bo_unreserve_basic
[23:43:00] [PASSED] ttm_bo_unreserve_pinned
[23:43:00] [PASSED] ttm_bo_unreserve_bulk
[23:43:00] [PASSED] ttm_bo_fini_basic
[23:43:00] [PASSED] ttm_bo_fini_shared_resv
[23:43:00] [PASSED] ttm_bo_pin_basic
[23:43:00] [PASSED] ttm_bo_pin_unpin_resource
[23:43:00] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:43:00] ===================== [PASSED] ttm_bo ======================
[23:43:00] ============== ttm_bo_validate (22 subtests) ===============
[23:43:00] ============== ttm_bo_init_reserved_sys_man  ===============
[23:43:00] [PASSED] Buffer object for userspace
[23:43:00] [PASSED] Kernel buffer object
[23:43:00] [PASSED] Shared buffer object
[23:43:00] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:43:00] ============== ttm_bo_init_reserved_mock_man  ==============
[23:43:00] [PASSED] Buffer object for userspace
[23:43:00] [PASSED] Kernel buffer object
[23:43:00] [PASSED] Shared buffer object
[23:43:00] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:43:00] [PASSED] ttm_bo_init_reserved_resv
[23:43:00] ================== ttm_bo_validate_basic  ==================
[23:43:00] [PASSED] Buffer object for userspace
[23:43:00] [PASSED] Kernel buffer object
[23:43:00] [PASSED] Shared buffer object
[23:43:00] ============== [PASSED] ttm_bo_validate_basic ==============
[23:43:00] [PASSED] ttm_bo_validate_invalid_placement
[23:43:00] ============= ttm_bo_validate_same_placement  ==============
[23:43:00] [PASSED] System manager
[23:43:00] [PASSED] VRAM manager
[23:43:00] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:43:00] [PASSED] ttm_bo_validate_failed_alloc
[23:43:00] [PASSED] ttm_bo_validate_pinned
[23:43:00] [PASSED] ttm_bo_validate_busy_placement
[23:43:00] ================ ttm_bo_validate_multihop  =================
[23:43:00] [PASSED] Buffer object for userspace
[23:43:00] [PASSED] Kernel buffer object
[23:43:00] [PASSED] Shared buffer object
[23:43:00] ============ [PASSED] ttm_bo_validate_multihop =============
[23:43:00] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:43:00] [PASSED] Buffer object in system domain, no page vector
[23:43:00] [PASSED] Buffer object in system domain with an existing page vector
[23:43:00] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:43:00] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:43:00] [PASSED] Buffer object for userspace
[23:43:00] [PASSED] Kernel buffer object
[23:43:00] [PASSED] Shared buffer object
[23:43:00] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:43:00] [PASSED] ttm_bo_validate_move_fence_signaled
[23:43:00] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:43:00] [PASSED] Waits for GPU
[23:43:00] [PASSED] Tries to lock straight away
[23:43:00] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:43:00] [PASSED] ttm_bo_validate_swapout
[23:43:00] [PASSED] ttm_bo_validate_happy_evict
[23:43:00] [PASSED] ttm_bo_validate_all_pinned_evict
[23:43:00] [PASSED] ttm_bo_validate_allowed_only_evict
[23:43:00] [PASSED] ttm_bo_validate_deleted_evict
[23:43:00] [PASSED] ttm_bo_validate_busy_domain_evict
[23:43:00] [PASSED] ttm_bo_validate_evict_gutting
[23:43:00] [PASSED] ttm_bo_validate_recrusive_evict
[23:43:00] ================= [PASSED] ttm_bo_validate =================
[23:43:00] ============================================================
[23:43:00] Testing complete. Ran 102 tests: passed: 102
[23:43:00] Elapsed time: 11.601s total, 1.773s configuring, 9.613s building, 0.175s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 17+ messages in thread

* ✓ Xe.CI.BAT: success for Don't whitelist OA registers unconditionally (rev4)
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (10 preceding siblings ...)
  2026-06-15 23:43 ` ✓ CI.KUnit: success " Patchwork
@ 2026-06-16  0:26 ` Patchwork
  2026-06-16  3:33 ` ✓ Xe.CI.FULL: " Patchwork
  2026-06-23  0:48 ` [PATCH v3 0/9] Don't whitelist OA registers unconditionally Dixit, Ashutosh
  13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-06-16  0:26 UTC (permalink / raw)
  To: Ashutosh Dixit; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 1541 bytes --]

== Series Details ==

Series: Don't whitelist OA registers unconditionally (rev4)
URL   : https://patchwork.freedesktop.org/series/166809/
State : success

== Summary ==

CI Bug Log - changes from xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7_BAT -> xe-pw-166809v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-166809v4_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@xe_live_ktest@xe_dma_buf:
    - bat-bmg-vm:         [ABORT][1] ([Intel XE#8007] / [Intel XE#8023]) -> [PASS][2] +1 other test pass
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html

  
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023


Build changes
-------------

  * Linux: xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7 -> xe-pw-166809v4

  IGT_8964: 8964
  xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
  xe-pw-166809v4: 166809v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/index.html

[-- Attachment #2: Type: text/html, Size: 2104 bytes --]

^ permalink raw reply	[flat|nested] 17+ messages in thread

* ✓ Xe.CI.FULL: success for Don't whitelist OA registers unconditionally (rev4)
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (11 preceding siblings ...)
  2026-06-16  0:26 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-16  3:33 ` Patchwork
  2026-06-23  0:48 ` [PATCH v3 0/9] Don't whitelist OA registers unconditionally Dixit, Ashutosh
  13 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2026-06-16  3:33 UTC (permalink / raw)
  To: Ashutosh Dixit; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 8544 bytes --]

== Series Details ==

Series: Don't whitelist OA registers unconditionally (rev4)
URL   : https://patchwork.freedesktop.org/series/166809/
State : success

== Summary ==

CI Bug Log - changes from xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7_FULL -> xe-pw-166809v4_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-166809v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][1] -> [FAIL][2] ([Intel XE#301]) +2 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [PASS][3] -> [SKIP][4] ([Intel XE#7915]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-4/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-8/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][5] -> [INCOMPLETE][6] ([Intel XE#6321])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@many-large-execqueues-mmap-remap-ro:
    - shard-bmg:          NOTRUN -> [ABORT][7] ([Intel XE#8007])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-1/igt@xe_exec_system_allocator@many-large-execqueues-mmap-remap-ro.html

  * igt@xe_exec_threads@threads-cm-userptr-invalidate:
    - shard-bmg:          [PASS][8] -> [ABORT][9] ([Intel XE#8007])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-10/igt@xe_exec_threads@threads-cm-userptr-invalidate.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-10/igt@xe_exec_threads@threads-cm-userptr-invalidate.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-lnl:          [PASS][10] -> [ABORT][11] ([Intel XE#8007])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-1/igt@xe_wedged@wedged-mode-toggle.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-lnl-3/igt@xe_wedged@wedged-mode-toggle.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [FAIL][12] ([Intel XE#3321]) -> [PASS][13] +1 other test pass
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [FAIL][14] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][16] ([Intel XE#7915]) -> [PASS][17] +1 other test pass
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-8/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-3/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][18] ([Intel XE#6321]) -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-9/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_reset@long-spin-many-preempt-threads:
    - shard-bmg:          [FAIL][20] ([Intel XE#7956]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-3/igt@xe_exec_reset@long-spin-many-preempt-threads.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-2/igt@xe_exec_reset@long-spin-many-preempt-threads.html

  * igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads:
    - shard-bmg:          [FAIL][22] ([Intel XE#7850]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-7/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-5/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-bmg:          [ABORT][24] ([Intel XE#8007]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-9/igt@xe_wedged@wedged-mode-toggle.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-1/igt@xe_wedged@wedged-mode-toggle.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][26] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][27] ([Intel XE#301])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][28] ([Intel XE#3544] / [Intel XE#7916]) -> [SKIP][29] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][30] ([Intel XE#7916]) -> [SKIP][31] ([Intel XE#7915]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-4/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/shard-bmg-8/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html

  
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
  [Intel XE#7956]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7956
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007


Build changes
-------------

  * Linux: xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7 -> xe-pw-166809v4

  IGT_8964: 8964
  xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
  xe-pw-166809v4: 166809v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166809v4/index.html

[-- Attachment #2: Type: text/html, Size: 10471 bytes --]

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v3 0/9] Don't whitelist OA registers unconditionally
  2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
                   ` (12 preceding siblings ...)
  2026-06-16  3:33 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-06-23  0:48 ` Dixit, Ashutosh
  2026-06-23  2:10   ` Dixit, Ashutosh
  13 siblings, 1 reply; 17+ messages in thread
From: Dixit, Ashutosh @ 2026-06-23  0:48 UTC (permalink / raw)
  To: intel-xe

On Mon, 15 Jun 2026 15:42:18 -0700, Ashutosh Dixit wrote:
>
> Whitelisting OA registers unconditionally is a security violation. In this
> series we resolve this issue as follows:
>
> * Set the 'deny' bit (bit 30) for all OA registers, ensuring OA registers
>   are not whitelisted by default after probe/reset/restart
> * Reset the 'deny' bit when an OA stream is opened and certain conditions
>   are met, whitelisting OA registers only for the duration when OA streams
>   are open for a gt
> * Set the 'deny' bit again, when OA streams are closed
> * To manage this scheme, separate out OA whitelists from non-OA whitelists
>   (into separate save-restore lists)
>
> v2: Address code review from Umesh. Patches changed in v2 have changelog
>     appended to commit message
> v3: Minor change to Patch 3
>
> Ashutosh Dixit (9):
>   drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
>   drm/xe/rtp: Maintain OA whitelists separately
>   drm/xe/rtp: Keep track of non-OA nonpriv slots
>   drm/xe/rtp: Generalize whitelist_apply_to_hwe
>   drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
>   drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
>   drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
>   drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
>   drm/xe/rtp: Ensure locking/ref counting for OA whitelists

I have added the following to all the patches here and merge this series:

	Cc: stable@vger.kernel.org # v6.12+
	Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

So the plan is to propagate this series to the previous LTS kernel versions
too, in order to plug this security violation related to unconditional OA
register whitelisting.

I am preparing v6.12 and v6.18 stable kernel version series, based on this
series. Since these are a bit old, this series needs porting to these old
kernel versions. These will be sent after this series reaches Linus'
master.

Thanks.
--
Ashutosh

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v3 0/9] Don't whitelist OA registers unconditionally
  2026-06-23  0:48 ` [PATCH v3 0/9] Don't whitelist OA registers unconditionally Dixit, Ashutosh
@ 2026-06-23  2:10   ` Dixit, Ashutosh
  2026-08-10 23:45     ` Dixit, Ashutosh
  0 siblings, 1 reply; 17+ messages in thread
From: Dixit, Ashutosh @ 2026-06-23  2:10 UTC (permalink / raw)
  To: intel-xe

On Mon, 22 Jun 2026 17:48:12 -0700, Dixit, Ashutosh wrote:
>
> On Mon, 15 Jun 2026 15:42:18 -0700, Ashutosh Dixit wrote:
> >
> > Whitelisting OA registers unconditionally is a security violation. In this
> > series we resolve this issue as follows:
> >
> > * Set the 'deny' bit (bit 30) for all OA registers, ensuring OA registers
> >   are not whitelisted by default after probe/reset/restart
> > * Reset the 'deny' bit when an OA stream is opened and certain conditions
> >   are met, whitelisting OA registers only for the duration when OA streams
> >   are open for a gt
> > * Set the 'deny' bit again, when OA streams are closed
> > * To manage this scheme, separate out OA whitelists from non-OA whitelists
> >   (into separate save-restore lists)
> >
> > v2: Address code review from Umesh. Patches changed in v2 have changelog
> >     appended to commit message
> > v3: Minor change to Patch 3
> >
> > Ashutosh Dixit (9):
> >   drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
> >   drm/xe/rtp: Maintain OA whitelists separately
> >   drm/xe/rtp: Keep track of non-OA nonpriv slots
> >   drm/xe/rtp: Generalize whitelist_apply_to_hwe
> >   drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
> >   drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
> >   drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
> >   drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
> >   drm/xe/rtp: Ensure locking/ref counting for OA whitelists
>
> I have added the following to all the patches here and merge this series:
>
>	Cc: stable@vger.kernel.org # v6.12+
>	Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

Sorry I meant:

	Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support")
	Cc: stable@vger.kernel.org # v6.12+

>
> So the plan is to propagate this series to the previous LTS kernel versions
> too, in order to plug this security violation related to unconditional OA
> register whitelisting.
>
> I am preparing v6.12 and v6.18 stable kernel version series, based on this
> series. Since these are a bit old, this series needs porting to these old
> kernel versions. These will be sent after this series reaches Linus'
> master.

This is needed for patches to be added to stable versions.

>
> Thanks.
> --
> Ashutosh

^ permalink raw reply	[flat|nested] 17+ messages in thread

* Re: [PATCH v3 0/9] Don't whitelist OA registers unconditionally
  2026-06-23  2:10   ` Dixit, Ashutosh
@ 2026-08-10 23:45     ` Dixit, Ashutosh
  0 siblings, 0 replies; 17+ messages in thread
From: Dixit, Ashutosh @ 2026-08-10 23:45 UTC (permalink / raw)
  To: intel-xe

On Mon, 22 Jun 2026 19:10:14 -0700, Dixit, Ashutosh wrote:
>
> On Mon, 22 Jun 2026 17:48:12 -0700, Dixit, Ashutosh wrote:
> >
> > On Mon, 15 Jun 2026 15:42:18 -0700, Ashutosh Dixit wrote:
> > >
> > > Whitelisting OA registers unconditionally is a security violation. In this
> > > series we resolve this issue as follows:
> > >
> > > * Set the 'deny' bit (bit 30) for all OA registers, ensuring OA registers
> > >   are not whitelisted by default after probe/reset/restart
> > > * Reset the 'deny' bit when an OA stream is opened and certain conditions
> > >   are met, whitelisting OA registers only for the duration when OA streams
> > >   are open for a gt
> > > * Set the 'deny' bit again, when OA streams are closed
> > > * To manage this scheme, separate out OA whitelists from non-OA whitelists
> > >   (into separate save-restore lists)
> > >
> > > v2: Address code review from Umesh. Patches changed in v2 have changelog
> > >     appended to commit message
> > > v3: Minor change to Patch 3
> > >
> > > Ashutosh Dixit (9):
> > >   drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
> > >   drm/xe/rtp: Maintain OA whitelists separately
> > >   drm/xe/rtp: Keep track of non-OA nonpriv slots
> > >   drm/xe/rtp: Generalize whitelist_apply_to_hwe
> > >   drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
> > >   drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
> > >   drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
> > >   drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
> > >   drm/xe/rtp: Ensure locking/ref counting for OA whitelists
> >
> > I have added the following to all the patches here and merge this series:
> >
> >	Cc: stable@vger.kernel.org # v6.12+
> >	Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>
> Sorry I meant:
>
>	Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support")
>	Cc: stable@vger.kernel.org # v6.12+
>
> >
> > So the plan is to propagate this series to the previous LTS kernel versions
> > too, in order to plug this security violation related to unconditional OA
> > register whitelisting.
> >
> > I am preparing v6.12 and v6.18 stable kernel version series, based on this
> > series. Since these are a bit old, this series needs porting to these old
> > kernel versions. These will be sent after this series reaches Linus'
> > master.
>
> This is needed for patches to be added to stable versions.

The series has now been applied to all existing stable branches. The
version appied to the branches can be seen at the links below:

Remote:
	https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git

Branches:

stable/linux-6.12.y:
	https://lore.kernel.org/stable/20260805024915.3407033-1-ashutosh.dixit@intel.com/

stable/linux-6.18.y:
	https://lore.kernel.org/stable/20260805024614.3406679-1-ashutosh.dixit@intel.com/

stable/linux-7.1.y:
	https://lore.kernel.org/stable/20260805024300.3406307-1-ashutosh.dixit@intel.com/

Thanks.
--
Ashutosh

^ permalink raw reply	[flat|nested] 17+ messages in thread

end of thread, other threads:[~2026-08-10 23:45 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-15 22:42 [PATCH v3 0/9] Don't whitelist OA registers unconditionally Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 1/9] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 2/9] drm/xe/rtp: Maintain OA whitelists separately Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 3/9] drm/xe/rtp: Keep track of non-OA nonpriv slots Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 4/9] drm/xe/rtp: Generalize whitelist_apply_to_hwe Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 5/9] drm/xe/rtp: Save OA nonpriv registers to register save/restore lists Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 6/9] drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 7/9] drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 8/9] drm/xe/oa: (De-)whitelist OA registers on OA stream open/release Ashutosh Dixit
2026-06-15 22:42 ` [PATCH v3 9/9] drm/xe/rtp: Ensure locking/ref counting for OA whitelists Ashutosh Dixit
2026-06-15 23:41 ` ✗ CI.checkpatch: warning for Don't whitelist OA registers unconditionally (rev4) Patchwork
2026-06-15 23:43 ` ✓ CI.KUnit: success " Patchwork
2026-06-16  0:26 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-16  3:33 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-23  0:48 ` [PATCH v3 0/9] Don't whitelist OA registers unconditionally Dixit, Ashutosh
2026-06-23  2:10   ` Dixit, Ashutosh
2026-08-10 23:45     ` Dixit, Ashutosh

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.