* [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs
@ 2018-06-13 16:05 Ville Syrjala
2018-06-13 16:05 ` Ville Syrjala
` (3 more replies)
0 siblings, 4 replies; 14+ messages in thread
From: Ville Syrjala @ 2018-06-13 16:05 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Looks like interlaced DP output doesn't work on g4x either. Not all
that surprising considering we already established that interlaced
DP output is busted on VLV/CHV.
Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 40ffd9163175..6068986fd985 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
conn_state->scaling_mode);
}
- if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
+ if (HAS_GMCH_DISPLAY(dev_priv) &&
adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
return false;
@@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
- if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
+ if (!HAS_GMCH_DISPLAY(dev_priv))
connector->interlace_allowed = true;
connector->doublescan_allowed = 0;
--
2.16.4
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() 2018-06-13 16:05 [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Ville Syrjala @ 2018-06-13 16:05 ` Ville Syrjala 2018-06-13 16:37 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 14+ messages in thread From: Ville Syrjala @ 2018-06-13 16:05 UTC (permalink / raw) To: intel-gfx; +Cc: stable From: Ville Syrjälä <ville.syrjala@linux.intel.com> While Bspec doesn't list a specific sequence for turning off the DP port on g4x we are getting an underrun if the port is disabled in the .disable() hook. Looks like the pipe stops when the port stops, and by that time the plane disable may not have completed yet. Also the plane(s) seem to end up in some wonky state when this happens as they also signal another underrun immediately after we turn them back on during the next enable sequence. We could add a vblank wait in .disable() to avoid wedging the planes, but I assume we're still tripping up the pipe in some way. So it seems better to me to just follow the ILK+ sequence and turn off the DP port in .post_disable() instead. This sequence doesn't seem to suffer from this problem. Could be it was always the intended sequence for DP and the gen4 bspec was just never updated to include it. Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/intel_dp.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6068986fd985..5f09a8015c89 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2803,16 +2803,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, static void g4x_disable_dp(struct intel_encoder *encoder, const struct intel_crtc_state *old_crtc_state, const struct drm_connector_state *old_conn_state) -{ - intel_disable_dp(encoder, old_crtc_state, old_conn_state); - - /* disable the port before the pipe on g4x */ - intel_dp_link_down(encoder, old_crtc_state); -} - -static void ilk_disable_dp(struct intel_encoder *encoder, - const struct intel_crtc_state *old_crtc_state, - const struct drm_connector_state *old_conn_state) { intel_disable_dp(encoder, old_crtc_state, old_conn_state); } @@ -2828,13 +2818,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, intel_disable_dp(encoder, old_crtc_state, old_conn_state); } -static void ilk_post_disable_dp(struct intel_encoder *encoder, +static void g4x_post_disable_dp(struct intel_encoder *encoder, const struct intel_crtc_state *old_crtc_state, const struct drm_connector_state *old_conn_state) { struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); enum port port = encoder->port; + /* + * Bspec does not list a specific disable sequence for g4x DP. + * Follow the ilk+ sequence (disable pipe before the port) for + * g4x DP as it does not suffer from underruns like the normal + * g4x modeset sequence (disable pipe after the port). + */ intel_dp_link_down(encoder, old_crtc_state); /* Only ilk+ has port A */ @@ -6450,15 +6446,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, intel_encoder->enable = vlv_enable_dp; intel_encoder->disable = vlv_disable_dp; intel_encoder->post_disable = vlv_post_disable_dp; - } else if (INTEL_GEN(dev_priv) >= 5) { - intel_encoder->pre_enable = g4x_pre_enable_dp; - intel_encoder->enable = g4x_enable_dp; - intel_encoder->disable = ilk_disable_dp; - intel_encoder->post_disable = ilk_post_disable_dp; - } else { + } else{ intel_encoder->pre_enable = g4x_pre_enable_dp; intel_encoder->enable = g4x_enable_dp; intel_encoder->disable = g4x_disable_dp; + intel_encoder->post_disable = g4x_post_disable_dp; } intel_dig_port->dp.output_reg = output_reg; -- 2.16.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() @ 2018-06-13 16:05 ` Ville Syrjala 0 siblings, 0 replies; 14+ messages in thread From: Ville Syrjala @ 2018-06-13 16:05 UTC (permalink / raw) To: intel-gfx; +Cc: stable From: Ville Syrjälä <ville.syrjala@linux.intel.com> While Bspec doesn't list a specific sequence for turning off the DP port on g4x we are getting an underrun if the port is disabled in the .disable() hook. Looks like the pipe stops when the port stops, and by that time the plane disable may not have completed yet. Also the plane(s) seem to end up in some wonky state when this happens as they also signal another underrun immediately after we turn them back on during the next enable sequence. We could add a vblank wait in .disable() to avoid wedging the planes, but I assume we're still tripping up the pipe in some way. So it seems better to me to just follow the ILK+ sequence and turn off the DP port in .post_disable() instead. This sequence doesn't seem to suffer from this problem. Could be it was always the intended sequence for DP and the gen4 bspec was just never updated to include it. Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/intel_dp.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6068986fd985..5f09a8015c89 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2803,16 +2803,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, static void g4x_disable_dp(struct intel_encoder *encoder, const struct intel_crtc_state *old_crtc_state, const struct drm_connector_state *old_conn_state) -{ - intel_disable_dp(encoder, old_crtc_state, old_conn_state); - - /* disable the port before the pipe on g4x */ - intel_dp_link_down(encoder, old_crtc_state); -} - -static void ilk_disable_dp(struct intel_encoder *encoder, - const struct intel_crtc_state *old_crtc_state, - const struct drm_connector_state *old_conn_state) { intel_disable_dp(encoder, old_crtc_state, old_conn_state); } @@ -2828,13 +2818,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, intel_disable_dp(encoder, old_crtc_state, old_conn_state); } -static void ilk_post_disable_dp(struct intel_encoder *encoder, +static void g4x_post_disable_dp(struct intel_encoder *encoder, const struct intel_crtc_state *old_crtc_state, const struct drm_connector_state *old_conn_state) { struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); enum port port = encoder->port; + /* + * Bspec does not list a specific disable sequence for g4x DP. + * Follow the ilk+ sequence (disable pipe before the port) for + * g4x DP as it does not suffer from underruns like the normal + * g4x modeset sequence (disable pipe after the port). + */ intel_dp_link_down(encoder, old_crtc_state); /* Only ilk+ has port A */ @@ -6450,15 +6446,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, intel_encoder->enable = vlv_enable_dp; intel_encoder->disable = vlv_disable_dp; intel_encoder->post_disable = vlv_post_disable_dp; - } else if (INTEL_GEN(dev_priv) >= 5) { - intel_encoder->pre_enable = g4x_pre_enable_dp; - intel_encoder->enable = g4x_enable_dp; - intel_encoder->disable = ilk_disable_dp; - intel_encoder->post_disable = ilk_post_disable_dp; - } else { + } else{ intel_encoder->pre_enable = g4x_pre_enable_dp; intel_encoder->enable = g4x_enable_dp; intel_encoder->disable = g4x_disable_dp; + intel_encoder->post_disable = g4x_post_disable_dp; } intel_dig_port->dp.output_reg = output_reg; -- 2.16.4 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() 2018-06-13 16:05 ` Ville Syrjala @ 2018-06-14 12:42 ` Jani Nikula -1 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2018-06-14 12:42 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: stable On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > While Bspec doesn't list a specific sequence for turning off the DP port > on g4x we are getting an underrun if the port is disabled in the > .disable() hook. Looks like the pipe stops when the port stops, and by > that time the plane disable may not have completed yet. Also the plane(s) > seem to end up in some wonky state when this happens as they also signal > another underrun immediately after we turn them back on during the next > enable sequence. > > We could add a vblank wait in .disable() to avoid wedging the planes, > but I assume we're still tripping up the pipe in some way. So it seems > better to me to just follow the ILK+ sequence and turn off the DP port > in .post_disable() instead. This sequence doesn't seem to suffer from > this problem. Could be it was always the intended sequence for DP and > the gen4 bspec was just never updated to include it. > > Cc: stable@vger.kernel.org > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> The change for PCH was commit 08aff3fe26ae7a0d6f302ac2e1b7e2eb9933cd42 Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Mon Aug 18 22:16:09 2014 +0300 drm/i915: Move DP port disable to post_disable for pch platforms where you explicitly left out g4x per modeset sequence. I guess you could reference that in the commit message. > --- > drivers/gpu/drm/i915/intel_dp.c | 26 +++++++++----------------- > 1 file changed, 9 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 6068986fd985..5f09a8015c89 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2803,16 +2803,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, > static void g4x_disable_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *old_crtc_state, > const struct drm_connector_state *old_conn_state) > -{ > - intel_disable_dp(encoder, old_crtc_state, old_conn_state); > - > - /* disable the port before the pipe on g4x */ > - intel_dp_link_down(encoder, old_crtc_state); > -} > - > -static void ilk_disable_dp(struct intel_encoder *encoder, > - const struct intel_crtc_state *old_crtc_state, > - const struct drm_connector_state *old_conn_state) > { > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > } > @@ -2828,13 +2818,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > } > > -static void ilk_post_disable_dp(struct intel_encoder *encoder, > +static void g4x_post_disable_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *old_crtc_state, > const struct drm_connector_state *old_conn_state) > { > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > enum port port = encoder->port; > > + /* > + * Bspec does not list a specific disable sequence for g4x DP. > + * Follow the ilk+ sequence (disable pipe before the port) for > + * g4x DP as it does not suffer from underruns like the normal > + * g4x modeset sequence (disable pipe after the port). > + */ > intel_dp_link_down(encoder, old_crtc_state); > > /* Only ilk+ has port A */ > @@ -6450,15 +6446,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, > intel_encoder->enable = vlv_enable_dp; > intel_encoder->disable = vlv_disable_dp; > intel_encoder->post_disable = vlv_post_disable_dp; > - } else if (INTEL_GEN(dev_priv) >= 5) { > - intel_encoder->pre_enable = g4x_pre_enable_dp; > - intel_encoder->enable = g4x_enable_dp; > - intel_encoder->disable = ilk_disable_dp; > - intel_encoder->post_disable = ilk_post_disable_dp; > - } else { > + } else{ Space missing before {. The code matches the commit message, so strictly in that sense, Reviewed-by: Jani Nikula <jani.nikula@intel.com> but I really don't know if this is the right thing to do. Your call. (And your responsibility to fix the regressions! ;) > intel_encoder->pre_enable = g4x_pre_enable_dp; > intel_encoder->enable = g4x_enable_dp; > intel_encoder->disable = g4x_disable_dp; > + intel_encoder->post_disable = g4x_post_disable_dp; > } > > intel_dig_port->dp.output_reg = output_reg; -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() @ 2018-06-14 12:42 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2018-06-14 12:42 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: stable On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > While Bspec doesn't list a specific sequence for turning off the DP port > on g4x we are getting an underrun if the port is disabled in the > .disable() hook. Looks like the pipe stops when the port stops, and by > that time the plane disable may not have completed yet. Also the plane(s) > seem to end up in some wonky state when this happens as they also signal > another underrun immediately after we turn them back on during the next > enable sequence. > > We could add a vblank wait in .disable() to avoid wedging the planes, > but I assume we're still tripping up the pipe in some way. So it seems > better to me to just follow the ILK+ sequence and turn off the DP port > in .post_disable() instead. This sequence doesn't seem to suffer from > this problem. Could be it was always the intended sequence for DP and > the gen4 bspec was just never updated to include it. > > Cc: stable@vger.kernel.org > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> The change for PCH was commit 08aff3fe26ae7a0d6f302ac2e1b7e2eb9933cd42 Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Mon Aug 18 22:16:09 2014 +0300 drm/i915: Move DP port disable to post_disable for pch platforms where you explicitly left out g4x per modeset sequence. I guess you could reference that in the commit message. > --- > drivers/gpu/drm/i915/intel_dp.c | 26 +++++++++----------------- > 1 file changed, 9 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 6068986fd985..5f09a8015c89 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2803,16 +2803,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, > static void g4x_disable_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *old_crtc_state, > const struct drm_connector_state *old_conn_state) > -{ > - intel_disable_dp(encoder, old_crtc_state, old_conn_state); > - > - /* disable the port before the pipe on g4x */ > - intel_dp_link_down(encoder, old_crtc_state); > -} > - > -static void ilk_disable_dp(struct intel_encoder *encoder, > - const struct intel_crtc_state *old_crtc_state, > - const struct drm_connector_state *old_conn_state) > { > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > } > @@ -2828,13 +2818,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > } > > -static void ilk_post_disable_dp(struct intel_encoder *encoder, > +static void g4x_post_disable_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *old_crtc_state, > const struct drm_connector_state *old_conn_state) > { > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > enum port port = encoder->port; > > + /* > + * Bspec does not list a specific disable sequence for g4x DP. > + * Follow the ilk+ sequence (disable pipe before the port) for > + * g4x DP as it does not suffer from underruns like the normal > + * g4x modeset sequence (disable pipe after the port). > + */ > intel_dp_link_down(encoder, old_crtc_state); > > /* Only ilk+ has port A */ > @@ -6450,15 +6446,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, > intel_encoder->enable = vlv_enable_dp; > intel_encoder->disable = vlv_disable_dp; > intel_encoder->post_disable = vlv_post_disable_dp; > - } else if (INTEL_GEN(dev_priv) >= 5) { > - intel_encoder->pre_enable = g4x_pre_enable_dp; > - intel_encoder->enable = g4x_enable_dp; > - intel_encoder->disable = ilk_disable_dp; > - intel_encoder->post_disable = ilk_post_disable_dp; > - } else { > + } else{ Space missing before {. The code matches the commit message, so strictly in that sense, Reviewed-by: Jani Nikula <jani.nikula@intel.com> but I really don't know if this is the right thing to do. Your call. (And your responsibility to fix the regressions! ;) > intel_encoder->pre_enable = g4x_pre_enable_dp; > intel_encoder->enable = g4x_enable_dp; > intel_encoder->disable = g4x_disable_dp; > + intel_encoder->post_disable = g4x_post_disable_dp; > } > > intel_dig_port->dp.output_reg = output_reg; -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() 2018-06-14 12:42 ` [Intel-gfx] " Jani Nikula @ 2018-06-14 18:17 ` Ville Syrjälä -1 siblings, 0 replies; 14+ messages in thread From: Ville Syrjälä @ 2018-06-14 18:17 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, stable On Thu, Jun 14, 2018 at 03:42:42PM +0300, Jani Nikula wrote: > On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > While Bspec doesn't list a specific sequence for turning off the DP port > > on g4x we are getting an underrun if the port is disabled in the > > .disable() hook. Looks like the pipe stops when the port stops, and by > > that time the plane disable may not have completed yet. Also the plane(s) > > seem to end up in some wonky state when this happens as they also signal > > another underrun immediately after we turn them back on during the next > > enable sequence. > > > > We could add a vblank wait in .disable() to avoid wedging the planes, > > but I assume we're still tripping up the pipe in some way. So it seems > > better to me to just follow the ILK+ sequence and turn off the DP port > > in .post_disable() instead. This sequence doesn't seem to suffer from > > this problem. Could be it was always the intended sequence for DP and > > the gen4 bspec was just never updated to include it. > > > > Cc: stable@vger.kernel.org > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The change for PCH was > > commit 08aff3fe26ae7a0d6f302ac2e1b7e2eb9933cd42 > Author: Ville Syrjälä <ville.syrjala@linux.intel.com> > Date: Mon Aug 18 22:16:09 2014 +0300 > > drm/i915: Move DP port disable to post_disable for pch platforms > > where you explicitly left out g4x per modeset sequence. I guess you > could reference that in the commit message. > > > --- > > drivers/gpu/drm/i915/intel_dp.c | 26 +++++++++----------------- > > 1 file changed, 9 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 6068986fd985..5f09a8015c89 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -2803,16 +2803,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, > > static void g4x_disable_dp(struct intel_encoder *encoder, > > const struct intel_crtc_state *old_crtc_state, > > const struct drm_connector_state *old_conn_state) > > -{ > > - intel_disable_dp(encoder, old_crtc_state, old_conn_state); > > - > > - /* disable the port before the pipe on g4x */ > > - intel_dp_link_down(encoder, old_crtc_state); > > -} > > - > > -static void ilk_disable_dp(struct intel_encoder *encoder, > > - const struct intel_crtc_state *old_crtc_state, > > - const struct drm_connector_state *old_conn_state) > > { > > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > > } > > @@ -2828,13 +2818,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, > > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > > } > > > > -static void ilk_post_disable_dp(struct intel_encoder *encoder, > > +static void g4x_post_disable_dp(struct intel_encoder *encoder, > > const struct intel_crtc_state *old_crtc_state, > > const struct drm_connector_state *old_conn_state) > > { > > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > > enum port port = encoder->port; > > > > + /* > > + * Bspec does not list a specific disable sequence for g4x DP. > > + * Follow the ilk+ sequence (disable pipe before the port) for > > + * g4x DP as it does not suffer from underruns like the normal > > + * g4x modeset sequence (disable pipe after the port). > > + */ > > intel_dp_link_down(encoder, old_crtc_state); > > > > /* Only ilk+ has port A */ > > @@ -6450,15 +6446,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, > > intel_encoder->enable = vlv_enable_dp; > > intel_encoder->disable = vlv_disable_dp; > > intel_encoder->post_disable = vlv_post_disable_dp; > > - } else if (INTEL_GEN(dev_priv) >= 5) { > > - intel_encoder->pre_enable = g4x_pre_enable_dp; > > - intel_encoder->enable = g4x_enable_dp; > > - intel_encoder->disable = ilk_disable_dp; > > - intel_encoder->post_disable = ilk_post_disable_dp; > > - } else { > > + } else{ > > Space missing before {. > > The code matches the commit message, so strictly in that sense, > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> Fixed up the whitespace, amended the commit message a bit with the pch commit details, and pushed the series to dinq. Thanks for the review. > > but I really don't know if this is the right thing to do. Your > call. (And your responsibility to fix the regressions! ;) I'm feeling unusually confident about this one :) > > > > intel_encoder->pre_enable = g4x_pre_enable_dp; > > intel_encoder->enable = g4x_enable_dp; > > intel_encoder->disable = g4x_disable_dp; > > + intel_encoder->post_disable = g4x_post_disable_dp; > > } > > > > intel_dig_port->dp.output_reg = output_reg; > > -- > Jani Nikula, Intel Open Source Graphics Center -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() @ 2018-06-14 18:17 ` Ville Syrjälä 0 siblings, 0 replies; 14+ messages in thread From: Ville Syrjälä @ 2018-06-14 18:17 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, stable On Thu, Jun 14, 2018 at 03:42:42PM +0300, Jani Nikula wrote: > On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > > From: Ville Syrj�l� <ville.syrjala@linux.intel.com> > > > > While Bspec doesn't list a specific sequence for turning off the DP port > > on g4x we are getting an underrun if the port is disabled in the > > .disable() hook. Looks like the pipe stops when the port stops, and by > > that time the plane disable may not have completed yet. Also the plane(s) > > seem to end up in some wonky state when this happens as they also signal > > another underrun immediately after we turn them back on during the next > > enable sequence. > > > > We could add a vblank wait in .disable() to avoid wedging the planes, > > but I assume we're still tripping up the pipe in some way. So it seems > > better to me to just follow the ILK+ sequence and turn off the DP port > > in .post_disable() instead. This sequence doesn't seem to suffer from > > this problem. Could be it was always the intended sequence for DP and > > the gen4 bspec was just never updated to include it. > > > > Cc: stable@vger.kernel.org > > Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com> > > The change for PCH was > > commit 08aff3fe26ae7a0d6f302ac2e1b7e2eb9933cd42 > Author: Ville Syrj�l� <ville.syrjala@linux.intel.com> > Date: Mon Aug 18 22:16:09 2014 +0300 > > drm/i915: Move DP port disable to post_disable for pch platforms > > where you explicitly left out g4x per modeset sequence. I guess you > could reference that in the commit message. > > > --- > > drivers/gpu/drm/i915/intel_dp.c | 26 +++++++++----------------- > > 1 file changed, 9 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 6068986fd985..5f09a8015c89 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -2803,16 +2803,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, > > static void g4x_disable_dp(struct intel_encoder *encoder, > > const struct intel_crtc_state *old_crtc_state, > > const struct drm_connector_state *old_conn_state) > > -{ > > - intel_disable_dp(encoder, old_crtc_state, old_conn_state); > > - > > - /* disable the port before the pipe on g4x */ > > - intel_dp_link_down(encoder, old_crtc_state); > > -} > > - > > -static void ilk_disable_dp(struct intel_encoder *encoder, > > - const struct intel_crtc_state *old_crtc_state, > > - const struct drm_connector_state *old_conn_state) > > { > > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > > } > > @@ -2828,13 +2818,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, > > intel_disable_dp(encoder, old_crtc_state, old_conn_state); > > } > > > > -static void ilk_post_disable_dp(struct intel_encoder *encoder, > > +static void g4x_post_disable_dp(struct intel_encoder *encoder, > > const struct intel_crtc_state *old_crtc_state, > > const struct drm_connector_state *old_conn_state) > > { > > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > > enum port port = encoder->port; > > > > + /* > > + * Bspec does not list a specific disable sequence for g4x DP. > > + * Follow the ilk+ sequence (disable pipe before the port) for > > + * g4x DP as it does not suffer from underruns like the normal > > + * g4x modeset sequence (disable pipe after the port). > > + */ > > intel_dp_link_down(encoder, old_crtc_state); > > > > /* Only ilk+ has port A */ > > @@ -6450,15 +6446,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, > > intel_encoder->enable = vlv_enable_dp; > > intel_encoder->disable = vlv_disable_dp; > > intel_encoder->post_disable = vlv_post_disable_dp; > > - } else if (INTEL_GEN(dev_priv) >= 5) { > > - intel_encoder->pre_enable = g4x_pre_enable_dp; > > - intel_encoder->enable = g4x_enable_dp; > > - intel_encoder->disable = ilk_disable_dp; > > - intel_encoder->post_disable = ilk_post_disable_dp; > > - } else { > > + } else{ > > Space missing before {. > > The code matches the commit message, so strictly in that sense, > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> Fixed up the whitespace, amended the commit message a bit with the pch commit details, and pushed the series to dinq. Thanks for the review. > > but I really don't know if this is the right thing to do. Your > call. (And your responsibility to fix the regressions! ;) I'm feeling unusually confident about this one :) > > > > intel_encoder->pre_enable = g4x_pre_enable_dp; > > intel_encoder->enable = g4x_enable_dp; > > intel_encoder->disable = g4x_disable_dp; > > + intel_encoder->post_disable = g4x_post_disable_dp; > > } > > > > intel_dig_port->dp.output_reg = output_reg; > > -- > Jani Nikula, Intel Open Source Graphics Center -- Ville Syrj�l� Intel ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs 2018-06-13 16:05 [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Ville Syrjala 2018-06-13 16:05 ` Ville Syrjala @ 2018-06-13 16:37 ` Patchwork 2018-06-13 21:15 ` ✓ Fi.CI.IGT: " Patchwork 2018-06-14 12:25 ` [Intel-gfx] " Jani Nikula 3 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2018-06-13 16:37 UTC (permalink / raw) To: Ville Syrjala; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs URL : https://patchwork.freedesktop.org/series/44705/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4310 -> Patchwork_9288 = == Summary - WARNING == Minor unknown changes coming with Patchwork_9288 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9288, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/44705/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9288: === IGT changes === ==== Warnings ==== igt@gem_exec_gttfill@basic: fi-pnv-d510: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_9288 that come from known issues: === IGT changes === ==== Issues hit ==== igt@kms_flip@basic-flip-vs-dpms: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@kms_flip@basic-flip-vs-modeset: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000, fdo#106097) igt@kms_flip@basic-plain-flip: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106097) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-skl-guc: PASS -> FAIL (fdo#103191, fdo#104724) ==== Possible fixes ==== igt@gem_ctx_create@basic-files: fi-glk-j4005: DMESG-WARN (fdo#105719) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 == Participating hosts (43 -> 38) == Missing (5): fi-byt-j1900 fi-ctg-p8600 fi-byt-squawks fi-bsw-cyan fi-ilk-m540 == Build changes == * Linux: CI_DRM_4310 -> Patchwork_9288 CI_DRM_4310: 5945ab6707472bde0c3bc12836252b487ecfeb72 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4518: e4908004547b63131352fbc0ddcdb1d3d55480e0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9288: 7cb1506cc8c1032620b14ac2d4c196a65d0bfd1e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 7cb1506cc8c1 drm/i915: Turn off g4x DP port in .post_disable() 3956b8c00b4f drm/i915: Disallow interlaced modes on g4x DP outputs == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9288/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs 2018-06-13 16:05 [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Ville Syrjala 2018-06-13 16:05 ` Ville Syrjala 2018-06-13 16:37 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Patchwork @ 2018-06-13 21:15 ` Patchwork 2018-06-14 12:25 ` [Intel-gfx] " Jani Nikula 3 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2018-06-13 21:15 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs URL : https://patchwork.freedesktop.org/series/44705/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4310_full -> Patchwork_9288_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9288_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9288_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9288_full: === IGT changes === ==== Warnings ==== igt@gem_exec_schedule@deep-bsd2: shard-kbl: PASS -> SKIP +1 igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS igt@pm_rc6_residency@rc6-accuracy: shard-snb: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_9288_full that come from known issues: === IGT changes === ==== Issues hit ==== igt@drv_selftest@live_hangcheck: shard-kbl: PASS -> DMESG-FAIL (fdo#106560) igt@gem_wait@await-bsd2: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_cursor_legacy@cursor-vs-flip-toggle: shard-hsw: PASS -> FAIL (fdo#103355) igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: PASS -> FAIL (fdo#102887) igt@kms_flip@dpms-vs-vblank-race: shard-hsw: PASS -> FAIL (fdo#103060) igt@kms_flip_tiling@flip-y-tiled: shard-glk: PASS -> FAIL (fdo#104724, fdo#103822) igt@perf@blocking: shard-hsw: PASS -> FAIL (fdo#102252) ==== Possible fixes ==== igt@drv_selftest@live_gtt: shard-glk: FAIL (fdo#105347) -> PASS igt@drv_selftest@live_hangcheck: shard-apl: DMESG-FAIL (fdo#106560) -> PASS igt@drv_suspend@shrink: shard-snb: FAIL -> PASS igt@gem_ppgtt@blt-vs-render-ctx0: shard-kbl: INCOMPLETE (fdo#103665, fdo#106023) -> PASS igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: FAIL (fdo#105454, fdo#106509) -> PASS igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: shard-glk: FAIL (fdo#100368) -> PASS +2 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4310 -> Patchwork_9288 CI_DRM_4310: 5945ab6707472bde0c3bc12836252b487ecfeb72 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4518: e4908004547b63131352fbc0ddcdb1d3d55480e0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9288: 7cb1506cc8c1032620b14ac2d4c196a65d0bfd1e @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9288/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs 2018-06-13 16:05 [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Ville Syrjala @ 2018-06-14 12:25 ` Jani Nikula 2018-06-13 16:37 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2018-06-14 12:25 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: stable On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Looks like interlaced DP output doesn't work on g4x either. Not all > that surprising considering we already established that interlaced > DP output is busted on VLV/CHV. > > Cc: stable@vger.kernel.org > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 40ffd9163175..6068986fd985 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > conn_state->scaling_mode); > } > > - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > + if (HAS_GMCH_DISPLAY(dev_priv) && > adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > return false; > > @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > > - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > + if (!HAS_GMCH_DISPLAY(dev_priv)) > connector->interlace_allowed = true; > connector->doublescan_allowed = 0; -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs @ 2018-06-14 12:25 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2018-06-14 12:25 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: stable On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Looks like interlaced DP output doesn't work on g4x either. Not all > that surprising considering we already established that interlaced > DP output is busted on VLV/CHV. > > Cc: stable@vger.kernel.org > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 40ffd9163175..6068986fd985 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > conn_state->scaling_mode); > } > > - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > + if (HAS_GMCH_DISPLAY(dev_priv) && > adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > return false; > > @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > > - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > + if (!HAS_GMCH_DISPLAY(dev_priv)) > connector->interlace_allowed = true; > connector->doublescan_allowed = 0; -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs 2018-06-14 12:25 ` [Intel-gfx] " Jani Nikula (?) @ 2018-06-14 12:26 ` Jani Nikula 2018-06-14 12:34 ` [Intel-gfx] " Ville Syrjälä -1 siblings, 1 reply; 14+ messages in thread From: Jani Nikula @ 2018-06-14 12:26 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: stable On Thu, 14 Jun 2018, Jani Nikula <jani.nikula@linux.intel.com> wrote: > On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: >> From: Ville Syrjälä <ville.syrjala@linux.intel.com> >> >> Looks like interlaced DP output doesn't work on g4x either. Not all >> that surprising considering we already established that interlaced >> DP output is busted on VLV/CHV. >> >> Cc: stable@vger.kernel.org >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> Oh, did you have a bug reference? > > >> --- >> drivers/gpu/drm/i915/intel_dp.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> index 40ffd9163175..6068986fd985 100644 >> --- a/drivers/gpu/drm/i915/intel_dp.c >> +++ b/drivers/gpu/drm/i915/intel_dp.c >> @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, >> conn_state->scaling_mode); >> } >> >> - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && >> + if (HAS_GMCH_DISPLAY(dev_priv) && >> adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) >> return false; >> >> @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, >> drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); >> drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); >> >> - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) >> + if (!HAS_GMCH_DISPLAY(dev_priv)) >> connector->interlace_allowed = true; >> connector->doublescan_allowed = 0; -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs 2018-06-14 12:26 ` Jani Nikula @ 2018-06-14 12:34 ` Ville Syrjälä 0 siblings, 0 replies; 14+ messages in thread From: Ville Syrjälä @ 2018-06-14 12:34 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, stable On Thu, Jun 14, 2018 at 03:26:09PM +0300, Jani Nikula wrote: > On Thu, 14 Jun 2018, Jani Nikula <jani.nikula@linux.intel.com> wrote: > > On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > >> From: Ville Syrjälä <ville.syrjala@linux.intel.com> > >> > >> Looks like interlaced DP output doesn't work on g4x either. Not all > >> that surprising considering we already established that interlaced > >> DP output is busted on VLV/CHV. > >> > >> Cc: stable@vger.kernel.org > >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > Oh, did you have a bug reference? No. Just noticed it on my own machine. > > > > > > > >> --- > >> drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > >> 1 file changed, 2 insertions(+), 2 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > >> index 40ffd9163175..6068986fd985 100644 > >> --- a/drivers/gpu/drm/i915/intel_dp.c > >> +++ b/drivers/gpu/drm/i915/intel_dp.c > >> @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > >> conn_state->scaling_mode); > >> } > >> > >> - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > >> + if (HAS_GMCH_DISPLAY(dev_priv) && > >> adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > >> return false; > >> > >> @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > >> drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > >> drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > >> > >> - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > >> + if (!HAS_GMCH_DISPLAY(dev_priv)) > >> connector->interlace_allowed = true; > >> connector->doublescan_allowed = 0; > > -- > Jani Nikula, Intel Open Source Graphics Center -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs @ 2018-06-14 12:34 ` Ville Syrjälä 0 siblings, 0 replies; 14+ messages in thread From: Ville Syrjälä @ 2018-06-14 12:34 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, stable On Thu, Jun 14, 2018 at 03:26:09PM +0300, Jani Nikula wrote: > On Thu, 14 Jun 2018, Jani Nikula <jani.nikula@linux.intel.com> wrote: > > On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > >> From: Ville Syrj�l� <ville.syrjala@linux.intel.com> > >> > >> Looks like interlaced DP output doesn't work on g4x either. Not all > >> that surprising considering we already established that interlaced > >> DP output is busted on VLV/CHV. > >> > >> Cc: stable@vger.kernel.org > >> Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com> > > > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > Oh, did you have a bug reference? No. Just noticed it on my own machine. > > > > > > > >> --- > >> drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > >> 1 file changed, 2 insertions(+), 2 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > >> index 40ffd9163175..6068986fd985 100644 > >> --- a/drivers/gpu/drm/i915/intel_dp.c > >> +++ b/drivers/gpu/drm/i915/intel_dp.c > >> @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > >> conn_state->scaling_mode); > >> } > >> > >> - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > >> + if (HAS_GMCH_DISPLAY(dev_priv) && > >> adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > >> return false; > >> > >> @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > >> drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > >> drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > >> > >> - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > >> + if (!HAS_GMCH_DISPLAY(dev_priv)) > >> connector->interlace_allowed = true; > >> connector->doublescan_allowed = 0; > > -- > Jani Nikula, Intel Open Source Graphics Center -- Ville Syrj�l� Intel ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2018-06-14 18:17 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-06-13 16:05 [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Ville Syrjala 2018-06-13 16:05 ` [PATCH 2/2] drm/i915: Turn off g4x DP port in .post_disable() Ville Syrjala 2018-06-13 16:05 ` Ville Syrjala 2018-06-14 12:42 ` Jani Nikula 2018-06-14 12:42 ` [Intel-gfx] " Jani Nikula 2018-06-14 18:17 ` Ville Syrjälä 2018-06-14 18:17 ` [Intel-gfx] " Ville Syrjälä 2018-06-13 16:37 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Patchwork 2018-06-13 21:15 ` ✓ Fi.CI.IGT: " Patchwork 2018-06-14 12:25 ` [PATCH 1/2] " Jani Nikula 2018-06-14 12:25 ` [Intel-gfx] " Jani Nikula 2018-06-14 12:26 ` Jani Nikula 2018-06-14 12:34 ` Ville Syrjälä 2018-06-14 12:34 ` [Intel-gfx] " Ville Syrjälä
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