From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Santhosh Kumar K <s-k6@ti.com>
Cc: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <richard@nod.at>, <vigneshr@ti.com>,
<tudor.ambarus@linaro.org>, <pratyush@kernel.org>,
<mwalle@kernel.org>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <praneeth@ti.com>,
<u-kumar1@ti.com>, <p-mantena@ti.com>, <a-dutta@ti.com>
Subject: Re: [RFC PATCH v2 01/12] spi: dt-bindings: add spi-has-dqs property
Date: Thu, 05 Feb 2026 19:06:30 +0100 [thread overview]
Message-ID: <87ldh7f4k9.fsf@bootlin.com> (raw)
In-Reply-To: <ba78303e-36aa-4f40-9416-c22ff12b7458@ti.com> (Santhosh Kumar K.'s message of "Thu, 5 Feb 2026 23:16:47 +0530")
Hi Santhosh,
>> This information is currently lacking indeed, mostly because nobody
>> ever
>> cared about it. The DT property is IMO not the correct way to give this
>> information for two reasons:
>> - this is a capability of the chip, we discover the chip dynamically in
>> both cases (NAND and NOR) and attach many capabilities to the chips
>> already, so I believe this information should be provided through a
>> flag.
>> - the fact that the DQS signal might be supported does not indicate it
>> is actually driven. Winbond chips, for instance, can either enable it
>> or not depending on their configuration (probably through their VCR
>> register, I need to check again).
>
> I agree. The flash device's capability to provide DQS - whether in SDR,
> DDR or both modes - can be represented as a flag in the flash
> description. We can list out the possible combinations and use them to
> clearly describe the flash's supported capabilities.
>
> However, whether the DQS signal is actually connected to the controller
> is a non-discoverable hardware detail and should be described only via
> Device Tree. The DT property is not meant to describe the flash's
> capabilities, but to indicate whether DQS is physically connected to the
> controller.
>
>> The question I have is: shall we enable the DQS pin automatically if
>> it
>> is available? Not all controllers support it I suppose, and wiring the
>> line might as well not be done (or incorrectly). For these cases we may
>> need DT properties in the future. But for the DQS presence indication, I
>> bet it is not useful, and should be handled at the core level (not
>> parsed by the driver like you do) because it may have an impact on the
>> chip internal configuration.
>
> We can handle this in either way: keep DQS disabled by default and
> enable it using a "has-dqs" property, or enable it by default and
> disable it explicitly using a "no-dqs" property.
I know we can be surprised by our hardware colleagues :-), but I would
consider "not wiring the DQS signal of a (DQS capable) octal DTR SPI
memory" a bug? Hence I would opt for handling the broken case, when/if
that need arises.
Thanks,
Miquèl
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WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Santhosh Kumar K <s-k6@ti.com>
Cc: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <richard@nod.at>, <vigneshr@ti.com>,
<tudor.ambarus@linaro.org>, <pratyush@kernel.org>,
<mwalle@kernel.org>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-mtd@lists.infradead.org>, <praneeth@ti.com>,
<u-kumar1@ti.com>, <p-mantena@ti.com>, <a-dutta@ti.com>
Subject: Re: [RFC PATCH v2 01/12] spi: dt-bindings: add spi-has-dqs property
Date: Thu, 05 Feb 2026 19:06:30 +0100 [thread overview]
Message-ID: <87ldh7f4k9.fsf@bootlin.com> (raw)
In-Reply-To: <ba78303e-36aa-4f40-9416-c22ff12b7458@ti.com> (Santhosh Kumar K.'s message of "Thu, 5 Feb 2026 23:16:47 +0530")
Hi Santhosh,
>> This information is currently lacking indeed, mostly because nobody
>> ever
>> cared about it. The DT property is IMO not the correct way to give this
>> information for two reasons:
>> - this is a capability of the chip, we discover the chip dynamically in
>> both cases (NAND and NOR) and attach many capabilities to the chips
>> already, so I believe this information should be provided through a
>> flag.
>> - the fact that the DQS signal might be supported does not indicate it
>> is actually driven. Winbond chips, for instance, can either enable it
>> or not depending on their configuration (probably through their VCR
>> register, I need to check again).
>
> I agree. The flash device's capability to provide DQS - whether in SDR,
> DDR or both modes - can be represented as a flag in the flash
> description. We can list out the possible combinations and use them to
> clearly describe the flash's supported capabilities.
>
> However, whether the DQS signal is actually connected to the controller
> is a non-discoverable hardware detail and should be described only via
> Device Tree. The DT property is not meant to describe the flash's
> capabilities, but to indicate whether DQS is physically connected to the
> controller.
>
>> The question I have is: shall we enable the DQS pin automatically if
>> it
>> is available? Not all controllers support it I suppose, and wiring the
>> line might as well not be done (or incorrectly). For these cases we may
>> need DT properties in the future. But for the DQS presence indication, I
>> bet it is not useful, and should be handled at the core level (not
>> parsed by the driver like you do) because it may have an impact on the
>> chip internal configuration.
>
> We can handle this in either way: keep DQS disabled by default and
> enable it using a "has-dqs" property, or enable it by default and
> disable it explicitly using a "no-dqs" property.
I know we can be surprised by our hardware colleagues :-), but I would
consider "not wiring the DQS signal of a (DQS capable) octal DTR SPI
memory" a bug? Hence I would opt for handling the broken case, when/if
that need arises.
Thanks,
Miquèl
next prev parent reply other threads:[~2026-02-05 18:06 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-13 14:16 [RFC PATCH v2 00/12] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 01/12] spi: dt-bindings: add spi-has-dqs property Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-04 10:46 ` Miquel Raynal
2026-02-04 10:46 ` Miquel Raynal
2026-02-05 17:46 ` Santhosh Kumar K
2026-02-05 17:46 ` Santhosh Kumar K
2026-02-05 18:06 ` Miquel Raynal [this message]
2026-02-05 18:06 ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 02/12] spi: spi-mem: add controller tuning support Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 03/12] mtd: spinand: perform controller tuning during probe Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:35 ` Miquel Raynal
2026-02-05 17:35 ` Miquel Raynal
2026-02-06 19:23 ` Santhosh Kumar K
2026-02-06 19:23 ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 04/12] mtd: spi-nor: extract read operation setup into helper Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 05/12] mtd: spi-nor: perform controller tuning during probe Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 06/12] spi: cadence-quadspi: move cqspi_readdata_capture earlier Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:35 ` Miquel Raynal
2026-02-05 17:35 ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 07/12] spi: cadence-quadspi: add DQS support to read data capture Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:35 ` Miquel Raynal
2026-02-05 17:35 ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 08/12] spi: cadence-quadspi: read 'has-dqs' DT property Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:35 ` Miquel Raynal
2026-02-05 17:35 ` Miquel Raynal
2026-02-19 12:14 ` Michael Walle
2026-02-19 12:14 ` Michael Walle
2026-02-20 8:21 ` Miquel Raynal
2026-02-20 8:21 ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 09/12] spi: cadence-quadspi: add PHY tuning infrastructure Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:39 ` Miquel Raynal
2026-02-05 17:39 ` Miquel Raynal
2026-02-06 19:25 ` Santhosh Kumar K
2026-02-06 19:25 ` Santhosh Kumar K
2026-02-13 8:18 ` Miquel Raynal
2026-02-13 8:18 ` Miquel Raynal
2026-02-18 18:07 ` Santhosh Kumar K
2026-02-18 18:07 ` Santhosh Kumar K
2026-02-19 10:30 ` Miquel Raynal
2026-02-19 10:30 ` Miquel Raynal
2026-02-09 9:48 ` Michael Walle
2026-02-09 9:48 ` Michael Walle
2026-02-12 10:50 ` Miquel Raynal
2026-02-12 10:50 ` Miquel Raynal
2026-02-12 11:14 ` Michael Walle
2026-02-12 11:14 ` Michael Walle
2026-02-12 12:55 ` Miquel Raynal
2026-02-12 12:55 ` Miquel Raynal
2026-02-18 18:07 ` Santhosh Kumar K
2026-02-18 18:07 ` Santhosh Kumar K
2026-02-19 8:33 ` Michael Walle
2026-02-19 8:33 ` Michael Walle
2026-02-19 10:34 ` Miquel Raynal
2026-02-19 10:34 ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 10/12] spi: cadence-quadspi: implement PHY tuning algorithm Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:42 ` Miquel Raynal
2026-02-05 17:42 ` Miquel Raynal
2026-01-13 14:16 ` [RFC PATCH v2 11/12] spi: cadence-quadspi: restrict PHY frequency to tuned operations Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:47 ` Miquel Raynal
2026-02-05 17:47 ` Miquel Raynal
2026-02-06 19:27 ` Santhosh Kumar K
2026-02-06 19:27 ` Santhosh Kumar K
2026-02-13 8:21 ` Miquel Raynal
2026-02-13 8:21 ` Miquel Raynal
2026-03-17 15:17 ` Miquel Raynal
2026-03-17 15:17 ` Miquel Raynal
2026-03-30 19:56 ` Santhosh Kumar K
2026-03-30 19:56 ` Santhosh Kumar K
2026-01-13 14:16 ` [RFC PATCH v2 12/12] spi: cadence-quadspi: enable PHY for direct reads and writes Santhosh Kumar K
2026-01-13 14:16 ` Santhosh Kumar K
2026-02-05 17:51 ` Miquel Raynal
2026-02-05 17:51 ` Miquel Raynal
2026-02-04 10:29 ` [RFC PATCH v2 00/12] spi: cadence-quadspi: add PHY tuning support Miquel Raynal
2026-02-04 10:29 ` Miquel Raynal
2026-02-05 15:48 ` Miquel Raynal
2026-02-05 15:48 ` Miquel Raynal
2026-02-06 19:28 ` Santhosh Kumar K
2026-02-06 19:28 ` Santhosh Kumar K
2026-02-13 9:01 ` Miquel Raynal
2026-02-13 9:01 ` Miquel Raynal
2026-02-18 18:08 ` Santhosh Kumar K
2026-02-18 18:08 ` Santhosh Kumar K
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