All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Andrew Jones <drjones@redhat.com>
Cc: kvm@vger.kernel.org, marc.zyngier@arm.com,
	andre.przywara@arm.com, qemu-devel@nongnu.org,
	qemu-arm@nongnu.org, pbonzini@redhat.com,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines
Date: Mon, 06 Jun 2016 18:39:50 +0100	[thread overview]
Message-ID: <87vb1mgqs9.fsf@linaro.org> (raw)
In-Reply-To: <1465064165-14885-5-git-send-email-drjones@redhat.com>


Andrew Jones <drjones@redhat.com> writes:

> Allow a thread to wait some specified amount of time. Can
> specify in cycles, usecs, and msecs.

I wonder if delay() and mdelay() can be in common code with just the
freq and count getting functions in specific code? I guess that would
need a lib/arm-generic/ or some such?

Otherwise:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  lib/arm/asm/processor.h   | 19 +++++++++++++++++++
>  lib/arm/processor.c       | 15 +++++++++++++++
>  lib/arm64/asm/processor.h | 19 +++++++++++++++++++
>  lib/arm64/processor.c     | 15 +++++++++++++++
>  4 files changed, 68 insertions(+)
>
> diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h
> index d2048f5f5f7e6..afc903ca7d4ab 100644
> --- a/lib/arm/asm/processor.h
> +++ b/lib/arm/asm/processor.h
> @@ -5,7 +5,9 @@
>   *
>   * This work is licensed under the terms of the GNU LGPL, version 2.
>   */
> +#include <libcflat.h>
>  #include <asm/ptrace.h>
> +#include <asm/barrier.h>
>
>  enum vector {
>  	EXCPTN_RST,
> @@ -51,4 +53,21 @@ extern int mpidr_to_cpu(unsigned long mpidr);
>  extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr);
>  extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> +	u64 vct;
> +	isb();
> +	asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (vct));
> +	return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> +	while (msecs--)
> +		udelay(1000);
> +}
> +
>  #endif /* _ASMARM_PROCESSOR_H_ */
> diff --git a/lib/arm/processor.c b/lib/arm/processor.c
> index 54fdb87ef0196..c2ee360df6884 100644
> --- a/lib/arm/processor.c
> +++ b/lib/arm/processor.c
> @@ -9,6 +9,7 @@
>  #include <asm/ptrace.h>
>  #include <asm/processor.h>
>  #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
>  static const char *processor_modes[] = {
>  	"USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" ,
> @@ -141,3 +142,17 @@ bool is_user(void)
>  {
>  	return current_thread_info()->flags & TIF_USER_MODE;
>  }
> +
> +void delay(u64 cycles)
> +{
> +	u64 start = get_cntvct();
> +	while ((get_cntvct() - start) < cycles)
> +		cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> +	unsigned int frq;
> +	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
> +	delay((u64)usec * frq / 1000000);
> +}
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 7e448dc81a6aa..94f7ce35b65c1 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -17,8 +17,10 @@
>  #define SCTLR_EL1_M	(1 << 0)
>
>  #ifndef __ASSEMBLY__
> +#include <libcflat.h>
>  #include <asm/ptrace.h>
>  #include <asm/esr.h>
> +#include <asm/barrier.h>
>
>  enum vector {
>  	EL1T_SYNC,
> @@ -89,5 +91,22 @@ extern int mpidr_to_cpu(unsigned long mpidr);
>  extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr);
>  extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> +	u64 vct;
> +	isb();
> +	asm volatile("mrs %0, cntvct_el0" : "=r" (vct));
> +	return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> +	while (msecs--)
> +		udelay(1000);
> +}
> +
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM64_PROCESSOR_H_ */
> diff --git a/lib/arm64/processor.c b/lib/arm64/processor.c
> index deeab4ec9c8ac..50fa835c6f1e3 100644
> --- a/lib/arm64/processor.c
> +++ b/lib/arm64/processor.c
> @@ -9,6 +9,7 @@
>  #include <asm/ptrace.h>
>  #include <asm/processor.h>
>  #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
>  static const char *vector_names[] = {
>  	"el1t_sync",
> @@ -253,3 +254,17 @@ bool is_user(void)
>  {
>  	return current_thread_info()->flags & TIF_USER_MODE;
>  }
> +
> +void delay(u64 cycles)
> +{
> +	u64 start = get_cntvct();
> +	while ((get_cntvct() - start) < cycles)
> +		cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> +	unsigned int frq;
> +	asm volatile("mrs %0, cntfrq_el0" : "=r" (frq));
> +	delay((u64)usec * frq / 1000000);
> +}


--
Alex Bennée
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Andrew Jones <drjones@redhat.com>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	pbonzini@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	andre.przywara@arm.com, peter.maydell@linaro.org,
	christoffer.dall@linaro.org, marc.zyngier@arm.com
Subject: Re: [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines
Date: Mon, 06 Jun 2016 18:39:50 +0100	[thread overview]
Message-ID: <87vb1mgqs9.fsf@linaro.org> (raw)
In-Reply-To: <1465064165-14885-5-git-send-email-drjones@redhat.com>


Andrew Jones <drjones@redhat.com> writes:

> Allow a thread to wait some specified amount of time. Can
> specify in cycles, usecs, and msecs.

I wonder if delay() and mdelay() can be in common code with just the
freq and count getting functions in specific code? I guess that would
need a lib/arm-generic/ or some such?

Otherwise:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  lib/arm/asm/processor.h   | 19 +++++++++++++++++++
>  lib/arm/processor.c       | 15 +++++++++++++++
>  lib/arm64/asm/processor.h | 19 +++++++++++++++++++
>  lib/arm64/processor.c     | 15 +++++++++++++++
>  4 files changed, 68 insertions(+)
>
> diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h
> index d2048f5f5f7e6..afc903ca7d4ab 100644
> --- a/lib/arm/asm/processor.h
> +++ b/lib/arm/asm/processor.h
> @@ -5,7 +5,9 @@
>   *
>   * This work is licensed under the terms of the GNU LGPL, version 2.
>   */
> +#include <libcflat.h>
>  #include <asm/ptrace.h>
> +#include <asm/barrier.h>
>
>  enum vector {
>  	EXCPTN_RST,
> @@ -51,4 +53,21 @@ extern int mpidr_to_cpu(unsigned long mpidr);
>  extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr);
>  extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> +	u64 vct;
> +	isb();
> +	asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (vct));
> +	return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> +	while (msecs--)
> +		udelay(1000);
> +}
> +
>  #endif /* _ASMARM_PROCESSOR_H_ */
> diff --git a/lib/arm/processor.c b/lib/arm/processor.c
> index 54fdb87ef0196..c2ee360df6884 100644
> --- a/lib/arm/processor.c
> +++ b/lib/arm/processor.c
> @@ -9,6 +9,7 @@
>  #include <asm/ptrace.h>
>  #include <asm/processor.h>
>  #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
>  static const char *processor_modes[] = {
>  	"USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" ,
> @@ -141,3 +142,17 @@ bool is_user(void)
>  {
>  	return current_thread_info()->flags & TIF_USER_MODE;
>  }
> +
> +void delay(u64 cycles)
> +{
> +	u64 start = get_cntvct();
> +	while ((get_cntvct() - start) < cycles)
> +		cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> +	unsigned int frq;
> +	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
> +	delay((u64)usec * frq / 1000000);
> +}
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 7e448dc81a6aa..94f7ce35b65c1 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -17,8 +17,10 @@
>  #define SCTLR_EL1_M	(1 << 0)
>
>  #ifndef __ASSEMBLY__
> +#include <libcflat.h>
>  #include <asm/ptrace.h>
>  #include <asm/esr.h>
> +#include <asm/barrier.h>
>
>  enum vector {
>  	EL1T_SYNC,
> @@ -89,5 +91,22 @@ extern int mpidr_to_cpu(unsigned long mpidr);
>  extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr);
>  extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> +	u64 vct;
> +	isb();
> +	asm volatile("mrs %0, cntvct_el0" : "=r" (vct));
> +	return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> +	while (msecs--)
> +		udelay(1000);
> +}
> +
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM64_PROCESSOR_H_ */
> diff --git a/lib/arm64/processor.c b/lib/arm64/processor.c
> index deeab4ec9c8ac..50fa835c6f1e3 100644
> --- a/lib/arm64/processor.c
> +++ b/lib/arm64/processor.c
> @@ -9,6 +9,7 @@
>  #include <asm/ptrace.h>
>  #include <asm/processor.h>
>  #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
>  static const char *vector_names[] = {
>  	"el1t_sync",
> @@ -253,3 +254,17 @@ bool is_user(void)
>  {
>  	return current_thread_info()->flags & TIF_USER_MODE;
>  }
> +
> +void delay(u64 cycles)
> +{
> +	u64 start = get_cntvct();
> +	while ((get_cntvct() - start) < cycles)
> +		cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> +	unsigned int frq;
> +	asm volatile("mrs %0, cntfrq_el0" : "=r" (frq));
> +	delay((u64)usec * frq / 1000000);
> +}


--
Alex Bennée

WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Andrew Jones <drjones@redhat.com>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	pbonzini@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	andre.przywara@arm.com, peter.maydell@linaro.org,
	christoffer.dall@linaro.org, marc.zyngier@arm.com
Subject: Re: [Qemu-devel] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines
Date: Mon, 06 Jun 2016 18:39:50 +0100	[thread overview]
Message-ID: <87vb1mgqs9.fsf@linaro.org> (raw)
In-Reply-To: <1465064165-14885-5-git-send-email-drjones@redhat.com>


Andrew Jones <drjones@redhat.com> writes:

> Allow a thread to wait some specified amount of time. Can
> specify in cycles, usecs, and msecs.

I wonder if delay() and mdelay() can be in common code with just the
freq and count getting functions in specific code? I guess that would
need a lib/arm-generic/ or some such?

Otherwise:

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  lib/arm/asm/processor.h   | 19 +++++++++++++++++++
>  lib/arm/processor.c       | 15 +++++++++++++++
>  lib/arm64/asm/processor.h | 19 +++++++++++++++++++
>  lib/arm64/processor.c     | 15 +++++++++++++++
>  4 files changed, 68 insertions(+)
>
> diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h
> index d2048f5f5f7e6..afc903ca7d4ab 100644
> --- a/lib/arm/asm/processor.h
> +++ b/lib/arm/asm/processor.h
> @@ -5,7 +5,9 @@
>   *
>   * This work is licensed under the terms of the GNU LGPL, version 2.
>   */
> +#include <libcflat.h>
>  #include <asm/ptrace.h>
> +#include <asm/barrier.h>
>
>  enum vector {
>  	EXCPTN_RST,
> @@ -51,4 +53,21 @@ extern int mpidr_to_cpu(unsigned long mpidr);
>  extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr);
>  extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> +	u64 vct;
> +	isb();
> +	asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (vct));
> +	return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> +	while (msecs--)
> +		udelay(1000);
> +}
> +
>  #endif /* _ASMARM_PROCESSOR_H_ */
> diff --git a/lib/arm/processor.c b/lib/arm/processor.c
> index 54fdb87ef0196..c2ee360df6884 100644
> --- a/lib/arm/processor.c
> +++ b/lib/arm/processor.c
> @@ -9,6 +9,7 @@
>  #include <asm/ptrace.h>
>  #include <asm/processor.h>
>  #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
>  static const char *processor_modes[] = {
>  	"USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" ,
> @@ -141,3 +142,17 @@ bool is_user(void)
>  {
>  	return current_thread_info()->flags & TIF_USER_MODE;
>  }
> +
> +void delay(u64 cycles)
> +{
> +	u64 start = get_cntvct();
> +	while ((get_cntvct() - start) < cycles)
> +		cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> +	unsigned int frq;
> +	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
> +	delay((u64)usec * frq / 1000000);
> +}
> diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h
> index 7e448dc81a6aa..94f7ce35b65c1 100644
> --- a/lib/arm64/asm/processor.h
> +++ b/lib/arm64/asm/processor.h
> @@ -17,8 +17,10 @@
>  #define SCTLR_EL1_M	(1 << 0)
>
>  #ifndef __ASSEMBLY__
> +#include <libcflat.h>
>  #include <asm/ptrace.h>
>  #include <asm/esr.h>
> +#include <asm/barrier.h>
>
>  enum vector {
>  	EL1T_SYNC,
> @@ -89,5 +91,22 @@ extern int mpidr_to_cpu(unsigned long mpidr);
>  extern void start_usr(void (*func)(void *arg), void *arg, unsigned long sp_usr);
>  extern bool is_user(void);
>
> +static inline u64 get_cntvct(void)
> +{
> +	u64 vct;
> +	isb();
> +	asm volatile("mrs %0, cntvct_el0" : "=r" (vct));
> +	return vct;
> +}
> +
> +extern void delay(u64 cycles);
> +extern void udelay(unsigned long usecs);
> +
> +static inline void mdelay(unsigned long msecs)
> +{
> +	while (msecs--)
> +		udelay(1000);
> +}
> +
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM64_PROCESSOR_H_ */
> diff --git a/lib/arm64/processor.c b/lib/arm64/processor.c
> index deeab4ec9c8ac..50fa835c6f1e3 100644
> --- a/lib/arm64/processor.c
> +++ b/lib/arm64/processor.c
> @@ -9,6 +9,7 @@
>  #include <asm/ptrace.h>
>  #include <asm/processor.h>
>  #include <asm/thread_info.h>
> +#include <asm/barrier.h>
>
>  static const char *vector_names[] = {
>  	"el1t_sync",
> @@ -253,3 +254,17 @@ bool is_user(void)
>  {
>  	return current_thread_info()->flags & TIF_USER_MODE;
>  }
> +
> +void delay(u64 cycles)
> +{
> +	u64 start = get_cntvct();
> +	while ((get_cntvct() - start) < cycles)
> +		cpu_relax();
> +}
> +
> +void udelay(unsigned long usec)
> +{
> +	unsigned int frq;
> +	asm volatile("mrs %0, cntfrq_el0" : "=r" (frq));
> +	delay((u64)usec * frq / 1000000);
> +}


--
Alex Bennée

  reply	other threads:[~2016-06-06 17:35 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-04 18:15 [kvm-unit-tests PATCH v2 00/10] arm/arm64: add gic framework Andrew Jones
2016-06-04 18:15 ` [Qemu-devel] " Andrew Jones
2016-06-04 18:15 ` Andrew Jones
2016-06-04 18:15 ` [kvm-unit-tests PATCH v2 01/10] lib: xstr: allow multiple args Andrew Jones
2016-06-04 18:15   ` [Qemu-devel] " Andrew Jones
2016-06-06 10:49   ` Alex Bennée
2016-06-06 10:49     ` [Qemu-devel] " Alex Bennée
2016-06-06 12:12     ` Andrew Jones
2016-06-06 12:12       ` [Qemu-devel] " Andrew Jones
2016-06-06 14:52       ` Alex Bennée
2016-06-06 14:52         ` [Qemu-devel] " Alex Bennée
2016-06-04 18:15 ` [kvm-unit-tests PATCH v2 02/10] arm64: fix get_"sysreg32" and make MPIDR 64bit Andrew Jones
2016-06-04 18:15   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:15   ` Andrew Jones
2016-06-06 12:47   ` Alex Bennée
2016-06-06 12:47     ` [Qemu-devel] " Alex Bennée
2016-06-04 18:15 ` [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support more than 8 cpus Andrew Jones
2016-06-04 18:15   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:15   ` Andrew Jones
2016-06-06 16:22   ` Alex Bennée
2016-06-06 16:22     ` [Qemu-devel] " Alex Bennée
2016-06-06 16:31     ` Andrew Jones
2016-06-06 16:31       ` [Qemu-devel] " Andrew Jones
2016-06-06 17:32       ` Alex Bennée
2016-06-06 17:32         ` [Qemu-devel] " Alex Bennée
2016-06-06 16:32     ` Mark Rutland
2016-06-06 16:32       ` [Qemu-devel] " Mark Rutland
2016-06-06 16:32       ` Mark Rutland
2016-06-06 17:28       ` Alex Bennée
2016-06-06 17:28         ` [Qemu-devel] " Alex Bennée
2016-06-06 17:28         ` Alex Bennée
2016-06-04 18:15 ` [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines Andrew Jones
2016-06-04 18:15   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:15   ` Andrew Jones
2016-06-06 17:39   ` Alex Bennée [this message]
2016-06-06 17:39     ` [Qemu-devel] " Alex Bennée
2016-06-06 17:39     ` Alex Bennée
2016-06-06 17:48     ` Andrew Jones
2016-06-06 17:48       ` [Qemu-devel] " Andrew Jones
2016-06-04 18:16 ` [kvm-unit-tests PATCH v2 05/10] arm/arm64: irq enable/disable Andrew Jones
2016-06-04 18:16   ` [Qemu-devel] " Andrew Jones
2016-06-07 16:22   ` Alex Bennée
2016-06-07 16:22     ` [Qemu-devel] " Alex Bennée
2016-06-07 16:22     ` Alex Bennée
2016-06-04 18:16 ` [kvm-unit-tests PATCH v2 06/10] arm/arm64: add initial gicv2 support Andrew Jones
2016-06-04 18:16   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:16 ` [kvm-unit-tests PATCH v2 07/10] arm/arm64: add initial gicv3 support Andrew Jones
2016-06-04 18:16   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:16   ` Andrew Jones
2016-06-04 18:16 ` [kvm-unit-tests PATCH v2 08/10] arm/arm64: gicv2: add an IPI test Andrew Jones
2016-06-04 18:16   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:16   ` Andrew Jones
2016-06-04 18:16 ` [kvm-unit-tests PATCH v2 09/10] arm/arm64: gicv3: " Andrew Jones
2016-06-04 18:16   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:16 ` [kvm-unit-tests PATCH v2 10/10] arm/arm64: gic: don't just use zero Andrew Jones
2016-06-04 18:16   ` [Qemu-devel] " Andrew Jones
2016-06-04 18:45 ` [kvm-unit-tests PATCH v2 00/10] arm/arm64: add gic framework Alex Bennée
2016-06-04 18:45   ` [Qemu-devel] " Alex Bennée
2016-06-07 17:13   ` Alex Bennée
2016-06-07 17:13     ` [Qemu-devel] " Alex Bennée
2016-06-08 10:00     ` Andrew Jones
2016-06-08 10:00       ` Andrew Jones

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87vb1mgqs9.fsf@linaro.org \
    --to=alex.bennee@linaro.org \
    --cc=andre.przywara@arm.com \
    --cc=drjones@redhat.com \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=marc.zyngier@arm.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.