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From: Thomas Gleixner <tglx@linutronix.de>
To: "Björn Töpel" <bjorn@kernel.org>, "Anup Patel" <apatel@ventanamicro.com>
Cc: devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
	Saravana Kannan <saravanak@google.com>,
	Marc Zyngier <maz@kernel.org>, Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org,
	Frank Rowand <frowand.list@gmail.com>,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v11 09/14] irqchip/riscv-imsic: Add support for PCI MSI irqdomain
Date: Sat, 28 Oct 2023 20:36:22 +0200	[thread overview]
Message-ID: <87y1fmzja1.ffs@tglx> (raw)
In-Reply-To: <87jzrbf5cw.fsf@all.your.base.are.belong.to.us>

On Wed, Oct 25 2023 at 10:55, Björn Töpel wrote:
>> Now for IMSIC-PCI domain, the PCI framework expects the
>> pci_msi_mask/unmask_irq() functions to be called but if
>> we directly point pci_msi_mask/unmask_irq() in the IMSIC-PCI
>> irqchip then IMSIC-BASE (parent domain) irq_mask/umask
>> won't be called hence the IRQ won't be masked/unmask.
>> Due to this, we call both pci_msi_mask/unmask_irq() and
>> irq_chip_mask/unmask_parent() for IMSIC-PCI domain.
>
> Ok. I wont dig more into it for now! If the interrupt is disabled at
> PCI, it seems a bit overkill to *also* mask it at the IMSIC level...

Only _if_ the device provides MSI masking, but that extra mask/unmask is
not the end of the world.

Thanks,

        tglx

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WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de>
To: "Björn Töpel" <bjorn@kernel.org>, "Anup Patel" <apatel@ventanamicro.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Saravana Kannan <saravanak@google.com>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v11 09/14] irqchip/riscv-imsic: Add support for PCI MSI irqdomain
Date: Sat, 28 Oct 2023 20:36:22 +0200	[thread overview]
Message-ID: <87y1fmzja1.ffs@tglx> (raw)
In-Reply-To: <87jzrbf5cw.fsf@all.your.base.are.belong.to.us>

On Wed, Oct 25 2023 at 10:55, Björn Töpel wrote:
>> Now for IMSIC-PCI domain, the PCI framework expects the
>> pci_msi_mask/unmask_irq() functions to be called but if
>> we directly point pci_msi_mask/unmask_irq() in the IMSIC-PCI
>> irqchip then IMSIC-BASE (parent domain) irq_mask/umask
>> won't be called hence the IRQ won't be masked/unmask.
>> Due to this, we call both pci_msi_mask/unmask_irq() and
>> irq_chip_mask/unmask_parent() for IMSIC-PCI domain.
>
> Ok. I wont dig more into it for now! If the interrupt is disabled at
> PCI, it seems a bit overkill to *also* mask it at the IMSIC level...

Only _if_ the device provides MSI masking, but that extra mask/unmask is
not the end of the world.

Thanks,

        tglx

  reply	other threads:[~2023-10-28 18:36 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-23 17:27 [PATCH v11 00/14] Linux RISC-V AIA Support Anup Patel
2023-10-23 17:27 ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 01/14] RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-24 11:55   ` Björn Töpel
2023-10-24 11:55     ` Björn Töpel
2023-10-24 12:07     ` Anup Patel
2023-10-24 12:07       ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 02/14] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 03/14] irqchip/sifive-plic: Fix syscore registration for multi-socket systems Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 04/14] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 05/14] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-24 12:17   ` Andrew Jones
2023-10-24 12:17     ` Andrew Jones
2023-10-23 17:27 ` [PATCH v11 06/14] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-24 12:30   ` Andrew Jones
2023-10-24 12:30     ` Andrew Jones
2023-10-23 17:27 ` [PATCH v11 07/14] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-24  9:25   ` Conor Dooley
2023-10-24  9:25     ` Conor Dooley
2023-10-24 12:08     ` Anup Patel
2023-10-24 12:08       ` Anup Patel
2023-10-24 13:05   ` Björn Töpel
2023-10-24 13:05     ` Björn Töpel
2023-10-25  5:08     ` Anup Patel
2023-10-25  5:08       ` Anup Patel
2023-10-25 16:05       ` Björn Töpel
2023-10-25 16:05         ` Björn Töpel
2023-10-25 17:25         ` Anup Patel
2023-10-25 17:25           ` Anup Patel
2023-10-26  8:51           ` Björn Töpel
2023-10-26  8:51             ` Björn Töpel
2023-10-28 18:18             ` Thomas Gleixner
2023-10-28 18:18               ` Thomas Gleixner
2023-10-28 18:34   ` Thomas Gleixner
2023-10-28 18:34     ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 08/14] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-25 19:56   ` Thomas Gleixner
2023-10-25 19:56     ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 09/14] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-24 13:09   ` Björn Töpel
2023-10-24 13:09     ` Björn Töpel
2023-10-25  5:08     ` Anup Patel
2023-10-25  5:08       ` Anup Patel
2023-10-25  8:55       ` Björn Töpel
2023-10-25  8:55         ` Björn Töpel
2023-10-28 18:36         ` Thomas Gleixner [this message]
2023-10-28 18:36           ` Thomas Gleixner
2023-10-29 19:53           ` Björn Töpel
2023-10-29 19:53             ` Björn Töpel
2023-10-25 19:59   ` Thomas Gleixner
2023-10-25 19:59     ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 10/14] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 11/14] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 12/14] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-24  5:31   ` Sunil V L
2023-10-24  5:31     ` Sunil V L
2023-11-02  6:38   ` Ben
2023-11-02  6:38     ` Ben
     [not found]   ` <210e2757.3169.18b8eb4495c.Coremail.figure1802@126.com>
2023-11-02 12:37     ` [PATCH " Anup Patel
2023-11-02 12:37       ` Anup Patel
2023-11-03  9:39       ` Ben
2023-11-03  9:39         ` Ben
2023-11-03 11:04         ` Anup Patel
2023-11-03 11:04           ` Anup Patel
2023-11-04  0:58   ` Ben
2023-11-04  0:58     ` Ben
2023-11-08 14:20     ` Ben
2023-11-08 14:20       ` Ben
2023-11-08 14:43     ` [PATCH " Anup Patel
2023-11-08 14:43       ` Anup Patel
2023-11-08 14:51       ` Ben
2023-11-08 14:51         ` Ben
2023-11-08 14:56         ` Anup Patel
2023-11-08 14:56           ` Anup Patel
2023-11-08 15:32           ` Ben
2023-11-08 15:32             ` Ben
2023-11-14  9:21             ` Anup Patel
2023-11-14  9:21               ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 13/14] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-10-23 17:27   ` Anup Patel
2023-10-23 17:28 ` [PATCH v11 14/14] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2023-10-23 17:28   ` Anup Patel

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