From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Biju Das <biju.das.jz@bp.renesas.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"kishon@kernel.org" <kishon@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"geert+renesas@glider.be" <geert+renesas@glider.be>,
"magnus.damm@gmail.com" <magnus.damm@gmail.com>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
"ulf.hansson@linaro.org" <ulf.hansson@linaro.org>
Cc: "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 10/16] phy: renesas: rcar-gen3-usb2: Add support to initialize the bus
Date: Fri, 23 Aug 2024 11:57:30 +0300 [thread overview]
Message-ID: <8faa6b6d-a013-4a71-a8b7-af02ac92d94b@tuxon.dev> (raw)
In-Reply-To: <TY3PR01MB113468A6CA4ADBCA577670AD486882@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi, Biju,
On 23.08.2024 10:35, Biju Das wrote:
> Hi Claudiu,
>
>> -----Original Message-----
>> From: Claudiu <claudiu.beznea@tuxon.dev>
>> Sent: Thursday, August 22, 2024 4:28 PM
>> Subject: [PATCH 10/16] phy: renesas: rcar-gen3-usb2: Add support to initialize the bus
>>
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> The Renesas RZ/G3S need to initialize the USB BUS before transferring data due to hardware limitation.
>> As the register that need to be touched for this is in the address space of the USB PHY, and the UBS
>> PHY need to be initialized before any other USB drivers handling data transfer, add support to
>> initialize the USB BUS.
>>
>> As the USB PHY is probed before any other USB drivers that enables clocks and de-assert the reset
>> signals and the BUS initialization is done in the probe phase, we need to add code to de-assert reset
>> signal and runtime resume the device (which enables its clocks) before accessing the registers.
>>
>> As the reset signals are not required by the USB PHY driver for the other USB PHY hardware variants,
>> the reset signals and runtime PM was handled only in the function that initialize the USB BUS.
>>
>> The PHY initialization was done right after runtime PM enable to have all in place when the PHYs are
>> registered.
>
> There is no user for this patch. The first user is RZ/G3S and you should merge this patch with
> next one.
I think this is a matter of taste... This is how I usually format the
patches (for scenarios like this) and got no request for squashing.
Anyway, I can do it your way, too.
Thank you,
Claudiu Beznea
>
> Cheers,
> Biju
>
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>> ---
>> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 50 ++++++++++++++++++++++--
>> 1 file changed, 47 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>> index 7594f64eb737..cf4299cea579 100644
>> --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>> +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>> @@ -19,12 +19,14 @@
>> #include <linux/platform_device.h>
>> #include <linux/pm_runtime.h>
>> #include <linux/regulator/consumer.h>
>> +#include <linux/reset.h>
>> #include <linux/string.h>
>> #include <linux/usb/of.h>
>> #include <linux/workqueue.h>
>>
>> /******* USB2.0 Host registers (original offset is +0x200) *******/
>> #define USB2_INT_ENABLE 0x000
>> +#define USB2_AHB_BUS_CTR 0x008
>> #define USB2_USBCTR 0x00c
>> #define USB2_SPD_RSM_TIMSET 0x10c
>> #define USB2_OC_TIMSET 0x110
>> @@ -40,6 +42,10 @@
>> #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
>> #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
>>
>> +/* AHB_BUS_CTR */
>> +#define USB2_AHB_BUS_CTR_MBL_MASK GENMASK(1, 0)
>> +#define USB2_AHB_BUS_CTR_MBL_INCR4 2
>> +
>> /* USBCTR */
>> #define USB2_USBCTR_DIRPD BIT(2)
>> #define USB2_USBCTR_PLL_RST BIT(1)
>> @@ -111,6 +117,7 @@ struct rcar_gen3_chan {
>> struct extcon_dev *extcon;
>> struct rcar_gen3_phy rphys[NUM_OF_PHYS];
>> struct regulator *vbus;
>> + struct reset_control *rstc;
>> struct work_struct work;
>> struct mutex lock; /* protects rphys[...].powered */
>> enum usb_dr_mode dr_mode;
>> @@ -125,6 +132,7 @@ struct rcar_gen3_chan { struct rcar_gen3_phy_drv_data {
>> const struct phy_ops *phy_usb2_ops;
>> bool no_adp_ctrl;
>> + bool init_bus;
>> };
>>
>> /*
>> @@ -650,6 +658,35 @@ static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
>> return candidate;
>> }
>>
>> +static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
>> +{
>> + struct device *dev = channel->dev;
>> + int ret;
>> + u32 val;
>> +
>> + channel->rstc = devm_reset_control_array_get_shared(dev);
>> + if (IS_ERR(channel->rstc))
>> + return PTR_ERR(channel->rstc);
>> +
>> + ret = pm_runtime_resume_and_get(dev);
>> + if (ret)
>> + return ret;
>> +
>> + ret = reset_control_deassert(channel->rstc);
>> + if (ret)
>> + goto rpm_put;
>> +
>> + val = readl(channel->base + USB2_AHB_BUS_CTR);
>> + val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
>> + val |= USB2_AHB_BUS_CTR_MBL_INCR4;
>> + writel(val, channel->base + USB2_AHB_BUS_CTR);
>> +
>> +rpm_put:
>> + pm_runtime_put(dev);
>> +
>> + return ret;
>> +}
>> +
>> static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) {
>> const struct rcar_gen3_phy_drv_data *phy_data; @@ -703,6 +740,15 @@ static int
>> rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
>> goto error;
>> }
>>
>> + platform_set_drvdata(pdev, channel);
>> + channel->dev = dev;
>> +
>> + if (phy_data->init_bus) {
>> + ret = rcar_gen3_phy_usb2_init_bus(channel);
>> + if (ret)
>> + goto error;
>> + }
>> +
>> channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
>> if (phy_data->no_adp_ctrl)
>> channel->obint_enable_bits = USB2_OBINT_IDCHG_EN; @@ -733,9 +779,6 @@ static int
>> rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
>> channel->vbus = NULL;
>> }
>>
>> - platform_set_drvdata(pdev, channel);
>> - channel->dev = dev;
>> -
>> provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
>> if (IS_ERR(provider)) {
>> dev_err(dev, "Failed to register PHY provider\n"); @@ -762,6 +805,7 @@ static void
>> rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
>> if (channel->is_otg_channel)
>> device_remove_file(&pdev->dev, &dev_attr_role);
>>
>> + reset_control_assert(channel->rstc);
>> pm_runtime_disable(&pdev->dev);
>> };
>>
>> --
>> 2.39.2
>
WARNING: multiple messages have this Message-ID (diff)
From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Biju Das <biju.das.jz@bp.renesas.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"kishon@kernel.org" <kishon@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"geert+renesas@glider.be" <geert+renesas@glider.be>,
"magnus.damm@gmail.com" <magnus.damm@gmail.com>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
"ulf.hansson@linaro.org" <ulf.hansson@linaro.org>
Cc: "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 10/16] phy: renesas: rcar-gen3-usb2: Add support to initialize the bus
Date: Fri, 23 Aug 2024 11:57:30 +0300 [thread overview]
Message-ID: <8faa6b6d-a013-4a71-a8b7-af02ac92d94b@tuxon.dev> (raw)
In-Reply-To: <TY3PR01MB113468A6CA4ADBCA577670AD486882@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi, Biju,
On 23.08.2024 10:35, Biju Das wrote:
> Hi Claudiu,
>
>> -----Original Message-----
>> From: Claudiu <claudiu.beznea@tuxon.dev>
>> Sent: Thursday, August 22, 2024 4:28 PM
>> Subject: [PATCH 10/16] phy: renesas: rcar-gen3-usb2: Add support to initialize the bus
>>
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> The Renesas RZ/G3S need to initialize the USB BUS before transferring data due to hardware limitation.
>> As the register that need to be touched for this is in the address space of the USB PHY, and the UBS
>> PHY need to be initialized before any other USB drivers handling data transfer, add support to
>> initialize the USB BUS.
>>
>> As the USB PHY is probed before any other USB drivers that enables clocks and de-assert the reset
>> signals and the BUS initialization is done in the probe phase, we need to add code to de-assert reset
>> signal and runtime resume the device (which enables its clocks) before accessing the registers.
>>
>> As the reset signals are not required by the USB PHY driver for the other USB PHY hardware variants,
>> the reset signals and runtime PM was handled only in the function that initialize the USB BUS.
>>
>> The PHY initialization was done right after runtime PM enable to have all in place when the PHYs are
>> registered.
>
> There is no user for this patch. The first user is RZ/G3S and you should merge this patch with
> next one.
I think this is a matter of taste... This is how I usually format the
patches (for scenarios like this) and got no request for squashing.
Anyway, I can do it your way, too.
Thank you,
Claudiu Beznea
>
> Cheers,
> Biju
>
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>> ---
>> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 50 ++++++++++++++++++++++--
>> 1 file changed, 47 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/phy/renesas/phy-rcar-gen3-usb2.c b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>> index 7594f64eb737..cf4299cea579 100644
>> --- a/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>> +++ b/drivers/phy/renesas/phy-rcar-gen3-usb2.c
>> @@ -19,12 +19,14 @@
>> #include <linux/platform_device.h>
>> #include <linux/pm_runtime.h>
>> #include <linux/regulator/consumer.h>
>> +#include <linux/reset.h>
>> #include <linux/string.h>
>> #include <linux/usb/of.h>
>> #include <linux/workqueue.h>
>>
>> /******* USB2.0 Host registers (original offset is +0x200) *******/
>> #define USB2_INT_ENABLE 0x000
>> +#define USB2_AHB_BUS_CTR 0x008
>> #define USB2_USBCTR 0x00c
>> #define USB2_SPD_RSM_TIMSET 0x10c
>> #define USB2_OC_TIMSET 0x110
>> @@ -40,6 +42,10 @@
>> #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
>> #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
>>
>> +/* AHB_BUS_CTR */
>> +#define USB2_AHB_BUS_CTR_MBL_MASK GENMASK(1, 0)
>> +#define USB2_AHB_BUS_CTR_MBL_INCR4 2
>> +
>> /* USBCTR */
>> #define USB2_USBCTR_DIRPD BIT(2)
>> #define USB2_USBCTR_PLL_RST BIT(1)
>> @@ -111,6 +117,7 @@ struct rcar_gen3_chan {
>> struct extcon_dev *extcon;
>> struct rcar_gen3_phy rphys[NUM_OF_PHYS];
>> struct regulator *vbus;
>> + struct reset_control *rstc;
>> struct work_struct work;
>> struct mutex lock; /* protects rphys[...].powered */
>> enum usb_dr_mode dr_mode;
>> @@ -125,6 +132,7 @@ struct rcar_gen3_chan { struct rcar_gen3_phy_drv_data {
>> const struct phy_ops *phy_usb2_ops;
>> bool no_adp_ctrl;
>> + bool init_bus;
>> };
>>
>> /*
>> @@ -650,6 +658,35 @@ static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
>> return candidate;
>> }
>>
>> +static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
>> +{
>> + struct device *dev = channel->dev;
>> + int ret;
>> + u32 val;
>> +
>> + channel->rstc = devm_reset_control_array_get_shared(dev);
>> + if (IS_ERR(channel->rstc))
>> + return PTR_ERR(channel->rstc);
>> +
>> + ret = pm_runtime_resume_and_get(dev);
>> + if (ret)
>> + return ret;
>> +
>> + ret = reset_control_deassert(channel->rstc);
>> + if (ret)
>> + goto rpm_put;
>> +
>> + val = readl(channel->base + USB2_AHB_BUS_CTR);
>> + val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
>> + val |= USB2_AHB_BUS_CTR_MBL_INCR4;
>> + writel(val, channel->base + USB2_AHB_BUS_CTR);
>> +
>> +rpm_put:
>> + pm_runtime_put(dev);
>> +
>> + return ret;
>> +}
>> +
>> static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) {
>> const struct rcar_gen3_phy_drv_data *phy_data; @@ -703,6 +740,15 @@ static int
>> rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
>> goto error;
>> }
>>
>> + platform_set_drvdata(pdev, channel);
>> + channel->dev = dev;
>> +
>> + if (phy_data->init_bus) {
>> + ret = rcar_gen3_phy_usb2_init_bus(channel);
>> + if (ret)
>> + goto error;
>> + }
>> +
>> channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
>> if (phy_data->no_adp_ctrl)
>> channel->obint_enable_bits = USB2_OBINT_IDCHG_EN; @@ -733,9 +779,6 @@ static int
>> rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
>> channel->vbus = NULL;
>> }
>>
>> - platform_set_drvdata(pdev, channel);
>> - channel->dev = dev;
>> -
>> provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
>> if (IS_ERR(provider)) {
>> dev_err(dev, "Failed to register PHY provider\n"); @@ -762,6 +805,7 @@ static void
>> rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
>> if (channel->is_otg_channel)
>> device_remove_file(&pdev->dev, &dev_attr_role);
>>
>> + reset_control_assert(channel->rstc);
>> pm_runtime_disable(&pdev->dev);
>> };
>>
>> --
>> 2.39.2
>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2024-08-23 8:57 UTC|newest]
Thread overview: 196+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-22 15:27 [PATCH 00/16] Add initial USB support for the Renesas RZ/G3S SoC Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 15:27 ` [PATCH 01/16] clk: renesas: r9a08g045: Add clocks, resets and power domains for USB Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-29 12:35 ` Geert Uytterhoeven
2024-08-29 12:35 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 02/16] dt-bindings: soc: renesas: renesas,rzg2l-sysc: Add #reset-cells for RZ/G3S Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 16:42 ` Conor Dooley
2024-08-22 16:42 ` Conor Dooley
2024-08-22 16:44 ` Conor Dooley
2024-08-22 16:44 ` Conor Dooley
2024-08-23 7:59 ` claudiu beznea
2024-08-23 7:59 ` claudiu beznea
2024-08-23 7:54 ` claudiu beznea
2024-08-23 7:54 ` claudiu beznea
2024-08-23 16:18 ` Conor Dooley
2024-08-23 16:18 ` Conor Dooley
2024-08-23 16:26 ` claudiu beznea
2024-08-23 16:26 ` claudiu beznea
2024-08-23 16:33 ` Conor Dooley
2024-08-23 16:33 ` Conor Dooley
2024-08-26 10:15 ` claudiu beznea
2024-08-26 10:15 ` claudiu beznea
2024-08-26 17:09 ` Conor Dooley
2024-08-26 17:09 ` Conor Dooley
2024-10-08 13:24 ` Geert Uytterhoeven
2024-10-08 13:24 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 03/16] dt-bindings: reset: renesas,r9a08g045-sysc: Add reset IDs for RZ/G3S SYSC reset Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 16:45 ` Conor Dooley
2024-08-22 16:45 ` Conor Dooley
2024-10-08 13:25 ` Geert Uytterhoeven
2024-10-08 13:25 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 04/16] soc: renesas: Add SYSC driver for Renesas RZ/G3S Claudiu
2024-08-22 15:27 ` Claudiu
2024-09-24 11:32 ` Geert Uytterhoeven
2024-09-24 11:32 ` Geert Uytterhoeven
2024-09-25 7:50 ` claudiu beznea
2024-09-25 7:50 ` claudiu beznea
2024-10-08 13:54 ` Geert Uytterhoeven
2024-10-08 13:54 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 05/16] soc: renesas: sysc: Move RZ/G3S SoC detection on SYSC driver Claudiu
2024-08-22 15:27 ` Claudiu
2024-10-08 13:23 ` Geert Uytterhoeven
2024-10-08 13:23 ` Geert Uytterhoeven
2024-10-09 8:26 ` claudiu beznea
2024-10-09 8:26 ` claudiu beznea
2024-08-22 15:27 ` [PATCH 06/16] dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S SoC Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 16:45 ` Conor Dooley
2024-08-22 16:45 ` Conor Dooley
2024-10-08 14:46 ` Geert Uytterhoeven
2024-10-08 14:46 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 07/16] reset: rzg2l-usbphy-ctrl: Get reset control array Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-23 7:25 ` Biju Das
2024-08-23 7:25 ` Biju Das
2024-08-23 8:05 ` claudiu beznea
2024-08-23 8:05 ` claudiu beznea
2024-08-23 8:17 ` Biju Das
2024-08-23 8:17 ` Biju Das
2024-10-08 14:46 ` Geert Uytterhoeven
2024-10-08 14:46 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 08/16] reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 16:59 ` Biju Das
2024-08-22 16:59 ` Biju Das
2024-08-23 8:40 ` claudiu beznea
2024-08-23 8:40 ` claudiu beznea
2024-08-23 8:46 ` Biju Das
2024-08-23 8:46 ` Biju Das
2024-10-08 14:47 ` Geert Uytterhoeven
2024-10-08 14:47 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 09/16] dt-bindings: usb: renesas,usbhs: Document RZ/G3S SoC Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 16:46 ` Conor Dooley
2024-08-22 16:46 ` Conor Dooley
2024-10-08 14:51 ` Geert Uytterhoeven
2024-10-08 14:51 ` Geert Uytterhoeven
2024-10-09 8:28 ` claudiu beznea
2024-10-09 8:28 ` claudiu beznea
2024-08-22 15:27 ` [PATCH 10/16] phy: renesas: rcar-gen3-usb2: Add support to initialize the bus Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-23 7:35 ` Biju Das
2024-08-23 7:35 ` Biju Das
2024-08-23 8:57 ` claudiu beznea [this message]
2024-08-23 8:57 ` claudiu beznea
2024-08-23 9:01 ` Biju Das
2024-08-23 9:01 ` Biju Das
2024-08-30 8:02 ` Vinod Koul
2024-08-30 8:02 ` Vinod Koul
2024-08-30 8:06 ` Biju Das
2024-08-30 8:06 ` Biju Das
2024-10-08 14:57 ` Geert Uytterhoeven
2024-10-08 14:57 ` Geert Uytterhoeven
2024-10-09 8:31 ` claudiu beznea
2024-10-09 8:31 ` claudiu beznea
2024-08-22 15:27 ` [PATCH 11/16] dt-bindings: phy: renesas,usb2-phy: Document RZ/G3S phy bindings Claudiu
2024-08-22 15:27 ` Claudiu
2024-08-22 16:46 ` Conor Dooley
2024-08-22 16:46 ` Conor Dooley
2024-10-08 14:58 ` Geert Uytterhoeven
2024-10-08 14:58 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 12/16] phy: renesas: rcar-gen3-usb2: Add support for the RZ/G3S SoC Claudiu
2024-08-22 15:27 ` Claudiu
2024-10-08 14:59 ` Geert Uytterhoeven
2024-10-08 14:59 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 13/16] arm64: dts: renesas: Add #reset-cells to system controller node Claudiu
2024-08-22 15:27 ` Claudiu
2024-10-08 14:59 ` Geert Uytterhoeven
2024-10-08 14:59 ` Geert Uytterhoeven
2024-08-22 15:27 ` [PATCH 14/16] arm64: dts: renesas: r9a08g045: Add USB support Claudiu
2024-08-22 15:27 ` Claudiu
2024-10-08 15:00 ` Geert Uytterhoeven
2024-10-08 15:00 ` Geert Uytterhoeven
2024-08-22 15:28 ` [PATCH 15/16] arm64: dts: renesas: rzg3s-smarc: Enable " Claudiu
2024-08-22 15:28 ` Claudiu
2024-10-08 15:16 ` Geert Uytterhoeven
2024-10-08 15:16 ` Geert Uytterhoeven
2024-10-09 8:42 ` claudiu beznea
2024-10-09 8:42 ` claudiu beznea
2024-08-22 15:28 ` [PATCH 16/16] arm64: defconfig: Enable RZ/G3S SYSC reset driver Claudiu
2024-08-22 15:28 ` Claudiu
2024-10-08 15:17 ` Geert Uytterhoeven
2024-10-08 15:17 ` Geert Uytterhoeven
2024-08-29 15:26 ` [PATCH 00/16] Add initial USB support for the Renesas RZ/G3S SoC Ulf Hansson
2024-08-29 15:26 ` Ulf Hansson
2024-08-30 8:22 ` claudiu beznea
2024-08-30 8:22 ` claudiu beznea
2024-08-30 10:14 ` Ulf Hansson
2024-08-30 10:14 ` Ulf Hansson
2024-08-30 11:32 ` claudiu beznea
2024-08-30 11:32 ` claudiu beznea
2024-08-31 10:32 ` Ulf Hansson
2024-08-31 10:32 ` Ulf Hansson
2024-09-03 10:35 ` Ulf Hansson
2024-09-03 10:35 ` Ulf Hansson
2024-09-03 10:58 ` claudiu beznea
2024-09-03 10:58 ` claudiu beznea
2024-09-03 11:50 ` Ulf Hansson
2024-09-03 11:50 ` Ulf Hansson
2024-08-31 5:13 ` Biju Das
2024-08-31 5:13 ` Biju Das
2024-09-02 7:54 ` Biju Das
2024-09-02 7:54 ` Biju Das
2024-09-02 8:47 ` claudiu beznea
2024-09-02 8:47 ` claudiu beznea
2024-09-02 8:53 ` Biju Das
2024-09-02 8:53 ` Biju Das
2024-09-02 9:14 ` claudiu beznea
2024-09-02 9:14 ` claudiu beznea
2024-09-02 9:18 ` Biju Das
2024-09-02 9:18 ` Biju Das
2024-09-02 10:40 ` claudiu beznea
2024-09-02 10:40 ` claudiu beznea
2024-09-02 10:47 ` Biju Das
2024-09-02 10:47 ` Biju Das
2024-09-03 7:18 ` Biju Das
2024-09-03 7:18 ` Biju Das
2024-09-03 10:25 ` claudiu beznea
2024-09-03 10:25 ` claudiu beznea
2024-09-03 10:31 ` Biju Das
2024-09-03 10:31 ` Biju Das
2024-09-03 11:00 ` claudiu beznea
2024-09-03 11:00 ` claudiu beznea
2024-09-03 11:07 ` Biju Das
2024-09-03 11:07 ` Biju Das
2024-09-03 12:00 ` Biju Das
2024-09-03 12:00 ` Biju Das
2024-09-03 12:25 ` claudiu beznea
2024-09-03 12:25 ` claudiu beznea
2024-09-03 12:37 ` Biju Das
2024-09-03 12:37 ` Biju Das
2024-09-03 12:57 ` claudiu beznea
2024-09-03 12:57 ` claudiu beznea
2024-09-03 13:09 ` Biju Das
2024-09-03 13:09 ` Biju Das
2024-09-03 14:46 ` claudiu beznea
2024-09-03 14:46 ` claudiu beznea
2024-09-03 15:30 ` Biju Das
2024-09-03 15:30 ` Biju Das
2024-09-03 13:45 ` Biju Das
2024-09-03 13:45 ` Biju Das
2024-09-03 14:48 ` claudiu beznea
2024-09-03 14:48 ` claudiu beznea
2024-11-07 10:00 ` Claudiu Beznea
2024-11-07 10:00 ` Claudiu Beznea
2024-11-07 16:22 ` Philipp Zabel
2024-11-07 16:22 ` Philipp Zabel
2024-09-03 10:19 ` claudiu beznea
2024-09-03 10:19 ` claudiu beznea
2024-09-02 8:28 ` claudiu beznea
2024-09-02 8:28 ` claudiu beznea
2024-08-30 8:10 ` (subset) " Vinod Koul
2024-08-30 8:10 ` Vinod Koul
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