All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: Fabio Estevam <festevam@denx.de>
Cc: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>,
	michael@walle.cc, pratyush@kernel.org,
	linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, bacem.daassi@infineon.com,
	miquel.raynal@bootlin.com, richard@nod.at
Subject: Re: [PATCH v2 2/6] mtd: spi-nor: add erase die (chip) capability
Date: Fri, 3 Nov 2023 11:47:40 +0000	[thread overview]
Message-ID: <95c16eb0-a785-4a8d-bb42-c5a09b034d0a@linaro.org> (raw)
In-Reply-To: <5872f7233bc0dc4669aa1324f3ae3cf0@denx.de>



On 11/2/23 21:42, Fabio Estevam wrote:
> On 02/11/2023 15:56, Tudor Ambarus wrote:
> 
>> Let's try something else:
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 5584bf9cbfd1..a0af7a7eb727 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -1074,7 +1074,7 @@ static int spi_nor_erase_die(struct spi_nor *nor,
>> loff_t addr, size_t die_size)
>>
>>         if (nor->spimem) {
>>                 struct spi_mem_op op =
>> -                      
>> SPI_NOR_DIE_ERASE_OP(nor->params->die_erase_opcode,
>> +                       SPI_NOR_DIE_ERASE_OP(nor->erase_opcode,
>>                                              nor->addr_nbytes, addr,
>> multi_die);
>>
>>                 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
>>
>> I expect that with this the first sector from each die will be erased.
> 
> You are right. This is exactly what happens with this change:
> 
> First die:
> 
> ~# hexdump  /dev/mtd0
> 0000000 ffff ffff ffff ffff ffff ffff ffff ffff
> *
> 0010000 9231 efb8 d664 d77b 231c 3522 d7e8 4f6e
> 
> Second die:
> 
> ~# hexdump -s 0x4000000 /dev/mtd0
> 4000000 ffff ffff ffff ffff ffff ffff ffff ffff
> *
> 4010000 0418 0518 60a0 9214 2411 2004 c144 9e2b


I think I know what happens with your flash. Please try the debug patch
from https://github.com/ambarus/linux-0day.git
spi-nor/next-die-erase-v2-debug.

I assume your flash works in 3-byte mode. The die erase cmd needs an
extended register in 3-byte mode otherwise is ignored. Please try the
patch and let me know if it works.

Reading the datasheet I found out that
"The device supports 3-byte addressing (default), with A[23:0] input
during address cycle. After any READ command is executed, the device
will output data from the selected address. After the boundary is
reached, the device will start reading again from the beginning."

So I expect up to now we tested just the first die, all tests in 3-byte
mode. Thus when we wanted to do a cross-die test, reading from the last
2 MB of first die to the first 2MB of the second die, what we actually
did was to read the last and the first 2MB of the first die.

Cheers,
ta

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: Fabio Estevam <festevam@denx.de>
Cc: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>,
	michael@walle.cc, pratyush@kernel.org,
	linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, bacem.daassi@infineon.com,
	miquel.raynal@bootlin.com, richard@nod.at
Subject: Re: [PATCH v2 2/6] mtd: spi-nor: add erase die (chip) capability
Date: Fri, 3 Nov 2023 11:47:40 +0000	[thread overview]
Message-ID: <95c16eb0-a785-4a8d-bb42-c5a09b034d0a@linaro.org> (raw)
In-Reply-To: <5872f7233bc0dc4669aa1324f3ae3cf0@denx.de>



On 11/2/23 21:42, Fabio Estevam wrote:
> On 02/11/2023 15:56, Tudor Ambarus wrote:
> 
>> Let's try something else:
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 5584bf9cbfd1..a0af7a7eb727 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -1074,7 +1074,7 @@ static int spi_nor_erase_die(struct spi_nor *nor,
>> loff_t addr, size_t die_size)
>>
>>         if (nor->spimem) {
>>                 struct spi_mem_op op =
>> -                      
>> SPI_NOR_DIE_ERASE_OP(nor->params->die_erase_opcode,
>> +                       SPI_NOR_DIE_ERASE_OP(nor->erase_opcode,
>>                                              nor->addr_nbytes, addr,
>> multi_die);
>>
>>                 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
>>
>> I expect that with this the first sector from each die will be erased.
> 
> You are right. This is exactly what happens with this change:
> 
> First die:
> 
> ~# hexdump  /dev/mtd0
> 0000000 ffff ffff ffff ffff ffff ffff ffff ffff
> *
> 0010000 9231 efb8 d664 d77b 231c 3522 d7e8 4f6e
> 
> Second die:
> 
> ~# hexdump -s 0x4000000 /dev/mtd0
> 4000000 ffff ffff ffff ffff ffff ffff ffff ffff
> *
> 4010000 0418 0518 60a0 9214 2411 2004 c144 9e2b


I think I know what happens with your flash. Please try the debug patch
from https://github.com/ambarus/linux-0day.git
spi-nor/next-die-erase-v2-debug.

I assume your flash works in 3-byte mode. The die erase cmd needs an
extended register in 3-byte mode otherwise is ignored. Please try the
patch and let me know if it works.

Reading the datasheet I found out that
"The device supports 3-byte addressing (default), with A[23:0] input
during address cycle. After any READ command is executed, the device
will output data from the selected address. After the boundary is
reached, the device will start reading again from the beginning."

So I expect up to now we tested just the first die, all tests in 3-byte
mode. Thus when we wanted to do a cross-die test, reading from the last
2 MB of first die to the first 2MB of the second die, what we actually
did was to read the last and the first 2MB of the first die.

Cheers,
ta

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-11-03 11:48 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-01 14:58 [PATCH v2 0/6] mtd: spi-nor: introduce die erase Tudor Ambarus
2023-11-01 14:58 ` Tudor Ambarus
2023-11-01 14:58 ` [PATCH v2 1/6] mtd: spi-nor: use kernel sized types instead of c99 types Tudor Ambarus
2023-11-01 14:58   ` Tudor Ambarus
2023-11-01 14:58 ` [PATCH v2 2/6] mtd: spi-nor: add erase die (chip) capability Tudor Ambarus
2023-11-01 14:58   ` Tudor Ambarus
2023-11-01 16:04   ` Tudor Ambarus
2023-11-01 16:04     ` Tudor Ambarus
2023-11-01 16:17     ` Fabio Estevam
2023-11-01 16:17       ` Fabio Estevam
2023-11-01 17:27       ` Tudor Ambarus
2023-11-01 17:27         ` Tudor Ambarus
2023-11-02 16:43         ` Fabio Estevam
2023-11-02 16:43           ` Fabio Estevam
2023-11-02 17:36           ` Tudor Ambarus
2023-11-02 17:36             ` Tudor Ambarus
2023-11-02 17:40             ` Fabio Estevam
2023-11-02 17:40               ` Fabio Estevam
2023-11-02 17:47               ` Tudor Ambarus
2023-11-02 17:47                 ` Tudor Ambarus
2023-11-02 17:54                 ` Tudor Ambarus
2023-11-02 17:54                   ` Tudor Ambarus
2023-11-02 17:59                   ` Tudor Ambarus
2023-11-02 17:59                     ` Tudor Ambarus
2023-11-02 18:01                     ` Fabio Estevam
2023-11-02 18:01                       ` Fabio Estevam
2023-11-02 18:21                       ` Tudor Ambarus
2023-11-02 18:21                         ` Tudor Ambarus
2023-11-02 18:33                         ` Fabio Estevam
2023-11-02 18:33                           ` Fabio Estevam
2023-11-02 18:46                           ` Tudor Ambarus
2023-11-02 18:46                             ` Tudor Ambarus
2023-11-02 18:56                             ` Tudor Ambarus
2023-11-02 18:56                               ` Tudor Ambarus
2023-11-02 21:42                               ` Fabio Estevam
2023-11-02 21:42                                 ` Fabio Estevam
2023-11-03 11:47                                 ` Tudor Ambarus [this message]
2023-11-03 11:47                                   ` Tudor Ambarus
2023-11-03 12:30                                   ` Fabio Estevam
2023-11-03 12:30                                     ` Fabio Estevam
2023-11-03 12:53                                     ` Fabio Estevam
2023-11-03 12:53                                       ` Fabio Estevam
2023-11-03 13:26                                       ` Tudor Ambarus
2023-11-03 13:26                                         ` Tudor Ambarus
2023-11-03 13:37                                         ` Fabio Estevam
2023-11-03 13:37                                           ` Fabio Estevam
2023-11-03 13:48                                           ` Tudor Ambarus
2023-11-03 13:48                                             ` Tudor Ambarus
2023-11-03 14:16                                             ` Fabio Estevam
2023-11-03 14:16                                               ` Fabio Estevam
2023-11-03 14:37                                               ` Tudor Ambarus
2023-11-03 14:37                                                 ` Tudor Ambarus
2023-11-03 14:58                                                 ` Fabio Estevam
2023-11-03 14:58                                                   ` Fabio Estevam
2023-11-06 14:24                                                   ` Tudor Ambarus
2023-11-06 14:24                                                     ` Tudor Ambarus
2023-11-06  9:34                                             ` Michael Walle
2023-11-06  9:34                                               ` Michael Walle
2023-11-06 14:23                                               ` Tudor Ambarus
2023-11-06 14:23                                                 ` Tudor Ambarus
2023-11-06 14:56                                                 ` Tudor Ambarus
2023-11-06 14:56                                                   ` Tudor Ambarus
2023-11-09  9:09                                                 ` Michael Walle
2023-11-09  9:09                                                   ` Michael Walle
2023-11-15  7:06                                                   ` Tudor Ambarus
2023-11-15  7:06                                                     ` Tudor Ambarus
2023-11-08  8:06                             ` Takahiro Kuwano
2023-11-08  8:06                               ` Takahiro Kuwano
2023-11-08  8:54                               ` Tudor Ambarus
2023-11-08  8:54                                 ` Tudor Ambarus
2023-11-01 14:58 ` [PATCH v2 3/6] mtd: spi-nor: spansion: enable die erase for multi die flashes Tudor Ambarus
2023-11-01 14:58   ` Tudor Ambarus
2023-11-01 14:58 ` [PATCH v2 4/6] mtd: spi-nor: micron-st: " Tudor Ambarus
2023-11-01 14:58   ` Tudor Ambarus
2023-11-01 14:58 ` [PATCH v2 5/6] mtd: spi-nor: remove NO_CHIP_ERASE flag Tudor Ambarus
2023-11-01 14:58   ` Tudor Ambarus
2023-11-01 14:58 ` [PATCH v2 6/6] mtd: spi-nor: micron-st: Add support for mt25qu01g Tudor Ambarus
2023-11-01 14:58   ` Tudor Ambarus
2023-11-01 15:54 ` [PATCH v2 0/6] mtd: spi-nor: introduce die erase Fabio Estevam
2023-11-01 15:54   ` Fabio Estevam
2023-11-15  6:10 ` Re (subset): " Tudor Ambarus
2023-11-15  6:10   ` Tudor Ambarus

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=95c16eb0-a785-4a8d-bb42-c5a09b034d0a@linaro.org \
    --to=tudor.ambarus@linaro.org \
    --cc=Takahiro.Kuwano@infineon.com \
    --cc=bacem.daassi@infineon.com \
    --cc=festevam@denx.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=michael@walle.cc \
    --cc=miquel.raynal@bootlin.com \
    --cc=pratyush@kernel.org \
    --cc=richard@nod.at \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.