Re: [PATCH 0/3] riscv: Add double trap testing

["Clément Léger" <cleger@rivosinc.com>]

On 03/06/2025 09:10, Andrew Jones wrote:
> 
> Hi Clement,
> 
> You may want to add format.subjectprefix = kvm-unit-tests to your git
> config, since it's missing from this series.

Hi Drew,

Yeah sorry forgot the prefix !

> 
> On Fri, May 23, 2025 at 09:53:07AM +0200, Clément Léger wrote:
>> Add a test that triggers double trap and verify that it's behavior
>> conforms to the spec. Also use SSE to verify that an SSE event is
>> correctly sent upon double trap.
>>
>> In order to run this test, one can use the following command using an
>> upstream version of OpenSBI:
>>
>> $ qemu-system-riscv64 \
>> 	-M virt \
>> 	-cpu max \
>> 	-nographic -serial mon:stdio \
>> 	-bios <opensbi>/fw_dynamic.bin \
>> 	-kernel riscv/isa-dbltrp.flat
> 
> You can also do
> 
> $ QEMU=qemu-system-riscv64 FIRMWARE_OVERRIDE=<opensbi>/fw_dynamic.bin ./riscv-run riscv/isa-dbltrp.flat

Oh yeah I even used that as well...

Thanks,

Clément

> 
> Thanks,
> drew
> 
>>
>> Clément Léger (3):
>>   lib/riscv: export FWFT functions
>>   lib/riscv: clear SDT when entering exception handling
>>   riscv: Add ISA double trap extension testing
>>
>>  riscv/Makefile      |   1 +
>>  lib/riscv/asm/csr.h |   1 +
>>  lib/riscv/asm/sbi.h |   5 ++
>>  lib/riscv/sbi.c     |  20 +++++
>>  riscv/cstart.S      |   9 ++-
>>  riscv/isa-dbltrp.c  | 189 ++++++++++++++++++++++++++++++++++++++++++++
>>  riscv/sbi-fwft.c    |  49 ++++--------
>>  riscv/unittests.cfg |   5 ++
>>  8 files changed, 240 insertions(+), 39 deletions(-)
>>  create mode 100644 riscv/isa-dbltrp.c
>>
>> -- 
>> 2.49.0
>>


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