* [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code
@ 2013-08-30 2:14 Matt Wilson
2013-08-30 2:14 ` [PATCH 2/2] x86: remove Pentium Pro check Matt Wilson
2013-08-30 8:46 ` [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code Andrew Cooper
0 siblings, 2 replies; 5+ messages in thread
From: Matt Wilson @ 2013-08-30 2:14 UTC (permalink / raw)
To: xen-devel
Nothing defines CONFIG_X86_INTEL_USERCOPY, and as far as I can tell it
was never used even when Xen supported 32-bit x86.
Signed-off-by: Matt Wilson <msw@amazon.com>
---
xen/arch/x86/cpu/intel.c | 21 ---------------------
1 files changed, 0 insertions(+), 21 deletions(-)
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 9b71d36..072ecbc 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -18,13 +18,6 @@
#define select_idle_routine(x) ((void)0)
-#ifdef CONFIG_X86_INTEL_USERCOPY
-/*
- * Alignment at which movsl is preferred for bulk memory copies.
- */
-struct movsl_mask movsl_mask __read_mostly;
-#endif
-
static unsigned int probe_intel_cpuid_faulting(void)
{
uint64_t x;
@@ -229,20 +222,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)
/* Work around errata */
Intel_errata_workarounds(c);
-#ifdef CONFIG_X86_INTEL_USERCOPY
- /*
- * Set up the preferred alignment for movsl bulk memory moves
- */
- switch (c->x86) {
- case 6: /* PII/PIII only like movsl with 8-byte alignment */
- movsl_mask.mask = 7;
- break;
- case 15: /* P4 is OK down to 8-byte alignment */
- movsl_mask.mask = 7;
- break;
- }
-#endif
-
if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
(c->x86 == 0x6 && c->x86_model >= 0x0e))
set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
--
1.7.4.5
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/2] x86: remove Pentium Pro check
2013-08-30 2:14 [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code Matt Wilson
@ 2013-08-30 2:14 ` Matt Wilson
2013-08-30 5:24 ` Keir Fraser
2013-08-30 8:52 ` Andrew Cooper
2013-08-30 8:46 ` [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code Andrew Cooper
1 sibling, 2 replies; 5+ messages in thread
From: Matt Wilson @ 2013-08-30 2:14 UTC (permalink / raw)
To: xen-devel; +Cc: Andrew Cooper, Keir Fraser, Jan Beulich
... as it's not a supported processor
Signed-off-by: Matt Wilson <msw@amazon.com>
Cc: Keir Fraser <keir@xen.org>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/arch/x86/cpu/intel.c | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 072ecbc..31b69c9 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -198,10 +198,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)
set_bit(X86_FEATURE_ARCH_PERFMON, c->x86_capability);
}
- /* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */
- if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) < 0x633)
- clear_bit(X86_FEATURE_SEP, c->x86_capability);
-
if ( !cpu_has(c, X86_FEATURE_XTOPOLOGY) )
{
c->x86_max_cores = num_cpu_cores(c);
--
1.7.4.5
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] x86: remove Pentium Pro check
2013-08-30 2:14 ` [PATCH 2/2] x86: remove Pentium Pro check Matt Wilson
@ 2013-08-30 5:24 ` Keir Fraser
2013-08-30 8:52 ` Andrew Cooper
1 sibling, 0 replies; 5+ messages in thread
From: Keir Fraser @ 2013-08-30 5:24 UTC (permalink / raw)
To: Matt Wilson, xen-devel; +Cc: Andrew Cooper, Jan Beulich
On 30/08/2013 03:14, "Matt Wilson" <msw@amazon.com> wrote:
> ... as it's not a supported processor
>
> Signed-off-by: Matt Wilson <msw@amazon.com>
> Cc: Keir Fraser <keir@xen.org>
> Cc: Jan Beulich <jbeulich@suse.com>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
> ---
> xen/arch/x86/cpu/intel.c | 4 ----
> 1 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 072ecbc..31b69c9 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -198,10 +198,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)
> set_bit(X86_FEATURE_ARCH_PERFMON, c->x86_capability);
> }
>
> - /* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3
> mask 3 */
> - if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) < 0x633)
> - clear_bit(X86_FEATURE_SEP, c->x86_capability);
> -
> if ( !cpu_has(c, X86_FEATURE_XTOPOLOGY) )
> {
> c->x86_max_cores = num_cpu_cores(c);
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] x86: remove Pentium Pro check
2013-08-30 2:14 ` [PATCH 2/2] x86: remove Pentium Pro check Matt Wilson
2013-08-30 5:24 ` Keir Fraser
@ 2013-08-30 8:52 ` Andrew Cooper
1 sibling, 0 replies; 5+ messages in thread
From: Andrew Cooper @ 2013-08-30 8:52 UTC (permalink / raw)
To: Matt Wilson; +Cc: xen-devel, Keir Fraser, Jan Beulich
On 30/08/13 03:14, Matt Wilson wrote:
> ... as it's not a supported processor
>
> Signed-off-by: Matt Wilson <msw@amazon.com>
> Cc: Keir Fraser <keir@xen.org>
> Cc: Jan Beulich <jbeulich@suse.com>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> xen/arch/x86/cpu/intel.c | 4 ----
> 1 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 072ecbc..31b69c9 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -198,10 +198,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)
> set_bit(X86_FEATURE_ARCH_PERFMON, c->x86_capability);
> }
>
> - /* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */
> - if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) < 0x633)
> - clear_bit(X86_FEATURE_SEP, c->x86_capability);
> -
> if ( !cpu_has(c, X86_FEATURE_XTOPOLOGY) )
> {
> c->x86_max_cores = num_cpu_cores(c);
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code
2013-08-30 2:14 [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code Matt Wilson
2013-08-30 2:14 ` [PATCH 2/2] x86: remove Pentium Pro check Matt Wilson
@ 2013-08-30 8:46 ` Andrew Cooper
1 sibling, 0 replies; 5+ messages in thread
From: Andrew Cooper @ 2013-08-30 8:46 UTC (permalink / raw)
To: Matt Wilson; +Cc: xen-devel, Keir Fraser, Jan Beulich
On 30/08/13 03:14, Matt Wilson wrote:
> Nothing defines CONFIG_X86_INTEL_USERCOPY, and as far as I can tell it
> was never used even when Xen supported 32-bit x86.
>
> Signed-off-by: Matt Wilson <msw@amazon.com>
And furthermore, turning it on would appear to result in a compile error
as movsl_mask doesn't appear to exist anywhere, certainly nowhere I can
find in the current tree.
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> xen/arch/x86/cpu/intel.c | 21 ---------------------
> 1 files changed, 0 insertions(+), 21 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 9b71d36..072ecbc 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -18,13 +18,6 @@
>
> #define select_idle_routine(x) ((void)0)
>
> -#ifdef CONFIG_X86_INTEL_USERCOPY
> -/*
> - * Alignment at which movsl is preferred for bulk memory copies.
> - */
> -struct movsl_mask movsl_mask __read_mostly;
> -#endif
> -
> static unsigned int probe_intel_cpuid_faulting(void)
> {
> uint64_t x;
> @@ -229,20 +222,6 @@ static void __devinit init_intel(struct cpuinfo_x86 *c)
> /* Work around errata */
> Intel_errata_workarounds(c);
>
> -#ifdef CONFIG_X86_INTEL_USERCOPY
> - /*
> - * Set up the preferred alignment for movsl bulk memory moves
> - */
> - switch (c->x86) {
> - case 6: /* PII/PIII only like movsl with 8-byte alignment */
> - movsl_mask.mask = 7;
> - break;
> - case 15: /* P4 is OK down to 8-byte alignment */
> - movsl_mask.mask = 7;
> - break;
> - }
> -#endif
> -
> if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
> (c->x86 == 0x6 && c->x86_model >= 0x0e))
> set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-08-30 8:52 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2013-08-30 2:14 [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code Matt Wilson
2013-08-30 2:14 ` [PATCH 2/2] x86: remove Pentium Pro check Matt Wilson
2013-08-30 5:24 ` Keir Fraser
2013-08-30 8:52 ` Andrew Cooper
2013-08-30 8:46 ` [PATCH 1/2] x86: remove X86_INTEL_USERCOPY code Andrew Cooper
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