Re: [PATCH v2 6/6] target/riscv: Fix pointer masking translation mode check bug

["Radim Krčmář" <rkrcmar@ventanamicro.com>]

2025-11-21T13:04:13+08:00, <frank.chang@sifive.com>:
> From: Frank Chang <frank.chang@sifive.com>
>
> When running with virtualization in VS/VU mode, or when executing the
> virtual-machine load/store instructions (HLV.* and HSV.*), the type of
> address that determines which pointer masking rules apply should be
> checked against vsatp rather than satp.
>
> As a result, sign extension also applies to the virtual-machine
> load/store instructions.
>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
> ---
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> @@ -286,16 +286,27 @@ RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env)
>  #endif
>  }
>  
> -bool riscv_cpu_virt_mem_enabled(CPURISCVState *env)
> +bool riscv_cpu_virt_mem_enabled(CPURISCVState *env, bool is_vm_ldst)
>  {
>  #ifndef CONFIG_USER_ONLY
>      int satp_mode = 0;
> -    int priv_mode = cpu_address_mode(env);
> +    uint64_t satp;
> +    int priv_mode;
> +    bool virt = false;
> +
> +    if (!is_vm_ldst) {
> +        riscv_cpu_eff_priv(env, &priv_mode, &virt);
> +    } else {
> +        priv_mode = get_field(env->hstatus, HSTATUS_SPVP);
> +        virt = true;
> +    }
> +
> +    satp = virt ? env->vsatp : env->satp;
>  
>      if (riscv_cpu_mxl(env) == MXL_RV32) {
> -        satp_mode = get_field(env->satp, SATP32_MODE);
> +        satp_mode = get_field(satp, SATP32_MODE);
>      } else {
> -        satp_mode = get_field(env->satp, SATP64_MODE);
> +        satp_mode = get_field(satp, SATP64_MODE);
>      }
>  
>      return ((satp_mode != VM_1_10_MBARE) && (priv_mode != PRV_M));

riscv_cpu_virt_mem_enabled looked generic, so I got scared at the
beginning, but it's luckily only used for pointer masking.

Reviewed-by: Radim Krčmář <rkrcmar@ventanamicro.com>