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From: "Diederik de Haas" <diederik@cknow-tech.com>
To: "Jiaxing Hu" <gahing@gahingwoo.com>, <tomeu@tomeuvizoso.net>,
	<heiko@sntech.de>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <joro@8bytes.org>, <will@kernel.org>,
	<robin.murphy@arm.com>, <ulfh@kernel.org>,
	<p.zabel@pengutronix.de>, <ogabbay@kernel.org>,
	<zhangqing@rock-chips.com>
Cc: <royalnet026@gmail.com>, <alchark@flipper.net>,
	<chaoyi.chen@rock-chips.com>, <diederik@cknow-tech.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-rockchip@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v6 3/9] dt-bindings: iommu: rockchip: allow the RK3576 NPU MMU clock set
Date: Thu, 06 Aug 2026 11:23:39 +0200	[thread overview]
Message-ID: <DKHR2P0XJF0B.OY937NT39DR7@cknow-tech.com> (raw)
In-Reply-To: <20260806063413.350184-4-gahing@gahingwoo.com>

On Thu Aug 6, 2026 at 8:34 AM CEST, Jiaxing Hu wrote:
> The RK3576 NPU MMUs need more than aclk and iface. With only those two
> enabled the MMU accepts reads but silently drops register writes: a
> DTE_ADDR value written from the power domain, while the domain clocks
> are still on, reads back correctly, and the write rk_iommu_resume() does
> microseconds later does not land at all. The vendor DT names the CBUF
> clocks as that MMU's interface clocks and its driver keeps every NPU
> clock on for as long as the device is powered.
>
> The driver side of this is already upstream, commit 841363ebb508
> ("iommu/rockchip: Take all DT clocks"), which switched rk_iommu to
> devm_clk_bulk_get_all(). Widen the schema to match so those nodes can
> be described. minItems stays at 2, so every existing devicetree, which
> all carry exactly aclk and iface, is unaffected.

I agree with all remarks Sashiko made wrt this patch:
https://sashiko.dev/#/patchset/20260805063826.95682-1-gahing%40gahingwoo.com?part=3

Now every MMU with "rockchip,rk3568-iommu", "rockchip,rk3588-iommu" or
"rockchip,rk3576-iommu" is allowed to have a minimum of 2 clocks, instead
of having exactly 2 clocks. That does not sound desirable.

Cheers,
  Diederik
>
> Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
> ---
>  .../devicetree/bindings/iommu/rockchip,iommu.yaml         | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> index 6ce41d11f..a3cedcaaa 100644
> --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> @@ -42,14 +42,22 @@ properties:
>      minItems: 1
>  
>    clocks:
> +    minItems: 2
>      items:
>        - description: Core clock
>        - description: Interface clock
> +      - description: Compute clock, RK3576 NPU MMUs only
> +      - description: Convolution buffer core clock, RK3576 NPU MMUs only
> +      - description: Convolution buffer interface clock, RK3576 NPU MMUs only
>  
>    clock-names:
> +    minItems: 2
>      items:
>        - const: aclk
>        - const: iface
> +      - const: npu
> +      - const: aclk_cbuf
> +      - const: hclk_cbuf
>  
>    "#iommu-cells":
>      const: 0




WARNING: multiple messages have this Message-ID (diff)
From: "Diederik de Haas" <diederik@cknow-tech.com>
To: "Jiaxing Hu" <gahing@gahingwoo.com>, <tomeu@tomeuvizoso.net>,
	<heiko@sntech.de>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <joro@8bytes.org>, <will@kernel.org>,
	<robin.murphy@arm.com>, <ulfh@kernel.org>,
	<p.zabel@pengutronix.de>, <ogabbay@kernel.org>,
	<zhangqing@rock-chips.com>
Cc: <royalnet026@gmail.com>, <alchark@flipper.net>,
	<chaoyi.chen@rock-chips.com>, <diederik@cknow-tech.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-rockchip@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v6 3/9] dt-bindings: iommu: rockchip: allow the RK3576 NPU MMU clock set
Date: Thu, 06 Aug 2026 11:23:39 +0200	[thread overview]
Message-ID: <DKHR2P0XJF0B.OY937NT39DR7@cknow-tech.com> (raw)
In-Reply-To: <20260806063413.350184-4-gahing@gahingwoo.com>

On Thu Aug 6, 2026 at 8:34 AM CEST, Jiaxing Hu wrote:
> The RK3576 NPU MMUs need more than aclk and iface. With only those two
> enabled the MMU accepts reads but silently drops register writes: a
> DTE_ADDR value written from the power domain, while the domain clocks
> are still on, reads back correctly, and the write rk_iommu_resume() does
> microseconds later does not land at all. The vendor DT names the CBUF
> clocks as that MMU's interface clocks and its driver keeps every NPU
> clock on for as long as the device is powered.
>
> The driver side of this is already upstream, commit 841363ebb508
> ("iommu/rockchip: Take all DT clocks"), which switched rk_iommu to
> devm_clk_bulk_get_all(). Widen the schema to match so those nodes can
> be described. minItems stays at 2, so every existing devicetree, which
> all carry exactly aclk and iface, is unaffected.

I agree with all remarks Sashiko made wrt this patch:
https://sashiko.dev/#/patchset/20260805063826.95682-1-gahing%40gahingwoo.com?part=3

Now every MMU with "rockchip,rk3568-iommu", "rockchip,rk3588-iommu" or
"rockchip,rk3576-iommu" is allowed to have a minimum of 2 clocks, instead
of having exactly 2 clocks. That does not sound desirable.

Cheers,
  Diederik
>
> Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
> ---
>  .../devicetree/bindings/iommu/rockchip,iommu.yaml         | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> index 6ce41d11f..a3cedcaaa 100644
> --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml
> @@ -42,14 +42,22 @@ properties:
>      minItems: 1
>  
>    clocks:
> +    minItems: 2
>      items:
>        - description: Core clock
>        - description: Interface clock
> +      - description: Compute clock, RK3576 NPU MMUs only
> +      - description: Convolution buffer core clock, RK3576 NPU MMUs only
> +      - description: Convolution buffer interface clock, RK3576 NPU MMUs only
>  
>    clock-names:
> +    minItems: 2
>      items:
>        - const: aclk
>        - const: iface
> +      - const: npu
> +      - const: aclk_cbuf
> +      - const: hclk_cbuf
>  
>    "#iommu-cells":
>      const: 0



_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

  reply	other threads:[~2026-08-06  9:24 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-06  6:34 [RFC PATCH v6 0/9] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-08-06  6:34 ` Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 1/9] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-06  6:34   ` [RFC PATCH v6 1/9] dt-bindings: npu: rockchip: add rockchip, rk3576-rknn-core Jiaxing Hu
2026-08-06  6:34   ` [RFC PATCH v6 1/9] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 2/9] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 3/9] dt-bindings: iommu: rockchip: allow the RK3576 NPU MMU clock set Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-06  9:23   ` Diederik de Haas [this message]
2026-08-06  9:23     ` Diederik de Haas
2026-08-06  9:55     ` Jiaxing Hu
2026-08-06  9:55       ` Jiaxing Hu
2026-08-06 11:29       ` Diederik de Haas
2026-08-06 11:29         ` Diederik de Haas
2026-08-06  6:34 ` [RFC PATCH v6 4/9] pmdomain/rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 5/9] pmdomain/rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 6/9] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-07  8:10   ` Diederik de Haas
2026-08-07  8:10     ` Diederik de Haas
2026-08-06  6:34 ` [RFC PATCH v6 7/9] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-07  8:48   ` Diederik de Haas
2026-08-07  8:48     ` Diederik de Haas
2026-08-07 12:55     ` Robin Murphy
2026-08-07 12:55       ` Robin Murphy
2026-08-07 13:32       ` Diederik de Haas
2026-08-07 13:32         ` Diederik de Haas
2026-08-07 14:24         ` Robin Murphy
2026-08-07 14:24           ` Robin Murphy
2026-08-07 21:16       ` Jiaxing Hu
2026-08-07 21:16         ` Jiaxing Hu
2026-08-08 12:39         ` Igor Paunovic
2026-08-08 12:39           ` Igor Paunovic
2026-08-10 10:47           ` Jiaxing Hu
2026-08-10 10:47             ` Jiaxing Hu
2026-08-10  1:31         ` Chaoyi Chen
2026-08-10  1:31           ` Chaoyi Chen
2026-08-10 10:47           ` Jiaxing Hu
2026-08-10 10:47             ` Jiaxing Hu
2026-08-11  1:08             ` Chaoyi Chen
2026-08-11  1:08               ` Chaoyi Chen
2026-08-11  2:08           ` Jiaxing Hu
2026-08-11  2:08             ` Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 8/9] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 9/9] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Jiaxing Hu
2026-08-06  6:34   ` Jiaxing Hu

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