[PATCH] riscv: add base extensions to enum riscv_isa_ext_id

* [PATCH] riscv: add base extensions to enum riscv_isa_ext_id
@ 2022-12-22 22:41 Vineet Gupta
  2022-12-22 22:53 ` Conor Dooley
  0 siblings, 1 reply; 7+ messages in thread
From: Vineet Gupta @ 2022-12-22 22:41 UTC (permalink / raw)
  To: linux-riscv; +Cc: linux, Vineet Gupta

This allows for using the enum in general to refer to any extension.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
---
 arch/riscv/include/asm/hwcap.h | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index b22525290073..b861e711e3ac 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -26,16 +26,6 @@ enum {
 
 extern unsigned long elf_hwcap;
 
-#define RISCV_ISA_EXT_a		('a' - 'a')
-#define RISCV_ISA_EXT_c		('c' - 'a')
-#define RISCV_ISA_EXT_d		('d' - 'a')
-#define RISCV_ISA_EXT_f		('f' - 'a')
-#define RISCV_ISA_EXT_h		('h' - 'a')
-#define RISCV_ISA_EXT_i		('i' - 'a')
-#define RISCV_ISA_EXT_m		('m' - 'a')
-#define RISCV_ISA_EXT_s		('s' - 'a')
-#define RISCV_ISA_EXT_u		('u' - 'a')
-
 /*
  * Increse this to higher value as kernel support more ISA extensions.
  */
@@ -53,6 +43,15 @@ extern unsigned long elf_hwcap;
  * available logical extension id.
  */
 enum riscv_isa_ext_id {
+	RISCV_ISA_EXT_a = ('a' - 'a'),
+	RISCV_ISA_EXT_c = ('c' - 'a'),
+	RISCV_ISA_EXT_d = ('d' - 'a'),
+	RISCV_ISA_EXT_f = ('f' - 'a'),
+	RISCV_ISA_EXT_h = ('h' - 'a'),
+	RISCV_ISA_EXT_i = ('i' - 'a'),
+	RISCV_ISA_EXT_m = ('m' - 'a'),
+	RISCV_ISA_EXT_s = ('s' - 'a'),
+	RISCV_ISA_EXT_u = ('u' - 'a'),
 	RISCV_ISA_EXT_SSCOFPMF = RISCV_ISA_EXT_BASE,
 	RISCV_ISA_EXT_SVPBMT,
 	RISCV_ISA_EXT_ZICBOM,
-- 
2.34.1


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