From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvm@vger.kernel.org, kernel-team@android.com,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/9] KVM: arm64: PMU: Add counter_index_to_*reg() helpers
Date: Wed, 10 Aug 2022 02:17:52 -0500 [thread overview]
Message-ID: <YvNboA7nla0NcKwa@google.com> (raw)
In-Reply-To: <20220805135813.2102034-5-maz@kernel.org>
On Fri, Aug 05, 2022 at 02:58:08PM +0100, Marc Zyngier wrote:
> In order to reduce the boilerplate code, add two helpers returning
> the counter register index (resp. the event register) in the vcpu
> register file from the counter index.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
> ---
> arch/arm64/kvm/pmu-emul.c | 27 +++++++++++++++------------
> 1 file changed, 15 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 0ab6f59f433c..9be485d23416 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -75,6 +75,16 @@ static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
> return container_of(vcpu_arch, struct kvm_vcpu, arch);
> }
>
> +static u32 counter_index_to_reg(u64 idx)
> +{
> + return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + idx;
> +}
> +
> +static u32 counter_index_to_evtreg(u64 idx)
> +{
> + return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + idx;
> +}
> +
> /**
> * kvm_pmu_get_counter_value - get PMU counter value
> * @vcpu: The vcpu pointer
> @@ -89,8 +99,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
> if (!kvm_vcpu_has_pmu(vcpu))
> return 0;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + pmc->idx;
> + reg = counter_index_to_reg(select_idx);
> counter = __vcpu_sys_reg(vcpu, reg);
>
> /*
> @@ -120,8 +129,7 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
> if (!kvm_vcpu_has_pmu(vcpu))
> return;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + select_idx;
> + reg = counter_index_to_reg(select_idx);
> __vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
>
> /* Recreate the perf event to reflect the updated sample_period */
> @@ -156,10 +164,7 @@ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc)
>
> counter = kvm_pmu_get_counter_value(vcpu, pmc->idx);
>
> - if (pmc->idx == ARMV8_PMU_CYCLE_IDX)
> - reg = PMCCNTR_EL0;
> - else
> - reg = PMEVCNTR0_EL0 + pmc->idx;
> + reg = counter_index_to_reg(pmc->idx);
>
> if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx))
> counter = lower_32_bits(counter);
> @@ -540,8 +545,7 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx)
> struct perf_event_attr attr;
> u64 eventsel, counter, reg, data;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + pmc->idx;
> + reg = counter_index_to_evtreg(select_idx);
> data = __vcpu_sys_reg(vcpu, reg);
>
> kvm_pmu_stop_counter(vcpu, pmc);
> @@ -627,8 +631,7 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
> mask &= ~ARMV8_PMU_EVTYPE_EVENT;
> mask |= kvm_pmu_event_mask(vcpu->kvm);
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + select_idx;
> + reg = counter_index_to_evtreg(select_idx);
>
> __vcpu_sys_reg(vcpu, reg) = data & mask;
>
> --
> 2.34.1
>
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Ricardo Koller <ricarkol@google.com>,
kernel-team@android.com
Subject: Re: [PATCH 4/9] KVM: arm64: PMU: Add counter_index_to_*reg() helpers
Date: Wed, 10 Aug 2022 02:17:52 -0500 [thread overview]
Message-ID: <YvNboA7nla0NcKwa@google.com> (raw)
In-Reply-To: <20220805135813.2102034-5-maz@kernel.org>
On Fri, Aug 05, 2022 at 02:58:08PM +0100, Marc Zyngier wrote:
> In order to reduce the boilerplate code, add two helpers returning
> the counter register index (resp. the event register) in the vcpu
> register file from the counter index.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
> ---
> arch/arm64/kvm/pmu-emul.c | 27 +++++++++++++++------------
> 1 file changed, 15 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 0ab6f59f433c..9be485d23416 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -75,6 +75,16 @@ static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
> return container_of(vcpu_arch, struct kvm_vcpu, arch);
> }
>
> +static u32 counter_index_to_reg(u64 idx)
> +{
> + return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + idx;
> +}
> +
> +static u32 counter_index_to_evtreg(u64 idx)
> +{
> + return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + idx;
> +}
> +
> /**
> * kvm_pmu_get_counter_value - get PMU counter value
> * @vcpu: The vcpu pointer
> @@ -89,8 +99,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
> if (!kvm_vcpu_has_pmu(vcpu))
> return 0;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + pmc->idx;
> + reg = counter_index_to_reg(select_idx);
> counter = __vcpu_sys_reg(vcpu, reg);
>
> /*
> @@ -120,8 +129,7 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
> if (!kvm_vcpu_has_pmu(vcpu))
> return;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + select_idx;
> + reg = counter_index_to_reg(select_idx);
> __vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
>
> /* Recreate the perf event to reflect the updated sample_period */
> @@ -156,10 +164,7 @@ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc)
>
> counter = kvm_pmu_get_counter_value(vcpu, pmc->idx);
>
> - if (pmc->idx == ARMV8_PMU_CYCLE_IDX)
> - reg = PMCCNTR_EL0;
> - else
> - reg = PMEVCNTR0_EL0 + pmc->idx;
> + reg = counter_index_to_reg(pmc->idx);
>
> if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx))
> counter = lower_32_bits(counter);
> @@ -540,8 +545,7 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx)
> struct perf_event_attr attr;
> u64 eventsel, counter, reg, data;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + pmc->idx;
> + reg = counter_index_to_evtreg(select_idx);
> data = __vcpu_sys_reg(vcpu, reg);
>
> kvm_pmu_stop_counter(vcpu, pmc);
> @@ -627,8 +631,7 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
> mask &= ~ARMV8_PMU_EVTYPE_EVENT;
> mask |= kvm_pmu_event_mask(vcpu->kvm);
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + select_idx;
> + reg = counter_index_to_evtreg(select_idx);
>
> __vcpu_sys_reg(vcpu, reg) = data & mask;
>
> --
> 2.34.1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Ricardo Koller <ricarkol@google.com>,
kernel-team@android.com
Subject: Re: [PATCH 4/9] KVM: arm64: PMU: Add counter_index_to_*reg() helpers
Date: Wed, 10 Aug 2022 02:17:52 -0500 [thread overview]
Message-ID: <YvNboA7nla0NcKwa@google.com> (raw)
In-Reply-To: <20220805135813.2102034-5-maz@kernel.org>
On Fri, Aug 05, 2022 at 02:58:08PM +0100, Marc Zyngier wrote:
> In order to reduce the boilerplate code, add two helpers returning
> the counter register index (resp. the event register) in the vcpu
> register file from the counter index.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
> ---
> arch/arm64/kvm/pmu-emul.c | 27 +++++++++++++++------------
> 1 file changed, 15 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 0ab6f59f433c..9be485d23416 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -75,6 +75,16 @@ static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
> return container_of(vcpu_arch, struct kvm_vcpu, arch);
> }
>
> +static u32 counter_index_to_reg(u64 idx)
> +{
> + return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + idx;
> +}
> +
> +static u32 counter_index_to_evtreg(u64 idx)
> +{
> + return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + idx;
> +}
> +
> /**
> * kvm_pmu_get_counter_value - get PMU counter value
> * @vcpu: The vcpu pointer
> @@ -89,8 +99,7 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
> if (!kvm_vcpu_has_pmu(vcpu))
> return 0;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + pmc->idx;
> + reg = counter_index_to_reg(select_idx);
> counter = __vcpu_sys_reg(vcpu, reg);
>
> /*
> @@ -120,8 +129,7 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
> if (!kvm_vcpu_has_pmu(vcpu))
> return;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + select_idx;
> + reg = counter_index_to_reg(select_idx);
> __vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
>
> /* Recreate the perf event to reflect the updated sample_period */
> @@ -156,10 +164,7 @@ static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc)
>
> counter = kvm_pmu_get_counter_value(vcpu, pmc->idx);
>
> - if (pmc->idx == ARMV8_PMU_CYCLE_IDX)
> - reg = PMCCNTR_EL0;
> - else
> - reg = PMEVCNTR0_EL0 + pmc->idx;
> + reg = counter_index_to_reg(pmc->idx);
>
> if (!kvm_pmu_idx_is_64bit(vcpu, pmc->idx))
> counter = lower_32_bits(counter);
> @@ -540,8 +545,7 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx)
> struct perf_event_attr attr;
> u64 eventsel, counter, reg, data;
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + pmc->idx;
> + reg = counter_index_to_evtreg(select_idx);
> data = __vcpu_sys_reg(vcpu, reg);
>
> kvm_pmu_stop_counter(vcpu, pmc);
> @@ -627,8 +631,7 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
> mask &= ~ARMV8_PMU_EVTYPE_EVENT;
> mask |= kvm_pmu_event_mask(vcpu->kvm);
>
> - reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
> - ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + select_idx;
> + reg = counter_index_to_evtreg(select_idx);
>
> __vcpu_sys_reg(vcpu, reg) = data & mask;
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-08-10 7:18 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 13:58 [PATCH 0/9] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-10 17:21 ` Oliver Upton
2022-08-10 17:21 ` Oliver Upton
2022-08-10 17:21 ` Oliver Upton
2022-08-23 4:30 ` Reiji Watanabe
2022-08-23 4:30 ` Reiji Watanabe
2022-08-23 4:30 ` Reiji Watanabe
2022-10-24 10:29 ` Marc Zyngier
2022-10-24 10:29 ` Marc Zyngier
2022-10-24 10:29 ` Marc Zyngier
2022-10-27 14:33 ` Reiji Watanabe
2022-10-27 14:33 ` Reiji Watanabe
2022-10-27 14:33 ` Reiji Watanabe
2022-10-27 15:21 ` Marc Zyngier
2022-10-27 15:21 ` Marc Zyngier
2022-10-27 15:21 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 2/9] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 3/9] KVM: arm64: PMU: Only narrow counters that are not 64bit wide Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-24 4:07 ` Reiji Watanabe
2022-08-24 4:07 ` Reiji Watanabe
2022-08-24 4:07 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 4/9] KVM: arm64: PMU: Add counter_index_to_*reg() helpers Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-10 7:17 ` Oliver Upton [this message]
2022-08-10 7:17 ` Oliver Upton
2022-08-10 7:17 ` Oliver Upton
2022-08-10 17:23 ` Oliver Upton
2022-08-10 17:23 ` Oliver Upton
2022-08-10 17:23 ` Oliver Upton
2022-08-24 4:27 ` Reiji Watanabe
2022-08-24 4:27 ` Reiji Watanabe
2022-08-24 4:27 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 5/9] KVM: arm64: PMU: Simplify setting a counter to a specific value Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-10 15:41 ` Oliver Upton
2022-08-10 15:41 ` Oliver Upton
2022-08-10 15:41 ` Oliver Upton
2022-08-05 13:58 ` [PATCH 6/9] KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creation Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-26 4:34 ` Reiji Watanabe
2022-08-26 4:34 ` Reiji Watanabe
2022-08-26 4:34 ` Reiji Watanabe
2022-08-26 6:02 ` Reiji Watanabe
2022-08-26 6:02 ` Reiji Watanabe
2022-08-26 6:02 ` Reiji Watanabe
2022-10-26 14:43 ` Marc Zyngier
2022-10-26 14:43 ` Marc Zyngier
2022-10-26 14:43 ` Marc Zyngier
2022-10-27 16:09 ` Reiji Watanabe
2022-10-27 16:09 ` Reiji Watanabe
2022-10-27 16:09 ` Reiji Watanabe
2022-10-27 17:24 ` Marc Zyngier
2022-10-27 17:24 ` Marc Zyngier
2022-10-27 17:24 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 7/9] KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-10 7:08 ` Oliver Upton
2022-08-10 7:08 ` Oliver Upton
2022-08-10 7:08 ` Oliver Upton
2022-08-10 9:27 ` Marc Zyngier
2022-08-10 9:27 ` Marc Zyngier
2022-08-10 9:27 ` Marc Zyngier
2022-08-26 7:01 ` Reiji Watanabe
2022-08-26 7:01 ` Reiji Watanabe
2022-08-26 7:01 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 8/9] KVM: arm64: PMU: Implement PMUv3p5 long counter support Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-10 7:16 ` Oliver Upton
2022-08-10 7:16 ` Oliver Upton
2022-08-10 7:16 ` Oliver Upton
2022-08-10 9:28 ` Marc Zyngier
2022-08-10 9:28 ` Marc Zyngier
2022-08-10 9:28 ` Marc Zyngier
2022-08-27 7:09 ` Reiji Watanabe
2022-08-27 7:09 ` Reiji Watanabe
2022-08-27 7:09 ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 9/9] KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guest Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-10 7:16 ` Oliver Upton
2022-08-10 7:16 ` Oliver Upton
2022-08-10 7:16 ` Oliver Upton
2022-08-10 18:46 ` [PATCH 0/9] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Ricardo Koller
2022-08-10 18:46 ` Ricardo Koller
2022-08-10 18:46 ` Ricardo Koller
2022-08-10 19:33 ` Oliver Upton
2022-08-10 19:33 ` Oliver Upton
2022-08-10 19:33 ` Oliver Upton
2022-08-10 21:55 ` Ricardo Koller
2022-08-10 21:55 ` Ricardo Koller
2022-08-10 21:55 ` Ricardo Koller
2022-08-11 12:56 ` Marc Zyngier
2022-08-11 12:56 ` Marc Zyngier
2022-08-11 12:56 ` Marc Zyngier
2022-08-12 22:53 ` Ricardo Koller
2022-08-12 22:53 ` Ricardo Koller
2022-08-12 22:53 ` Ricardo Koller
2022-10-24 18:05 ` Marc Zyngier
2022-10-24 18:05 ` Marc Zyngier
2022-10-24 18:05 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YvNboA7nla0NcKwa@google.com \
--to=oliver.upton@linux.dev \
--cc=kernel-team@android.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.