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From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvm@vger.kernel.org, kernel-team@android.com,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/9] KVM: arm64: PMU: Simplify setting a counter to a specific value
Date: Wed, 10 Aug 2022 10:41:56 -0500	[thread overview]
Message-ID: <YvPRxHgriLXc5AGp@google.com> (raw)
In-Reply-To: <20220805135813.2102034-6-maz@kernel.org>

On Fri, Aug 05, 2022 at 02:58:09PM +0100, Marc Zyngier wrote:
> kvm_pmu_set_counter_value() is pretty odd, as it tries to update
> the counter value while taking into account the value that is
> currently held by the running perf counter.
> 
> This is not only complicated, this is quite wrong. Nowhere in
> the architecture is it said that the counter would be offset
> by something that is pending. The counter should be updated
> with the value set by SW, and start counting from there if
> required.
> 
> Remove the odd computation and just assign the provided value
> after having released the perf event (which is then restarted).
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>

Looks much better.

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

> ---
>  arch/arm64/kvm/pmu-emul.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 9be485d23416..ddd79b64b38a 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -21,6 +21,7 @@ static LIST_HEAD(arm_pmus);
>  static DEFINE_MUTEX(arm_pmus_lock);
>  
>  static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx);
> +static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);
>  
>  static u32 kvm_pmu_event_mask(struct kvm *kvm)
>  {
> @@ -129,8 +130,10 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
>  	if (!kvm_vcpu_has_pmu(vcpu))
>  		return;
>  
> +	kvm_pmu_release_perf_event(&vcpu->arch.pmu.pmc[select_idx]);
> +

<bikeshed>

Not your code, but since we're here: it seems as though there is some
inconsistency in parameterization as some functions take an index and
others take a kvm_pmc pointer. For example,
kvm_pmu_{create,release}_perf_event() are inconsistent.

It might be nice to pick a scheme and apply consistently throughout.

</bikeshed>

--
Thanks,
Oliver

>  	reg = counter_index_to_reg(select_idx);
> -	__vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
> +	__vcpu_sys_reg(vcpu, reg) = val;
>  
>  	/* Recreate the perf event to reflect the updated sample_period */
>  	kvm_pmu_create_perf_event(vcpu, select_idx);
> -- 
> 2.34.1
> 
>
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Ricardo Koller <ricarkol@google.com>,
	kernel-team@android.com
Subject: Re: [PATCH 5/9] KVM: arm64: PMU: Simplify setting a counter to a specific value
Date: Wed, 10 Aug 2022 10:41:56 -0500	[thread overview]
Message-ID: <YvPRxHgriLXc5AGp@google.com> (raw)
In-Reply-To: <20220805135813.2102034-6-maz@kernel.org>

On Fri, Aug 05, 2022 at 02:58:09PM +0100, Marc Zyngier wrote:
> kvm_pmu_set_counter_value() is pretty odd, as it tries to update
> the counter value while taking into account the value that is
> currently held by the running perf counter.
> 
> This is not only complicated, this is quite wrong. Nowhere in
> the architecture is it said that the counter would be offset
> by something that is pending. The counter should be updated
> with the value set by SW, and start counting from there if
> required.
> 
> Remove the odd computation and just assign the provided value
> after having released the perf event (which is then restarted).
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>

Looks much better.

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

> ---
>  arch/arm64/kvm/pmu-emul.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 9be485d23416..ddd79b64b38a 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -21,6 +21,7 @@ static LIST_HEAD(arm_pmus);
>  static DEFINE_MUTEX(arm_pmus_lock);
>  
>  static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx);
> +static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);
>  
>  static u32 kvm_pmu_event_mask(struct kvm *kvm)
>  {
> @@ -129,8 +130,10 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
>  	if (!kvm_vcpu_has_pmu(vcpu))
>  		return;
>  
> +	kvm_pmu_release_perf_event(&vcpu->arch.pmu.pmc[select_idx]);
> +

<bikeshed>

Not your code, but since we're here: it seems as though there is some
inconsistency in parameterization as some functions take an index and
others take a kvm_pmc pointer. For example,
kvm_pmu_{create,release}_perf_event() are inconsistent.

It might be nice to pick a scheme and apply consistently throughout.

</bikeshed>

--
Thanks,
Oliver

>  	reg = counter_index_to_reg(select_idx);
> -	__vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
> +	__vcpu_sys_reg(vcpu, reg) = val;
>  
>  	/* Recreate the perf event to reflect the updated sample_period */
>  	kvm_pmu_create_perf_event(vcpu, select_idx);
> -- 
> 2.34.1
> 
>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Ricardo Koller <ricarkol@google.com>,
	kernel-team@android.com
Subject: Re: [PATCH 5/9] KVM: arm64: PMU: Simplify setting a counter to a specific value
Date: Wed, 10 Aug 2022 10:41:56 -0500	[thread overview]
Message-ID: <YvPRxHgriLXc5AGp@google.com> (raw)
In-Reply-To: <20220805135813.2102034-6-maz@kernel.org>

On Fri, Aug 05, 2022 at 02:58:09PM +0100, Marc Zyngier wrote:
> kvm_pmu_set_counter_value() is pretty odd, as it tries to update
> the counter value while taking into account the value that is
> currently held by the running perf counter.
> 
> This is not only complicated, this is quite wrong. Nowhere in
> the architecture is it said that the counter would be offset
> by something that is pending. The counter should be updated
> with the value set by SW, and start counting from there if
> required.
> 
> Remove the odd computation and just assign the provided value
> after having released the perf event (which is then restarted).
> 
> Signed-off-by: Marc Zyngier <maz@kernel.org>

Looks much better.

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

> ---
>  arch/arm64/kvm/pmu-emul.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
> index 9be485d23416..ddd79b64b38a 100644
> --- a/arch/arm64/kvm/pmu-emul.c
> +++ b/arch/arm64/kvm/pmu-emul.c
> @@ -21,6 +21,7 @@ static LIST_HEAD(arm_pmus);
>  static DEFINE_MUTEX(arm_pmus_lock);
>  
>  static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx);
> +static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);
>  
>  static u32 kvm_pmu_event_mask(struct kvm *kvm)
>  {
> @@ -129,8 +130,10 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
>  	if (!kvm_vcpu_has_pmu(vcpu))
>  		return;
>  
> +	kvm_pmu_release_perf_event(&vcpu->arch.pmu.pmc[select_idx]);
> +

<bikeshed>

Not your code, but since we're here: it seems as though there is some
inconsistency in parameterization as some functions take an index and
others take a kvm_pmc pointer. For example,
kvm_pmu_{create,release}_perf_event() are inconsistent.

It might be nice to pick a scheme and apply consistently throughout.

</bikeshed>

--
Thanks,
Oliver

>  	reg = counter_index_to_reg(select_idx);
> -	__vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
> +	__vcpu_sys_reg(vcpu, reg) = val;
>  
>  	/* Recreate the perf event to reflect the updated sample_period */
>  	kvm_pmu_create_perf_event(vcpu, select_idx);
> -- 
> 2.34.1
> 
>

  reply	other threads:[~2022-08-10 15:42 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-05 13:58 [PATCH 0/9] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-10 17:21   ` Oliver Upton
2022-08-10 17:21     ` Oliver Upton
2022-08-10 17:21     ` Oliver Upton
2022-08-23  4:30   ` Reiji Watanabe
2022-08-23  4:30     ` Reiji Watanabe
2022-08-23  4:30     ` Reiji Watanabe
2022-10-24 10:29     ` Marc Zyngier
2022-10-24 10:29       ` Marc Zyngier
2022-10-24 10:29       ` Marc Zyngier
2022-10-27 14:33       ` Reiji Watanabe
2022-10-27 14:33         ` Reiji Watanabe
2022-10-27 14:33         ` Reiji Watanabe
2022-10-27 15:21         ` Marc Zyngier
2022-10-27 15:21           ` Marc Zyngier
2022-10-27 15:21           ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 2/9] KVM: arm64: PMU: Distinguish between 64bit counter and 64bit overflow Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 3/9] KVM: arm64: PMU: Only narrow counters that are not 64bit wide Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-24  4:07   ` Reiji Watanabe
2022-08-24  4:07     ` Reiji Watanabe
2022-08-24  4:07     ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 4/9] KVM: arm64: PMU: Add counter_index_to_*reg() helpers Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-10  7:17   ` Oliver Upton
2022-08-10  7:17     ` Oliver Upton
2022-08-10  7:17     ` Oliver Upton
2022-08-10 17:23     ` Oliver Upton
2022-08-10 17:23       ` Oliver Upton
2022-08-10 17:23       ` Oliver Upton
2022-08-24  4:27   ` Reiji Watanabe
2022-08-24  4:27     ` Reiji Watanabe
2022-08-24  4:27     ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 5/9] KVM: arm64: PMU: Simplify setting a counter to a specific value Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-10 15:41   ` Oliver Upton [this message]
2022-08-10 15:41     ` Oliver Upton
2022-08-10 15:41     ` Oliver Upton
2022-08-05 13:58 ` [PATCH 6/9] KVM: arm64: PMU: Move the ID_AA64DFR0_EL1.PMUver limit to VM creation Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-26  4:34   ` Reiji Watanabe
2022-08-26  4:34     ` Reiji Watanabe
2022-08-26  4:34     ` Reiji Watanabe
2022-08-26  6:02     ` Reiji Watanabe
2022-08-26  6:02       ` Reiji Watanabe
2022-08-26  6:02       ` Reiji Watanabe
2022-10-26 14:43       ` Marc Zyngier
2022-10-26 14:43         ` Marc Zyngier
2022-10-26 14:43         ` Marc Zyngier
2022-10-27 16:09         ` Reiji Watanabe
2022-10-27 16:09           ` Reiji Watanabe
2022-10-27 16:09           ` Reiji Watanabe
2022-10-27 17:24           ` Marc Zyngier
2022-10-27 17:24             ` Marc Zyngier
2022-10-27 17:24             ` Marc Zyngier
2022-08-05 13:58 ` [PATCH 7/9] KVM: arm64: PMU: Allow ID_AA64DFR0_EL1.PMUver to be set from userspace Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-10  7:08   ` Oliver Upton
2022-08-10  7:08     ` Oliver Upton
2022-08-10  7:08     ` Oliver Upton
2022-08-10  9:27     ` Marc Zyngier
2022-08-10  9:27       ` Marc Zyngier
2022-08-10  9:27       ` Marc Zyngier
2022-08-26  7:01   ` Reiji Watanabe
2022-08-26  7:01     ` Reiji Watanabe
2022-08-26  7:01     ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 8/9] KVM: arm64: PMU: Implement PMUv3p5 long counter support Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-10  7:16   ` Oliver Upton
2022-08-10  7:16     ` Oliver Upton
2022-08-10  7:16     ` Oliver Upton
2022-08-10  9:28     ` Marc Zyngier
2022-08-10  9:28       ` Marc Zyngier
2022-08-10  9:28       ` Marc Zyngier
2022-08-27  7:09       ` Reiji Watanabe
2022-08-27  7:09         ` Reiji Watanabe
2022-08-27  7:09         ` Reiji Watanabe
2022-08-05 13:58 ` [PATCH 9/9] KVM: arm64: PMU: Allow PMUv3p5 to be exposed to the guest Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-05 13:58   ` Marc Zyngier
2022-08-10  7:16   ` Oliver Upton
2022-08-10  7:16     ` Oliver Upton
2022-08-10  7:16     ` Oliver Upton
2022-08-10 18:46 ` [PATCH 0/9] KVM: arm64: PMU: Fixing chained events, and PMUv3p5 support Ricardo Koller
2022-08-10 18:46   ` Ricardo Koller
2022-08-10 18:46   ` Ricardo Koller
2022-08-10 19:33   ` Oliver Upton
2022-08-10 19:33     ` Oliver Upton
2022-08-10 19:33     ` Oliver Upton
2022-08-10 21:55     ` Ricardo Koller
2022-08-10 21:55       ` Ricardo Koller
2022-08-10 21:55       ` Ricardo Koller
2022-08-11 12:56       ` Marc Zyngier
2022-08-11 12:56         ` Marc Zyngier
2022-08-11 12:56         ` Marc Zyngier
2022-08-12 22:53         ` Ricardo Koller
2022-08-12 22:53           ` Ricardo Koller
2022-08-12 22:53           ` Ricardo Koller
2022-10-24 18:05           ` Marc Zyngier
2022-10-24 18:05             ` Marc Zyngier
2022-10-24 18:05             ` Marc Zyngier

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