[PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation

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* [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation
@ 2023-05-23 18:36 ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:36 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown,
	Anshuman Khandual, Shaoqin Huang

Continue working through the register defintions, converting them to
automatic generation.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
Changes in v2:
- Also convert OSECCR_EL1, OSDTRRX_EL1 and OSDTRTX_EL1 instead of
  dropping them.
- Link to v1: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v1-0-936cd769cb9e@kernel.org

---
Mark Brown (7):
      arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
      arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
      arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
      arm64/sysreg: Convert OSLAR_EL1 to automatic generation
      arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
      arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
      arm64/sysreg: Convert OSECCR_EL1 to automatic generation

 arch/arm64/include/asm/kvm_host.h |  2 +-
 arch/arm64/include/asm/sysreg.h   | 16 +++---------
 arch/arm64/kvm/sys_regs.c         | 10 +++----
 arch/arm64/tools/sysreg           | 55 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 65 insertions(+), 18 deletions(-)
---
base-commit: 44c026a73be8038f03dbdeef028b642880cf1511
change-id: 20230419-arm64-syreg-gen-b2aa896b8af6

Best regards,
-- 
Mark Brown <broonie@kernel.org>


^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation
@ 2023-05-23 18:36 ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:36 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown,
	Anshuman Khandual, Shaoqin Huang

Continue working through the register defintions, converting them to
automatic generation.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
Changes in v2:
- Also convert OSECCR_EL1, OSDTRRX_EL1 and OSDTRTX_EL1 instead of
  dropping them.
- Link to v1: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v1-0-936cd769cb9e@kernel.org

---
Mark Brown (7):
      arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
      arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
      arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
      arm64/sysreg: Convert OSLAR_EL1 to automatic generation
      arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
      arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
      arm64/sysreg: Convert OSECCR_EL1 to automatic generation

 arch/arm64/include/asm/kvm_host.h |  2 +-
 arch/arm64/include/asm/sysreg.h   | 16 +++---------
 arch/arm64/kvm/sys_regs.c         | 10 +++----
 arch/arm64/tools/sysreg           | 55 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 65 insertions(+), 18 deletions(-)
---
base-commit: 44c026a73be8038f03dbdeef028b642880cf1511
change-id: 20230419-arm64-syreg-gen-b2aa896b8af6

Best regards,
-- 
Mark Brown <broonie@kernel.org>


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2 1/7] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:36   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:36 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown,
	Anshuman Khandual, Shaoqin Huang

Convert MDCCINT_EL1 to automatic register generation as per DDI0616
2023-03. No functional change.

Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 7 +++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index e72d9aaab6b1..3d69bda0e608 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -135,7 +135,6 @@
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
 #define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
-#define SYS_MDCCINT_EL1			sys_reg(2, 0, 0, 2, 0)
 #define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)
 #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index c9a0d1fa3209..df7a7ba97b43 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -48,6 +48,13 @@
 # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
 # item ACCDATA) though it may be more taseful to do something else.
 
+Sysreg	MDCCINT_EL1	2	0	0	2	0
+Res0	63:31
+Field	30	RX
+Field	29	TX
+Res0	28:0
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 1/7] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
@ 2023-05-23 18:36   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:36 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown,
	Anshuman Khandual, Shaoqin Huang

Convert MDCCINT_EL1 to automatic register generation as per DDI0616
2023-03. No functional change.

Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 7 +++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index e72d9aaab6b1..3d69bda0e608 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -135,7 +135,6 @@
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
 #define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
-#define SYS_MDCCINT_EL1			sys_reg(2, 0, 0, 2, 0)
 #define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)
 #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index c9a0d1fa3209..df7a7ba97b43 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -48,6 +48,13 @@
 # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
 # item ACCDATA) though it may be more taseful to do something else.
 
+Sysreg	MDCCINT_EL1	2	0	0	2	0
+Res0	63:31
+Field	30	RX
+Field	29	TX
+Res0	28:0
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 2/7] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:37   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown, Shaoqin Huang

Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
No functional change.

Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h |  1 -
 arch/arm64/tools/sysreg         | 28 ++++++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 3d69bda0e608..95de1aaee0e9 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -135,7 +135,6 @@
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
 #define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
-#define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)
 #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index df7a7ba97b43..601cc8024734 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -55,6 +55,34 @@ Field	29	TX
 Res0	28:0
 EndSysreg
 
+Sysreg	MDSCR_EL1	2	0	0	2	2
+Res0	63:36
+Field	35	EHBWE
+Field	34	EnSPM
+Field	33	TTA
+Field	32	EMBWE
+Field	31	TFO
+Field	30	RXfull
+Field	29	TXfull
+Res0	28
+Field	27	RXO
+Field	26	TXU
+Res0	25:24
+Field	23:22	INTdis
+Field	21	TDA
+Res0	20
+Field	19	SC2
+Res0	18:16
+Field	15	MDE
+Field	14	HDE
+Field	13	KDE
+Field	12	TDCC
+Res0	11:7
+Field	6	ERR
+Res0	5:1
+Field	0	SS
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 2/7] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
@ 2023-05-23 18:37   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown, Shaoqin Huang

Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
No functional change.

Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h |  1 -
 arch/arm64/tools/sysreg         | 28 ++++++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 3d69bda0e608..95de1aaee0e9 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -135,7 +135,6 @@
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
 #define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
-#define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)
 #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index df7a7ba97b43..601cc8024734 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -55,6 +55,34 @@ Field	29	TX
 Res0	28:0
 EndSysreg
 
+Sysreg	MDSCR_EL1	2	0	0	2	2
+Res0	63:36
+Field	35	EHBWE
+Field	34	EnSPM
+Field	33	TTA
+Field	32	EMBWE
+Field	31	TFO
+Field	30	RXfull
+Field	29	TXfull
+Res0	28
+Field	27	RXO
+Field	26	TXU
+Res0	25:24
+Field	23:22	INTdis
+Field	21	TDA
+Res0	20
+Field	19	SC2
+Res0	18:16
+Field	15	MDE
+Field	14	HDE
+Field	13	KDE
+Field	12	TDCC
+Res0	11:7
+Field	6	ERR
+Res0	5:1
+Field	0	SS
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 2/7] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
  2023-05-23 18:37   ` Mark Brown
@ 2023-05-25 21:39     ` Oliver Upton
  -1 siblings, 0 replies; 28+ messages in thread
From: Oliver Upton @ 2023-05-25 21:39 UTC (permalink / raw)
  To: Mark Brown
  Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
	Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm,
	Shaoqin Huang

On Tue, May 23, 2023 at 07:37:00PM +0100, Mark Brown wrote:
> Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
> No functional change.
> 
> Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>  arch/arm64/include/asm/sysreg.h |  1 -
>  arch/arm64/tools/sysreg         | 28 ++++++++++++++++++++++++++++
>  2 files changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 3d69bda0e608..95de1aaee0e9 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -135,7 +135,6 @@
>  #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>  
>  #define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
> -#define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)
>  #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
>  #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>  #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index df7a7ba97b43..601cc8024734 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -55,6 +55,34 @@ Field	29	TX
>  Res0	28:0
>  EndSysreg
>  
> +Sysreg	MDSCR_EL1	2	0	0	2	2
> +Res0	63:36
> +Field	35	EHBWE
> +Field	34	EnSPM
> +Field	33	TTA
> +Field	32	EMBWE
> +Field	31	TFO
> +Field	30	RXfull
> +Field	29	TXfull
> +Res0	28
> +Field	27	RXO
> +Field	26	TXU
> +Res0	25:24
> +Field	23:22	INTdis
> +Field	21	TDA
> +Res0	20
> +Field	19	SC2
> +Res0	18:16

These bits are actually RAZ/WI. I know that doesn't amount to much right
now, but eventually getting a mask of RAZ/WI bits for registers would be
helpful for KVM sysreg emulation.

> +Field	15	MDE
> +Field	14	HDE
> +Field	13	KDE
> +Field	12	TDCC
> +Res0	11:7
> +Field	6	ERR
> +Res0	5:1
> +Field	0	SS
> +EndSysreg
> +
>  Sysreg ID_PFR0_EL1	3	0	0	1	0
>  Res0	63:32
>  UnsignedEnum	31:28	RAS
> 
> -- 
> 2.30.2
> 

-- 
Thanks,
Oliver

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 2/7] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
@ 2023-05-25 21:39     ` Oliver Upton
  0 siblings, 0 replies; 28+ messages in thread
From: Oliver Upton @ 2023-05-25 21:39 UTC (permalink / raw)
  To: Mark Brown
  Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
	Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm,
	Shaoqin Huang

On Tue, May 23, 2023 at 07:37:00PM +0100, Mark Brown wrote:
> Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
> No functional change.
> 
> Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>  arch/arm64/include/asm/sysreg.h |  1 -
>  arch/arm64/tools/sysreg         | 28 ++++++++++++++++++++++++++++
>  2 files changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 3d69bda0e608..95de1aaee0e9 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -135,7 +135,6 @@
>  #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>  
>  #define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
> -#define SYS_MDSCR_EL1			sys_reg(2, 0, 0, 2, 2)
>  #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
>  #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>  #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index df7a7ba97b43..601cc8024734 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -55,6 +55,34 @@ Field	29	TX
>  Res0	28:0
>  EndSysreg
>  
> +Sysreg	MDSCR_EL1	2	0	0	2	2
> +Res0	63:36
> +Field	35	EHBWE
> +Field	34	EnSPM
> +Field	33	TTA
> +Field	32	EMBWE
> +Field	31	TFO
> +Field	30	RXfull
> +Field	29	TXfull
> +Res0	28
> +Field	27	RXO
> +Field	26	TXU
> +Res0	25:24
> +Field	23:22	INTdis
> +Field	21	TDA
> +Res0	20
> +Field	19	SC2
> +Res0	18:16

These bits are actually RAZ/WI. I know that doesn't amount to much right
now, but eventually getting a mask of RAZ/WI bits for registers would be
helpful for KVM sysreg emulation.

> +Field	15	MDE
> +Field	14	HDE
> +Field	13	KDE
> +Field	12	TDCC
> +Res0	11:7
> +Field	6	ERR
> +Res0	5:1
> +Field	0	SS
> +EndSysreg
> +
>  Sysreg ID_PFR0_EL1	3	0	0	1	0
>  Res0	63:32
>  UnsignedEnum	31:28	RAS
> 
> -- 
> 2.30.2
> 

-- 
Thanks,
Oliver

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2 3/7] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:37   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown, Shaoqin Huang

Our standard scheme for naming the constants for bitfields in system
registers includes _ELx in the name but not the SYS_, update the
constants for OSL[AS]R_EL1 to follow this convention.

Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/kvm_host.h |  2 +-
 arch/arm64/include/asm/sysreg.h   | 10 +++++-----
 arch/arm64/kvm/sys_regs.c         | 10 +++++-----
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 7e7e19ef6993..e759e6b0cd02 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -1031,7 +1031,7 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
 void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
 
 #define kvm_vcpu_os_lock_enabled(vcpu)		\
-	(!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK))
+	(!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & OSLSR_EL1_OSLK))
 
 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
 			       struct kvm_device_attr *attr);
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 95de1aaee0e9..979975c8be2c 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -144,13 +144,13 @@
 #define SYS_MDRAR_EL1			sys_reg(2, 0, 1, 0, 0)
 
 #define SYS_OSLAR_EL1			sys_reg(2, 0, 1, 0, 4)
-#define SYS_OSLAR_OSLK			BIT(0)
+#define OSLAR_EL1_OSLK			BIT(0)
 
 #define SYS_OSLSR_EL1			sys_reg(2, 0, 1, 1, 4)
-#define SYS_OSLSR_OSLM_MASK		(BIT(3) | BIT(0))
-#define SYS_OSLSR_OSLM_NI		0
-#define SYS_OSLSR_OSLM_IMPLEMENTED	BIT(3)
-#define SYS_OSLSR_OSLK			BIT(1)
+#define OSLSR_EL1_OSLM_MASK		(BIT(3) | BIT(0))
+#define OSLSR_EL1_OSLM_NI		0
+#define OSLSR_EL1_OSLM_IMPLEMENTED	BIT(3)
+#define OSLSR_EL1_OSLK			BIT(1)
 
 #define SYS_OSDLR_EL1			sys_reg(2, 0, 1, 3, 4)
 #define SYS_DBGPRCR_EL1			sys_reg(2, 0, 1, 4, 4)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 71b12094d613..e834d8897843 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -388,9 +388,9 @@ static bool trap_oslar_el1(struct kvm_vcpu *vcpu,
 		return read_from_write_only(vcpu, p, r);
 
 	/* Forward the OSLK bit to OSLSR */
-	oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~SYS_OSLSR_OSLK;
-	if (p->regval & SYS_OSLAR_OSLK)
-		oslsr |= SYS_OSLSR_OSLK;
+	oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~OSLSR_EL1_OSLK;
+	if (p->regval & OSLAR_EL1_OSLK)
+		oslsr |= OSLSR_EL1_OSLK;
 
 	__vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr;
 	return true;
@@ -414,7 +414,7 @@ static int set_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 	 * The only modifiable bit is the OSLK bit. Refuse the write if
 	 * userspace attempts to change any other bit in the register.
 	 */
-	if ((val ^ rd->val) & ~SYS_OSLSR_OSLK)
+	if ((val ^ rd->val) & ~OSLSR_EL1_OSLK)
 		return -EINVAL;
 
 	__vcpu_sys_reg(vcpu, rd->reg) = val;
@@ -1781,7 +1781,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 	{ SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi },
 	{ SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 },
 	{ SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
-		SYS_OSLSR_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
+		OSLSR_EL1_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
 	{ SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi },
 	{ SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi },
 	{ SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi },

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 3/7] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
@ 2023-05-23 18:37   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown, Shaoqin Huang

Our standard scheme for naming the constants for bitfields in system
registers includes _ELx in the name but not the SYS_, update the
constants for OSL[AS]R_EL1 to follow this convention.

Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/kvm_host.h |  2 +-
 arch/arm64/include/asm/sysreg.h   | 10 +++++-----
 arch/arm64/kvm/sys_regs.c         | 10 +++++-----
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 7e7e19ef6993..e759e6b0cd02 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -1031,7 +1031,7 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
 void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
 
 #define kvm_vcpu_os_lock_enabled(vcpu)		\
-	(!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK))
+	(!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & OSLSR_EL1_OSLK))
 
 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
 			       struct kvm_device_attr *attr);
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 95de1aaee0e9..979975c8be2c 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -144,13 +144,13 @@
 #define SYS_MDRAR_EL1			sys_reg(2, 0, 1, 0, 0)
 
 #define SYS_OSLAR_EL1			sys_reg(2, 0, 1, 0, 4)
-#define SYS_OSLAR_OSLK			BIT(0)
+#define OSLAR_EL1_OSLK			BIT(0)
 
 #define SYS_OSLSR_EL1			sys_reg(2, 0, 1, 1, 4)
-#define SYS_OSLSR_OSLM_MASK		(BIT(3) | BIT(0))
-#define SYS_OSLSR_OSLM_NI		0
-#define SYS_OSLSR_OSLM_IMPLEMENTED	BIT(3)
-#define SYS_OSLSR_OSLK			BIT(1)
+#define OSLSR_EL1_OSLM_MASK		(BIT(3) | BIT(0))
+#define OSLSR_EL1_OSLM_NI		0
+#define OSLSR_EL1_OSLM_IMPLEMENTED	BIT(3)
+#define OSLSR_EL1_OSLK			BIT(1)
 
 #define SYS_OSDLR_EL1			sys_reg(2, 0, 1, 3, 4)
 #define SYS_DBGPRCR_EL1			sys_reg(2, 0, 1, 4, 4)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 71b12094d613..e834d8897843 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -388,9 +388,9 @@ static bool trap_oslar_el1(struct kvm_vcpu *vcpu,
 		return read_from_write_only(vcpu, p, r);
 
 	/* Forward the OSLK bit to OSLSR */
-	oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~SYS_OSLSR_OSLK;
-	if (p->regval & SYS_OSLAR_OSLK)
-		oslsr |= SYS_OSLSR_OSLK;
+	oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~OSLSR_EL1_OSLK;
+	if (p->regval & OSLAR_EL1_OSLK)
+		oslsr |= OSLSR_EL1_OSLK;
 
 	__vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr;
 	return true;
@@ -414,7 +414,7 @@ static int set_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 	 * The only modifiable bit is the OSLK bit. Refuse the write if
 	 * userspace attempts to change any other bit in the register.
 	 */
-	if ((val ^ rd->val) & ~SYS_OSLSR_OSLK)
+	if ((val ^ rd->val) & ~OSLSR_EL1_OSLK)
 		return -EINVAL;
 
 	__vcpu_sys_reg(vcpu, rd->reg) = val;
@@ -1781,7 +1781,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 	{ SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi },
 	{ SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 },
 	{ SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
-		SYS_OSLSR_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
+		OSLSR_EL1_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
 	{ SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi },
 	{ SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi },
 	{ SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi },

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 4/7] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:37   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown, Shaoqin Huang

Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
functional change.

Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 3 ---
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 979975c8be2c..1901b676d7c6 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -143,9 +143,6 @@
 #define SYS_DBGWCRn_EL1(n)		sys_reg(2, 0, 0, n, 7)
 #define SYS_MDRAR_EL1			sys_reg(2, 0, 1, 0, 0)
 
-#define SYS_OSLAR_EL1			sys_reg(2, 0, 1, 0, 4)
-#define OSLAR_EL1_OSLK			BIT(0)
-
 #define SYS_OSLSR_EL1			sys_reg(2, 0, 1, 1, 4)
 #define OSLSR_EL1_OSLM_MASK		(BIT(3) | BIT(0))
 #define OSLSR_EL1_OSLM_NI		0
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 601cc8024734..b0aefdf9ed34 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -83,6 +83,11 @@ Res0	5:1
 Field	0	SS
 EndSysreg
 
+Sysreg	OSLAR_EL1	2	0	1	0	4
+Res0	63:1
+Field	0	OSLK
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 4/7] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
@ 2023-05-23 18:37   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown, Shaoqin Huang

Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
functional change.

Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 3 ---
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 979975c8be2c..1901b676d7c6 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -143,9 +143,6 @@
 #define SYS_DBGWCRn_EL1(n)		sys_reg(2, 0, 0, n, 7)
 #define SYS_MDRAR_EL1			sys_reg(2, 0, 1, 0, 0)
 
-#define SYS_OSLAR_EL1			sys_reg(2, 0, 1, 0, 4)
-#define OSLAR_EL1_OSLK			BIT(0)
-
 #define SYS_OSLSR_EL1			sys_reg(2, 0, 1, 1, 4)
 #define OSLSR_EL1_OSLM_MASK		(BIT(3) | BIT(0))
 #define OSLSR_EL1_OSLM_NI		0
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 601cc8024734..b0aefdf9ed34 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -83,6 +83,11 @@ Res0	5:1
 Field	0	SS
 EndSysreg
 
+Sysreg	OSLAR_EL1	2	0	1	0	4
+Res0	63:1
+Field	0	OSLK
+EndSysreg
+
 Sysreg ID_PFR0_EL1	3	0	0	1	0
 Res0	63:32
 UnsignedEnum	31:28	RAS

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:37   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown

Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1901b676d7c6..da954a6eba24 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
 #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index b0aefdf9ed34..e4653248dcac 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -48,6 +48,11 @@
 # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
 # item ACCDATA) though it may be more taseful to do something else.
 
+Sysreg	OSDTRRX_EL1	2	0	0	0	2
+Res0	63:32
+Field	31:0	DTRRX
+EndSysreg
+
 Sysreg	MDCCINT_EL1	2	0	0	2	0
 Res0	63:31
 Field	30	RX

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
@ 2023-05-23 18:37   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown

Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1901b676d7c6..da954a6eba24 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
 #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index b0aefdf9ed34..e4653248dcac 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -48,6 +48,11 @@
 # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
 # item ACCDATA) though it may be more taseful to do something else.
 
+Sysreg	OSDTRRX_EL1	2	0	0	0	2
+Res0	63:32
+Field	31:0	DTRRX
+EndSysreg
+
 Sysreg	MDCCINT_EL1	2	0	0	2	0
 Res0	63:31
 Field	30	RX

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
  2023-05-23 18:37   ` Mark Brown
@ 2023-05-30 10:55     ` Shaoqin Huang
  -1 siblings, 0 replies; 28+ messages in thread
From: Shaoqin Huang @ 2023-05-30 10:55 UTC (permalink / raw)
  To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
	Oliver Upton, James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm



On 5/24/23 02:37, Mark Brown wrote:
> Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no
> functional changes.
> 
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 1 -
>   arch/arm64/tools/sysreg         | 5 +++++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 1901b676d7c6..da954a6eba24 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
>   #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>   #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>   
> -#define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
>   #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
>   #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>   #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index b0aefdf9ed34..e4653248dcac 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -48,6 +48,11 @@
>   # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
>   # item ACCDATA) though it may be more taseful to do something else.
>   
> +Sysreg	OSDTRRX_EL1	2	0	0	0	2
> +Res0	63:32
> +Field	31:0	DTRRX
> +EndSysreg
> +
>   Sysreg	MDCCINT_EL1	2	0	0	2	0
>   Res0	63:31
>   Field	30	RX
> 

-- 
Shaoqin


^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
@ 2023-05-30 10:55     ` Shaoqin Huang
  0 siblings, 0 replies; 28+ messages in thread
From: Shaoqin Huang @ 2023-05-30 10:55 UTC (permalink / raw)
  To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
	Oliver Upton, James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm



On 5/24/23 02:37, Mark Brown wrote:
> Convert OSDTRRX_EL1 to automatic generation as per DDI0601 2023-03, no
> functional changes.
> 
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 1 -
>   arch/arm64/tools/sysreg         | 5 +++++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 1901b676d7c6..da954a6eba24 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
>   #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>   #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>   
> -#define SYS_OSDTRRX_EL1			sys_reg(2, 0, 0, 0, 2)
>   #define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
>   #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>   #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index b0aefdf9ed34..e4653248dcac 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -48,6 +48,11 @@
>   # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
>   # item ACCDATA) though it may be more taseful to do something else.
>   
> +Sysreg	OSDTRRX_EL1	2	0	0	0	2
> +Res0	63:32
> +Field	31:0	DTRRX
> +EndSysreg
> +
>   Sysreg	MDCCINT_EL1	2	0	0	2	0
>   Res0	63:31
>   Field	30	RX
> 

-- 
Shaoqin


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:37   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown

Convert OSDTRTX_EL1 to automatic generation as per DDI0601 2023-03. No
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index da954a6eba24..d9711f1e47b2 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
 #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index e4653248dcac..e18ae1df41f4 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -88,6 +88,11 @@ Res0	5:1
 Field	0	SS
 EndSysreg
 
+Sysreg	OSDTRTX_EL1	2	0	0	3	2
+Res0	63:32
+Field	31:0	DTRTX
+EndSysreg
+
 Sysreg	OSLAR_EL1	2	0	1	0	4
 Res0	63:1
 Field	0	OSLK

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
@ 2023-05-23 18:37   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown

Convert OSDTRTX_EL1 to automatic generation as per DDI0601 2023-03. No
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index da954a6eba24..d9711f1e47b2 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
 #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
 #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index e4653248dcac..e18ae1df41f4 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -88,6 +88,11 @@ Res0	5:1
 Field	0	SS
 EndSysreg
 
+Sysreg	OSDTRTX_EL1	2	0	0	3	2
+Res0	63:32
+Field	31:0	DTRTX
+EndSysreg
+
 Sysreg	OSLAR_EL1	2	0	1	0	4
 Res0	63:1
 Field	0	OSLK

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
  2023-05-23 18:37   ` Mark Brown
@ 2023-05-30 10:55     ` Shaoqin Huang
  -1 siblings, 0 replies; 28+ messages in thread
From: Shaoqin Huang @ 2023-05-30 10:55 UTC (permalink / raw)
  To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
	Oliver Upton, James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm



On 5/24/23 02:37, Mark Brown wrote:
> Convert OSDTRTX_EL1 to automatic generation as per DDI0601 2023-03. No
> functional changes.
> 
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 1 -
>   arch/arm64/tools/sysreg         | 5 +++++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index da954a6eba24..d9711f1e47b2 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
>   #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>   #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>   
> -#define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
>   #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>   #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
>   #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index e4653248dcac..e18ae1df41f4 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -88,6 +88,11 @@ Res0	5:1
>   Field	0	SS
>   EndSysreg
>   
> +Sysreg	OSDTRTX_EL1	2	0	0	3	2
> +Res0	63:32
> +Field	31:0	DTRTX
> +EndSysreg
> +
>   Sysreg	OSLAR_EL1	2	0	1	0	4
>   Res0	63:1
>   Field	0	OSLK
> 

-- 
Shaoqin


^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
@ 2023-05-30 10:55     ` Shaoqin Huang
  0 siblings, 0 replies; 28+ messages in thread
From: Shaoqin Huang @ 2023-05-30 10:55 UTC (permalink / raw)
  To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
	Oliver Upton, James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm



On 5/24/23 02:37, Mark Brown wrote:
> Convert OSDTRTX_EL1 to automatic generation as per DDI0601 2023-03. No
> functional changes.
> 
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 1 -
>   arch/arm64/tools/sysreg         | 5 +++++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index da954a6eba24..d9711f1e47b2 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
>   #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>   #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>   
> -#define SYS_OSDTRTX_EL1			sys_reg(2, 0, 0, 3, 2)
>   #define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>   #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
>   #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index e4653248dcac..e18ae1df41f4 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -88,6 +88,11 @@ Res0	5:1
>   Field	0	SS
>   EndSysreg
>   
> +Sysreg	OSDTRTX_EL1	2	0	0	3	2
> +Res0	63:32
> +Field	31:0	DTRTX
> +EndSysreg
> +
>   Sysreg	OSLAR_EL1	2	0	1	0	4
>   Res0	63:1
>   Field	0	OSLK
> 

-- 
Shaoqin


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2 7/7] arm64/sysreg: Convert OSECCR_EL1 to automatic generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-23 18:37   ` Mark Brown
  -1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown

Convert OSECCR_EL1 to automatic generation as per DDI0601 2023-03, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index d9711f1e47b2..23a17da500a4 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
 #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
 #define SYS_DBGWVRn_EL1(n)		sys_reg(2, 0, 0, n, 6)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index e18ae1df41f4..41462785020b 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,11 @@ Res0	63:32
 Field	31:0	DTRTX
 EndSysreg
 
+Sysreg	OSECCR_EL1	2	0	0	6	2
+Res0	63:32
+Field	31:0	EDECCR
+EndSysreg
+
 Sysreg	OSLAR_EL1	2	0	1	0	4
 Res0	63:1
 Field	0	OSLK

-- 
2.30.2


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v2 7/7] arm64/sysreg: Convert OSECCR_EL1 to automatic generation
@ 2023-05-23 18:37   ` Mark Brown
  0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2023-05-23 18:37 UTC (permalink / raw)
  To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
	James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown

Convert OSECCR_EL1 to automatic generation as per DDI0601 2023-03, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 1 -
 arch/arm64/tools/sysreg         | 5 +++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index d9711f1e47b2..23a17da500a4 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
 #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
 #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
 
-#define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
 #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
 #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
 #define SYS_DBGWVRn_EL1(n)		sys_reg(2, 0, 0, n, 6)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index e18ae1df41f4..41462785020b 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,11 @@ Res0	63:32
 Field	31:0	DTRTX
 EndSysreg
 
+Sysreg	OSECCR_EL1	2	0	0	6	2
+Res0	63:32
+Field	31:0	EDECCR
+EndSysreg
+
 Sysreg	OSLAR_EL1	2	0	1	0	4
 Res0	63:1
 Field	0	OSLK

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 7/7] arm64/sysreg: Convert OSECCR_EL1 to automatic generation
  2023-05-23 18:37   ` Mark Brown
@ 2023-05-30 10:55     ` Shaoqin Huang
  -1 siblings, 0 replies; 28+ messages in thread
From: Shaoqin Huang @ 2023-05-30 10:55 UTC (permalink / raw)
  To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
	Oliver Upton, James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm



On 5/24/23 02:37, Mark Brown wrote:
> Convert OSECCR_EL1 to automatic generation as per DDI0601 2023-03, no
> functional changes.
> 
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 1 -
>   arch/arm64/tools/sysreg         | 5 +++++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index d9711f1e47b2..23a17da500a4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
>   #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>   #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>   
> -#define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>   #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
>   #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
>   #define SYS_DBGWVRn_EL1(n)		sys_reg(2, 0, 0, n, 6)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index e18ae1df41f4..41462785020b 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -93,6 +93,11 @@ Res0	63:32
>   Field	31:0	DTRTX
>   EndSysreg
>   
> +Sysreg	OSECCR_EL1	2	0	0	6	2
> +Res0	63:32
> +Field	31:0	EDECCR
> +EndSysreg
> +
>   Sysreg	OSLAR_EL1	2	0	1	0	4
>   Res0	63:1
>   Field	0	OSLK
> 

-- 
Shaoqin


^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 7/7] arm64/sysreg: Convert OSECCR_EL1 to automatic generation
@ 2023-05-30 10:55     ` Shaoqin Huang
  0 siblings, 0 replies; 28+ messages in thread
From: Shaoqin Huang @ 2023-05-30 10:55 UTC (permalink / raw)
  To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
	Oliver Upton, James Morse, Suzuki K Poulose
  Cc: linux-arm-kernel, linux-kernel, kvmarm



On 5/24/23 02:37, Mark Brown wrote:
> Convert OSECCR_EL1 to automatic generation as per DDI0601 2023-03, no
> functional changes.
> 
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
>   arch/arm64/include/asm/sysreg.h | 1 -
>   arch/arm64/tools/sysreg         | 5 +++++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index d9711f1e47b2..23a17da500a4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
>   #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>   #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)
>   
> -#define SYS_OSECCR_EL1			sys_reg(2, 0, 0, 6, 2)
>   #define SYS_DBGBVRn_EL1(n)		sys_reg(2, 0, 0, n, 4)
>   #define SYS_DBGBCRn_EL1(n)		sys_reg(2, 0, 0, n, 5)
>   #define SYS_DBGWVRn_EL1(n)		sys_reg(2, 0, 0, n, 6)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index e18ae1df41f4..41462785020b 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -93,6 +93,11 @@ Res0	63:32
>   Field	31:0	DTRTX
>   EndSysreg
>   
> +Sysreg	OSECCR_EL1	2	0	0	6	2
> +Res0	63:32
> +Field	31:0	EDECCR
> +EndSysreg
> +
>   Sysreg	OSLAR_EL1	2	0	1	0	4
>   Res0	63:1
>   Field	0	OSLK
> 

-- 
Shaoqin


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-05-25 21:41   ` Oliver Upton
  -1 siblings, 0 replies; 28+ messages in thread
From: Oliver Upton @ 2023-05-25 21:41 UTC (permalink / raw)
  To: Mark Brown
  Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
	Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm,
	Anshuman Khandual, Shaoqin Huang

On Tue, May 23, 2023 at 07:36:58PM +0100, Mark Brown wrote:
> Continue working through the register defintions, converting them to
> automatic generation.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> Changes in v2:
> - Also convert OSECCR_EL1, OSDTRRX_EL1 and OSDTRTX_EL1 instead of
>   dropping them.
> - Link to v1: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v1-0-936cd769cb9e@kernel.org
> 
> ---
> Mark Brown (7):
>       arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
>       arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
>       arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
>       arm64/sysreg: Convert OSLAR_EL1 to automatic generation
>       arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
>       arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
>       arm64/sysreg: Convert OSECCR_EL1 to automatic generation

Besides the one comment I had:

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

I imagine these will go through the arm64 tree right? The KVM diff is
miniscule.

-- 
Thanks,
Oliver

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation
@ 2023-05-25 21:41   ` Oliver Upton
  0 siblings, 0 replies; 28+ messages in thread
From: Oliver Upton @ 2023-05-25 21:41 UTC (permalink / raw)
  To: Mark Brown
  Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
	Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm,
	Anshuman Khandual, Shaoqin Huang

On Tue, May 23, 2023 at 07:36:58PM +0100, Mark Brown wrote:
> Continue working through the register defintions, converting them to
> automatic generation.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> Changes in v2:
> - Also convert OSECCR_EL1, OSDTRRX_EL1 and OSDTRTX_EL1 instead of
>   dropping them.
> - Link to v1: https://lore.kernel.org/r/20230419-arm64-syreg-gen-v1-0-936cd769cb9e@kernel.org
> 
> ---
> Mark Brown (7):
>       arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
>       arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
>       arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
>       arm64/sysreg: Convert OSLAR_EL1 to automatic generation
>       arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
>       arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
>       arm64/sysreg: Convert OSECCR_EL1 to automatic generation

Besides the one comment I had:

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

I imagine these will go through the arm64 tree right? The KVM diff is
miniscule.

-- 
Thanks,
Oliver

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation
  2023-05-23 18:36 ` Mark Brown
@ 2023-06-06 17:30   ` Catalin Marinas
  -1 siblings, 0 replies; 28+ messages in thread
From: Catalin Marinas @ 2023-06-06 17:30 UTC (permalink / raw)
  To: Will Deacon, Marc Zyngier, Oliver Upton, James Morse,
	Suzuki K Poulose, Mark Brown
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Anshuman Khandual,
	Shaoqin Huang

On Tue, 23 May 2023 19:36:58 +0100, Mark Brown wrote:
> Continue working through the register defintions, converting them to
> automatic generation.
> 
> 

Applied to arm64 (for-next/sysreg), thanks!

[1/7] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
      https://git.kernel.org/arm64/c/3def3387f755
[2/7] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
      https://git.kernel.org/arm64/c/103b88427bc5
[3/7] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
      https://git.kernel.org/arm64/c/187de7c2aad8
[4/7] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
      https://git.kernel.org/arm64/c/31d504fce595
[5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
      https://git.kernel.org/arm64/c/7b416a162229
[6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
      https://git.kernel.org/arm64/c/42383388758a
[7/7] arm64/sysreg: Convert OSECCR_EL1 to automatic generation
      https://git.kernel.org/arm64/c/175cea665877

-- 
Catalin


^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation
@ 2023-06-06 17:30   ` Catalin Marinas
  0 siblings, 0 replies; 28+ messages in thread
From: Catalin Marinas @ 2023-06-06 17:30 UTC (permalink / raw)
  To: Will Deacon, Marc Zyngier, Oliver Upton, James Morse,
	Suzuki K Poulose, Mark Brown
  Cc: linux-arm-kernel, linux-kernel, kvmarm, Anshuman Khandual,
	Shaoqin Huang

On Tue, 23 May 2023 19:36:58 +0100, Mark Brown wrote:
> Continue working through the register defintions, converting them to
> automatic generation.
> 
> 

Applied to arm64 (for-next/sysreg), thanks!

[1/7] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
      https://git.kernel.org/arm64/c/3def3387f755
[2/7] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
      https://git.kernel.org/arm64/c/103b88427bc5
[3/7] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
      https://git.kernel.org/arm64/c/187de7c2aad8
[4/7] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
      https://git.kernel.org/arm64/c/31d504fce595
[5/7] arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
      https://git.kernel.org/arm64/c/7b416a162229
[6/7] arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
      https://git.kernel.org/arm64/c/42383388758a
[7/7] arm64/sysreg: Convert OSECCR_EL1 to automatic generation
      https://git.kernel.org/arm64/c/175cea665877

-- 
Catalin


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 28+ messages in thread

end of thread, other threads:[~2023-06-06 17:31 UTC | newest]

Thread overview: 28+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-05-23 18:36 [PATCH v2 0/7] arm64/sysreg: More conversions to automatic generation Mark Brown
2023-05-23 18:36 ` Mark Brown
2023-05-23 18:36 ` [PATCH v2 1/7] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
2023-05-23 18:36   ` Mark Brown
2023-05-23 18:37 ` [PATCH v2 2/7] arm64/sysreg: Convert MDSCR_EL1 " Mark Brown
2023-05-23 18:37   ` Mark Brown
2023-05-25 21:39   ` Oliver Upton
2023-05-25 21:39     ` Oliver Upton
2023-05-23 18:37 ` [PATCH v2 3/7] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1 Mark Brown
2023-05-23 18:37   ` Mark Brown
2023-05-23 18:37 ` [PATCH v2 4/7] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
2023-05-23 18:37   ` Mark Brown
2023-05-23 18:37 ` [PATCH v2 5/7] arm64/sysreg: Convert OSDTRRX_EL1 " Mark Brown
2023-05-23 18:37   ` Mark Brown
2023-05-30 10:55   ` Shaoqin Huang
2023-05-30 10:55     ` Shaoqin Huang
2023-05-23 18:37 ` [PATCH v2 6/7] arm64/sysreg: Convert OSDTRTX_EL1 " Mark Brown
2023-05-23 18:37   ` Mark Brown
2023-05-30 10:55   ` Shaoqin Huang
2023-05-30 10:55     ` Shaoqin Huang
2023-05-23 18:37 ` [PATCH v2 7/7] arm64/sysreg: Convert OSECCR_EL1 " Mark Brown
2023-05-23 18:37   ` Mark Brown
2023-05-30 10:55   ` Shaoqin Huang
2023-05-30 10:55     ` Shaoqin Huang
2023-05-25 21:41 ` [PATCH v2 0/7] arm64/sysreg: More conversions " Oliver Upton
2023-05-25 21:41   ` Oliver Upton
2023-06-06 17:30 ` Catalin Marinas
2023-06-06 17:30   ` Catalin Marinas

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