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From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: reset: Add binding for Sophgo CV1800B reset controller
Date: Mon, 13 Nov 2023 22:00:17 +0800	[thread overview]
Message-ID: <ZVIr8VH+29lpSpxb@xhacker> (raw)
In-Reply-To: <20231113-washable-elbow-629bf42b9be1@squawk>

On Mon, Nov 13, 2023 at 01:36:54PM +0000, Conor Dooley wrote:
> On Mon, Nov 13, 2023 at 08:55:00AM +0800, Jisheng Zhang wrote:
> > Add devicetree binding for Sophgo CV1800B SoC reset controller.
> > 
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> 
> With the unterminated ifndef that was pointed out by the robots fixed,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> > +/*				0-1	*/
> > +/*				10	*/
> > +/*				13	*/
> > +/*				15	*/
> > +/*				17	*/
> > +/*				36-39	*/
> > +/*				53-57	*/
> > +/*				59-60	*/
> > +/*				63-73	*/
> > +/*				90	*/
> > +/*				94	*/
> > +/*				102-292	*/
> 
> There are quite a lot of gaps here, do you know why that is?

The tail bits are for cpusys, so I guess the SoC designer want to
seperate them with guard? I'm not sure.

> 
> Thanks,
> Conor.



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WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: reset: Add binding for Sophgo CV1800B reset controller
Date: Mon, 13 Nov 2023 22:00:17 +0800	[thread overview]
Message-ID: <ZVIr8VH+29lpSpxb@xhacker> (raw)
In-Reply-To: <20231113-washable-elbow-629bf42b9be1@squawk>

On Mon, Nov 13, 2023 at 01:36:54PM +0000, Conor Dooley wrote:
> On Mon, Nov 13, 2023 at 08:55:00AM +0800, Jisheng Zhang wrote:
> > Add devicetree binding for Sophgo CV1800B SoC reset controller.
> > 
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> 
> With the unterminated ifndef that was pointed out by the robots fixed,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> > +/*				0-1	*/
> > +/*				10	*/
> > +/*				13	*/
> > +/*				15	*/
> > +/*				17	*/
> > +/*				36-39	*/
> > +/*				53-57	*/
> > +/*				59-60	*/
> > +/*				63-73	*/
> > +/*				90	*/
> > +/*				94	*/
> > +/*				102-292	*/
> 
> There are quite a lot of gaps here, do you know why that is?

The tail bits are for cpusys, so I guess the SoC designer want to
seperate them with guard? I'm not sure.

> 
> Thanks,
> Conor.



  reply	other threads:[~2023-11-13 14:12 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-13  0:54 [PATCH 0/4] riscv: sophgo: add reset support for cv1800b Jisheng Zhang
2023-11-13  0:54 ` Jisheng Zhang
2023-11-13  0:55 ` [PATCH 1/4] dt-bindings: reset: Add binding for Sophgo CV1800B reset controller Jisheng Zhang
2023-11-13  0:55   ` Jisheng Zhang
2023-11-13 13:36   ` Conor Dooley
2023-11-13 13:36     ` Conor Dooley
2023-11-13 14:00     ` Jisheng Zhang [this message]
2023-11-13 14:00       ` Jisheng Zhang
2023-11-14 21:13       ` Krzysztof Kozlowski
2023-11-14 21:13         ` Krzysztof Kozlowski
2023-11-14 21:12   ` Krzysztof Kozlowski
2023-11-14 21:12     ` Krzysztof Kozlowski
2023-11-15 13:27     ` Jisheng Zhang
2023-11-15 13:27       ` Jisheng Zhang
2023-11-15 14:56       ` Samuel Holland
2023-11-15 14:56         ` Samuel Holland
2023-11-15 15:02         ` Conor Dooley
2023-11-15 15:02           ` Conor Dooley
2023-11-15 15:15           ` Jisheng Zhang
2023-11-15 15:15             ` Jisheng Zhang
2023-11-15 21:00             ` Krzysztof Kozlowski
2023-11-15 21:00               ` Krzysztof Kozlowski
2023-11-13  0:55 ` [PATCH 2/4] reset: Add reset controller support for Sophgo CV1800B SoC Jisheng Zhang
2023-11-13  0:55   ` Jisheng Zhang
2023-11-13  0:55 ` [PATCH 3/4] riscv: dts: sophgo: add reset dt node for cv1800b Jisheng Zhang
2023-11-13  0:55   ` Jisheng Zhang
2023-11-13 14:32   ` Yixun Lan
2023-11-13 14:32     ` Yixun Lan
2023-11-13 15:14     ` Jisheng Zhang
2023-11-13 15:14       ` Jisheng Zhang
2023-11-13 15:37       ` Samuel Holland
2023-11-13 15:37         ` Samuel Holland
2023-11-14 14:55         ` Jisheng Zhang
2023-11-14 14:55           ` Jisheng Zhang
2023-11-13  0:55 ` [PATCH 4/4] riscv: dts: sophgo: add reset phandle to all uart nodes Jisheng Zhang
2023-11-13  0:55   ` Jisheng Zhang
2023-11-13  2:04   ` Samuel Holland
2023-11-13  2:04     ` Samuel Holland
2023-11-13 13:09     ` Jisheng Zhang
2023-11-13 13:09       ` Jisheng Zhang
2023-11-13  4:57   ` kernel test robot
2023-11-13  4:57     ` kernel test robot

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