From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
linux-arm-kernel@lists.infradead.org,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Moritz Fischer <mdf@kernel.org>,
Moritz Fischer <moritzf@google.com>,
Michael Shavit <mshavit@google.com>,
Nicolin Chen <nicolinc@nvidia.com>,
patches@lists.linux.dev,
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v4 05/16] iommu/arm-smmu-v3: Build the whole STE in arm_smmu_make_s2_domain_ste()
Date: Thu, 1 Feb 2024 11:34:25 +0000 [thread overview]
Message-ID: <ZbuBwSvDEowh4vjr@google.com> (raw)
In-Reply-To: <5-v4-c93b774edcc4+42d2b-smmuv3_newapi_p1_jgg@nvidia.com>
Hi Jason,
On Thu, Jan 25, 2024 at 07:57:15PM -0400, Jason Gunthorpe wrote:
> Half the code was living in arm_smmu_domain_finalise_s2(), just move it
> here and take the values directly from the pgtbl_ops instead of storing
> copies.
>
> Reviewed-by: Michael Shavit <mshavit@google.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Tested-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Moritz Fischer <moritzf@google.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 27 ++++++++++++---------
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 --
> 2 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 910156881423e0..9a95d0f1494223 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -1552,6 +1552,11 @@ static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> struct arm_smmu_domain *smmu_domain)
> {
> struct arm_smmu_s2_cfg *s2_cfg = &smmu_domain->s2_cfg;
> + const struct io_pgtable_cfg *pgtbl_cfg =
> + &io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops)->cfg;
> + typeof(&pgtbl_cfg->arm_lpae_s2_cfg.vtcr) vtcr =
> + &pgtbl_cfg->arm_lpae_s2_cfg.vtcr;
> + u64 vtcr_val;
>
> memset(target, 0, sizeof(*target));
> target->data[0] = cpu_to_le64(
> @@ -1562,9 +1567,16 @@ static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> FIELD_PREP(STRTAB_STE_1_EATS,
> master->ats_enabled ? STRTAB_STE_1_EATS_TRANS : 0));
>
> + vtcr_val = FIELD_PREP(STRTAB_STE_2_VTCR_S2T0SZ, vtcr->tsz) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2SL0, vtcr->sl) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2IR0, vtcr->irgn) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2OR0, vtcr->orgn) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2SH0, vtcr->sh) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2TG, vtcr->tg) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2PS, vtcr->ps);
> target->data[2] = cpu_to_le64(
> FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) |
> - FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) |
> + FIELD_PREP(STRTAB_STE_2_VTCR, vtcr_val) |
> STRTAB_STE_2_S2AA64 |
> #ifdef __BIG_ENDIAN
> STRTAB_STE_2_S2ENDI |
> @@ -1572,7 +1584,8 @@ static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> STRTAB_STE_2_S2PTW |
> STRTAB_STE_2_S2R);
>
> - target->data[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK);
> + target->data[3] = cpu_to_le64(pgtbl_cfg->arm_lpae_s2_cfg.vttbr &
> + STRTAB_STE_3_S2TTB_MASK);
> }
>
> static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
> @@ -2328,7 +2341,6 @@ static int arm_smmu_domain_finalise_s2(struct arm_smmu_domain *smmu_domain,
> int vmid;
> struct arm_smmu_device *smmu = smmu_domain->smmu;
> struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg;
> - typeof(&pgtbl_cfg->arm_lpae_s2_cfg.vtcr) vtcr;
>
> /* Reserve VMID 0 for stage-2 bypass STEs */
> vmid = ida_alloc_range(&smmu->vmid_map, 1, (1 << smmu->vmid_bits) - 1,
> @@ -2336,16 +2348,7 @@ static int arm_smmu_domain_finalise_s2(struct arm_smmu_domain *smmu_domain,
> if (vmid < 0)
> return vmid;
>
> - vtcr = &pgtbl_cfg->arm_lpae_s2_cfg.vtcr;
> cfg->vmid = (u16)vmid;
> - cfg->vttbr = pgtbl_cfg->arm_lpae_s2_cfg.vttbr;
> - cfg->vtcr = FIELD_PREP(STRTAB_STE_2_VTCR_S2T0SZ, vtcr->tsz) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2SL0, vtcr->sl) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2IR0, vtcr->irgn) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2OR0, vtcr->orgn) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2SH0, vtcr->sh) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2TG, vtcr->tg) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2PS, vtcr->ps);
> return 0;
> }
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 65fb388d51734d..eb669121f1954d 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -609,8 +609,6 @@ struct arm_smmu_ctx_desc_cfg {
>
> struct arm_smmu_s2_cfg {
> u16 vmid;
> - u64 vttbr;
> - u64 vtcr;
> };
>
> struct arm_smmu_strtab_cfg {
> --
> 2.43.0
>
Reviewed-by: Mostafa Saleh <smostafa@google.com>
Thanks,
Mostafa
WARNING: multiple messages have this Message-ID (diff)
From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
linux-arm-kernel@lists.infradead.org,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Moritz Fischer <mdf@kernel.org>,
Moritz Fischer <moritzf@google.com>,
Michael Shavit <mshavit@google.com>,
Nicolin Chen <nicolinc@nvidia.com>,
patches@lists.linux.dev,
Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v4 05/16] iommu/arm-smmu-v3: Build the whole STE in arm_smmu_make_s2_domain_ste()
Date: Thu, 1 Feb 2024 11:34:25 +0000 [thread overview]
Message-ID: <ZbuBwSvDEowh4vjr@google.com> (raw)
In-Reply-To: <5-v4-c93b774edcc4+42d2b-smmuv3_newapi_p1_jgg@nvidia.com>
Hi Jason,
On Thu, Jan 25, 2024 at 07:57:15PM -0400, Jason Gunthorpe wrote:
> Half the code was living in arm_smmu_domain_finalise_s2(), just move it
> here and take the values directly from the pgtbl_ops instead of storing
> copies.
>
> Reviewed-by: Michael Shavit <mshavit@google.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Tested-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Moritz Fischer <moritzf@google.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 27 ++++++++++++---------
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 --
> 2 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 910156881423e0..9a95d0f1494223 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -1552,6 +1552,11 @@ static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> struct arm_smmu_domain *smmu_domain)
> {
> struct arm_smmu_s2_cfg *s2_cfg = &smmu_domain->s2_cfg;
> + const struct io_pgtable_cfg *pgtbl_cfg =
> + &io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops)->cfg;
> + typeof(&pgtbl_cfg->arm_lpae_s2_cfg.vtcr) vtcr =
> + &pgtbl_cfg->arm_lpae_s2_cfg.vtcr;
> + u64 vtcr_val;
>
> memset(target, 0, sizeof(*target));
> target->data[0] = cpu_to_le64(
> @@ -1562,9 +1567,16 @@ static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> FIELD_PREP(STRTAB_STE_1_EATS,
> master->ats_enabled ? STRTAB_STE_1_EATS_TRANS : 0));
>
> + vtcr_val = FIELD_PREP(STRTAB_STE_2_VTCR_S2T0SZ, vtcr->tsz) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2SL0, vtcr->sl) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2IR0, vtcr->irgn) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2OR0, vtcr->orgn) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2SH0, vtcr->sh) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2TG, vtcr->tg) |
> + FIELD_PREP(STRTAB_STE_2_VTCR_S2PS, vtcr->ps);
> target->data[2] = cpu_to_le64(
> FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) |
> - FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) |
> + FIELD_PREP(STRTAB_STE_2_VTCR, vtcr_val) |
> STRTAB_STE_2_S2AA64 |
> #ifdef __BIG_ENDIAN
> STRTAB_STE_2_S2ENDI |
> @@ -1572,7 +1584,8 @@ static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target,
> STRTAB_STE_2_S2PTW |
> STRTAB_STE_2_S2R);
>
> - target->data[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK);
> + target->data[3] = cpu_to_le64(pgtbl_cfg->arm_lpae_s2_cfg.vttbr &
> + STRTAB_STE_3_S2TTB_MASK);
> }
>
> static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
> @@ -2328,7 +2341,6 @@ static int arm_smmu_domain_finalise_s2(struct arm_smmu_domain *smmu_domain,
> int vmid;
> struct arm_smmu_device *smmu = smmu_domain->smmu;
> struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg;
> - typeof(&pgtbl_cfg->arm_lpae_s2_cfg.vtcr) vtcr;
>
> /* Reserve VMID 0 for stage-2 bypass STEs */
> vmid = ida_alloc_range(&smmu->vmid_map, 1, (1 << smmu->vmid_bits) - 1,
> @@ -2336,16 +2348,7 @@ static int arm_smmu_domain_finalise_s2(struct arm_smmu_domain *smmu_domain,
> if (vmid < 0)
> return vmid;
>
> - vtcr = &pgtbl_cfg->arm_lpae_s2_cfg.vtcr;
> cfg->vmid = (u16)vmid;
> - cfg->vttbr = pgtbl_cfg->arm_lpae_s2_cfg.vttbr;
> - cfg->vtcr = FIELD_PREP(STRTAB_STE_2_VTCR_S2T0SZ, vtcr->tsz) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2SL0, vtcr->sl) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2IR0, vtcr->irgn) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2OR0, vtcr->orgn) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2SH0, vtcr->sh) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2TG, vtcr->tg) |
> - FIELD_PREP(STRTAB_STE_2_VTCR_S2PS, vtcr->ps);
> return 0;
> }
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index 65fb388d51734d..eb669121f1954d 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -609,8 +609,6 @@ struct arm_smmu_ctx_desc_cfg {
>
> struct arm_smmu_s2_cfg {
> u16 vmid;
> - u64 vttbr;
> - u64 vtcr;
> };
>
> struct arm_smmu_strtab_cfg {
> --
> 2.43.0
>
Reviewed-by: Mostafa Saleh <smostafa@google.com>
Thanks,
Mostafa
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next prev parent reply other threads:[~2024-02-01 11:34 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-25 23:57 [PATCH v4 00/16] Update SMMUv3 to the modern iommu API (part 1/3) Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 01/16] iommu/arm-smmu-v3: Make STE programming independent of the callers Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-26 4:03 ` Michael Shavit
2024-01-26 4:03 ` Michael Shavit
2024-01-29 19:53 ` Moritz Fischer
2024-01-29 19:53 ` Moritz Fischer
2024-01-30 22:42 ` Mostafa Saleh
2024-01-30 22:42 ` Mostafa Saleh
2024-01-30 23:56 ` Jason Gunthorpe
2024-01-30 23:56 ` Jason Gunthorpe
2024-01-31 14:34 ` Mostafa Saleh
2024-01-31 14:34 ` Mostafa Saleh
2024-01-31 14:40 ` Jason Gunthorpe
2024-01-31 14:40 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 02/16] iommu/arm-smmu-v3: Consolidate the STE generation for abort/bypass Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-31 14:40 ` Mostafa Saleh
2024-01-31 14:40 ` Mostafa Saleh
2024-01-31 14:47 ` Jason Gunthorpe
2024-01-31 14:47 ` Jason Gunthorpe
2024-02-01 11:32 ` Mostafa Saleh
2024-02-01 11:32 ` Mostafa Saleh
2024-02-01 13:02 ` Jason Gunthorpe
2024-02-01 13:02 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 03/16] iommu/arm-smmu-v3: Move arm_smmu_rmr_install_bypass_ste() Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-29 15:07 ` Shameerali Kolothum Thodi
2024-01-29 15:07 ` Shameerali Kolothum Thodi
2024-01-29 15:43 ` Jason Gunthorpe
2024-01-29 15:43 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 04/16] iommu/arm-smmu-v3: Move the STE generation for S1 and S2 domains into functions Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-31 14:50 ` Mostafa Saleh
2024-01-31 14:50 ` Mostafa Saleh
2024-01-31 15:05 ` Jason Gunthorpe
2024-01-31 15:05 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 05/16] iommu/arm-smmu-v3: Build the whole STE in arm_smmu_make_s2_domain_ste() Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-02-01 11:34 ` Mostafa Saleh [this message]
2024-02-01 11:34 ` Mostafa Saleh
2024-01-25 23:57 ` [PATCH v4 06/16] iommu/arm-smmu-v3: Hold arm_smmu_asid_lock during all of attach_dev Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-02-01 12:15 ` Mostafa Saleh
2024-02-01 12:15 ` Mostafa Saleh
2024-02-01 13:24 ` Jason Gunthorpe
2024-02-01 13:24 ` Jason Gunthorpe
2024-02-13 13:30 ` Mostafa Saleh
2024-02-13 13:30 ` Mostafa Saleh
2024-01-25 23:57 ` [PATCH v4 07/16] iommu/arm-smmu-v3: Compute the STE only once for each master Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-02-01 12:18 ` Mostafa Saleh
2024-02-01 12:18 ` Mostafa Saleh
2024-01-25 23:57 ` [PATCH v4 08/16] iommu/arm-smmu-v3: Do not change the STE twice during arm_smmu_attach_dev() Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 09/16] iommu/arm-smmu-v3: Put writing the context descriptor in the right order Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 10/16] iommu/arm-smmu-v3: Pass smmu_domain to arm_enable/disable_ats() Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 11/16] iommu/arm-smmu-v3: Remove arm_smmu_master->domain Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 12/16] iommu/arm-smmu-v3: Add a global static IDENTITY domain Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-29 18:11 ` Shameerali Kolothum Thodi
2024-01-29 18:11 ` Shameerali Kolothum Thodi
2024-01-29 18:37 ` Jason Gunthorpe
2024-01-29 18:37 ` Jason Gunthorpe
2024-01-30 8:35 ` Shameerali Kolothum Thodi
2024-01-30 8:35 ` Shameerali Kolothum Thodi
2024-01-25 23:57 ` [PATCH v4 13/16] iommu/arm-smmu-v3: Add a global static BLOCKED domain Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 14/16] iommu/arm-smmu-v3: Use the identity/blocked domain during release Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 15/16] iommu/arm-smmu-v3: Pass arm_smmu_domain and arm_smmu_device to finalize Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
2024-01-25 23:57 ` [PATCH v4 16/16] iommu/arm-smmu-v3: Convert to domain_alloc_paging() Jason Gunthorpe
2024-01-25 23:57 ` Jason Gunthorpe
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