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From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel@lists.infradead.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Joerg Roedel <jroedel@suse.de>, Moritz Fischer <mdf@kernel.org>,
	Moritz Fischer <moritzf@google.com>,
	Michael Shavit <mshavit@google.com>,
	Nicolin Chen <nicolinc@nvidia.com>,
	patches@lists.linux.dev,
	Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
	Zhangfei Gao <zhangfei.gao@linaro.org>
Subject: Re: [PATCH v5 09/17] iommu/arm-smmu-v3: Put writing the context descriptor in the right order
Date: Tue, 13 Feb 2024 15:42:53 +0000	[thread overview]
Message-ID: <ZcuN_YZBzxJ2wvAg@google.com> (raw)
In-Reply-To: <9-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com>

Hi Jason,

On Tue, Feb 06, 2024 at 11:12:46AM -0400, Jason Gunthorpe wrote:
> Get closer to the IOMMU API ideal that changes between domains can be
> hitless. The ordering for the CD table entry is not entirely clean from
> this perspective.
> 
> When switching away from a STE with a CD table programmed in it we should
> write the new STE first, then clear any old data in the CD entry.
> 
> If we are programming a CD table for the first time to a STE then the CD
> entry should be programmed before the STE is loaded.
> 
> If we are replacing a CD table entry when the STE already points at the CD
> entry then we just need to do the make/break sequence.
> 
> Lift this code out of arm_smmu_detach_dev() so it can all be sequenced
> properly. The only other caller is arm_smmu_release_device() and it is
> going to free the cdtable anyhow, so it doesn't matter what is in it.
> 
> Reviewed-by: Michael Shavit <mshavit@google.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Tested-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Moritz Fischer <moritzf@google.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---
>  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 29 ++++++++++++++-------
>  1 file changed, 20 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 340f3dc82c9ce0..2a6ac0af932c54 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -2575,14 +2575,6 @@ static void arm_smmu_detach_dev(struct arm_smmu_master *master)
>  
>  	master->domain = NULL;
>  	master->ats_enabled = false;
> -	/*
> -	 * Clearing the CD entry isn't strictly required to detach the domain
> -	 * since the table is uninstalled anyway, but it helps avoid confusion
> -	 * in the call to arm_smmu_write_ctx_desc on the next attach (which
> -	 * expects the entry to be empty).
> -	 */
> -	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && master->cd_table.cdtab)
> -		arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, NULL);
>  }
>  
>  static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
> @@ -2659,6 +2651,17 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
>  				master->domain = NULL;
>  				goto out_list_del;
>  			}
> +		} else {
> +			/*
> +			 * arm_smmu_write_ctx_desc() relies on the entry being
> +			 * invalid to work, clear any existing entry.
> +			 */
> +			ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
> +						      NULL);
> +			if (ret) {
> +				master->domain = NULL;
> +				goto out_list_del;
> +			}

Instead of having duplicate
           if (ret) {
               master->domain = NULL;
               goto out_list_del;
           }

In the if and the else, we can just move it outside.

>  		}
>  
>  		ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, &smmu_domain->cd);
> @@ -2668,15 +2671,23 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
>  		}
>  
>  		arm_smmu_make_cdtable_ste(&target, master);
> +		arm_smmu_install_ste_for_dev(master, &target);
>  		break;
>  	case ARM_SMMU_DOMAIN_S2:
>  		arm_smmu_make_s2_domain_ste(&target, master, smmu_domain);
> +		arm_smmu_install_ste_for_dev(master, &target);
> +		if (master->cd_table.cdtab)
> +			arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
> +						      NULL);
>  		break;
>  	case ARM_SMMU_DOMAIN_BYPASS:
>  		arm_smmu_make_bypass_ste(&target);
> +		arm_smmu_install_ste_for_dev(master, &target);
> +		if (master->cd_table.cdtab)
> +			arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
> +						      NULL);
>  		break;
>  	}
This invalidates the CD while the STE is in bypass/S2 which is a new behavior
to the driver, I don’t see anything from the user manual about this, so I
believe that is fine.

Reviewed-by: Mostafa Saleh <smostafa@google.com>

> -	arm_smmu_install_ste_for_dev(master, &target);
>  
>  	arm_smmu_enable_ats(master);
>  	goto out_unlock;
> -- 
> 2.43.0
>

Thanks,
Mostafa

WARNING: multiple messages have this Message-ID (diff)
From: Mostafa Saleh <smostafa@google.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel@lists.infradead.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Joerg Roedel <jroedel@suse.de>, Moritz Fischer <mdf@kernel.org>,
	Moritz Fischer <moritzf@google.com>,
	Michael Shavit <mshavit@google.com>,
	Nicolin Chen <nicolinc@nvidia.com>,
	patches@lists.linux.dev,
	Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
	Zhangfei Gao <zhangfei.gao@linaro.org>
Subject: Re: [PATCH v5 09/17] iommu/arm-smmu-v3: Put writing the context descriptor in the right order
Date: Tue, 13 Feb 2024 15:42:53 +0000	[thread overview]
Message-ID: <ZcuN_YZBzxJ2wvAg@google.com> (raw)
In-Reply-To: <9-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com>

Hi Jason,

On Tue, Feb 06, 2024 at 11:12:46AM -0400, Jason Gunthorpe wrote:
> Get closer to the IOMMU API ideal that changes between domains can be
> hitless. The ordering for the CD table entry is not entirely clean from
> this perspective.
> 
> When switching away from a STE with a CD table programmed in it we should
> write the new STE first, then clear any old data in the CD entry.
> 
> If we are programming a CD table for the first time to a STE then the CD
> entry should be programmed before the STE is loaded.
> 
> If we are replacing a CD table entry when the STE already points at the CD
> entry then we just need to do the make/break sequence.
> 
> Lift this code out of arm_smmu_detach_dev() so it can all be sequenced
> properly. The only other caller is arm_smmu_release_device() and it is
> going to free the cdtable anyhow, so it doesn't matter what is in it.
> 
> Reviewed-by: Michael Shavit <mshavit@google.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Tested-by: Nicolin Chen <nicolinc@nvidia.com>
> Tested-by: Moritz Fischer <moritzf@google.com>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---
>  drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 29 ++++++++++++++-------
>  1 file changed, 20 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 340f3dc82c9ce0..2a6ac0af932c54 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -2575,14 +2575,6 @@ static void arm_smmu_detach_dev(struct arm_smmu_master *master)
>  
>  	master->domain = NULL;
>  	master->ats_enabled = false;
> -	/*
> -	 * Clearing the CD entry isn't strictly required to detach the domain
> -	 * since the table is uninstalled anyway, but it helps avoid confusion
> -	 * in the call to arm_smmu_write_ctx_desc on the next attach (which
> -	 * expects the entry to be empty).
> -	 */
> -	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && master->cd_table.cdtab)
> -		arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, NULL);
>  }
>  
>  static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
> @@ -2659,6 +2651,17 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
>  				master->domain = NULL;
>  				goto out_list_del;
>  			}
> +		} else {
> +			/*
> +			 * arm_smmu_write_ctx_desc() relies on the entry being
> +			 * invalid to work, clear any existing entry.
> +			 */
> +			ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
> +						      NULL);
> +			if (ret) {
> +				master->domain = NULL;
> +				goto out_list_del;
> +			}

Instead of having duplicate
           if (ret) {
               master->domain = NULL;
               goto out_list_del;
           }

In the if and the else, we can just move it outside.

>  		}
>  
>  		ret = arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID, &smmu_domain->cd);
> @@ -2668,15 +2671,23 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
>  		}
>  
>  		arm_smmu_make_cdtable_ste(&target, master);
> +		arm_smmu_install_ste_for_dev(master, &target);
>  		break;
>  	case ARM_SMMU_DOMAIN_S2:
>  		arm_smmu_make_s2_domain_ste(&target, master, smmu_domain);
> +		arm_smmu_install_ste_for_dev(master, &target);
> +		if (master->cd_table.cdtab)
> +			arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
> +						      NULL);
>  		break;
>  	case ARM_SMMU_DOMAIN_BYPASS:
>  		arm_smmu_make_bypass_ste(&target);
> +		arm_smmu_install_ste_for_dev(master, &target);
> +		if (master->cd_table.cdtab)
> +			arm_smmu_write_ctx_desc(master, IOMMU_NO_PASID,
> +						      NULL);
>  		break;
>  	}
This invalidates the CD while the STE is in bypass/S2 which is a new behavior
to the driver, I don’t see anything from the user manual about this, so I
believe that is fine.

Reviewed-by: Mostafa Saleh <smostafa@google.com>

> -	arm_smmu_install_ste_for_dev(master, &target);
>  
>  	arm_smmu_enable_ats(master);
>  	goto out_unlock;
> -- 
> 2.43.0
>

Thanks,
Mostafa

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-02-13 15:43 UTC|newest]

Thread overview: 112+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-06 15:12 [PATCH v5 00/17] Update SMMUv3 to the modern iommu API (part 1/3) Jason Gunthorpe
2024-02-06 15:12 ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 01/17] iommu/arm-smmu-v3: Make STE programming independent of the callers Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-15 13:49   ` Will Deacon
2024-02-15 13:49     ` Will Deacon
2024-02-15 16:01     ` Jason Gunthorpe
2024-02-15 16:01       ` Jason Gunthorpe
2024-02-15 18:42       ` Robin Murphy
2024-02-15 18:42         ` Robin Murphy
2024-02-15 20:11         ` Robin Murphy
2024-02-15 20:11           ` Robin Murphy
2024-02-16 16:28           ` Will Deacon
2024-02-16 16:28             ` Will Deacon
2024-02-15 21:17         ` Jason Gunthorpe
2024-02-15 21:17           ` Jason Gunthorpe
2024-02-21 13:49       ` Will Deacon
2024-02-21 13:49         ` Will Deacon
2024-02-21 14:08         ` Jason Gunthorpe
2024-02-21 14:08           ` Jason Gunthorpe
2024-02-21 16:19           ` Michael Shavit
2024-02-21 16:19             ` Michael Shavit
2024-02-21 16:52             ` Michael Shavit
2024-02-21 16:52               ` Michael Shavit
2024-02-21 17:06             ` Jason Gunthorpe
2024-02-21 17:06               ` Jason Gunthorpe
2024-02-22 17:43           ` Will Deacon
2024-02-22 17:43             ` Will Deacon
2024-02-23 15:18             ` Jason Gunthorpe
2024-02-23 15:18               ` Jason Gunthorpe
2024-02-27 12:43               ` Will Deacon
2024-02-27 12:43                 ` Will Deacon
2024-02-29 13:57                 ` Jason Gunthorpe
2024-02-29 13:57                   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 02/17] iommu/arm-smmu-v3: Consolidate the STE generation for abort/bypass Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-15 17:27   ` Robin Murphy
2024-02-15 17:27     ` Robin Murphy
2024-02-22 17:40     ` Will Deacon
2024-02-22 17:40       ` Will Deacon
2024-02-23 18:53     ` Jason Gunthorpe
2024-02-23 18:53       ` Jason Gunthorpe
2024-02-27 10:50       ` Will Deacon
2024-02-27 10:50         ` Will Deacon
2024-02-06 15:12 ` [PATCH v5 03/17] iommu/arm-smmu-v3: Move arm_smmu_rmr_install_bypass_ste() Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-13 15:37   ` Mostafa Saleh
2024-02-13 15:37     ` Mostafa Saleh
2024-02-13 16:16     ` Jason Gunthorpe
2024-02-13 16:16       ` Jason Gunthorpe
2024-02-13 16:46       ` Mostafa Saleh
2024-02-13 16:46         ` Mostafa Saleh
2024-02-15 19:01     ` Robin Murphy
2024-02-15 19:01       ` Robin Murphy
2024-02-15 21:18       ` Jason Gunthorpe
2024-02-15 21:18         ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 04/17] iommu/arm-smmu-v3: Move the STE generation for S1 and S2 domains into functions Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-16 17:12   ` Jason Gunthorpe
2024-02-16 17:12     ` Jason Gunthorpe
2024-02-16 17:39     ` Will Deacon
2024-02-16 17:39       ` Will Deacon
2024-02-16 17:58       ` Jason Gunthorpe
2024-02-16 17:58         ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 05/17] iommu/arm-smmu-v3: Build the whole STE in arm_smmu_make_s2_domain_ste() Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 06/17] iommu/arm-smmu-v3: Hold arm_smmu_asid_lock during all of attach_dev Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-13 15:38   ` Mostafa Saleh
2024-02-13 15:38     ` Mostafa Saleh
2024-02-13 16:18     ` Jason Gunthorpe
2024-02-13 16:18       ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 07/17] iommu/arm-smmu-v3: Compute the STE only once for each master Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 08/17] iommu/arm-smmu-v3: Do not change the STE twice during arm_smmu_attach_dev() Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-13 15:40   ` Mostafa Saleh
2024-02-13 15:40     ` Mostafa Saleh
2024-02-13 16:26     ` Jason Gunthorpe
2024-02-13 16:26       ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 09/17] iommu/arm-smmu-v3: Put writing the context descriptor in the right order Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-13 15:42   ` Mostafa Saleh [this message]
2024-02-13 15:42     ` Mostafa Saleh
2024-02-13 17:50     ` Jason Gunthorpe
2024-02-13 17:50       ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 10/17] iommu/arm-smmu-v3: Pass smmu_domain to arm_enable/disable_ats() Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-13 15:43   ` Mostafa Saleh
2024-02-13 15:43     ` Mostafa Saleh
2024-02-06 15:12 ` [PATCH v5 11/17] iommu/arm-smmu-v3: Remove arm_smmu_master->domain Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-13 15:45   ` Mostafa Saleh
2024-02-13 15:45     ` Mostafa Saleh
2024-02-13 16:37     ` Jason Gunthorpe
2024-02-13 16:37       ` Jason Gunthorpe
2024-02-13 17:00       ` Mostafa Saleh
2024-02-13 17:00         ` Mostafa Saleh
2024-02-06 15:12 ` [PATCH v5 12/17] iommu/arm-smmu-v3: Check that the RID domain is S1 in SVA Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 13/17] iommu/arm-smmu-v3: Add a global static IDENTITY domain Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 14/17] iommu/arm-smmu-v3: Add a global static BLOCKED domain Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 15/17] iommu/arm-smmu-v3: Use the identity/blocked domain during release Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 16/17] iommu/arm-smmu-v3: Pass arm_smmu_domain and arm_smmu_device to finalize Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-06 15:12 ` [PATCH v5 17/17] iommu/arm-smmu-v3: Convert to domain_alloc_paging() Jason Gunthorpe
2024-02-06 15:12   ` Jason Gunthorpe
2024-02-07  5:27 ` [PATCH v5 00/17] Update SMMUv3 to the modern iommu API (part 1/3) Nicolin Chen
2024-02-07  5:27   ` Nicolin Chen

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