From: Ingo Molnar <mingo@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: linux-tip-commits@vger.kernel.org,
Ard Biesheuvel <ardb@kernel.org>,
"Ahmed S. Darwish" <darwi@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Brian Gerst <brgerst@gmail.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>, Juergen Gross <jgross@suse.com>,
"Kirill A. Shutemov" <kirill@shutemov.name>,
Linus Torvalds <torvalds@linux-foundation.org>,
Peter Zijlstra <peterz@infradead.org>,
x86@kernel.org
Subject: Re: [tip: x86/core] x86/cpu: Use a new feature flag for 5-level paging
Date: Mon, 19 May 2025 15:12:31 +0200 [thread overview]
Message-ID: <aCsuP_Au95QjOdWn@gmail.com> (raw)
In-Reply-To: <174765932243.406.15487430117390098144.tip-bot2@tip-bot2>
* tip-bot2 for Ard Biesheuvel <tip-bot2@linutronix.de> wrote:
> The following commit has been merged into the x86/core branch of tip:
>
> Commit-ID: ae41ee699c6c89850d11ba64a282490f287d9be7
> Gitweb: https://git.kernel.org/tip/ae41ee699c6c89850d11ba64a282490f287d9be7
> Author: Ard Biesheuvel <ardb@kernel.org>
> AuthorDate: Sat, 17 May 2025 11:16:41 +02:00
> Committer: Ingo Molnar <mingo@kernel.org>
> CommitterDate: Mon, 19 May 2025 10:37:21 +02:00
>
> x86/cpu: Use a new feature flag for 5-level paging
Update: although Linus tentatively acked this series, I've removed this
commit because it's still under discussion - it appears the synthethic
CPU flag approach is not universally accepted yet.
Thanks,
Ingo
next prev parent reply other threads:[~2025-05-19 13:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-17 9:16 [PATCH v4 0/6] x86: Robustify pgtable_l5_enabled() Ard Biesheuvel
2025-05-17 9:16 ` [PATCH v4 1/6] x86/cpu: Use a new feature flag for 5 level paging Ard Biesheuvel
2025-05-17 14:28 ` Ard Biesheuvel
2025-05-19 8:35 ` Ingo Molnar
2025-05-19 9:40 ` Borislav Petkov
2025-05-19 9:46 ` Ard Biesheuvel
2025-05-19 12:15 ` Borislav Petkov
2025-05-19 12:24 ` Borislav Petkov
2025-05-19 12:25 ` Ard Biesheuvel
2025-05-19 13:08 ` Ingo Molnar
2025-05-19 13:19 ` Borislav Petkov
2025-05-21 15:23 ` Thomas Gleixner
2025-05-21 18:11 ` Borislav Petkov
2025-05-21 18:56 ` Thomas Gleixner
2025-05-21 19:29 ` Borislav Petkov
2025-05-21 19:41 ` Thomas Gleixner
2025-05-21 19:48 ` Borislav Petkov
2025-05-21 20:07 ` Thomas Gleixner
2025-05-22 7:55 ` Peter Zijlstra
2025-05-22 15:08 ` Sean Christopherson
2025-05-22 19:58 ` Thomas Gleixner
2025-05-22 22:15 ` Sean Christopherson
2025-05-19 12:55 ` [tip: x86/core] x86/cpu: Use a new feature flag for 5-level paging tip-bot2 for Ard Biesheuvel
2025-05-19 13:12 ` Ingo Molnar [this message]
2025-05-17 9:16 ` [PATCH v4 2/6] x86/cpu: Move CPU capability override arrays from BSS to __ro_after_init Ard Biesheuvel
2025-05-19 12:01 ` Brian Gerst
2025-05-17 9:16 ` [PATCH v4 3/6] x86/cpu: Allow caps to be set arbitrarily early Ard Biesheuvel
2025-05-17 9:16 ` [PATCH v4 4/6] x86/boot: Set 5-level paging CPU cap before entering C code Ard Biesheuvel
2025-05-17 9:16 ` [PATCH v4 5/6] x86/boot: Drop the early variant of pgtable_l5_enabled() Ard Biesheuvel
2025-05-17 9:16 ` [PATCH v4 6/6] x86/boot: Drop 5-level paging related variables and early updates Ard Biesheuvel
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