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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 8/9] drm/i915/display: Wait for scl start instead of dsb_wait_vblanks
Date: Mon, 22 Sep 2025 13:26:31 +0300	[thread overview]
Message-ID: <aNEkV70k8Nv1WFzW@intel.com> (raw)
In-Reply-To: <20250921043535.2012978-9-ankit.k.nautiyal@intel.com>

On Sun, Sep 21, 2025 at 10:05:34AM +0530, Ankit Nautiyal wrote:
> Until LNL, intel_dsb_wait_vblanks() waits for the undelayed vblank start.
> However, from PTL onwards, it waits for the start of the safe window,
> defined by the number of lines programmed in TRANS_SET_CONTEXT_LATENCY.
> This change was introduced to move the SCL window out of the vblank region,
> supporting modes with higher refresh rates and smaller vblanks.
> 
> As a result, on PTL+ platforms, the DSB wait for vblank completes exactly
> SCL lines earlier than the undelayed vblank start. Since we use
> intel_dsb_wait_vblanks() to time the send push operation, this causes
> issues when SCL lines are non-zero.
> 
> Instead of relying on the helper, instruct the DSB to wait from
> (undelayed vblank start - SCL) to (delayed vblank start - SCL) before
> sending the push. This approach works for both pre-PTL and PTL+ platforms.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_dsb.c     | 16 ++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_dsb.h     |  2 ++
>  3 files changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index bfeec3706f35..8d78037d5a2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7265,7 +7265,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
>  				new_crtc_state->dsb_color);
>  
>  	if (new_crtc_state->use_dsb && !intel_color_uses_chained_dsb(new_crtc_state)) {
> -		intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
> +		intel_dsb_wait_for_scl_start(state, new_crtc_state->dsb_commit);
>  
>  		intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
>  		intel_dsb_wait_for_scl_lines(state, new_crtc_state->dsb_commit);
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 400dcc87a992..e94a05cc8c82 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -826,6 +826,22 @@ void intel_dsb_wait_for_scl_lines(struct intel_atomic_state *state,
>  	intel_dsb_wait_usec(dsb, usecs);
>  }
>  
> +void intel_dsb_wait_for_scl_start(struct intel_atomic_state *state,
> +				  struct intel_dsb *dsb)
> +{
> +	struct intel_crtc *crtc = dsb->crtc;
> +	const struct intel_crtc_state *crtc_state =
> +		intel_pre_commit_crtc_state(state, crtc);
> +	int undelayed_vblank_start = crtc_state->hw.adjusted_mode.crtc_vdisplay;
> +	int delayed_vblank_start = crtc_state->hw.adjusted_mode.crtc_vblank_start;
> +	int start, end;
> +
> +	start = undelayed_vblank_start - crtc_state->set_context_latency;
> +	end = delayed_vblank_start - crtc_state->set_context_latency;

For these we perhaps want something like:

intel_vrr_safe_window_start()
{
	if (ptl+)
		return crtc_vdisplay - set_context_latency;
	else
		return crtc_vdisplay;
}

intel_vrr_vmin_safe_window_end()
{
	intel_vrr_vmin_vblank_start() - set_context_latency;
}

> +
> +	intel_dsb_wait_scanline_out(state, dsb, start, end);

And I suspect we want to do this just before the usec wait in
intel_dsb_wait_vblank_delay() (for the VRR case only). No need
to bother higher level code with this, I think.

> +}
> +
>  /**
>   * intel_dsb_commit() - Trigger workload execution of DSB.
>   * @dsb: DSB context
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
> index 1cb5ba1a0534..5985d0024dae 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.h
> @@ -73,5 +73,7 @@ void intel_dsb_wait(struct intel_dsb *dsb);
>  
>  void intel_dsb_irq_handler(struct intel_display *display,
>  			   enum pipe pipe, enum intel_dsb_id dsb_id);
> +void intel_dsb_wait_for_scl_start(struct intel_atomic_state *state,
> +				  struct intel_dsb *dsb);
>  
>  #endif
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2025-09-22 10:26 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-21  4:35 [PATCH 0/9] Introduce set_context_latency and refactor VRR/DSB timing logic Ankit Nautiyal
2025-09-21  4:35 ` [PATCH 1/9] drm/i915/psr: s/intel_psr_min_vblank_delay/intel_psr_min_set_context_latency Ankit Nautiyal
2025-09-22  9:51   ` Ville Syrjälä
2025-09-21  4:35 ` [PATCH 2/9] drm/i915/display: Add set_context_latency to crtc_state->vrr Ankit Nautiyal
2025-09-22 10:00   ` Ville Syrjälä
2025-09-23 10:47     ` Nautiyal, Ankit K
2025-09-21  4:35 ` [PATCH 3/9] drm/i915/display: Use VBLANK_START to get the vblank delay for TGL Ankit Nautiyal
2025-09-22 10:07   ` Ville Syrjälä
2025-09-22 10:20     ` Nautiyal, Ankit K
2025-09-22 11:01       ` Ville Syrjälä
2025-09-21  4:35 ` [PATCH 4/9] drm/i915/vrr: Use set_context_latency instead of intel_vrr_real_vblank_delay() Ankit Nautiyal
2025-09-22 10:14   ` Ville Syrjälä
2025-09-23 10:48     ` Nautiyal, Ankit K
2025-09-21  4:35 ` [PATCH 5/9] drm/i915/vrr: s/intel_vrr_vblank_delay/intel_vrr_scl_delay Ankit Nautiyal
2025-09-21  4:35 ` [PATCH 6/9] drm/i915/display: Use set context latency in evasion logic Ankit Nautiyal
2025-09-22 10:18   ` Ville Syrjälä
2025-09-22 11:19     ` Ville Syrjälä
2025-09-22 11:30       ` Ville Syrjälä
2025-09-23 10:50         ` Nautiyal, Ankit K
2025-09-21  4:35 ` [PATCH 7/9] drm/i915/dsb: s/intel_dsb_wait_vblank_delay/intel_dsb_wait_for_scl_lines Ankit Nautiyal
2025-09-22 10:32   ` Ville Syrjälä
2025-09-23 10:52     ` Nautiyal, Ankit K
2025-09-21  4:35 ` [PATCH 8/9] drm/i915/display: Wait for scl start instead of dsb_wait_vblanks Ankit Nautiyal
2025-09-22 10:26   ` Ville Syrjälä [this message]
2025-09-22 13:34     ` Nautiyal, Ankit K
2025-09-22 13:44       ` Ville Syrjälä
2025-09-22 13:49         ` Ville Syrjälä
2025-09-22 14:04           ` Ville Syrjälä
2025-09-23 10:55             ` Nautiyal, Ankit K
2025-09-21  4:35 ` [PATCH 9/9] drm/i915/vrr: Clamp guardband as per hardware and timing constraints Ankit Nautiyal
2025-09-22 10:57   ` Ville Syrjälä
2025-09-23 10:32     ` Nautiyal, Ankit K
2025-09-23 11:45       ` Ville Syrjälä
2025-09-21  4:58 ` ✓ CI.KUnit: success for Introduce set_context_latency and refactor VRR/DSB timing logic Patchwork
2025-09-21  5:13 ` ✗ CI.checksparse: warning " Patchwork
2025-09-21  5:33 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-09-21  6:04 ` ✗ i915.CI.BAT: " Patchwork
2025-09-21  6:47 ` ✗ Xe.CI.Full: " Patchwork

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