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From: Peter Chen <peter.chen@cixtech.com>
To: hans.zhang@cixtech.com
Cc: <bhelgaas@google.com>, <helgaas@kernel.org>,
	<lpieralisi@kernel.org>, <kw@linux.com>, <mani@kernel.org>,
	<robh@kernel.org>, <kwilczynski@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <mpillai@cadence.com>,
	<fugang.duan@cixtech.com>, <guoyin.chen@cixtech.com>,
	<cix-kernel-upstream@cixtech.com>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v11 10/10] arm64: dts: cix: Enable PCIe on the Orion O6 board
Date: Mon, 17 Nov 2025 17:31:38 +0800	[thread overview]
Message-ID: <aRrrej15SxLzRTa0@nchen-desktop> (raw)
In-Reply-To: <20251108140305.1120117-11-hans.zhang@cixtech.com>

On 25-11-08 22:03:05, hans.zhang@cixtech.com wrote:
> From: Hans Zhang <hans.zhang@cixtech.com>
> 
> Add PCIe RC support on Orion O6 board.
> 
> The Orion O6 board includes multiple PCIe root complexes. The current
> device tree configuration enables detection and basic operation of PCIe
> endpoints on this platform.
> 
> GPIO and pinctrl subsystems for this platform are not yet ready for
> upstream inclusion. Consequently, attributes such as reset-gpios and
> pinctrl configurations are temporarily omitted from the PCIe node
> definitions.
> 
> Endpoint detection and functionality are confirmed to be operational with
> this basic configuration. The missing GPIO and pinctrl support will be
> added incrementally in future patches as the dependent subsystems become
> available upstream.
> 
> Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>

Applied, Thanks.

Peter
> ---
> Dear Krzysztof and Mani,
> 
> Due to the fact that the GPIO, PINCTRL and other modules of our platform are
> not yet ready for upstream. Attributes that PCIe depends on, such as reset-gpios
> and pinctrl*, have not been added for the time being. It will be added gradually
> in the future.
> 
> The following are Arnd's previous comments. We can go to upsteam separately.
> https://lore.kernel.org/all/422deb4d-db29-48c1-b0c9-7915951df500@app.fastmail.com/
> 
> 
> The following are the situations of five PCIe controller enumeration devices.
> 
> root@cix-localhost:~# uname -a
> Linux cix-localhost 6.18.0-rc4-00010-g0f5b0f23abef #237 SMP PREEMPT Sat Nov  8 21:47:44 CST 2025 aarch64 GNU/Linux
> root@cix-localhost:~#
> root@cix-localhost:~# lspci
> 0000:c0:00.0 PCI bridge: Device 1f6c:0001
> 0000:c1:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device 8126 (rev 01)
> 0001:90:00.0 PCI bridge: Device 1f6c:0001
> 0001:91:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller S4LV008[Pascal]
> 0002:60:00.0 PCI bridge: Device 1f6c:0001
> 0002:61:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller
> 0003:00:00.0 PCI bridge: Device 1f6c:0001
> 0003:01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device 8126 (rev 01)
> 0004:30:00.0 PCI bridge: Device 1f6c:0001
> 0004:31:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device 8126 (rev 01)
> ---
>  arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
> index d74964d53c3b..be3ec4f5d11e 100644
> --- a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
> +++ b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
> @@ -34,6 +34,26 @@ linux,cma {
>  
>  };
>  
> +&pcie_x8_rc {
> +	status = "okay";
> +};
> +
> +&pcie_x4_rc {
> +	status = "okay";
> +};
> +
> +&pcie_x2_rc {
> +	status = "okay";
> +};
> +
> +&pcie_x1_0_rc {
> +	status = "okay";
> +};
> +
> +&pcie_x1_1_rc {
> +	status = "okay";
> +};
> +
>  &uart2 {
>  	status = "okay";
>  };
> -- 
> 2.49.0
> 

-- 

Best regards,
Peter

  parent reply	other threads:[~2025-11-17  9:31 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-08 14:02 [PATCH v11 00/10] Enhance the PCIe controller driver for next generation controllers hans.zhang
2025-11-08 14:02 ` [PATCH v11 01/10] PCI: cadence: Add module support for platform controller driver hans.zhang
2025-11-08 14:02 ` [PATCH v11 02/10] PCI: cadence: Split PCIe controller header file hans.zhang
2025-11-08 14:02 ` [PATCH v11 03/10] PCI: cadence: Move PCIe RP common functions to a separate file hans.zhang
2025-11-09 13:59   ` kernel test robot
2025-11-09 17:01     ` Manivannan Sadhasivam
2025-11-10  1:25       ` Hans Zhang
2025-11-08 14:02 ` [PATCH v11 04/10] PCI: cadence: Add support for High Perf Architecture (HPA) controller hans.zhang
2025-11-17 21:08   ` Bjorn Helgaas
2025-11-18  0:45     ` Hans Zhang
2025-11-08 14:03 ` [PATCH v11 05/10] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-11-08 14:03 ` [PATCH v11 06/10] PCI: Add Cix Technology Vendor and Device ID hans.zhang
2025-11-08 14:03 ` [PATCH v11 07/10] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-11-08 14:03 ` [PATCH v11 08/10] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-11-08 14:03 ` [PATCH v11 09/10] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-11-14 17:40   ` Manivannan Sadhasivam
2025-11-17  9:31   ` Peter Chen
2025-11-08 14:03 ` [PATCH v11 10/10] arm64: dts: cix: Enable PCIe on the Orion O6 board hans.zhang
2025-11-14 17:41   ` Manivannan Sadhasivam
2025-11-17  9:31   ` Peter Chen [this message]
2025-11-14 17:38 ` (subset) [PATCH v11 00/10] Enhance the PCIe controller driver for next generation controllers Manivannan Sadhasivam

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