* [PATCH 0/6] or1k: Rename the architecture from openrisc
@ 2026-02-05 3:02 Richard Henderson
2026-02-05 3:02 ` [PATCH 1/6] target/or1k: Rename " Richard Henderson
` (8 more replies)
0 siblings, 9 replies; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
We have an odd mix of 'openrisc' and 'or1k' in use.
Standardize TARGET_ARCH and all of the filenames to use 'or1k'.
r~
Richard Henderson (6):
target/or1k: Rename from openrisc
include/hw/or1k: Rename from openrisc
hw/or1k: Rename from openrisc
tests/tcg/or1k: Rename from openrisc
docs/system/or1k: Rename from openrisc
hw/or1k: Rename or1k-sim.c from openrisc_sim.c
include/exec/poison.h | 2 +-
include/hw/{openrisc => or1k}/boot.h | 6 +++---
include/system/arch_init.h | 2 +-
include/user/abitypes.h | 2 +-
linux-user/{openrisc => or1k}/sockbits.h | 0
linux-user/{openrisc => or1k}/target_cpu.h | 0
linux-user/{openrisc => or1k}/target_elf.h | 0
linux-user/{openrisc => or1k}/target_errno_defs.h | 0
linux-user/{openrisc => or1k}/target_fcntl.h | 0
linux-user/{openrisc => or1k}/target_mman.h | 0
linux-user/{openrisc => or1k}/target_prctl.h | 0
linux-user/{openrisc => or1k}/target_proc.h | 0
linux-user/{openrisc => or1k}/target_ptrace.h | 0
linux-user/{openrisc => or1k}/target_resource.h | 0
linux-user/{openrisc => or1k}/target_signal.h | 0
linux-user/{openrisc => or1k}/target_structs.h | 0
linux-user/{openrisc => or1k}/target_syscall.h | 0
linux-user/{openrisc => or1k}/termbits.h | 0
linux-user/syscall_defs.h | 4 ++--
target/{openrisc => or1k}/cpu-param.h | 0
target/{openrisc => or1k}/cpu-qom.h | 0
target/{openrisc => or1k}/cpu.h | 0
target/{openrisc => or1k}/exception.h | 0
target/{openrisc => or1k}/helper.h | 0
hw/{openrisc => or1k}/boot.c | 2 +-
hw/{openrisc => or1k}/cputimer.c | 0
hw/{openrisc/openrisc_sim.c => or1k/or1k-sim.c} | 2 +-
hw/{openrisc => or1k}/virt.c | 2 +-
linux-user/{openrisc => or1k}/cpu_loop.c | 0
linux-user/{openrisc => or1k}/elfload.c | 0
linux-user/{openrisc => or1k}/signal.c | 0
system/qdev-monitor.c | 2 +-
target/{openrisc => or1k}/cpu.c | 0
target/{openrisc => or1k}/disas.c | 0
target/{openrisc => or1k}/exception.c | 0
target/{openrisc => or1k}/exception_helper.c | 0
target/{openrisc => or1k}/fpu_helper.c | 0
target/{openrisc => or1k}/gdbstub.c | 0
target/{openrisc => or1k}/interrupt.c | 0
target/{openrisc => or1k}/interrupt_helper.c | 0
target/{openrisc => or1k}/machine.c | 0
target/{openrisc => or1k}/mmu.c | 0
target/{openrisc => or1k}/sys_helper.c | 0
target/{openrisc => or1k}/translate.c | 0
tests/tcg/{openrisc => or1k}/test_add.c | 0
tests/tcg/{openrisc => or1k}/test_addc.c | 0
tests/tcg/{openrisc => or1k}/test_addi.c | 0
tests/tcg/{openrisc => or1k}/test_addic.c | 0
tests/tcg/{openrisc => or1k}/test_and_or.c | 0
tests/tcg/{openrisc => or1k}/test_bf.c | 0
tests/tcg/{openrisc => or1k}/test_bnf.c | 0
tests/tcg/{openrisc => or1k}/test_div.c | 0
tests/tcg/{openrisc => or1k}/test_divu.c | 0
tests/tcg/{openrisc => or1k}/test_extx.c | 0
tests/tcg/{openrisc => or1k}/test_fx.c | 0
tests/tcg/{openrisc => or1k}/test_j.c | 0
tests/tcg/{openrisc => or1k}/test_jal.c | 0
tests/tcg/{openrisc => or1k}/test_lf_add.c | 0
tests/tcg/{openrisc => or1k}/test_lf_div.c | 0
tests/tcg/{openrisc => or1k}/test_lf_eqs.c | 0
tests/tcg/{openrisc => or1k}/test_lf_ges.c | 0
tests/tcg/{openrisc => or1k}/test_lf_gts.c | 0
tests/tcg/{openrisc => or1k}/test_lf_les.c | 0
tests/tcg/{openrisc => or1k}/test_lf_lts.c | 0
tests/tcg/{openrisc => or1k}/test_lf_mul.c | 0
tests/tcg/{openrisc => or1k}/test_lf_nes.c | 0
tests/tcg/{openrisc => or1k}/test_lf_rem.c | 0
tests/tcg/{openrisc => or1k}/test_lf_sub.c | 0
tests/tcg/{openrisc => or1k}/test_logic.c | 0
tests/tcg/{openrisc => or1k}/test_lx.c | 0
tests/tcg/{openrisc => or1k}/test_movhi.c | 0
tests/tcg/{openrisc => or1k}/test_mul.c | 0
tests/tcg/{openrisc => or1k}/test_muli.c | 0
tests/tcg/{openrisc => or1k}/test_mulu.c | 0
tests/tcg/{openrisc => or1k}/test_sfeq.c | 0
tests/tcg/{openrisc => or1k}/test_sfeqi.c | 0
tests/tcg/{openrisc => or1k}/test_sfges.c | 0
tests/tcg/{openrisc => or1k}/test_sfgesi.c | 0
tests/tcg/{openrisc => or1k}/test_sfgeu.c | 0
tests/tcg/{openrisc => or1k}/test_sfgeui.c | 0
tests/tcg/{openrisc => or1k}/test_sfgts.c | 0
tests/tcg/{openrisc => or1k}/test_sfgtsi.c | 0
tests/tcg/{openrisc => or1k}/test_sfgtu.c | 0
tests/tcg/{openrisc => or1k}/test_sfgtui.c | 0
tests/tcg/{openrisc => or1k}/test_sfles.c | 0
tests/tcg/{openrisc => or1k}/test_sflesi.c | 0
tests/tcg/{openrisc => or1k}/test_sfleu.c | 0
tests/tcg/{openrisc => or1k}/test_sfleui.c | 0
tests/tcg/{openrisc => or1k}/test_sflts.c | 0
tests/tcg/{openrisc => or1k}/test_sfltsi.c | 0
tests/tcg/{openrisc => or1k}/test_sfltu.c | 0
tests/tcg/{openrisc => or1k}/test_sfltui.c | 0
tests/tcg/{openrisc => or1k}/test_sfne.c | 0
tests/tcg/{openrisc => or1k}/test_sfnei.c | 0
tests/tcg/{openrisc => or1k}/test_sub.c | 0
MAINTAINERS | 14 +++++++-------
configs/targets/or1k-linux-user.mak | 2 +-
configs/targets/or1k-softmmu.mak | 2 +-
docs/system/{openrisc => or1k}/cpu-features.rst | 0
docs/system/{openrisc => or1k}/emulation.rst | 0
docs/system/{openrisc => or1k}/or1k-sim.rst | 0
docs/system/{openrisc => or1k}/virt.rst | 0
.../{target-openrisc.rst => target-or1k.rst} | 8 ++++----
docs/system/targets.rst | 2 +-
hw/Kconfig | 2 +-
hw/meson.build | 2 +-
hw/{openrisc => or1k}/Kconfig | 4 ++--
hw/{openrisc => or1k}/meson.build | 4 ++--
linux-user/meson.build | 2 +-
linux-user/openrisc/meson.build | 5 -----
linux-user/or1k/meson.build | 5 +++++
linux-user/{openrisc => or1k}/syscall.tbl | 0
linux-user/{openrisc => or1k}/syscallhdr.sh | 0
target/Kconfig | 2 +-
target/meson.build | 2 +-
target/{openrisc => or1k}/Kconfig | 2 +-
target/{openrisc => or1k}/insns.decode | 0
target/{openrisc => or1k}/meson.build | 4 ++--
tests/tcg/{openrisc => or1k}/Makefile | 0
119 files changed, 43 insertions(+), 43 deletions(-)
rename include/hw/{openrisc => or1k}/boot.h (93%)
rename linux-user/{openrisc => or1k}/sockbits.h (100%)
rename linux-user/{openrisc => or1k}/target_cpu.h (100%)
rename linux-user/{openrisc => or1k}/target_elf.h (100%)
rename linux-user/{openrisc => or1k}/target_errno_defs.h (100%)
rename linux-user/{openrisc => or1k}/target_fcntl.h (100%)
rename linux-user/{openrisc => or1k}/target_mman.h (100%)
rename linux-user/{openrisc => or1k}/target_prctl.h (100%)
rename linux-user/{openrisc => or1k}/target_proc.h (100%)
rename linux-user/{openrisc => or1k}/target_ptrace.h (100%)
rename linux-user/{openrisc => or1k}/target_resource.h (100%)
rename linux-user/{openrisc => or1k}/target_signal.h (100%)
rename linux-user/{openrisc => or1k}/target_structs.h (100%)
rename linux-user/{openrisc => or1k}/target_syscall.h (100%)
rename linux-user/{openrisc => or1k}/termbits.h (100%)
rename target/{openrisc => or1k}/cpu-param.h (100%)
rename target/{openrisc => or1k}/cpu-qom.h (100%)
rename target/{openrisc => or1k}/cpu.h (100%)
rename target/{openrisc => or1k}/exception.h (100%)
rename target/{openrisc => or1k}/helper.h (100%)
rename hw/{openrisc => or1k}/boot.c (99%)
rename hw/{openrisc => or1k}/cputimer.c (100%)
rename hw/{openrisc/openrisc_sim.c => or1k/or1k-sim.c} (99%)
rename hw/{openrisc => or1k}/virt.c (99%)
rename linux-user/{openrisc => or1k}/cpu_loop.c (100%)
rename linux-user/{openrisc => or1k}/elfload.c (100%)
rename linux-user/{openrisc => or1k}/signal.c (100%)
rename target/{openrisc => or1k}/cpu.c (100%)
rename target/{openrisc => or1k}/disas.c (100%)
rename target/{openrisc => or1k}/exception.c (100%)
rename target/{openrisc => or1k}/exception_helper.c (100%)
rename target/{openrisc => or1k}/fpu_helper.c (100%)
rename target/{openrisc => or1k}/gdbstub.c (100%)
rename target/{openrisc => or1k}/interrupt.c (100%)
rename target/{openrisc => or1k}/interrupt_helper.c (100%)
rename target/{openrisc => or1k}/machine.c (100%)
rename target/{openrisc => or1k}/mmu.c (100%)
rename target/{openrisc => or1k}/sys_helper.c (100%)
rename target/{openrisc => or1k}/translate.c (100%)
rename tests/tcg/{openrisc => or1k}/test_add.c (100%)
rename tests/tcg/{openrisc => or1k}/test_addc.c (100%)
rename tests/tcg/{openrisc => or1k}/test_addi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_addic.c (100%)
rename tests/tcg/{openrisc => or1k}/test_and_or.c (100%)
rename tests/tcg/{openrisc => or1k}/test_bf.c (100%)
rename tests/tcg/{openrisc => or1k}/test_bnf.c (100%)
rename tests/tcg/{openrisc => or1k}/test_div.c (100%)
rename tests/tcg/{openrisc => or1k}/test_divu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_extx.c (100%)
rename tests/tcg/{openrisc => or1k}/test_fx.c (100%)
rename tests/tcg/{openrisc => or1k}/test_j.c (100%)
rename tests/tcg/{openrisc => or1k}/test_jal.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_add.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_div.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_eqs.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_ges.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_gts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_les.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_lts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_mul.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_nes.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_rem.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_sub.c (100%)
rename tests/tcg/{openrisc => or1k}/test_logic.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lx.c (100%)
rename tests/tcg/{openrisc => or1k}/test_movhi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_mul.c (100%)
rename tests/tcg/{openrisc => or1k}/test_muli.c (100%)
rename tests/tcg/{openrisc => or1k}/test_mulu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfeq.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfeqi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfges.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgesi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgeu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgeui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgtsi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgtu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgtui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfles.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sflesi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfleu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfleui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sflts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfltsi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfltu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfltui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfne.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfnei.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sub.c (100%)
rename docs/system/{openrisc => or1k}/cpu-features.rst (100%)
rename docs/system/{openrisc => or1k}/emulation.rst (100%)
rename docs/system/{openrisc => or1k}/or1k-sim.rst (100%)
rename docs/system/{openrisc => or1k}/virt.rst (100%)
rename docs/system/{target-openrisc.rst => target-or1k.rst} (96%)
rename hw/{openrisc => or1k}/Kconfig (89%)
rename hw/{openrisc => or1k}/meson.build (60%)
delete mode 100644 linux-user/openrisc/meson.build
create mode 100644 linux-user/or1k/meson.build
rename linux-user/{openrisc => or1k}/syscall.tbl (100%)
rename linux-user/{openrisc => or1k}/syscallhdr.sh (100%)
rename target/{openrisc => or1k}/Kconfig (76%)
rename target/{openrisc => or1k}/insns.decode (100%)
rename target/{openrisc => or1k}/meson.build (79%)
rename tests/tcg/{openrisc => or1k}/Makefile (100%)
--
2.43.0
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/6] target/or1k: Rename from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
@ 2026-02-05 3:02 ` Richard Henderson
2026-02-05 15:46 ` Philippe Mathieu-Daudé
2026-02-05 3:02 ` [PATCH 2/6] include/hw/or1k: " Richard Henderson
` (7 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
This is the minimal change beginning with TARGET_ARCH in
configs/targets/or1k-* from openrisc to or1k, then adjust
TARGET_OR1K, QEMU_ARCH_OR1K, directory names,
and meson.build to match.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/poison.h | 2 +-
include/system/arch_init.h | 2 +-
include/user/abitypes.h | 2 +-
linux-user/{openrisc => or1k}/sockbits.h | 0
linux-user/{openrisc => or1k}/target_cpu.h | 0
linux-user/{openrisc => or1k}/target_elf.h | 0
linux-user/{openrisc => or1k}/target_errno_defs.h | 0
linux-user/{openrisc => or1k}/target_fcntl.h | 0
linux-user/{openrisc => or1k}/target_mman.h | 0
linux-user/{openrisc => or1k}/target_prctl.h | 0
linux-user/{openrisc => or1k}/target_proc.h | 0
linux-user/{openrisc => or1k}/target_ptrace.h | 0
linux-user/{openrisc => or1k}/target_resource.h | 0
linux-user/{openrisc => or1k}/target_signal.h | 0
linux-user/{openrisc => or1k}/target_structs.h | 0
linux-user/{openrisc => or1k}/target_syscall.h | 0
linux-user/{openrisc => or1k}/termbits.h | 0
linux-user/syscall_defs.h | 4 ++--
target/{openrisc => or1k}/cpu-param.h | 0
target/{openrisc => or1k}/cpu-qom.h | 0
target/{openrisc => or1k}/cpu.h | 0
target/{openrisc => or1k}/exception.h | 0
target/{openrisc => or1k}/helper.h | 0
linux-user/{openrisc => or1k}/cpu_loop.c | 0
linux-user/{openrisc => or1k}/elfload.c | 0
linux-user/{openrisc => or1k}/signal.c | 0
system/qdev-monitor.c | 2 +-
target/{openrisc => or1k}/cpu.c | 0
target/{openrisc => or1k}/disas.c | 0
target/{openrisc => or1k}/exception.c | 0
target/{openrisc => or1k}/exception_helper.c | 0
target/{openrisc => or1k}/fpu_helper.c | 0
target/{openrisc => or1k}/gdbstub.c | 0
target/{openrisc => or1k}/interrupt.c | 0
target/{openrisc => or1k}/interrupt_helper.c | 0
target/{openrisc => or1k}/machine.c | 0
target/{openrisc => or1k}/mmu.c | 0
target/{openrisc => or1k}/sys_helper.c | 0
target/{openrisc => or1k}/translate.c | 0
MAINTAINERS | 2 +-
configs/targets/or1k-linux-user.mak | 2 +-
configs/targets/or1k-softmmu.mak | 2 +-
hw/openrisc/Kconfig | 4 ++--
hw/openrisc/meson.build | 2 +-
linux-user/meson.build | 2 +-
linux-user/openrisc/meson.build | 5 -----
linux-user/or1k/meson.build | 5 +++++
linux-user/{openrisc => or1k}/syscall.tbl | 0
linux-user/{openrisc => or1k}/syscallhdr.sh | 0
target/Kconfig | 2 +-
target/meson.build | 2 +-
target/{openrisc => or1k}/Kconfig | 2 +-
target/{openrisc => or1k}/insns.decode | 0
target/{openrisc => or1k}/meson.build | 4 ++--
54 files changed, 23 insertions(+), 23 deletions(-)
rename linux-user/{openrisc => or1k}/sockbits.h (100%)
rename linux-user/{openrisc => or1k}/target_cpu.h (100%)
rename linux-user/{openrisc => or1k}/target_elf.h (100%)
rename linux-user/{openrisc => or1k}/target_errno_defs.h (100%)
rename linux-user/{openrisc => or1k}/target_fcntl.h (100%)
rename linux-user/{openrisc => or1k}/target_mman.h (100%)
rename linux-user/{openrisc => or1k}/target_prctl.h (100%)
rename linux-user/{openrisc => or1k}/target_proc.h (100%)
rename linux-user/{openrisc => or1k}/target_ptrace.h (100%)
rename linux-user/{openrisc => or1k}/target_resource.h (100%)
rename linux-user/{openrisc => or1k}/target_signal.h (100%)
rename linux-user/{openrisc => or1k}/target_structs.h (100%)
rename linux-user/{openrisc => or1k}/target_syscall.h (100%)
rename linux-user/{openrisc => or1k}/termbits.h (100%)
rename target/{openrisc => or1k}/cpu-param.h (100%)
rename target/{openrisc => or1k}/cpu-qom.h (100%)
rename target/{openrisc => or1k}/cpu.h (100%)
rename target/{openrisc => or1k}/exception.h (100%)
rename target/{openrisc => or1k}/helper.h (100%)
rename linux-user/{openrisc => or1k}/cpu_loop.c (100%)
rename linux-user/{openrisc => or1k}/elfload.c (100%)
rename linux-user/{openrisc => or1k}/signal.c (100%)
rename target/{openrisc => or1k}/cpu.c (100%)
rename target/{openrisc => or1k}/disas.c (100%)
rename target/{openrisc => or1k}/exception.c (100%)
rename target/{openrisc => or1k}/exception_helper.c (100%)
rename target/{openrisc => or1k}/fpu_helper.c (100%)
rename target/{openrisc => or1k}/gdbstub.c (100%)
rename target/{openrisc => or1k}/interrupt.c (100%)
rename target/{openrisc => or1k}/interrupt_helper.c (100%)
rename target/{openrisc => or1k}/machine.c (100%)
rename target/{openrisc => or1k}/mmu.c (100%)
rename target/{openrisc => or1k}/sys_helper.c (100%)
rename target/{openrisc => or1k}/translate.c (100%)
delete mode 100644 linux-user/openrisc/meson.build
create mode 100644 linux-user/or1k/meson.build
rename linux-user/{openrisc => or1k}/syscall.tbl (100%)
rename linux-user/{openrisc => or1k}/syscallhdr.sh (100%)
rename target/{openrisc => or1k}/Kconfig (76%)
rename target/{openrisc => or1k}/insns.decode (100%)
rename target/{openrisc => or1k}/meson.build (79%)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index a779adbb7a..21eed4c54f 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -21,7 +21,7 @@
#pragma GCC poison TARGET_ABI_MIPSO32
#pragma GCC poison TARGET_MIPS64
#pragma GCC poison TARGET_ABI_MIPSN64
-#pragma GCC poison TARGET_OPENRISC
+#pragma GCC poison TARGET_OR1K
#pragma GCC poison TARGET_PPC
#pragma GCC poison TARGET_PPC64
#pragma GCC poison TARGET_ABI32
diff --git a/include/system/arch_init.h b/include/system/arch_init.h
index 51e24c3091..f2f909d540 100644
--- a/include/system/arch_init.h
+++ b/include/system/arch_init.h
@@ -15,7 +15,7 @@ enum {
QEMU_ARCH_SH4 = (1 << 10),
QEMU_ARCH_SPARC = (1 << 11),
QEMU_ARCH_XTENSA = (1 << 12),
- QEMU_ARCH_OPENRISC = (1 << 13),
+ QEMU_ARCH_OR1K = (1 << 13),
QEMU_ARCH_TRICORE = (1 << 16),
QEMU_ARCH_HPPA = (1 << 18),
QEMU_ARCH_RISCV = (1 << 19),
diff --git a/include/user/abitypes.h b/include/user/abitypes.h
index be7a876523..534a29bc12 100644
--- a/include/user/abitypes.h
+++ b/include/user/abitypes.h
@@ -22,7 +22,7 @@
#if (defined(TARGET_I386) && !defined(TARGET_X86_64)) \
|| defined(TARGET_SH4) \
- || defined(TARGET_OPENRISC) \
+ || defined(TARGET_OR1K) \
|| defined(TARGET_MICROBLAZE)
#define ABI_LLONG_ALIGNMENT 4
#endif
diff --git a/linux-user/openrisc/sockbits.h b/linux-user/or1k/sockbits.h
similarity index 100%
rename from linux-user/openrisc/sockbits.h
rename to linux-user/or1k/sockbits.h
diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/or1k/target_cpu.h
similarity index 100%
rename from linux-user/openrisc/target_cpu.h
rename to linux-user/or1k/target_cpu.h
diff --git a/linux-user/openrisc/target_elf.h b/linux-user/or1k/target_elf.h
similarity index 100%
rename from linux-user/openrisc/target_elf.h
rename to linux-user/or1k/target_elf.h
diff --git a/linux-user/openrisc/target_errno_defs.h b/linux-user/or1k/target_errno_defs.h
similarity index 100%
rename from linux-user/openrisc/target_errno_defs.h
rename to linux-user/or1k/target_errno_defs.h
diff --git a/linux-user/openrisc/target_fcntl.h b/linux-user/or1k/target_fcntl.h
similarity index 100%
rename from linux-user/openrisc/target_fcntl.h
rename to linux-user/or1k/target_fcntl.h
diff --git a/linux-user/openrisc/target_mman.h b/linux-user/or1k/target_mman.h
similarity index 100%
rename from linux-user/openrisc/target_mman.h
rename to linux-user/or1k/target_mman.h
diff --git a/linux-user/openrisc/target_prctl.h b/linux-user/or1k/target_prctl.h
similarity index 100%
rename from linux-user/openrisc/target_prctl.h
rename to linux-user/or1k/target_prctl.h
diff --git a/linux-user/openrisc/target_proc.h b/linux-user/or1k/target_proc.h
similarity index 100%
rename from linux-user/openrisc/target_proc.h
rename to linux-user/or1k/target_proc.h
diff --git a/linux-user/openrisc/target_ptrace.h b/linux-user/or1k/target_ptrace.h
similarity index 100%
rename from linux-user/openrisc/target_ptrace.h
rename to linux-user/or1k/target_ptrace.h
diff --git a/linux-user/openrisc/target_resource.h b/linux-user/or1k/target_resource.h
similarity index 100%
rename from linux-user/openrisc/target_resource.h
rename to linux-user/or1k/target_resource.h
diff --git a/linux-user/openrisc/target_signal.h b/linux-user/or1k/target_signal.h
similarity index 100%
rename from linux-user/openrisc/target_signal.h
rename to linux-user/or1k/target_signal.h
diff --git a/linux-user/openrisc/target_structs.h b/linux-user/or1k/target_structs.h
similarity index 100%
rename from linux-user/openrisc/target_structs.h
rename to linux-user/or1k/target_structs.h
diff --git a/linux-user/openrisc/target_syscall.h b/linux-user/or1k/target_syscall.h
similarity index 100%
rename from linux-user/openrisc/target_syscall.h
rename to linux-user/or1k/target_syscall.h
diff --git a/linux-user/openrisc/termbits.h b/linux-user/or1k/termbits.h
similarity index 100%
rename from linux-user/openrisc/termbits.h
rename to linux-user/or1k/termbits.h
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 6ae6e1fa13..20d862fd8b 100644
--- a/linux-user/syscall_defs.h
+++ b/linux-user/syscall_defs.h
@@ -72,7 +72,7 @@
#if defined(TARGET_I386) || defined(TARGET_ARM) || defined(TARGET_SH4) \
|| defined(TARGET_M68K) \
- || defined(TARGET_S390X) || defined(TARGET_OPENRISC) \
+ || defined(TARGET_S390X) || defined(TARGET_OR1K) \
|| defined(TARGET_RISCV) \
|| defined(TARGET_XTENSA) || defined(TARGET_LOONGARCH64)
@@ -1976,7 +1976,7 @@ struct target_stat64 {
abi_ulong __unused5;
};
-#elif defined(TARGET_OPENRISC) \
+#elif defined(TARGET_OR1K) \
|| defined(TARGET_RISCV) || defined(TARGET_HEXAGON) || defined(TARGET_LOONGARCH)
/* These are the asm-generic versions of the stat and stat64 structures */
diff --git a/target/openrisc/cpu-param.h b/target/or1k/cpu-param.h
similarity index 100%
rename from target/openrisc/cpu-param.h
rename to target/or1k/cpu-param.h
diff --git a/target/openrisc/cpu-qom.h b/target/or1k/cpu-qom.h
similarity index 100%
rename from target/openrisc/cpu-qom.h
rename to target/or1k/cpu-qom.h
diff --git a/target/openrisc/cpu.h b/target/or1k/cpu.h
similarity index 100%
rename from target/openrisc/cpu.h
rename to target/or1k/cpu.h
diff --git a/target/openrisc/exception.h b/target/or1k/exception.h
similarity index 100%
rename from target/openrisc/exception.h
rename to target/or1k/exception.h
diff --git a/target/openrisc/helper.h b/target/or1k/helper.h
similarity index 100%
rename from target/openrisc/helper.h
rename to target/or1k/helper.h
diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/or1k/cpu_loop.c
similarity index 100%
rename from linux-user/openrisc/cpu_loop.c
rename to linux-user/or1k/cpu_loop.c
diff --git a/linux-user/openrisc/elfload.c b/linux-user/or1k/elfload.c
similarity index 100%
rename from linux-user/openrisc/elfload.c
rename to linux-user/or1k/elfload.c
diff --git a/linux-user/openrisc/signal.c b/linux-user/or1k/signal.c
similarity index 100%
rename from linux-user/openrisc/signal.c
rename to linux-user/or1k/signal.c
diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c
index be18902bb2..1ac6d9a857 100644
--- a/system/qdev-monitor.c
+++ b/system/qdev-monitor.c
@@ -62,7 +62,7 @@ typedef struct QDevAlias
QEMU_ARCH_I386 | \
QEMU_ARCH_LOONGARCH | \
QEMU_ARCH_MIPS | \
- QEMU_ARCH_OPENRISC | \
+ QEMU_ARCH_OR1K | \
QEMU_ARCH_PPC | \
QEMU_ARCH_RISCV | \
QEMU_ARCH_SH4 | \
diff --git a/target/openrisc/cpu.c b/target/or1k/cpu.c
similarity index 100%
rename from target/openrisc/cpu.c
rename to target/or1k/cpu.c
diff --git a/target/openrisc/disas.c b/target/or1k/disas.c
similarity index 100%
rename from target/openrisc/disas.c
rename to target/or1k/disas.c
diff --git a/target/openrisc/exception.c b/target/or1k/exception.c
similarity index 100%
rename from target/openrisc/exception.c
rename to target/or1k/exception.c
diff --git a/target/openrisc/exception_helper.c b/target/or1k/exception_helper.c
similarity index 100%
rename from target/openrisc/exception_helper.c
rename to target/or1k/exception_helper.c
diff --git a/target/openrisc/fpu_helper.c b/target/or1k/fpu_helper.c
similarity index 100%
rename from target/openrisc/fpu_helper.c
rename to target/or1k/fpu_helper.c
diff --git a/target/openrisc/gdbstub.c b/target/or1k/gdbstub.c
similarity index 100%
rename from target/openrisc/gdbstub.c
rename to target/or1k/gdbstub.c
diff --git a/target/openrisc/interrupt.c b/target/or1k/interrupt.c
similarity index 100%
rename from target/openrisc/interrupt.c
rename to target/or1k/interrupt.c
diff --git a/target/openrisc/interrupt_helper.c b/target/or1k/interrupt_helper.c
similarity index 100%
rename from target/openrisc/interrupt_helper.c
rename to target/or1k/interrupt_helper.c
diff --git a/target/openrisc/machine.c b/target/or1k/machine.c
similarity index 100%
rename from target/openrisc/machine.c
rename to target/or1k/machine.c
diff --git a/target/openrisc/mmu.c b/target/or1k/mmu.c
similarity index 100%
rename from target/openrisc/mmu.c
rename to target/or1k/mmu.c
diff --git a/target/openrisc/sys_helper.c b/target/or1k/sys_helper.c
similarity index 100%
rename from target/openrisc/sys_helper.c
rename to target/or1k/sys_helper.c
diff --git a/target/openrisc/translate.c b/target/or1k/translate.c
similarity index 100%
rename from target/openrisc/translate.c
rename to target/or1k/translate.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b7ed4fccb..a0422936ad 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -303,7 +303,7 @@ OpenRISC TCG CPUs
M: Stafford Horne <shorne@gmail.com>
S: Odd Fixes
F: docs/system/openrisc/cpu-features.rst
-F: target/openrisc/
+F: target/or1k/
F: hw/openrisc/
F: include/hw/openrisc/
F: tests/functional/or1k/meson.build
diff --git a/configs/targets/or1k-linux-user.mak b/configs/targets/or1k-linux-user.mak
index 97d7cb1046..0ee3a05884 100644
--- a/configs/targets/or1k-linux-user.mak
+++ b/configs/targets/or1k-linux-user.mak
@@ -1,4 +1,4 @@
-TARGET_ARCH=openrisc
+TARGET_ARCH=or1k
TARGET_BIG_ENDIAN=y
TARGET_SYSTBL_ABI=common,32,or1k,time32,stat64,rlimit,renameat
TARGET_SYSTBL=syscall.tbl
diff --git a/configs/targets/or1k-softmmu.mak b/configs/targets/or1k-softmmu.mak
index c53408a2bf..204283d604 100644
--- a/configs/targets/or1k-softmmu.mak
+++ b/configs/targets/or1k-softmmu.mak
@@ -1,4 +1,4 @@
-TARGET_ARCH=openrisc
+TARGET_ARCH=or1k
TARGET_BIG_ENDIAN=y
# needed by boot.c and all boards
TARGET_NEED_FDT=y
diff --git a/hw/openrisc/Kconfig b/hw/openrisc/Kconfig
index 0702f622a5..b5c2e5655b 100644
--- a/hw/openrisc/Kconfig
+++ b/hw/openrisc/Kconfig
@@ -1,7 +1,7 @@
config OR1K_SIM
bool
default y
- depends on OPENRISC
+ depends on OR1K
select DEVICE_TREE
select SERIAL_MM
select OPENCORES_ETH
@@ -11,7 +11,7 @@ config OR1K_SIM
config OR1K_VIRT
bool
default y
- depends on OPENRISC
+ depends on OR1K
imply PCI_DEVICES
imply VIRTIO_VGA
imply TEST_DEVICES
diff --git a/hw/openrisc/meson.build b/hw/openrisc/meson.build
index 82f1f0ef1c..49c274b848 100644
--- a/hw/openrisc/meson.build
+++ b/hw/openrisc/meson.build
@@ -4,4 +4,4 @@ openrisc_ss.add(files('boot.c'))
openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('openrisc_sim.c'))
openrisc_ss.add(when: 'CONFIG_OR1K_VIRT', if_true: files('virt.c'))
-hw_arch += {'openrisc': openrisc_ss}
+hw_arch += {'or1k': openrisc_ss}
diff --git a/linux-user/meson.build b/linux-user/meson.build
index efca843369..332847a621 100644
--- a/linux-user/meson.build
+++ b/linux-user/meson.build
@@ -50,7 +50,7 @@ subdir('m68k')
subdir('microblaze')
subdir('mips64')
subdir('mips')
-subdir('openrisc')
+subdir('or1k')
subdir('ppc')
subdir('riscv')
subdir('s390x')
diff --git a/linux-user/openrisc/meson.build b/linux-user/openrisc/meson.build
deleted file mode 100644
index 273e7a0c38..0000000000
--- a/linux-user/openrisc/meson.build
+++ /dev/null
@@ -1,5 +0,0 @@
-syscall_nr_generators += {
- 'openrisc': generator(sh,
- arguments: [ meson.current_source_dir() / 'syscallhdr.sh', '@INPUT@', '@OUTPUT@', '@EXTRA_ARGS@' ],
- output: '@BASENAME@_nr.h')
-}
diff --git a/linux-user/or1k/meson.build b/linux-user/or1k/meson.build
new file mode 100644
index 0000000000..bb7c2ee6ba
--- /dev/null
+++ b/linux-user/or1k/meson.build
@@ -0,0 +1,5 @@
+syscall_nr_generators += {
+ 'or1k': generator(sh,
+ arguments: [ meson.current_source_dir() / 'syscallhdr.sh', '@INPUT@', '@OUTPUT@', '@EXTRA_ARGS@' ],
+ output: '@BASENAME@_nr.h')
+}
diff --git a/linux-user/openrisc/syscall.tbl b/linux-user/or1k/syscall.tbl
similarity index 100%
rename from linux-user/openrisc/syscall.tbl
rename to linux-user/or1k/syscall.tbl
diff --git a/linux-user/openrisc/syscallhdr.sh b/linux-user/or1k/syscallhdr.sh
similarity index 100%
rename from linux-user/openrisc/syscallhdr.sh
rename to linux-user/or1k/syscallhdr.sh
diff --git a/target/Kconfig b/target/Kconfig
index d0c7b59d9c..3c73e3bae0 100644
--- a/target/Kconfig
+++ b/target/Kconfig
@@ -7,7 +7,7 @@ source loongarch/Kconfig
source m68k/Kconfig
source microblaze/Kconfig
source mips/Kconfig
-source openrisc/Kconfig
+source or1k/Kconfig
source ppc/Kconfig
source riscv/Kconfig
source rx/Kconfig
diff --git a/target/meson.build b/target/meson.build
index b29598e7c5..d891ef9ee0 100644
--- a/target/meson.build
+++ b/target/meson.build
@@ -8,7 +8,7 @@ subdir('loongarch')
subdir('m68k')
subdir('microblaze')
subdir('mips')
-subdir('openrisc')
+subdir('or1k')
subdir('ppc')
subdir('riscv')
subdir('rx')
diff --git a/target/openrisc/Kconfig b/target/or1k/Kconfig
similarity index 76%
rename from target/openrisc/Kconfig
rename to target/or1k/Kconfig
index cd66c2e3b6..b2693067b1 100644
--- a/target/openrisc/Kconfig
+++ b/target/or1k/Kconfig
@@ -1,3 +1,3 @@
-config OPENRISC
+config OR1K
bool
select DEVICE_TREE # needed by boot.c
diff --git a/target/openrisc/insns.decode b/target/or1k/insns.decode
similarity index 100%
rename from target/openrisc/insns.decode
rename to target/or1k/insns.decode
diff --git a/target/openrisc/meson.build b/target/or1k/meson.build
similarity index 79%
rename from target/openrisc/meson.build
rename to target/or1k/meson.build
index d51ea1ab75..cad8c1b1ae 100644
--- a/target/openrisc/meson.build
+++ b/target/or1k/meson.build
@@ -21,5 +21,5 @@ openrisc_system_ss.add(files(
'mmu.c',
))
-target_arch += {'openrisc': openrisc_ss}
-target_common_system_arch += {'openrisc': openrisc_system_ss}
+target_arch += {'or1k': openrisc_ss}
+target_common_system_arch += {'or1k': openrisc_system_ss}
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/6] include/hw/or1k: Rename from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
2026-02-05 3:02 ` [PATCH 1/6] target/or1k: Rename " Richard Henderson
@ 2026-02-05 3:02 ` Richard Henderson
2026-02-06 11:15 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 3/6] hw/or1k: " Richard Henderson
` (6 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/{openrisc => or1k}/boot.h | 6 +++---
hw/openrisc/boot.c | 2 +-
hw/openrisc/openrisc_sim.c | 2 +-
hw/openrisc/virt.c | 2 +-
MAINTAINERS | 2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
rename include/hw/{openrisc => or1k}/boot.h (93%)
diff --git a/include/hw/openrisc/boot.h b/include/hw/or1k/boot.h
similarity index 93%
rename from include/hw/openrisc/boot.h
rename to include/hw/or1k/boot.h
index 3c481bdea6..2e6131580c 100644
--- a/include/hw/openrisc/boot.h
+++ b/include/hw/or1k/boot.h
@@ -16,8 +16,8 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef OPENRISC_BOOT_H
-#define OPENRISC_BOOT_H
+#ifndef OR1K_BOOT_H
+#define OR1K_BOOT_H
#include "exec/cpu-defs.h"
#include "hw/core/boards.h"
@@ -32,4 +32,4 @@ hwaddr openrisc_load_initrd(void *fdt, const char *filename,
uint32_t openrisc_load_fdt(MachineState *ms, void *fdt, hwaddr load_start,
uint64_t mem_size);
-#endif /* OPENRISC_BOOT_H */
+#endif /* OR1K_BOOT_H */
diff --git a/hw/openrisc/boot.c b/hw/openrisc/boot.c
index 6256babc42..c18f4a6a9f 100644
--- a/hw/openrisc/boot.c
+++ b/hw/openrisc/boot.c
@@ -12,7 +12,7 @@
#include "exec/target_page.h"
#include "elf.h"
#include "hw/core/loader.h"
-#include "hw/openrisc/boot.h"
+#include "hw/or1k/boot.h"
#include "system/device_tree.h"
#include "system/qtest.h"
#include "system/reset.h"
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 603d8ca0d9..f1b1f63274 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -26,7 +26,7 @@
#include "hw/core/boards.h"
#include "hw/char/serial-mm.h"
#include "net/net.h"
-#include "hw/openrisc/boot.h"
+#include "hw/or1k/boot.h"
#include "hw/core/qdev-properties.h"
#include "system/address-spaces.h"
#include "system/device_tree.h"
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
index 54ce96666e..39f54058ab 100644
--- a/hw/openrisc/virt.c
+++ b/hw/openrisc/virt.c
@@ -16,7 +16,7 @@
#include "hw/core/boards.h"
#include "hw/char/serial-mm.h"
#include "hw/core/split-irq.h"
-#include "hw/openrisc/boot.h"
+#include "hw/or1k/boot.h"
#include "hw/misc/sifive_test.h"
#include "hw/pci/pci.h"
#include "hw/pci-host/gpex.h"
diff --git a/MAINTAINERS b/MAINTAINERS
index a0422936ad..508d37ab7a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -305,7 +305,7 @@ S: Odd Fixes
F: docs/system/openrisc/cpu-features.rst
F: target/or1k/
F: hw/openrisc/
-F: include/hw/openrisc/
+F: include/hw/or1k/
F: tests/functional/or1k/meson.build
F: tests/tcg/openrisc/
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/6] hw/or1k: Rename from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
2026-02-05 3:02 ` [PATCH 1/6] target/or1k: Rename " Richard Henderson
2026-02-05 3:02 ` [PATCH 2/6] include/hw/or1k: " Richard Henderson
@ 2026-02-05 3:02 ` Richard Henderson
2026-02-05 15:43 ` Philippe Mathieu-Daudé
2026-02-05 3:02 ` [PATCH 4/6] tests/tcg/or1k: " Richard Henderson
` (5 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/{openrisc => or1k}/boot.c | 0
hw/{openrisc => or1k}/cputimer.c | 0
hw/{openrisc => or1k}/openrisc_sim.c | 0
hw/{openrisc => or1k}/virt.c | 0
MAINTAINERS | 4 ++--
hw/Kconfig | 2 +-
hw/meson.build | 2 +-
hw/{openrisc => or1k}/Kconfig | 0
hw/{openrisc => or1k}/meson.build | 0
9 files changed, 4 insertions(+), 4 deletions(-)
rename hw/{openrisc => or1k}/boot.c (100%)
rename hw/{openrisc => or1k}/cputimer.c (100%)
rename hw/{openrisc => or1k}/openrisc_sim.c (100%)
rename hw/{openrisc => or1k}/virt.c (100%)
rename hw/{openrisc => or1k}/Kconfig (100%)
rename hw/{openrisc => or1k}/meson.build (100%)
diff --git a/hw/openrisc/boot.c b/hw/or1k/boot.c
similarity index 100%
rename from hw/openrisc/boot.c
rename to hw/or1k/boot.c
diff --git a/hw/openrisc/cputimer.c b/hw/or1k/cputimer.c
similarity index 100%
rename from hw/openrisc/cputimer.c
rename to hw/or1k/cputimer.c
diff --git a/hw/openrisc/openrisc_sim.c b/hw/or1k/openrisc_sim.c
similarity index 100%
rename from hw/openrisc/openrisc_sim.c
rename to hw/or1k/openrisc_sim.c
diff --git a/hw/openrisc/virt.c b/hw/or1k/virt.c
similarity index 100%
rename from hw/openrisc/virt.c
rename to hw/or1k/virt.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 508d37ab7a..00aa4f2a41 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -304,7 +304,7 @@ M: Stafford Horne <shorne@gmail.com>
S: Odd Fixes
F: docs/system/openrisc/cpu-features.rst
F: target/or1k/
-F: hw/openrisc/
+F: hw/or1k/
F: include/hw/or1k/
F: tests/functional/or1k/meson.build
F: tests/tcg/openrisc/
@@ -1493,7 +1493,7 @@ M: Jia Liu <proljc@gmail.com>
S: Maintained
F: docs/system/openrisc/or1k-sim.rst
F: hw/intc/ompic.c
-F: hw/openrisc/openrisc_sim.c
+F: hw/or1k/openrisc_sim.c
F: tests/functional/or1k/test_sim.py
PowerPC Machines
diff --git a/hw/Kconfig b/hw/Kconfig
index 9e6c789ae7..f8f92b5d03 100644
--- a/hw/Kconfig
+++ b/hw/Kconfig
@@ -58,7 +58,7 @@ source loongarch/Kconfig
source m68k/Kconfig
source microblaze/Kconfig
source mips/Kconfig
-source openrisc/Kconfig
+source or1k/Kconfig
source ppc/Kconfig
source riscv/Kconfig
source rx/Kconfig
diff --git a/hw/meson.build b/hw/meson.build
index 1022bdb806..66e46b8090 100644
--- a/hw/meson.build
+++ b/hw/meson.build
@@ -9,7 +9,7 @@ subdir('loongarch')
subdir('m68k')
subdir('microblaze')
subdir('mips')
-subdir('openrisc')
+subdir('or1k')
subdir('ppc')
subdir('remote')
subdir('riscv')
diff --git a/hw/openrisc/Kconfig b/hw/or1k/Kconfig
similarity index 100%
rename from hw/openrisc/Kconfig
rename to hw/or1k/Kconfig
diff --git a/hw/openrisc/meson.build b/hw/or1k/meson.build
similarity index 100%
rename from hw/openrisc/meson.build
rename to hw/or1k/meson.build
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/6] tests/tcg/or1k: Rename from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
` (2 preceding siblings ...)
2026-02-05 3:02 ` [PATCH 3/6] hw/or1k: " Richard Henderson
@ 2026-02-05 3:02 ` Richard Henderson
2026-02-06 11:16 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 5/6] docs/system/or1k: " Richard Henderson
` (4 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/{openrisc => or1k}/test_add.c | 0
tests/tcg/{openrisc => or1k}/test_addc.c | 0
tests/tcg/{openrisc => or1k}/test_addi.c | 0
tests/tcg/{openrisc => or1k}/test_addic.c | 0
tests/tcg/{openrisc => or1k}/test_and_or.c | 0
tests/tcg/{openrisc => or1k}/test_bf.c | 0
tests/tcg/{openrisc => or1k}/test_bnf.c | 0
tests/tcg/{openrisc => or1k}/test_div.c | 0
tests/tcg/{openrisc => or1k}/test_divu.c | 0
tests/tcg/{openrisc => or1k}/test_extx.c | 0
tests/tcg/{openrisc => or1k}/test_fx.c | 0
tests/tcg/{openrisc => or1k}/test_j.c | 0
tests/tcg/{openrisc => or1k}/test_jal.c | 0
tests/tcg/{openrisc => or1k}/test_lf_add.c | 0
tests/tcg/{openrisc => or1k}/test_lf_div.c | 0
tests/tcg/{openrisc => or1k}/test_lf_eqs.c | 0
tests/tcg/{openrisc => or1k}/test_lf_ges.c | 0
tests/tcg/{openrisc => or1k}/test_lf_gts.c | 0
tests/tcg/{openrisc => or1k}/test_lf_les.c | 0
tests/tcg/{openrisc => or1k}/test_lf_lts.c | 0
tests/tcg/{openrisc => or1k}/test_lf_mul.c | 0
tests/tcg/{openrisc => or1k}/test_lf_nes.c | 0
tests/tcg/{openrisc => or1k}/test_lf_rem.c | 0
tests/tcg/{openrisc => or1k}/test_lf_sub.c | 0
tests/tcg/{openrisc => or1k}/test_logic.c | 0
tests/tcg/{openrisc => or1k}/test_lx.c | 0
tests/tcg/{openrisc => or1k}/test_movhi.c | 0
tests/tcg/{openrisc => or1k}/test_mul.c | 0
tests/tcg/{openrisc => or1k}/test_muli.c | 0
tests/tcg/{openrisc => or1k}/test_mulu.c | 0
tests/tcg/{openrisc => or1k}/test_sfeq.c | 0
tests/tcg/{openrisc => or1k}/test_sfeqi.c | 0
tests/tcg/{openrisc => or1k}/test_sfges.c | 0
tests/tcg/{openrisc => or1k}/test_sfgesi.c | 0
tests/tcg/{openrisc => or1k}/test_sfgeu.c | 0
tests/tcg/{openrisc => or1k}/test_sfgeui.c | 0
tests/tcg/{openrisc => or1k}/test_sfgts.c | 0
tests/tcg/{openrisc => or1k}/test_sfgtsi.c | 0
tests/tcg/{openrisc => or1k}/test_sfgtu.c | 0
tests/tcg/{openrisc => or1k}/test_sfgtui.c | 0
tests/tcg/{openrisc => or1k}/test_sfles.c | 0
tests/tcg/{openrisc => or1k}/test_sflesi.c | 0
tests/tcg/{openrisc => or1k}/test_sfleu.c | 0
tests/tcg/{openrisc => or1k}/test_sfleui.c | 0
tests/tcg/{openrisc => or1k}/test_sflts.c | 0
tests/tcg/{openrisc => or1k}/test_sfltsi.c | 0
tests/tcg/{openrisc => or1k}/test_sfltu.c | 0
tests/tcg/{openrisc => or1k}/test_sfltui.c | 0
tests/tcg/{openrisc => or1k}/test_sfne.c | 0
tests/tcg/{openrisc => or1k}/test_sfnei.c | 0
tests/tcg/{openrisc => or1k}/test_sub.c | 0
MAINTAINERS | 2 +-
tests/tcg/{openrisc => or1k}/Makefile | 0
53 files changed, 1 insertion(+), 1 deletion(-)
rename tests/tcg/{openrisc => or1k}/test_add.c (100%)
rename tests/tcg/{openrisc => or1k}/test_addc.c (100%)
rename tests/tcg/{openrisc => or1k}/test_addi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_addic.c (100%)
rename tests/tcg/{openrisc => or1k}/test_and_or.c (100%)
rename tests/tcg/{openrisc => or1k}/test_bf.c (100%)
rename tests/tcg/{openrisc => or1k}/test_bnf.c (100%)
rename tests/tcg/{openrisc => or1k}/test_div.c (100%)
rename tests/tcg/{openrisc => or1k}/test_divu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_extx.c (100%)
rename tests/tcg/{openrisc => or1k}/test_fx.c (100%)
rename tests/tcg/{openrisc => or1k}/test_j.c (100%)
rename tests/tcg/{openrisc => or1k}/test_jal.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_add.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_div.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_eqs.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_ges.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_gts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_les.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_lts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_mul.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_nes.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_rem.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lf_sub.c (100%)
rename tests/tcg/{openrisc => or1k}/test_logic.c (100%)
rename tests/tcg/{openrisc => or1k}/test_lx.c (100%)
rename tests/tcg/{openrisc => or1k}/test_movhi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_mul.c (100%)
rename tests/tcg/{openrisc => or1k}/test_muli.c (100%)
rename tests/tcg/{openrisc => or1k}/test_mulu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfeq.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfeqi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfges.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgesi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgeu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgeui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgtsi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgtu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfgtui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfles.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sflesi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfleu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfleui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sflts.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfltsi.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfltu.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfltui.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfne.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sfnei.c (100%)
rename tests/tcg/{openrisc => or1k}/test_sub.c (100%)
rename tests/tcg/{openrisc => or1k}/Makefile (100%)
diff --git a/tests/tcg/openrisc/test_add.c b/tests/tcg/or1k/test_add.c
similarity index 100%
rename from tests/tcg/openrisc/test_add.c
rename to tests/tcg/or1k/test_add.c
diff --git a/tests/tcg/openrisc/test_addc.c b/tests/tcg/or1k/test_addc.c
similarity index 100%
rename from tests/tcg/openrisc/test_addc.c
rename to tests/tcg/or1k/test_addc.c
diff --git a/tests/tcg/openrisc/test_addi.c b/tests/tcg/or1k/test_addi.c
similarity index 100%
rename from tests/tcg/openrisc/test_addi.c
rename to tests/tcg/or1k/test_addi.c
diff --git a/tests/tcg/openrisc/test_addic.c b/tests/tcg/or1k/test_addic.c
similarity index 100%
rename from tests/tcg/openrisc/test_addic.c
rename to tests/tcg/or1k/test_addic.c
diff --git a/tests/tcg/openrisc/test_and_or.c b/tests/tcg/or1k/test_and_or.c
similarity index 100%
rename from tests/tcg/openrisc/test_and_or.c
rename to tests/tcg/or1k/test_and_or.c
diff --git a/tests/tcg/openrisc/test_bf.c b/tests/tcg/or1k/test_bf.c
similarity index 100%
rename from tests/tcg/openrisc/test_bf.c
rename to tests/tcg/or1k/test_bf.c
diff --git a/tests/tcg/openrisc/test_bnf.c b/tests/tcg/or1k/test_bnf.c
similarity index 100%
rename from tests/tcg/openrisc/test_bnf.c
rename to tests/tcg/or1k/test_bnf.c
diff --git a/tests/tcg/openrisc/test_div.c b/tests/tcg/or1k/test_div.c
similarity index 100%
rename from tests/tcg/openrisc/test_div.c
rename to tests/tcg/or1k/test_div.c
diff --git a/tests/tcg/openrisc/test_divu.c b/tests/tcg/or1k/test_divu.c
similarity index 100%
rename from tests/tcg/openrisc/test_divu.c
rename to tests/tcg/or1k/test_divu.c
diff --git a/tests/tcg/openrisc/test_extx.c b/tests/tcg/or1k/test_extx.c
similarity index 100%
rename from tests/tcg/openrisc/test_extx.c
rename to tests/tcg/or1k/test_extx.c
diff --git a/tests/tcg/openrisc/test_fx.c b/tests/tcg/or1k/test_fx.c
similarity index 100%
rename from tests/tcg/openrisc/test_fx.c
rename to tests/tcg/or1k/test_fx.c
diff --git a/tests/tcg/openrisc/test_j.c b/tests/tcg/or1k/test_j.c
similarity index 100%
rename from tests/tcg/openrisc/test_j.c
rename to tests/tcg/or1k/test_j.c
diff --git a/tests/tcg/openrisc/test_jal.c b/tests/tcg/or1k/test_jal.c
similarity index 100%
rename from tests/tcg/openrisc/test_jal.c
rename to tests/tcg/or1k/test_jal.c
diff --git a/tests/tcg/openrisc/test_lf_add.c b/tests/tcg/or1k/test_lf_add.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_add.c
rename to tests/tcg/or1k/test_lf_add.c
diff --git a/tests/tcg/openrisc/test_lf_div.c b/tests/tcg/or1k/test_lf_div.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_div.c
rename to tests/tcg/or1k/test_lf_div.c
diff --git a/tests/tcg/openrisc/test_lf_eqs.c b/tests/tcg/or1k/test_lf_eqs.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_eqs.c
rename to tests/tcg/or1k/test_lf_eqs.c
diff --git a/tests/tcg/openrisc/test_lf_ges.c b/tests/tcg/or1k/test_lf_ges.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_ges.c
rename to tests/tcg/or1k/test_lf_ges.c
diff --git a/tests/tcg/openrisc/test_lf_gts.c b/tests/tcg/or1k/test_lf_gts.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_gts.c
rename to tests/tcg/or1k/test_lf_gts.c
diff --git a/tests/tcg/openrisc/test_lf_les.c b/tests/tcg/or1k/test_lf_les.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_les.c
rename to tests/tcg/or1k/test_lf_les.c
diff --git a/tests/tcg/openrisc/test_lf_lts.c b/tests/tcg/or1k/test_lf_lts.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_lts.c
rename to tests/tcg/or1k/test_lf_lts.c
diff --git a/tests/tcg/openrisc/test_lf_mul.c b/tests/tcg/or1k/test_lf_mul.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_mul.c
rename to tests/tcg/or1k/test_lf_mul.c
diff --git a/tests/tcg/openrisc/test_lf_nes.c b/tests/tcg/or1k/test_lf_nes.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_nes.c
rename to tests/tcg/or1k/test_lf_nes.c
diff --git a/tests/tcg/openrisc/test_lf_rem.c b/tests/tcg/or1k/test_lf_rem.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_rem.c
rename to tests/tcg/or1k/test_lf_rem.c
diff --git a/tests/tcg/openrisc/test_lf_sub.c b/tests/tcg/or1k/test_lf_sub.c
similarity index 100%
rename from tests/tcg/openrisc/test_lf_sub.c
rename to tests/tcg/or1k/test_lf_sub.c
diff --git a/tests/tcg/openrisc/test_logic.c b/tests/tcg/or1k/test_logic.c
similarity index 100%
rename from tests/tcg/openrisc/test_logic.c
rename to tests/tcg/or1k/test_logic.c
diff --git a/tests/tcg/openrisc/test_lx.c b/tests/tcg/or1k/test_lx.c
similarity index 100%
rename from tests/tcg/openrisc/test_lx.c
rename to tests/tcg/or1k/test_lx.c
diff --git a/tests/tcg/openrisc/test_movhi.c b/tests/tcg/or1k/test_movhi.c
similarity index 100%
rename from tests/tcg/openrisc/test_movhi.c
rename to tests/tcg/or1k/test_movhi.c
diff --git a/tests/tcg/openrisc/test_mul.c b/tests/tcg/or1k/test_mul.c
similarity index 100%
rename from tests/tcg/openrisc/test_mul.c
rename to tests/tcg/or1k/test_mul.c
diff --git a/tests/tcg/openrisc/test_muli.c b/tests/tcg/or1k/test_muli.c
similarity index 100%
rename from tests/tcg/openrisc/test_muli.c
rename to tests/tcg/or1k/test_muli.c
diff --git a/tests/tcg/openrisc/test_mulu.c b/tests/tcg/or1k/test_mulu.c
similarity index 100%
rename from tests/tcg/openrisc/test_mulu.c
rename to tests/tcg/or1k/test_mulu.c
diff --git a/tests/tcg/openrisc/test_sfeq.c b/tests/tcg/or1k/test_sfeq.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfeq.c
rename to tests/tcg/or1k/test_sfeq.c
diff --git a/tests/tcg/openrisc/test_sfeqi.c b/tests/tcg/or1k/test_sfeqi.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfeqi.c
rename to tests/tcg/or1k/test_sfeqi.c
diff --git a/tests/tcg/openrisc/test_sfges.c b/tests/tcg/or1k/test_sfges.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfges.c
rename to tests/tcg/or1k/test_sfges.c
diff --git a/tests/tcg/openrisc/test_sfgesi.c b/tests/tcg/or1k/test_sfgesi.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgesi.c
rename to tests/tcg/or1k/test_sfgesi.c
diff --git a/tests/tcg/openrisc/test_sfgeu.c b/tests/tcg/or1k/test_sfgeu.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgeu.c
rename to tests/tcg/or1k/test_sfgeu.c
diff --git a/tests/tcg/openrisc/test_sfgeui.c b/tests/tcg/or1k/test_sfgeui.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgeui.c
rename to tests/tcg/or1k/test_sfgeui.c
diff --git a/tests/tcg/openrisc/test_sfgts.c b/tests/tcg/or1k/test_sfgts.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgts.c
rename to tests/tcg/or1k/test_sfgts.c
diff --git a/tests/tcg/openrisc/test_sfgtsi.c b/tests/tcg/or1k/test_sfgtsi.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgtsi.c
rename to tests/tcg/or1k/test_sfgtsi.c
diff --git a/tests/tcg/openrisc/test_sfgtu.c b/tests/tcg/or1k/test_sfgtu.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgtu.c
rename to tests/tcg/or1k/test_sfgtu.c
diff --git a/tests/tcg/openrisc/test_sfgtui.c b/tests/tcg/or1k/test_sfgtui.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfgtui.c
rename to tests/tcg/or1k/test_sfgtui.c
diff --git a/tests/tcg/openrisc/test_sfles.c b/tests/tcg/or1k/test_sfles.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfles.c
rename to tests/tcg/or1k/test_sfles.c
diff --git a/tests/tcg/openrisc/test_sflesi.c b/tests/tcg/or1k/test_sflesi.c
similarity index 100%
rename from tests/tcg/openrisc/test_sflesi.c
rename to tests/tcg/or1k/test_sflesi.c
diff --git a/tests/tcg/openrisc/test_sfleu.c b/tests/tcg/or1k/test_sfleu.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfleu.c
rename to tests/tcg/or1k/test_sfleu.c
diff --git a/tests/tcg/openrisc/test_sfleui.c b/tests/tcg/or1k/test_sfleui.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfleui.c
rename to tests/tcg/or1k/test_sfleui.c
diff --git a/tests/tcg/openrisc/test_sflts.c b/tests/tcg/or1k/test_sflts.c
similarity index 100%
rename from tests/tcg/openrisc/test_sflts.c
rename to tests/tcg/or1k/test_sflts.c
diff --git a/tests/tcg/openrisc/test_sfltsi.c b/tests/tcg/or1k/test_sfltsi.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfltsi.c
rename to tests/tcg/or1k/test_sfltsi.c
diff --git a/tests/tcg/openrisc/test_sfltu.c b/tests/tcg/or1k/test_sfltu.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfltu.c
rename to tests/tcg/or1k/test_sfltu.c
diff --git a/tests/tcg/openrisc/test_sfltui.c b/tests/tcg/or1k/test_sfltui.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfltui.c
rename to tests/tcg/or1k/test_sfltui.c
diff --git a/tests/tcg/openrisc/test_sfne.c b/tests/tcg/or1k/test_sfne.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfne.c
rename to tests/tcg/or1k/test_sfne.c
diff --git a/tests/tcg/openrisc/test_sfnei.c b/tests/tcg/or1k/test_sfnei.c
similarity index 100%
rename from tests/tcg/openrisc/test_sfnei.c
rename to tests/tcg/or1k/test_sfnei.c
diff --git a/tests/tcg/openrisc/test_sub.c b/tests/tcg/or1k/test_sub.c
similarity index 100%
rename from tests/tcg/openrisc/test_sub.c
rename to tests/tcg/or1k/test_sub.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 00aa4f2a41..208628cb8b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -307,7 +307,7 @@ F: target/or1k/
F: hw/or1k/
F: include/hw/or1k/
F: tests/functional/or1k/meson.build
-F: tests/tcg/openrisc/
+F: tests/tcg/or1k/
PowerPC TCG CPUs
M: Nicholas Piggin <npiggin@gmail.com>
diff --git a/tests/tcg/openrisc/Makefile b/tests/tcg/or1k/Makefile
similarity index 100%
rename from tests/tcg/openrisc/Makefile
rename to tests/tcg/or1k/Makefile
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/6] docs/system/or1k: Rename from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
` (3 preceding siblings ...)
2026-02-05 3:02 ` [PATCH 4/6] tests/tcg/or1k: " Richard Henderson
@ 2026-02-05 3:02 ` Richard Henderson
2026-02-06 11:18 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c Richard Henderson
` (3 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
Also rename docs/system/target-or1k.rst from target-openrisc.rst,
and update all toctree entries to match.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
MAINTAINERS | 4 ++--
docs/system/{openrisc => or1k}/cpu-features.rst | 0
docs/system/{openrisc => or1k}/emulation.rst | 0
docs/system/{openrisc => or1k}/or1k-sim.rst | 0
docs/system/{openrisc => or1k}/virt.rst | 0
docs/system/{target-openrisc.rst => target-or1k.rst} | 8 ++++----
docs/system/targets.rst | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
rename docs/system/{openrisc => or1k}/cpu-features.rst (100%)
rename docs/system/{openrisc => or1k}/emulation.rst (100%)
rename docs/system/{openrisc => or1k}/or1k-sim.rst (100%)
rename docs/system/{openrisc => or1k}/virt.rst (100%)
rename docs/system/{target-openrisc.rst => target-or1k.rst} (96%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 208628cb8b..b739cd59b1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -302,7 +302,7 @@ F: tests/tcg/mips/
OpenRISC TCG CPUs
M: Stafford Horne <shorne@gmail.com>
S: Odd Fixes
-F: docs/system/openrisc/cpu-features.rst
+F: docs/system/or1k/cpu-features.rst
F: target/or1k/
F: hw/or1k/
F: include/hw/or1k/
@@ -1491,7 +1491,7 @@ OpenRISC Machines
or1k-sim
M: Jia Liu <proljc@gmail.com>
S: Maintained
-F: docs/system/openrisc/or1k-sim.rst
+F: docs/system/or1k/or1k-sim.rst
F: hw/intc/ompic.c
F: hw/or1k/openrisc_sim.c
F: tests/functional/or1k/test_sim.py
diff --git a/docs/system/openrisc/cpu-features.rst b/docs/system/or1k/cpu-features.rst
similarity index 100%
rename from docs/system/openrisc/cpu-features.rst
rename to docs/system/or1k/cpu-features.rst
diff --git a/docs/system/openrisc/emulation.rst b/docs/system/or1k/emulation.rst
similarity index 100%
rename from docs/system/openrisc/emulation.rst
rename to docs/system/or1k/emulation.rst
diff --git a/docs/system/openrisc/or1k-sim.rst b/docs/system/or1k/or1k-sim.rst
similarity index 100%
rename from docs/system/openrisc/or1k-sim.rst
rename to docs/system/or1k/or1k-sim.rst
diff --git a/docs/system/openrisc/virt.rst b/docs/system/or1k/virt.rst
similarity index 100%
rename from docs/system/openrisc/virt.rst
rename to docs/system/or1k/virt.rst
diff --git a/docs/system/target-openrisc.rst b/docs/system/target-or1k.rst
similarity index 96%
rename from docs/system/target-openrisc.rst
rename to docs/system/target-or1k.rst
index 22cb2217a6..b1ee2a34a2 100644
--- a/docs/system/target-openrisc.rst
+++ b/docs/system/target-or1k.rst
@@ -55,17 +55,17 @@ Board-specific documentation
.. toctree::
:maxdepth: 1
- openrisc/or1k-sim
- openrisc/virt
+ or1k/or1k-sim
+ or1k/virt
Emulated CPU architecture support
=================================
.. toctree::
- openrisc/emulation
+ or1k/emulation
OpenRISC CPU features
=====================
.. toctree::
- openrisc/cpu-features
+ or1k/cpu-features
diff --git a/docs/system/targets.rst b/docs/system/targets.rst
index 38e2418801..5b12858b21 100644
--- a/docs/system/targets.rst
+++ b/docs/system/targets.rst
@@ -21,8 +21,8 @@ Contents:
target-loongarch
target-m68k
target-mips
+ target-or1k
target-ppc
- target-openrisc
target-riscv
target-rx
target-s390x
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
` (4 preceding siblings ...)
2026-02-05 3:02 ` [PATCH 5/6] docs/system/or1k: " Richard Henderson
@ 2026-02-05 3:02 ` Richard Henderson
2026-02-06 11:19 ` Stafford Horne
2026-02-05 5:23 ` [PATCH 0/6] or1k: Rename the architecture from openrisc Pierrick Bouvier
` (2 subsequent siblings)
8 siblings, 1 reply; 17+ messages in thread
From: Richard Henderson @ 2026-02-05 3:02 UTC (permalink / raw)
To: qemu-devel; +Cc: pierrick.bouvier, shorne
Match the filename to the machine type: or1k-sim.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/or1k/{openrisc_sim.c => or1k-sim.c} | 0
MAINTAINERS | 2 +-
hw/or1k/meson.build | 2 +-
3 files changed, 2 insertions(+), 2 deletions(-)
rename hw/or1k/{openrisc_sim.c => or1k-sim.c} (100%)
diff --git a/hw/or1k/openrisc_sim.c b/hw/or1k/or1k-sim.c
similarity index 100%
rename from hw/or1k/openrisc_sim.c
rename to hw/or1k/or1k-sim.c
diff --git a/MAINTAINERS b/MAINTAINERS
index b739cd59b1..e6c70b2b1c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1493,7 +1493,7 @@ M: Jia Liu <proljc@gmail.com>
S: Maintained
F: docs/system/or1k/or1k-sim.rst
F: hw/intc/ompic.c
-F: hw/or1k/openrisc_sim.c
+F: hw/or1k/or1k-sim.c
F: tests/functional/or1k/test_sim.py
PowerPC Machines
diff --git a/hw/or1k/meson.build b/hw/or1k/meson.build
index 49c274b848..a5c23f4f5a 100644
--- a/hw/or1k/meson.build
+++ b/hw/or1k/meson.build
@@ -1,7 +1,7 @@
openrisc_ss = ss.source_set()
openrisc_ss.add(files('cputimer.c'))
openrisc_ss.add(files('boot.c'))
-openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('openrisc_sim.c'))
+openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('or1k-sim.c'))
openrisc_ss.add(when: 'CONFIG_OR1K_VIRT', if_true: files('virt.c'))
hw_arch += {'or1k': openrisc_ss}
--
2.43.0
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 0/6] or1k: Rename the architecture from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
` (5 preceding siblings ...)
2026-02-05 3:02 ` [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c Richard Henderson
@ 2026-02-05 5:23 ` Pierrick Bouvier
2026-02-05 15:39 ` Philippe Mathieu-Daudé
2026-02-06 21:37 ` Philippe Mathieu-Daudé
8 siblings, 0 replies; 17+ messages in thread
From: Pierrick Bouvier @ 2026-02-05 5:23 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: shorne
On 2/4/26 7:02 PM, Richard Henderson wrote:
> We have an odd mix of 'openrisc' and 'or1k' in use.
> Standardize TARGET_ARCH and all of the filenames to use 'or1k'.
>
>
> r~
>
>
> Richard Henderson (6):
> target/or1k: Rename from openrisc
> include/hw/or1k: Rename from openrisc
> hw/or1k: Rename from openrisc
> tests/tcg/or1k: Rename from openrisc
> docs/system/or1k: Rename from openrisc
> hw/or1k: Rename or1k-sim.c from openrisc_sim.c
>
> include/exec/poison.h | 2 +-
> include/hw/{openrisc => or1k}/boot.h | 6 +++---
> include/system/arch_init.h | 2 +-
> include/user/abitypes.h | 2 +-
> linux-user/{openrisc => or1k}/sockbits.h | 0
> linux-user/{openrisc => or1k}/target_cpu.h | 0
> linux-user/{openrisc => or1k}/target_elf.h | 0
> linux-user/{openrisc => or1k}/target_errno_defs.h | 0
> linux-user/{openrisc => or1k}/target_fcntl.h | 0
> linux-user/{openrisc => or1k}/target_mman.h | 0
> linux-user/{openrisc => or1k}/target_prctl.h | 0
> linux-user/{openrisc => or1k}/target_proc.h | 0
> linux-user/{openrisc => or1k}/target_ptrace.h | 0
> linux-user/{openrisc => or1k}/target_resource.h | 0
> linux-user/{openrisc => or1k}/target_signal.h | 0
> linux-user/{openrisc => or1k}/target_structs.h | 0
> linux-user/{openrisc => or1k}/target_syscall.h | 0
> linux-user/{openrisc => or1k}/termbits.h | 0
> linux-user/syscall_defs.h | 4 ++--
> target/{openrisc => or1k}/cpu-param.h | 0
> target/{openrisc => or1k}/cpu-qom.h | 0
> target/{openrisc => or1k}/cpu.h | 0
> target/{openrisc => or1k}/exception.h | 0
> target/{openrisc => or1k}/helper.h | 0
> hw/{openrisc => or1k}/boot.c | 2 +-
> hw/{openrisc => or1k}/cputimer.c | 0
> hw/{openrisc/openrisc_sim.c => or1k/or1k-sim.c} | 2 +-
> hw/{openrisc => or1k}/virt.c | 2 +-
> linux-user/{openrisc => or1k}/cpu_loop.c | 0
> linux-user/{openrisc => or1k}/elfload.c | 0
> linux-user/{openrisc => or1k}/signal.c | 0
> system/qdev-monitor.c | 2 +-
> target/{openrisc => or1k}/cpu.c | 0
> target/{openrisc => or1k}/disas.c | 0
> target/{openrisc => or1k}/exception.c | 0
> target/{openrisc => or1k}/exception_helper.c | 0
> target/{openrisc => or1k}/fpu_helper.c | 0
> target/{openrisc => or1k}/gdbstub.c | 0
> target/{openrisc => or1k}/interrupt.c | 0
> target/{openrisc => or1k}/interrupt_helper.c | 0
> target/{openrisc => or1k}/machine.c | 0
> target/{openrisc => or1k}/mmu.c | 0
> target/{openrisc => or1k}/sys_helper.c | 0
> target/{openrisc => or1k}/translate.c | 0
> tests/tcg/{openrisc => or1k}/test_add.c | 0
> tests/tcg/{openrisc => or1k}/test_addc.c | 0
> tests/tcg/{openrisc => or1k}/test_addi.c | 0
> tests/tcg/{openrisc => or1k}/test_addic.c | 0
> tests/tcg/{openrisc => or1k}/test_and_or.c | 0
> tests/tcg/{openrisc => or1k}/test_bf.c | 0
> tests/tcg/{openrisc => or1k}/test_bnf.c | 0
> tests/tcg/{openrisc => or1k}/test_div.c | 0
> tests/tcg/{openrisc => or1k}/test_divu.c | 0
> tests/tcg/{openrisc => or1k}/test_extx.c | 0
> tests/tcg/{openrisc => or1k}/test_fx.c | 0
> tests/tcg/{openrisc => or1k}/test_j.c | 0
> tests/tcg/{openrisc => or1k}/test_jal.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_add.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_div.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_eqs.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_ges.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_gts.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_les.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_lts.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_mul.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_nes.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_rem.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_sub.c | 0
> tests/tcg/{openrisc => or1k}/test_logic.c | 0
> tests/tcg/{openrisc => or1k}/test_lx.c | 0
> tests/tcg/{openrisc => or1k}/test_movhi.c | 0
> tests/tcg/{openrisc => or1k}/test_mul.c | 0
> tests/tcg/{openrisc => or1k}/test_muli.c | 0
> tests/tcg/{openrisc => or1k}/test_mulu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfeq.c | 0
> tests/tcg/{openrisc => or1k}/test_sfeqi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfges.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgesi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgeu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgeui.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgts.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgtsi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgtu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgtui.c | 0
> tests/tcg/{openrisc => or1k}/test_sfles.c | 0
> tests/tcg/{openrisc => or1k}/test_sflesi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfleu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfleui.c | 0
> tests/tcg/{openrisc => or1k}/test_sflts.c | 0
> tests/tcg/{openrisc => or1k}/test_sfltsi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfltu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfltui.c | 0
> tests/tcg/{openrisc => or1k}/test_sfne.c | 0
> tests/tcg/{openrisc => or1k}/test_sfnei.c | 0
> tests/tcg/{openrisc => or1k}/test_sub.c | 0
> MAINTAINERS | 14 +++++++-------
> configs/targets/or1k-linux-user.mak | 2 +-
> configs/targets/or1k-softmmu.mak | 2 +-
> docs/system/{openrisc => or1k}/cpu-features.rst | 0
> docs/system/{openrisc => or1k}/emulation.rst | 0
> docs/system/{openrisc => or1k}/or1k-sim.rst | 0
> docs/system/{openrisc => or1k}/virt.rst | 0
> .../{target-openrisc.rst => target-or1k.rst} | 8 ++++----
> docs/system/targets.rst | 2 +-
> hw/Kconfig | 2 +-
> hw/meson.build | 2 +-
> hw/{openrisc => or1k}/Kconfig | 4 ++--
> hw/{openrisc => or1k}/meson.build | 4 ++--
> linux-user/meson.build | 2 +-
> linux-user/openrisc/meson.build | 5 -----
> linux-user/or1k/meson.build | 5 +++++
> linux-user/{openrisc => or1k}/syscall.tbl | 0
> linux-user/{openrisc => or1k}/syscallhdr.sh | 0
> target/Kconfig | 2 +-
> target/meson.build | 2 +-
> target/{openrisc => or1k}/Kconfig | 2 +-
> target/{openrisc => or1k}/insns.decode | 0
> target/{openrisc => or1k}/meson.build | 4 ++--
> tests/tcg/{openrisc => or1k}/Makefile | 0
> 119 files changed, 43 insertions(+), 43 deletions(-)
> rename include/hw/{openrisc => or1k}/boot.h (93%)
> rename linux-user/{openrisc => or1k}/sockbits.h (100%)
> rename linux-user/{openrisc => or1k}/target_cpu.h (100%)
> rename linux-user/{openrisc => or1k}/target_elf.h (100%)
> rename linux-user/{openrisc => or1k}/target_errno_defs.h (100%)
> rename linux-user/{openrisc => or1k}/target_fcntl.h (100%)
> rename linux-user/{openrisc => or1k}/target_mman.h (100%)
> rename linux-user/{openrisc => or1k}/target_prctl.h (100%)
> rename linux-user/{openrisc => or1k}/target_proc.h (100%)
> rename linux-user/{openrisc => or1k}/target_ptrace.h (100%)
> rename linux-user/{openrisc => or1k}/target_resource.h (100%)
> rename linux-user/{openrisc => or1k}/target_signal.h (100%)
> rename linux-user/{openrisc => or1k}/target_structs.h (100%)
> rename linux-user/{openrisc => or1k}/target_syscall.h (100%)
> rename linux-user/{openrisc => or1k}/termbits.h (100%)
> rename target/{openrisc => or1k}/cpu-param.h (100%)
> rename target/{openrisc => or1k}/cpu-qom.h (100%)
> rename target/{openrisc => or1k}/cpu.h (100%)
> rename target/{openrisc => or1k}/exception.h (100%)
> rename target/{openrisc => or1k}/helper.h (100%)
> rename hw/{openrisc => or1k}/boot.c (99%)
> rename hw/{openrisc => or1k}/cputimer.c (100%)
> rename hw/{openrisc/openrisc_sim.c => or1k/or1k-sim.c} (99%)
> rename hw/{openrisc => or1k}/virt.c (99%)
> rename linux-user/{openrisc => or1k}/cpu_loop.c (100%)
> rename linux-user/{openrisc => or1k}/elfload.c (100%)
> rename linux-user/{openrisc => or1k}/signal.c (100%)
> rename target/{openrisc => or1k}/cpu.c (100%)
> rename target/{openrisc => or1k}/disas.c (100%)
> rename target/{openrisc => or1k}/exception.c (100%)
> rename target/{openrisc => or1k}/exception_helper.c (100%)
> rename target/{openrisc => or1k}/fpu_helper.c (100%)
> rename target/{openrisc => or1k}/gdbstub.c (100%)
> rename target/{openrisc => or1k}/interrupt.c (100%)
> rename target/{openrisc => or1k}/interrupt_helper.c (100%)
> rename target/{openrisc => or1k}/machine.c (100%)
> rename target/{openrisc => or1k}/mmu.c (100%)
> rename target/{openrisc => or1k}/sys_helper.c (100%)
> rename target/{openrisc => or1k}/translate.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_add.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_addc.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_addi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_addic.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_and_or.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_bf.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_bnf.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_div.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_divu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_extx.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_fx.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_j.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_jal.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_add.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_div.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_eqs.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_ges.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_gts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_les.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_lts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_mul.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_nes.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_rem.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_sub.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_logic.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lx.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_movhi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_mul.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_muli.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_mulu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfeq.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfeqi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfges.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgesi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgeu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgeui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgtsi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgtu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgtui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfles.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sflesi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfleu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfleui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sflts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfltsi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfltu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfltui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfne.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfnei.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sub.c (100%)
> rename docs/system/{openrisc => or1k}/cpu-features.rst (100%)
> rename docs/system/{openrisc => or1k}/emulation.rst (100%)
> rename docs/system/{openrisc => or1k}/or1k-sim.rst (100%)
> rename docs/system/{openrisc => or1k}/virt.rst (100%)
> rename docs/system/{target-openrisc.rst => target-or1k.rst} (96%)
> rename hw/{openrisc => or1k}/Kconfig (89%)
> rename hw/{openrisc => or1k}/meson.build (60%)
> delete mode 100644 linux-user/openrisc/meson.build
> create mode 100644 linux-user/or1k/meson.build
> rename linux-user/{openrisc => or1k}/syscall.tbl (100%)
> rename linux-user/{openrisc => or1k}/syscallhdr.sh (100%)
> rename target/{openrisc => or1k}/Kconfig (76%)
> rename target/{openrisc => or1k}/insns.decode (100%)
> rename target/{openrisc => or1k}/meson.build (79%)
> rename tests/tcg/{openrisc => or1k}/Makefile (100%)
>
For the whole series:
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/6] or1k: Rename the architecture from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
` (6 preceding siblings ...)
2026-02-05 5:23 ` [PATCH 0/6] or1k: Rename the architecture from openrisc Pierrick Bouvier
@ 2026-02-05 15:39 ` Philippe Mathieu-Daudé
2026-02-05 15:47 ` Philippe Mathieu-Daudé
2026-02-06 21:37 ` Philippe Mathieu-Daudé
8 siblings, 1 reply; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-05 15:39 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier, shorne
On 5/2/26 04:02, Richard Henderson wrote:
> We have an odd mix of 'openrisc' and 'or1k' in use.
> Standardize TARGET_ARCH and all of the filenames to use 'or1k'.
I was confused thinking OpenRISC is the architecture, and 1k
(or 1000) is the first (processor model) implementation; since
there is also the 1200 one:
https://github.com/openrisc/or1200/blob/master/doc/openrisc1200_spec.txt
But then I read digging [*] I read "OR1200 is the original
implementation of the OpenRISC 1000 architecture."
[*] https://openrisc.io/implementations.html#OR1200
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/6] hw/or1k: Rename from openrisc
2026-02-05 3:02 ` [PATCH 3/6] hw/or1k: " Richard Henderson
@ 2026-02-05 15:43 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-05 15:43 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier, shorne
On 5/2/26 04:02, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> hw/{openrisc => or1k}/boot.c | 0
> hw/{openrisc => or1k}/cputimer.c | 0
> hw/{openrisc => or1k}/openrisc_sim.c | 0
> hw/{openrisc => or1k}/virt.c | 0
> MAINTAINERS | 4 ++--
> hw/Kconfig | 2 +-
> hw/meson.build | 2 +-
> hw/{openrisc => or1k}/Kconfig | 0
> hw/{openrisc => or1k}/meson.build | 0
> 9 files changed, 4 insertions(+), 4 deletions(-)
> rename hw/{openrisc => or1k}/boot.c (100%)
> rename hw/{openrisc => or1k}/cputimer.c (100%)
> rename hw/{openrisc => or1k}/openrisc_sim.c (100%)
> rename hw/{openrisc => or1k}/virt.c (100%)
> rename hw/{openrisc => or1k}/Kconfig (100%)
> rename hw/{openrisc => or1k}/meson.build (100%)
> diff --git a/hw/openrisc/meson.build b/hw/or1k/meson.build
> similarity index 100%
> rename from hw/openrisc/meson.build
> rename to hw/or1k/meson.build
Can we s/openrisc_ss/or1k_ss/ in this file?
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/6] target/or1k: Rename from openrisc
2026-02-05 3:02 ` [PATCH 1/6] target/or1k: Rename " Richard Henderson
@ 2026-02-05 15:46 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-05 15:46 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier, shorne
On 5/2/26 04:02, Richard Henderson wrote:
> This is the minimal change beginning with TARGET_ARCH in
> configs/targets/or1k-* from openrisc to or1k, then adjust
> TARGET_OR1K, QEMU_ARCH_OR1K, directory names,
> and meson.build to match.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/poison.h | 2 +-
> include/system/arch_init.h | 2 +-
> include/user/abitypes.h | 2 +-
> linux-user/{openrisc => or1k}/sockbits.h | 0
> linux-user/{openrisc => or1k}/target_cpu.h | 0
> linux-user/{openrisc => or1k}/target_elf.h | 0
> linux-user/{openrisc => or1k}/target_errno_defs.h | 0
> linux-user/{openrisc => or1k}/target_fcntl.h | 0
> linux-user/{openrisc => or1k}/target_mman.h | 0
> linux-user/{openrisc => or1k}/target_prctl.h | 0
> linux-user/{openrisc => or1k}/target_proc.h | 0
> linux-user/{openrisc => or1k}/target_ptrace.h | 0
> linux-user/{openrisc => or1k}/target_resource.h | 0
> linux-user/{openrisc => or1k}/target_signal.h | 0
> linux-user/{openrisc => or1k}/target_structs.h | 0
> linux-user/{openrisc => or1k}/target_syscall.h | 0
> linux-user/{openrisc => or1k}/termbits.h | 0
> linux-user/syscall_defs.h | 4 ++--
> target/{openrisc => or1k}/cpu-param.h | 0
> target/{openrisc => or1k}/cpu-qom.h | 0
> target/{openrisc => or1k}/cpu.h | 0
> target/{openrisc => or1k}/exception.h | 0
> target/{openrisc => or1k}/helper.h | 0
> linux-user/{openrisc => or1k}/cpu_loop.c | 0
> linux-user/{openrisc => or1k}/elfload.c | 0
> linux-user/{openrisc => or1k}/signal.c | 0
> system/qdev-monitor.c | 2 +-
> target/{openrisc => or1k}/cpu.c | 0
> target/{openrisc => or1k}/disas.c | 0
> target/{openrisc => or1k}/exception.c | 0
> target/{openrisc => or1k}/exception_helper.c | 0
> target/{openrisc => or1k}/fpu_helper.c | 0
> target/{openrisc => or1k}/gdbstub.c | 0
> target/{openrisc => or1k}/interrupt.c | 0
> target/{openrisc => or1k}/interrupt_helper.c | 0
> target/{openrisc => or1k}/machine.c | 0
> target/{openrisc => or1k}/mmu.c | 0
> target/{openrisc => or1k}/sys_helper.c | 0
> target/{openrisc => or1k}/translate.c | 0
> MAINTAINERS | 2 +-
> configs/targets/or1k-linux-user.mak | 2 +-
> configs/targets/or1k-softmmu.mak | 2 +-
> hw/openrisc/Kconfig | 4 ++--
> hw/openrisc/meson.build | 2 +-
> linux-user/meson.build | 2 +-
> linux-user/openrisc/meson.build | 5 -----
> linux-user/or1k/meson.build | 5 +++++
> linux-user/{openrisc => or1k}/syscall.tbl | 0
> linux-user/{openrisc => or1k}/syscallhdr.sh | 0
> target/Kconfig | 2 +-
> target/meson.build | 2 +-
s/openrisc_system_ss/or1k_system_ss/?
> target/{openrisc => or1k}/Kconfig | 2 +-
> target/{openrisc => or1k}/insns.decode | 0
> target/{openrisc => or1k}/meson.build | 4 ++--
> 54 files changed, 23 insertions(+), 23 deletions(-)
> rename linux-user/{openrisc => or1k}/sockbits.h (100%)
> rename linux-user/{openrisc => or1k}/target_cpu.h (100%)
> rename linux-user/{openrisc => or1k}/target_elf.h (100%)
> rename linux-user/{openrisc => or1k}/target_errno_defs.h (100%)
> rename linux-user/{openrisc => or1k}/target_fcntl.h (100%)
> rename linux-user/{openrisc => or1k}/target_mman.h (100%)
> rename linux-user/{openrisc => or1k}/target_prctl.h (100%)
> rename linux-user/{openrisc => or1k}/target_proc.h (100%)
> rename linux-user/{openrisc => or1k}/target_ptrace.h (100%)
> rename linux-user/{openrisc => or1k}/target_resource.h (100%)
> rename linux-user/{openrisc => or1k}/target_signal.h (100%)
> rename linux-user/{openrisc => or1k}/target_structs.h (100%)
> rename linux-user/{openrisc => or1k}/target_syscall.h (100%)
> rename linux-user/{openrisc => or1k}/termbits.h (100%)
Being picky, we could also rename the header guards (i.e.
OPENRISC_TARGET_CPU_H and OPENRISC_TARGET_*_H).
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/6] or1k: Rename the architecture from openrisc
2026-02-05 15:39 ` Philippe Mathieu-Daudé
@ 2026-02-05 15:47 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-05 15:47 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier, shorne
On 5/2/26 16:39, Philippe Mathieu-Daudé wrote:
> On 5/2/26 04:02, Richard Henderson wrote:
>> We have an odd mix of 'openrisc' and 'or1k' in use.
>> Standardize TARGET_ARCH and all of the filenames to use 'or1k'.
>
> I was confused thinking OpenRISC is the architecture, and 1k
> (or 1000) is the first (processor model) implementation; since
> there is also the 1200 one:
> https://github.com/openrisc/or1200/blob/master/doc/openrisc1200_spec.txt
>
> But then I read digging [*] I read "OR1200 is the original
> implementation of the OpenRISC 1000 architecture."
>
> [*] https://openrisc.io/implementations.html#OR1200
Series:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/6] include/hw/or1k: Rename from openrisc
2026-02-05 3:02 ` [PATCH 2/6] include/hw/or1k: " Richard Henderson
@ 2026-02-06 11:15 ` Stafford Horne
0 siblings, 0 replies; 17+ messages in thread
From: Stafford Horne @ 2026-02-06 11:15 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, pierrick.bouvier
Hi Richard,
On Thu, Feb 05, 2026 at 01:02:40PM +1000, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This looks fine to me.
Acked-by: Stafford Horne <shorne@gmail.com>
> ---
> include/hw/{openrisc => or1k}/boot.h | 6 +++---
> hw/openrisc/boot.c | 2 +-
> hw/openrisc/openrisc_sim.c | 2 +-
> hw/openrisc/virt.c | 2 +-
> MAINTAINERS | 2 +-
> 5 files changed, 7 insertions(+), 7 deletions(-)
> rename include/hw/{openrisc => or1k}/boot.h (93%)
>
> diff --git a/include/hw/openrisc/boot.h b/include/hw/or1k/boot.h
> similarity index 93%
> rename from include/hw/openrisc/boot.h
> rename to include/hw/or1k/boot.h
> index 3c481bdea6..2e6131580c 100644
> --- a/include/hw/openrisc/boot.h
> +++ b/include/hw/or1k/boot.h
> @@ -16,8 +16,8 @@
> * this program. If not, see <http://www.gnu.org/licenses/>.
> */
>
> -#ifndef OPENRISC_BOOT_H
> -#define OPENRISC_BOOT_H
> +#ifndef OR1K_BOOT_H
> +#define OR1K_BOOT_H
>
> #include "exec/cpu-defs.h"
> #include "hw/core/boards.h"
> @@ -32,4 +32,4 @@ hwaddr openrisc_load_initrd(void *fdt, const char *filename,
> uint32_t openrisc_load_fdt(MachineState *ms, void *fdt, hwaddr load_start,
> uint64_t mem_size);
>
> -#endif /* OPENRISC_BOOT_H */
> +#endif /* OR1K_BOOT_H */
> diff --git a/hw/openrisc/boot.c b/hw/openrisc/boot.c
> index 6256babc42..c18f4a6a9f 100644
> --- a/hw/openrisc/boot.c
> +++ b/hw/openrisc/boot.c
> @@ -12,7 +12,7 @@
> #include "exec/target_page.h"
> #include "elf.h"
> #include "hw/core/loader.h"
> -#include "hw/openrisc/boot.h"
> +#include "hw/or1k/boot.h"
> #include "system/device_tree.h"
> #include "system/qtest.h"
> #include "system/reset.h"
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 603d8ca0d9..f1b1f63274 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -26,7 +26,7 @@
> #include "hw/core/boards.h"
> #include "hw/char/serial-mm.h"
> #include "net/net.h"
> -#include "hw/openrisc/boot.h"
> +#include "hw/or1k/boot.h"
> #include "hw/core/qdev-properties.h"
> #include "system/address-spaces.h"
> #include "system/device_tree.h"
> diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
> index 54ce96666e..39f54058ab 100644
> --- a/hw/openrisc/virt.c
> +++ b/hw/openrisc/virt.c
> @@ -16,7 +16,7 @@
> #include "hw/core/boards.h"
> #include "hw/char/serial-mm.h"
> #include "hw/core/split-irq.h"
> -#include "hw/openrisc/boot.h"
> +#include "hw/or1k/boot.h"
> #include "hw/misc/sifive_test.h"
> #include "hw/pci/pci.h"
> #include "hw/pci-host/gpex.h"
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a0422936ad..508d37ab7a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -305,7 +305,7 @@ S: Odd Fixes
> F: docs/system/openrisc/cpu-features.rst
> F: target/or1k/
> F: hw/openrisc/
> -F: include/hw/openrisc/
> +F: include/hw/or1k/
> F: tests/functional/or1k/meson.build
> F: tests/tcg/openrisc/
>
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/6] tests/tcg/or1k: Rename from openrisc
2026-02-05 3:02 ` [PATCH 4/6] tests/tcg/or1k: " Richard Henderson
@ 2026-02-06 11:16 ` Stafford Horne
0 siblings, 0 replies; 17+ messages in thread
From: Stafford Horne @ 2026-02-06 11:16 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, pierrick.bouvier
Hi Richard,
On Thu, Feb 05, 2026 at 01:02:42PM +1000, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
OK.
Acked-by: Stafford Horne <shorne@gmail.com>
> ---
> tests/tcg/{openrisc => or1k}/test_add.c | 0
> tests/tcg/{openrisc => or1k}/test_addc.c | 0
> tests/tcg/{openrisc => or1k}/test_addi.c | 0
> tests/tcg/{openrisc => or1k}/test_addic.c | 0
> tests/tcg/{openrisc => or1k}/test_and_or.c | 0
> tests/tcg/{openrisc => or1k}/test_bf.c | 0
> tests/tcg/{openrisc => or1k}/test_bnf.c | 0
> tests/tcg/{openrisc => or1k}/test_div.c | 0
> tests/tcg/{openrisc => or1k}/test_divu.c | 0
> tests/tcg/{openrisc => or1k}/test_extx.c | 0
> tests/tcg/{openrisc => or1k}/test_fx.c | 0
> tests/tcg/{openrisc => or1k}/test_j.c | 0
> tests/tcg/{openrisc => or1k}/test_jal.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_add.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_div.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_eqs.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_ges.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_gts.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_les.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_lts.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_mul.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_nes.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_rem.c | 0
> tests/tcg/{openrisc => or1k}/test_lf_sub.c | 0
> tests/tcg/{openrisc => or1k}/test_logic.c | 0
> tests/tcg/{openrisc => or1k}/test_lx.c | 0
> tests/tcg/{openrisc => or1k}/test_movhi.c | 0
> tests/tcg/{openrisc => or1k}/test_mul.c | 0
> tests/tcg/{openrisc => or1k}/test_muli.c | 0
> tests/tcg/{openrisc => or1k}/test_mulu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfeq.c | 0
> tests/tcg/{openrisc => or1k}/test_sfeqi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfges.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgesi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgeu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgeui.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgts.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgtsi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgtu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfgtui.c | 0
> tests/tcg/{openrisc => or1k}/test_sfles.c | 0
> tests/tcg/{openrisc => or1k}/test_sflesi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfleu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfleui.c | 0
> tests/tcg/{openrisc => or1k}/test_sflts.c | 0
> tests/tcg/{openrisc => or1k}/test_sfltsi.c | 0
> tests/tcg/{openrisc => or1k}/test_sfltu.c | 0
> tests/tcg/{openrisc => or1k}/test_sfltui.c | 0
> tests/tcg/{openrisc => or1k}/test_sfne.c | 0
> tests/tcg/{openrisc => or1k}/test_sfnei.c | 0
> tests/tcg/{openrisc => or1k}/test_sub.c | 0
> MAINTAINERS | 2 +-
> tests/tcg/{openrisc => or1k}/Makefile | 0
> 53 files changed, 1 insertion(+), 1 deletion(-)
> rename tests/tcg/{openrisc => or1k}/test_add.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_addc.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_addi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_addic.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_and_or.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_bf.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_bnf.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_div.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_divu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_extx.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_fx.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_j.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_jal.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_add.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_div.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_eqs.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_ges.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_gts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_les.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_lts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_mul.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_nes.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_rem.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lf_sub.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_logic.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_lx.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_movhi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_mul.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_muli.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_mulu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfeq.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfeqi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfges.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgesi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgeu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgeui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgtsi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgtu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfgtui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfles.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sflesi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfleu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfleui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sflts.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfltsi.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfltu.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfltui.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfne.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sfnei.c (100%)
> rename tests/tcg/{openrisc => or1k}/test_sub.c (100%)
> rename tests/tcg/{openrisc => or1k}/Makefile (100%)
>
> diff --git a/tests/tcg/openrisc/test_add.c b/tests/tcg/or1k/test_add.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_add.c
> rename to tests/tcg/or1k/test_add.c
> diff --git a/tests/tcg/openrisc/test_addc.c b/tests/tcg/or1k/test_addc.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_addc.c
> rename to tests/tcg/or1k/test_addc.c
> diff --git a/tests/tcg/openrisc/test_addi.c b/tests/tcg/or1k/test_addi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_addi.c
> rename to tests/tcg/or1k/test_addi.c
> diff --git a/tests/tcg/openrisc/test_addic.c b/tests/tcg/or1k/test_addic.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_addic.c
> rename to tests/tcg/or1k/test_addic.c
> diff --git a/tests/tcg/openrisc/test_and_or.c b/tests/tcg/or1k/test_and_or.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_and_or.c
> rename to tests/tcg/or1k/test_and_or.c
> diff --git a/tests/tcg/openrisc/test_bf.c b/tests/tcg/or1k/test_bf.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_bf.c
> rename to tests/tcg/or1k/test_bf.c
> diff --git a/tests/tcg/openrisc/test_bnf.c b/tests/tcg/or1k/test_bnf.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_bnf.c
> rename to tests/tcg/or1k/test_bnf.c
> diff --git a/tests/tcg/openrisc/test_div.c b/tests/tcg/or1k/test_div.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_div.c
> rename to tests/tcg/or1k/test_div.c
> diff --git a/tests/tcg/openrisc/test_divu.c b/tests/tcg/or1k/test_divu.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_divu.c
> rename to tests/tcg/or1k/test_divu.c
> diff --git a/tests/tcg/openrisc/test_extx.c b/tests/tcg/or1k/test_extx.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_extx.c
> rename to tests/tcg/or1k/test_extx.c
> diff --git a/tests/tcg/openrisc/test_fx.c b/tests/tcg/or1k/test_fx.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_fx.c
> rename to tests/tcg/or1k/test_fx.c
> diff --git a/tests/tcg/openrisc/test_j.c b/tests/tcg/or1k/test_j.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_j.c
> rename to tests/tcg/or1k/test_j.c
> diff --git a/tests/tcg/openrisc/test_jal.c b/tests/tcg/or1k/test_jal.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_jal.c
> rename to tests/tcg/or1k/test_jal.c
> diff --git a/tests/tcg/openrisc/test_lf_add.c b/tests/tcg/or1k/test_lf_add.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_add.c
> rename to tests/tcg/or1k/test_lf_add.c
> diff --git a/tests/tcg/openrisc/test_lf_div.c b/tests/tcg/or1k/test_lf_div.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_div.c
> rename to tests/tcg/or1k/test_lf_div.c
> diff --git a/tests/tcg/openrisc/test_lf_eqs.c b/tests/tcg/or1k/test_lf_eqs.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_eqs.c
> rename to tests/tcg/or1k/test_lf_eqs.c
> diff --git a/tests/tcg/openrisc/test_lf_ges.c b/tests/tcg/or1k/test_lf_ges.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_ges.c
> rename to tests/tcg/or1k/test_lf_ges.c
> diff --git a/tests/tcg/openrisc/test_lf_gts.c b/tests/tcg/or1k/test_lf_gts.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_gts.c
> rename to tests/tcg/or1k/test_lf_gts.c
> diff --git a/tests/tcg/openrisc/test_lf_les.c b/tests/tcg/or1k/test_lf_les.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_les.c
> rename to tests/tcg/or1k/test_lf_les.c
> diff --git a/tests/tcg/openrisc/test_lf_lts.c b/tests/tcg/or1k/test_lf_lts.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_lts.c
> rename to tests/tcg/or1k/test_lf_lts.c
> diff --git a/tests/tcg/openrisc/test_lf_mul.c b/tests/tcg/or1k/test_lf_mul.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_mul.c
> rename to tests/tcg/or1k/test_lf_mul.c
> diff --git a/tests/tcg/openrisc/test_lf_nes.c b/tests/tcg/or1k/test_lf_nes.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_nes.c
> rename to tests/tcg/or1k/test_lf_nes.c
> diff --git a/tests/tcg/openrisc/test_lf_rem.c b/tests/tcg/or1k/test_lf_rem.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_rem.c
> rename to tests/tcg/or1k/test_lf_rem.c
> diff --git a/tests/tcg/openrisc/test_lf_sub.c b/tests/tcg/or1k/test_lf_sub.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lf_sub.c
> rename to tests/tcg/or1k/test_lf_sub.c
> diff --git a/tests/tcg/openrisc/test_logic.c b/tests/tcg/or1k/test_logic.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_logic.c
> rename to tests/tcg/or1k/test_logic.c
> diff --git a/tests/tcg/openrisc/test_lx.c b/tests/tcg/or1k/test_lx.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_lx.c
> rename to tests/tcg/or1k/test_lx.c
> diff --git a/tests/tcg/openrisc/test_movhi.c b/tests/tcg/or1k/test_movhi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_movhi.c
> rename to tests/tcg/or1k/test_movhi.c
> diff --git a/tests/tcg/openrisc/test_mul.c b/tests/tcg/or1k/test_mul.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_mul.c
> rename to tests/tcg/or1k/test_mul.c
> diff --git a/tests/tcg/openrisc/test_muli.c b/tests/tcg/or1k/test_muli.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_muli.c
> rename to tests/tcg/or1k/test_muli.c
> diff --git a/tests/tcg/openrisc/test_mulu.c b/tests/tcg/or1k/test_mulu.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_mulu.c
> rename to tests/tcg/or1k/test_mulu.c
> diff --git a/tests/tcg/openrisc/test_sfeq.c b/tests/tcg/or1k/test_sfeq.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfeq.c
> rename to tests/tcg/or1k/test_sfeq.c
> diff --git a/tests/tcg/openrisc/test_sfeqi.c b/tests/tcg/or1k/test_sfeqi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfeqi.c
> rename to tests/tcg/or1k/test_sfeqi.c
> diff --git a/tests/tcg/openrisc/test_sfges.c b/tests/tcg/or1k/test_sfges.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfges.c
> rename to tests/tcg/or1k/test_sfges.c
> diff --git a/tests/tcg/openrisc/test_sfgesi.c b/tests/tcg/or1k/test_sfgesi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgesi.c
> rename to tests/tcg/or1k/test_sfgesi.c
> diff --git a/tests/tcg/openrisc/test_sfgeu.c b/tests/tcg/or1k/test_sfgeu.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgeu.c
> rename to tests/tcg/or1k/test_sfgeu.c
> diff --git a/tests/tcg/openrisc/test_sfgeui.c b/tests/tcg/or1k/test_sfgeui.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgeui.c
> rename to tests/tcg/or1k/test_sfgeui.c
> diff --git a/tests/tcg/openrisc/test_sfgts.c b/tests/tcg/or1k/test_sfgts.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgts.c
> rename to tests/tcg/or1k/test_sfgts.c
> diff --git a/tests/tcg/openrisc/test_sfgtsi.c b/tests/tcg/or1k/test_sfgtsi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgtsi.c
> rename to tests/tcg/or1k/test_sfgtsi.c
> diff --git a/tests/tcg/openrisc/test_sfgtu.c b/tests/tcg/or1k/test_sfgtu.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgtu.c
> rename to tests/tcg/or1k/test_sfgtu.c
> diff --git a/tests/tcg/openrisc/test_sfgtui.c b/tests/tcg/or1k/test_sfgtui.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfgtui.c
> rename to tests/tcg/or1k/test_sfgtui.c
> diff --git a/tests/tcg/openrisc/test_sfles.c b/tests/tcg/or1k/test_sfles.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfles.c
> rename to tests/tcg/or1k/test_sfles.c
> diff --git a/tests/tcg/openrisc/test_sflesi.c b/tests/tcg/or1k/test_sflesi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sflesi.c
> rename to tests/tcg/or1k/test_sflesi.c
> diff --git a/tests/tcg/openrisc/test_sfleu.c b/tests/tcg/or1k/test_sfleu.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfleu.c
> rename to tests/tcg/or1k/test_sfleu.c
> diff --git a/tests/tcg/openrisc/test_sfleui.c b/tests/tcg/or1k/test_sfleui.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfleui.c
> rename to tests/tcg/or1k/test_sfleui.c
> diff --git a/tests/tcg/openrisc/test_sflts.c b/tests/tcg/or1k/test_sflts.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sflts.c
> rename to tests/tcg/or1k/test_sflts.c
> diff --git a/tests/tcg/openrisc/test_sfltsi.c b/tests/tcg/or1k/test_sfltsi.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfltsi.c
> rename to tests/tcg/or1k/test_sfltsi.c
> diff --git a/tests/tcg/openrisc/test_sfltu.c b/tests/tcg/or1k/test_sfltu.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfltu.c
> rename to tests/tcg/or1k/test_sfltu.c
> diff --git a/tests/tcg/openrisc/test_sfltui.c b/tests/tcg/or1k/test_sfltui.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfltui.c
> rename to tests/tcg/or1k/test_sfltui.c
> diff --git a/tests/tcg/openrisc/test_sfne.c b/tests/tcg/or1k/test_sfne.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfne.c
> rename to tests/tcg/or1k/test_sfne.c
> diff --git a/tests/tcg/openrisc/test_sfnei.c b/tests/tcg/or1k/test_sfnei.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sfnei.c
> rename to tests/tcg/or1k/test_sfnei.c
> diff --git a/tests/tcg/openrisc/test_sub.c b/tests/tcg/or1k/test_sub.c
> similarity index 100%
> rename from tests/tcg/openrisc/test_sub.c
> rename to tests/tcg/or1k/test_sub.c
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 00aa4f2a41..208628cb8b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -307,7 +307,7 @@ F: target/or1k/
> F: hw/or1k/
> F: include/hw/or1k/
> F: tests/functional/or1k/meson.build
> -F: tests/tcg/openrisc/
> +F: tests/tcg/or1k/
>
> PowerPC TCG CPUs
> M: Nicholas Piggin <npiggin@gmail.com>
> diff --git a/tests/tcg/openrisc/Makefile b/tests/tcg/or1k/Makefile
> similarity index 100%
> rename from tests/tcg/openrisc/Makefile
> rename to tests/tcg/or1k/Makefile
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/6] docs/system/or1k: Rename from openrisc
2026-02-05 3:02 ` [PATCH 5/6] docs/system/or1k: " Richard Henderson
@ 2026-02-06 11:18 ` Stafford Horne
0 siblings, 0 replies; 17+ messages in thread
From: Stafford Horne @ 2026-02-06 11:18 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, pierrick.bouvier
Hello,
On Thu, Feb 05, 2026 at 01:02:43PM +1000, Richard Henderson wrote:
> Also rename docs/system/target-or1k.rst from target-openrisc.rst,
> and update all toctree entries to match.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This looks OK to me.
Acked-by: Stafford Horne <shorne@gmail.com>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c
2026-02-05 3:02 ` [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c Richard Henderson
@ 2026-02-06 11:19 ` Stafford Horne
0 siblings, 0 replies; 17+ messages in thread
From: Stafford Horne @ 2026-02-06 11:19 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, pierrick.bouvier
Hello,
On Thu, Feb 05, 2026 at 01:02:44PM +1000, Richard Henderson wrote:
> Match the filename to the machine type: or1k-sim.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Stafford Horne <shorne@gmail.com>
> ---
> hw/or1k/{openrisc_sim.c => or1k-sim.c} | 0
> MAINTAINERS | 2 +-
> hw/or1k/meson.build | 2 +-
> 3 files changed, 2 insertions(+), 2 deletions(-)
> rename hw/or1k/{openrisc_sim.c => or1k-sim.c} (100%)
>
> diff --git a/hw/or1k/openrisc_sim.c b/hw/or1k/or1k-sim.c
> similarity index 100%
> rename from hw/or1k/openrisc_sim.c
> rename to hw/or1k/or1k-sim.c
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b739cd59b1..e6c70b2b1c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1493,7 +1493,7 @@ M: Jia Liu <proljc@gmail.com>
> S: Maintained
> F: docs/system/or1k/or1k-sim.rst
> F: hw/intc/ompic.c
> -F: hw/or1k/openrisc_sim.c
> +F: hw/or1k/or1k-sim.c
> F: tests/functional/or1k/test_sim.py
>
> PowerPC Machines
> diff --git a/hw/or1k/meson.build b/hw/or1k/meson.build
> index 49c274b848..a5c23f4f5a 100644
> --- a/hw/or1k/meson.build
> +++ b/hw/or1k/meson.build
> @@ -1,7 +1,7 @@
> openrisc_ss = ss.source_set()
> openrisc_ss.add(files('cputimer.c'))
> openrisc_ss.add(files('boot.c'))
> -openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('openrisc_sim.c'))
> +openrisc_ss.add(when: 'CONFIG_OR1K_SIM', if_true: files('or1k-sim.c'))
> openrisc_ss.add(when: 'CONFIG_OR1K_VIRT', if_true: files('virt.c'))
>
> hw_arch += {'or1k': openrisc_ss}
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 0/6] or1k: Rename the architecture from openrisc
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
` (7 preceding siblings ...)
2026-02-05 15:39 ` Philippe Mathieu-Daudé
@ 2026-02-06 21:37 ` Philippe Mathieu-Daudé
8 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-02-06 21:37 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pierrick.bouvier, shorne
On 5/2/26 04:02, Richard Henderson wrote:
> Richard Henderson (6):
> target/or1k: Rename from openrisc
> include/hw/or1k: Rename from openrisc
> hw/or1k: Rename from openrisc
> tests/tcg/or1k: Rename from openrisc
> docs/system/or1k: Rename from openrisc
> hw/or1k: Rename or1k-sim.c from openrisc_sim.c
Series queued, thanks.
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2026-02-06 21:37 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
2026-02-05 3:02 ` [PATCH 1/6] target/or1k: Rename " Richard Henderson
2026-02-05 15:46 ` Philippe Mathieu-Daudé
2026-02-05 3:02 ` [PATCH 2/6] include/hw/or1k: " Richard Henderson
2026-02-06 11:15 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 3/6] hw/or1k: " Richard Henderson
2026-02-05 15:43 ` Philippe Mathieu-Daudé
2026-02-05 3:02 ` [PATCH 4/6] tests/tcg/or1k: " Richard Henderson
2026-02-06 11:16 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 5/6] docs/system/or1k: " Richard Henderson
2026-02-06 11:18 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c Richard Henderson
2026-02-06 11:19 ` Stafford Horne
2026-02-05 5:23 ` [PATCH 0/6] or1k: Rename the architecture from openrisc Pierrick Bouvier
2026-02-05 15:39 ` Philippe Mathieu-Daudé
2026-02-05 15:47 ` Philippe Mathieu-Daudé
2026-02-06 21:37 ` Philippe Mathieu-Daudé
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