From: "Bernatowicz, Marcin" <marcin.bernatowicz@linux.intel.com>
To: Matthew Brost <matthew.brost@intel.com>, igt-dev@lists.freedesktop.org
Subject: Re: [PATCH v3 5/5] tests/intel/xe_exec_reset: Add long-spin-comp-reuse-many-preempt-threads
Date: Tue, 30 Sep 2025 16:29:13 +0200 [thread overview]
Message-ID: <aae3e970-18d1-4aba-8c15-305ee9ce8425@linux.intel.com> (raw)
In-Reply-To: <20250923211333.766147-6-matthew.brost@intel.com>
On 9/23/2025 11:13 PM, Matthew Brost wrote:
> Add long-spin-comp-reuse-many-preempt-threads which verifies compressed
> memory can be used during this test. Useful to test VF migration.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> lib/xe/xe_legacy.c | 38 +++++++++++++++++++++++++++++--------
> tests/intel/xe_exec_reset.c | 8 ++++++++
> 2 files changed, 38 insertions(+), 8 deletions(-)
>
> diff --git a/lib/xe/xe_legacy.c b/lib/xe/xe_legacy.c
> index cb53a8cfc8..74432a4b3a 100644
> --- a/lib/xe/xe_legacy.c
> +++ b/lib/xe/xe_legacy.c
> @@ -9,9 +9,11 @@
> #include "xe/xe_ioctl.h"
> #include "xe/xe_legacy.h"
> #include "xe/xe_spin.h"
> +#include "intel_pat.h"
>
> /* Batch buffer element count, in number of dwords(u32) */
> #define BATCH_DW_COUNT 16
> +#define COMPRESSION (0x1 << 13)
> #define SYSTEM (0x1 << 12)
> #define LONG_SPIN_REUSE_QUEUE (0x1 << 11)
> #define LONG_SPIN (0x1 << 8)
> @@ -72,6 +74,9 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> igt_assert_lte(n_exec_queues, MAX_N_EXECQUEUES);
>
> + if (flags & COMPRESSION)
> + igt_require(intel_gen(intel_get_drm_devid(fd)) >= 20);
> +
> if (flags & CLOSE_FD)
> fd = drm_open_driver(DRIVER_XE);
>
> @@ -79,11 +84,20 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> bo_size = sizeof(*data) * (n_execs + extra_execs);
> bo_size = xe_bb_size(fd, bo_size);
>
> - bo = xe_bo_create(fd, vm, bo_size,
> - flags & SYSTEM ?
> - system_memory(fd) :
> - vram_if_possible(fd, eci->gt_id),
> - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> + if (flags & COMPRESSION) {
> + bo = xe_bo_create_caching(fd, vm, bo_size,
> + flags & SYSTEM ?
> + system_memory(fd) :
> + vram_if_possible(fd, eci->gt_id),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
> + DRM_XE_GEM_CPU_CACHING_WC);
> + } else {
> + bo = xe_bo_create(fd, vm, bo_size,
> + flags & SYSTEM ?
> + system_memory(fd) :
> + vram_if_possible(fd, eci->gt_id),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> + }
> data = xe_bo_map(fd, bo, bo_size);
>
> for (i = 0; i < n_exec_queues; i++) {
> @@ -94,7 +108,14 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> sync[0].handle = syncobj_create(fd, 0);
>
> /* Binding mechanism based on use_capture_mode */
> - if (use_capture_mode) {
> + if (flags & COMPRESSION) {
> + int ret;
> +
> + ret = __xe_vm_bind(fd, vm, 0, bo, 0, addr, bo_size,
> + DRM_XE_VM_BIND_OP_MAP, 0, sync, 1, 0,
> + intel_get_pat_idx_uc_comp(fd), 0);
> + igt_assert(!ret);
> + } else if (use_capture_mode) {
> __xe_vm_bind_assert(fd, vm, 0, bo, 0, addr, bo_size,
> DRM_XE_VM_BIND_OP_MAP, flags, sync, 1, 0, 0);
> } else {
> @@ -141,7 +162,8 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
>
> xe_exec(fd, &exec);
>
> - if (!i && !(flags & CAT_ERROR) && !use_capture_mode)
> + if (!i && !(flags & CAT_ERROR) && !use_capture_mode &&
> + !(flags & COMPRESSION))
> xe_spin_wait_started(&data[i].spin);
> }
>
> @@ -202,7 +224,7 @@ xe_legacy_test_mode(int fd, struct drm_xe_engine_class_instance *eci,
> xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
>
> - if (!use_capture_mode && !(flags & (GT_RESET | CANCEL))) {
> + if (!use_capture_mode && !(flags & (GT_RESET | CANCEL | COMPRESSION))) {
> for (i = flags & LONG_SPIN ? n_exec_queues : 1;
> i < n_execs + extra_execs; i++)
> igt_assert_eq(data[i].data, 0xc0ffee);
I'm not that familiar with compression, IIUC we are not able to access
data when compressed so we do not do any checks ?
I can see the engines are busy while executing so assume that's enough
for basic check.
Acked-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
> diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> index 113ceb2178..f5db1ff8ba 100644
> --- a/tests/intel/xe_exec_reset.c
> +++ b/tests/intel/xe_exec_reset.c
> @@ -123,6 +123,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
> #define GT1 (0x1 << 10)
> #define LONG_SPIN_REUSE_QUEUE (0x1 << 11)
> #define SYSTEM (0x1 << 12)
> +#define COMPRESSION (0x1 << 13)
>
> /**
> * SUBTEST: %s-cat-error
> @@ -702,6 +703,9 @@ static void *thread(void *data)
> * SUBTEST: long-spin-sys-reuse-many-preempt-threads
> * Description: Test long spinners with many preemptable jobs on each engine instance with a thread, use queues again spinners complete, both GTs, use system memory
> *
> + * SUBTEST: long-spin-comp-reuse-many-preempt-threads
> + * Description: Test long spinners with many preemptable jobs on each engine instance with a thread, use queues again spinners complete, both GTs, use compressed memory
> + *
> * SUBTEST: long-spin-reuse-many-preempt-gt0-threads
> * Description: Test long spinners with many preemptable jobs on each engine instance with a thread, use queues again spinners complete, primary GT
> *
> @@ -878,6 +882,10 @@ igt_main
> threads(fd, 2, 16, SYSTEM | LONG_SPIN | PREEMPT |
> LONG_SPIN_REUSE_QUEUE);
>
> + igt_subtest("long-spin-comp-reuse-many-preempt-threads")
> + threads(fd, 2, 16, COMPRESSION | LONG_SPIN | PREEMPT |
> + LONG_SPIN_REUSE_QUEUE);
> +
> igt_subtest("long-spin-reuse-many-preempt-gt0-threads")
> threads(fd, 2, 16, LONG_SPIN | PREEMPT | GT0 |
> LONG_SPIN_REUSE_QUEUE);
next prev parent reply other threads:[~2025-09-30 14:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 21:13 [PATCH v3 0/5] Add tests to help verify VF migration Matthew Brost
2025-09-23 21:13 ` [PATCH v3 1/5] tests/intel/xe_exec_reset: Add job cancel tests Matthew Brost
2025-09-30 11:21 ` Bernatowicz, Marcin
2025-09-23 21:13 ` [PATCH v3 2/5] tests/intel/xe_exec_reset: Add timeslice preempt test Matthew Brost
2025-09-30 13:10 ` Bernatowicz, Marcin
2025-09-23 21:13 ` [PATCH v3 3/5] tests/intel/xe_exec_reset: Long spin tests Matthew Brost
2025-09-30 13:12 ` Bernatowicz, Marcin
2025-09-23 21:13 ` [PATCH v3 4/5] tests/intel/xe_exec_reset: Add long-spin-sys-reuse-many-preempt-threads Matthew Brost
2025-09-30 13:13 ` Bernatowicz, Marcin
2025-09-23 21:13 ` [PATCH v3 5/5] tests/intel/xe_exec_reset: Add long-spin-comp-reuse-many-preempt-threads Matthew Brost
2025-09-30 14:29 ` Bernatowicz, Marcin [this message]
2025-10-01 2:24 ` Matthew Brost
2025-10-01 17:41 ` Bernatowicz, Marcin
2025-09-30 17:35 ` Kamil Konieczny
2025-10-01 2:18 ` Matthew Brost
2025-10-01 11:55 ` Kamil Konieczny
2025-10-01 11:46 ` K V P, Satyanarayana
2025-10-06 9:17 ` Matthew Brost
2025-10-06 11:37 ` K V P, Satyanarayana
2025-09-24 1:48 ` ✓ Xe.CI.BAT: success for Add tests to help verify VF migration (rev3) Patchwork
2025-09-24 2:05 ` ✓ i915.CI.BAT: " Patchwork
2025-09-24 6:26 ` ✗ Xe.CI.Full: failure " Patchwork
2025-09-24 16:44 ` ✗ i915.CI.Full: " Patchwork
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