* [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 14:24 ` Andi Shyti
2026-08-28 16:54 ` Andi Shyti
2026-08-28 10:03 ` [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests Krzysztof Karas
` (7 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
The workqueue created by test_ipc() was named "i1915-selftest"
instead of "i915-selftest". Correct the driver name in the
workqueue name.
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
Reviewed-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index 6a305322e30d..ecb2d718f6a6 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -526,7 +526,7 @@ static int test_ipc(void *arg)
struct workqueue_struct *wq;
int ret = 0;
- wq = alloc_workqueue("i1915-selftest", WQ_PERCPU, 0);
+ wq = alloc_workqueue("i915-selftest", WQ_PERCPU, 0);
if (wq == NULL)
return -ENOMEM;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call
2026-08-28 10:03 ` [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call Krzysztof Karas
@ 2026-08-28 14:24 ` Andi Shyti
2026-08-28 16:54 ` Andi Shyti
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 14:24 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
On Fri, Aug 28, 2026 at 10:03:32AM +0000, Krzysztof Karas wrote:
> The workqueue created by test_ipc() was named "i1915-selftest"
> instead of "i915-selftest". Correct the driver name in the
> workqueue name.
>
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> Reviewed-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
You forgot to add my
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Please, don't forget next time.
Andi
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call
2026-08-28 10:03 ` [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call Krzysztof Karas
2026-08-28 14:24 ` Andi Shyti
@ 2026-08-28 16:54 ` Andi Shyti
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 16:54 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
On Fri, Aug 28, 2026 at 10:03:32AM +0000, Krzysztof Karas wrote:
> The workqueue created by test_ipc() was named "i1915-selftest"
> instead of "i915-selftest". Correct the driver name in the
> workqueue name.
>
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> Reviewed-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
just this patch: pushed to drm-intel-gt-next.
Thanks,
Andi
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
2026-08-28 10:03 ` [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 14:34 ` Andi Shyti
2026-08-28 16:41 ` Krzysztof Niemiec
2026-08-28 10:03 ` [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers Krzysztof Karas
` (6 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to device context aware drm
versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
.../gpu/drm/i915/selftests/i915_gem_evict.c | 75 +++--
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 223 ++++++++-----
drivers/gpu/drm/i915/selftests/i915_perf.c | 29 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 301 +++++++++++-------
drivers/gpu/drm/i915/selftests/i915_vma.c | 257 +++++++++------
drivers/gpu/drm/i915/selftests/intel_uncore.c | 47 +--
6 files changed, 566 insertions(+), 366 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index 718cddde7e73..604289814f79 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -29,6 +29,8 @@
#include "gt/intel_gt.h"
#include "gt/intel_gt_print.h"
+#include <drm/drm_print.h>
+
#include "i915_selftest.h"
#include "igt_flush_test.h"
@@ -47,6 +49,7 @@ static void quirk_add(struct drm_i915_gem_object *obj,
static int populate_ggtt(struct i915_ggtt *ggtt, struct list_head *objects)
{
+ struct drm_i915_private *i915 = ggtt->vm.i915;
struct drm_i915_gem_object *obj;
unsigned long count;
@@ -71,11 +74,13 @@ static int populate_ggtt(struct i915_ggtt *ggtt, struct list_head *objects)
quirk_add(obj, objects);
count++;
} while (1);
- pr_debug("Filled GGTT with %lu pages [%llu total]\n",
- count, ggtt->vm.total / PAGE_SIZE);
+ drm_dbg(&i915->drm,
+ "Filled GGTT with %lu pages [%llu total]\n", count,
+ ggtt->vm.total / PAGE_SIZE);
if (list_empty(&ggtt->vm.bound_list)) {
- pr_err("No objects on the GGTT inactive list!\n");
+ drm_err(&i915->drm,
+ "No objects on the GGTT inactive list!\n");
return -EINVAL;
}
@@ -107,6 +112,7 @@ static void cleanup_objects(struct i915_ggtt *ggtt, struct list_head *list)
static int igt_evict_something(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct i915_ggtt *ggtt = gt->ggtt;
LIST_HEAD(objects);
int err;
@@ -125,8 +131,9 @@ static int igt_evict_something(void *arg)
0);
mutex_unlock(&ggtt->vm.mutex);
if (err != -ENOSPC) {
- pr_err("i915_gem_evict_something failed on a full GGTT with err=%d\n",
- err);
+ drm_err(&i915->drm,
+ "i915_gem_evict_something failed on a full GGTT with err=%d\n",
+ err);
goto cleanup;
}
@@ -140,8 +147,9 @@ static int igt_evict_something(void *arg)
0);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("i915_gem_evict_something failed on a full GGTT with err=%d\n",
- err);
+ drm_err(&i915->drm,
+ "i915_gem_evict_something failed on a full GGTT with err=%d\n",
+ err);
goto cleanup;
}
@@ -177,7 +185,9 @@ static int igt_overcommit(void *arg)
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
if (vma != ERR_PTR(-ENOSPC)) {
- pr_err("Failed to evict+insert, i915_gem_object_ggtt_pin returned err=%d\n", (int)PTR_ERR_OR_ZERO(vma));
+ drm_err(>->i915->drm,
+ "Failed to evict+insert, i915_gem_object_ggtt_pin returned err=%d\n",
+ (int)PTR_ERR_OR_ZERO(vma));
err = -EINVAL;
goto cleanup;
}
@@ -190,6 +200,7 @@ static int igt_overcommit(void *arg)
static int igt_evict_for_vma(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct i915_ggtt *ggtt = gt->ggtt;
struct drm_mm_node target = {
.start = 0,
@@ -209,8 +220,9 @@ static int igt_evict_for_vma(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (err != -ENOSPC) {
- pr_err("i915_gem_evict_for_node on a full GGTT returned err=%d\n",
- err);
+ drm_err(&i915->drm,
+ "i915_gem_evict_for_node on a full GGTT returned err=%d\n",
+ err);
goto cleanup;
}
@@ -221,8 +233,8 @@ static int igt_evict_for_vma(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("i915_gem_evict_for_node returned err=%d\n",
- err);
+ drm_err(&i915->drm,
+ "i915_gem_evict_for_node returned err=%d\n", err);
goto cleanup;
}
@@ -248,6 +260,7 @@ static int igt_evict_for_cache_color(void *arg)
.size = I915_GTT_PAGE_SIZE,
.color = i915_gem_get_pat_index(gt->i915, I915_CACHE_LLC),
};
+ struct drm_i915_private *i915 = gt->i915;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
LIST_HEAD(objects);
@@ -273,7 +286,7 @@ static int igt_evict_for_cache_color(void *arg)
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
I915_GTT_PAGE_SIZE | flags);
if (IS_ERR(vma)) {
- pr_err("[0]i915_gem_object_ggtt_pin failed\n");
+ drm_err(&i915->drm, "[0]i915_gem_object_ggtt_pin failed\n");
err = PTR_ERR(vma);
goto cleanup;
}
@@ -290,7 +303,7 @@ static int igt_evict_for_cache_color(void *arg)
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
(I915_GTT_PAGE_SIZE * 2) | flags);
if (IS_ERR(vma)) {
- pr_err("[1]i915_gem_object_ggtt_pin failed\n");
+ drm_err(&i915->drm, "[1]i915_gem_object_ggtt_pin failed\n");
err = PTR_ERR(vma);
goto cleanup;
}
@@ -302,7 +315,8 @@ static int igt_evict_for_cache_color(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("[0]i915_gem_evict_for_node returned err=%d\n", err);
+ drm_err(&i915->drm,
+ "[0]i915_gem_evict_for_node returned err=%d\n", err);
goto cleanup;
}
@@ -315,7 +329,8 @@ static int igt_evict_for_cache_color(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (!err) {
- pr_err("[1]i915_gem_evict_for_node returned err=%d\n", err);
+ drm_err(&i915->drm,
+ "[1]i915_gem_evict_for_node returned err=%d\n", err);
err = -EINVAL;
goto cleanup;
}
@@ -332,6 +347,7 @@ static int igt_evict_for_cache_color(void *arg)
static int igt_evict_vm(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct i915_ggtt *ggtt = gt->ggtt;
struct i915_gem_ww_ctx ww;
LIST_HEAD(objects);
@@ -348,8 +364,9 @@ static int igt_evict_vm(void *arg)
err = i915_gem_evict_vm(&ggtt->vm, NULL, NULL);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
- err);
+ drm_err(&i915->drm,
+ "i915_gem_evict_vm on a full GGTT returned err=%d]\n",
+ err);
goto cleanup;
}
@@ -362,8 +379,9 @@ static int igt_evict_vm(void *arg)
}
if (err) {
- pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
- err);
+ drm_err(&i915->drm,
+ "i915_gem_evict_vm on a full GGTT returned err=%d]\n",
+ err);
goto cleanup;
}
@@ -443,7 +461,7 @@ static int igt_evict_contexts(void *arg)
} while (1);
drm_mm_remove_node(&hole);
mutex_unlock(&ggtt->vm.mutex);
- pr_info("Filled GGTT with %lu 1MiB nodes\n", count);
+ drm_info(&i915->drm, "Filled GGTT with %lu 1MiB nodes\n", count);
/* Overfill the GGTT with context objects and so try to evict one. */
for_each_engine(engine, gt, id) {
@@ -469,9 +487,9 @@ static int igt_evict_contexts(void *arg)
if (IS_ERR(rq)) {
/* When full, fail_if_busy will trigger EBUSY */
if (PTR_ERR(rq) != -EBUSY) {
- pr_err("Unexpected error from request alloc (on %s): %d\n",
- engine->name,
- (int)PTR_ERR(rq));
+ drm_err(&i915->drm,
+ "Unexpected error from request alloc (on %s): %d\n",
+ engine->name, (int)PTR_ERR(rq));
err = PTR_ERR(rq);
}
break;
@@ -492,16 +510,17 @@ static int igt_evict_contexts(void *arg)
err = 0;
} while(1);
onstack_fence_fini(&fence);
- pr_info("Submitted %lu contexts/requests on %s\n",
- count, engine->name);
+ drm_info(&i915->drm, "Submitted %lu contexts/requests on %s\n",
+ count, engine->name);
if (err)
break;
if (last) {
if (i915_request_wait(last, 0, HZ) < 0) {
err = -EIO;
i915_request_put(last);
- pr_err("Failed waiting for last request (on %s)",
- engine->name);
+ drm_err(&i915->drm,
+ "Failed waiting for last request (on %s)\n",
+ engine->name);
break;
}
i915_request_put(last);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index e6bd06774816..0c855f00c3ae 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -25,6 +25,8 @@
#include <linux/list_sort.h>
#include <linux/prime_numbers.h>
+#include <drm/drm_print.h>
+
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_internal.h"
#include "gem/i915_gem_lmem.h"
@@ -34,6 +36,7 @@
#include "gt/intel_gpu_commands.h"
#include "gt/intel_gtt.h"
+#include "../i915_drv.h"
#include "i915_random.h"
#include "i915_selftest.h"
#include "i915_vma_resource.h"
@@ -268,8 +271,10 @@ static int lowlevel_hole(struct i915_address_space *vm,
hole_size = KMALLOC_MAX_SIZE / sizeof(u32);
count = hole_size >> 1;
if (!count) {
- pr_debug("%s: hole is too small [%llx - %llx] >> %d: %lld\n",
- __func__, hole_start, hole_end, size, hole_size);
+ drm_dbg(&vm->i915->drm,
+ "%s: hole is too small [%llx - %llx] >> %d: %lld\n",
+ __func__, hole_start, hole_end, size,
+ hole_size);
break;
}
@@ -417,6 +422,7 @@ static int fill_hole(struct i915_address_space *vm,
const unsigned long max_pages =
min_t(u64, ULONG_MAX - 1, (hole_size / 2) >> ilog2(min_alignment));
const unsigned long max_step = max(int_sqrt(max_pages), 2UL);
+ struct drm_i915_private *i915 = vm->i915;
unsigned long npages, prime, flags;
struct i915_vma *vma;
LIST_HEAD(objects);
@@ -472,16 +478,23 @@ static int fill_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, offset | flags);
if (err) {
- pr_err("%s(%s) pin (forward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
- __func__, p->name, err, npages, prime, offset);
+ drm_err(&i915->drm,
+ "%s(%s) pin (forward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
+ __func__, p->name, err,
+ npages, prime, offset);
goto err;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (forward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size, drm_mm_node_allocated(&vma->node),
- offset);
+ drm_err(&i915->drm,
+ "%s(%s) (forward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size,
+ drm_mm_node_allocated(
+ &vma->node),
+ offset);
err = -EINVAL;
goto err;
}
@@ -512,18 +525,22 @@ static int fill_hole(struct i915_address_space *vm,
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (forward) moved vma.node=%llx + %llx, expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size,
- offset);
+ drm_err(&i915->drm,
+ "%s(%s) (forward) moved vma.node=%llx + %llx, expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size, offset);
err = -EINVAL;
goto err;
}
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("%s(%s) (forward) unbind of vma.node=%llx + %llx failed with err=%d\n",
- __func__, p->name, vma->node.start, vma->node.size,
- err);
+ drm_err(&i915->drm,
+ "%s(%s) (forward) unbind of vma.node=%llx + %llx failed with err=%d\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size, err);
goto err;
}
@@ -551,16 +568,23 @@ static int fill_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, offset | flags);
if (err) {
- pr_err("%s(%s) pin (backward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
- __func__, p->name, err, npages, prime, offset);
+ drm_err(&i915->drm,
+ "%s(%s) pin (backward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
+ __func__, p->name, err,
+ npages, prime, offset);
goto err;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (backward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size, drm_mm_node_allocated(&vma->node),
- offset);
+ drm_err(&i915->drm,
+ "%s(%s) (backward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size,
+ drm_mm_node_allocated(
+ &vma->node),
+ offset);
err = -EINVAL;
goto err;
}
@@ -591,18 +615,25 @@ static int fill_hole(struct i915_address_space *vm,
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (backward) moved vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size, drm_mm_node_allocated(&vma->node),
- offset);
+ drm_err(&i915->drm,
+ "%s(%s) (backward) moved vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size,
+ drm_mm_node_allocated(
+ &vma->node),
+ offset);
err = -EINVAL;
goto err;
}
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("%s(%s) (backward) unbind of vma.node=%llx + %llx failed with err=%d\n",
- __func__, p->name, vma->node.start, vma->node.size,
- err);
+ drm_err(&i915->drm,
+ "%s(%s) (backward) unbind of vma.node=%llx + %llx failed with err=%d\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size, err);
goto err;
}
@@ -636,6 +667,7 @@ static int walk_hole(struct i915_address_space *vm,
u64 hole_start, u64 hole_end,
unsigned long end_time)
{
+ struct drm_i915_private *i915 = vm->i915;
const u64 hole_size = hole_end - hole_start;
const unsigned long max_pages =
min_t(u64, ULONG_MAX - 1, hole_size >> PAGE_SHIFT);
@@ -672,25 +704,28 @@ static int walk_hole(struct i915_address_space *vm,
addr += round_up(obj->base.size, min_alignment)) {
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s bind failed at %llx + %llx [hole %llx- %llx] with err=%d\n",
- __func__, addr, vma->size,
- hole_start, hole_end, err);
+ drm_err(&i915->drm,
+ "%s bind failed at %llx + %llx [hole %llx- %llx] with err=%d\n",
+ __func__, addr, vma->size, hole_start,
+ hole_end, err);
goto err_put;
}
i915_vma_unpin(vma);
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
- __func__, addr, vma->size);
+ drm_err(&i915->drm,
+ "%s incorrect at %llx + %llx\n",
+ __func__, addr, vma->size);
err = -EINVAL;
goto err_put;
}
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("%s unbind failed at %llx + %llx with err=%d\n",
- __func__, addr, vma->size, err);
+ drm_err(&i915->drm,
+ "%s unbind failed at %llx + %llx with err=%d\n",
+ __func__, addr, vma->size, err);
goto err_put;
}
@@ -719,6 +754,7 @@ static int pot_hole(struct i915_address_space *vm,
u64 hole_start, u64 hole_end,
unsigned long end_time)
{
+ struct drm_i915_private *i915 = vm->i915;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
unsigned int min_alignment;
@@ -754,18 +790,18 @@ static int pot_hole(struct i915_address_space *vm,
addr += step) {
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s failed to pin object at %llx in hole [%llx - %llx], with err=%d\n",
- __func__,
- addr,
- hole_start, hole_end,
- err);
+ drm_err(&i915->drm,
+ "%s failed to pin object at %llx in hole [%llx - %llx], with err=%d\n",
+ __func__, addr, hole_start, hole_end,
+ err);
goto err_obj;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
- __func__, addr, vma->size);
+ drm_err(&i915->drm,
+ "%s incorrect at %llx + %llx\n",
+ __func__, addr, vma->size);
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
err = -EINVAL;
@@ -795,6 +831,7 @@ static int drunk_hole(struct i915_address_space *vm,
unsigned long end_time)
{
I915_RND_STATE(prng);
+ struct drm_i915_private *i915 = vm->i915;
unsigned int min_alignment;
unsigned int size;
unsigned long flags;
@@ -819,8 +856,10 @@ static int drunk_hole(struct i915_address_space *vm,
hole_size = KMALLOC_MAX_SIZE / sizeof(u32);
count = hole_size >> 1;
if (!count) {
- pr_debug("%s: hole is too small [%llx - %llx] >> %d: %lld\n",
- __func__, hole_start, hole_end, size, hole_size);
+ drm_dbg(&i915->drm,
+ "%s: hole is too small [%llx - %llx] >> %d: %lld\n",
+ __func__, hole_start, hole_end, size,
+ hole_size);
break;
}
@@ -859,18 +898,18 @@ static int drunk_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
- __func__,
- addr, BIT_ULL(size),
- hole_start, hole_end,
- err);
+ drm_err(&i915->drm,
+ "%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
+ __func__, addr, BIT_ULL(size),
+ hole_start, hole_end, err);
goto err_obj;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
- __func__, addr, BIT_ULL(size));
+ drm_err(&i915->drm,
+ "%s incorrect at %llx + %llx\n",
+ __func__, addr, BIT_ULL(size));
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
err = -EINVAL;
@@ -906,6 +945,7 @@ static int __shrink_hole(struct i915_address_space *vm,
unsigned long end_time)
{
struct drm_i915_gem_object *obj;
+ struct drm_i915_private *i915 = vm->i915;
unsigned long flags = PIN_OFFSET_FIXED | PIN_USER;
unsigned int min_alignment;
unsigned int order = 12;
@@ -939,15 +979,17 @@ static int __shrink_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
- __func__, addr, size, hole_start, hole_end, err);
+ drm_err(&i915->drm,
+ "%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
+ __func__, addr, size, hole_start, hole_end,
+ err);
break;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
- __func__, addr, size);
+ drm_err(&i915->drm, "%s incorrect at %llx + %llx\n",
+ __func__, addr, size);
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
err = -EINVAL;
@@ -1419,8 +1461,9 @@ static int igt_ggtt_page(void *arg)
io_mapping_unmap_atomic(vaddr);
if (val != n) {
- pr_err("insert page failed: found %d, expected %d\n",
- val, n);
+ drm_err(&i915->drm,
+ "insert page failed: found %d, expected %d\n",
+ val, n);
err = -EINVAL;
break;
}
@@ -1539,6 +1582,7 @@ static int igt_gtt_reserve(void *arg)
{
struct i915_ggtt *ggtt = arg;
struct drm_i915_gem_object *obj, *on;
+ struct drm_i915_private *i915 = ggtt->vm.i915;
I915_RND_STATE(prng);
LIST_HEAD(objects);
u64 total;
@@ -1578,8 +1622,9 @@ static int igt_gtt_reserve(void *arg)
err = reserve_gtt_with_resource(vma, total);
if (err) {
- pr_err("i915_gem_gtt_reserve (pass 1) failed at %llu/%llu with err=%d\n",
- total, ggtt->vm.total, err);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_reserve (pass 1) failed at %llu/%llu with err=%d\n",
+ total, ggtt->vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1587,9 +1632,10 @@ static int igt_gtt_reserve(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != total ||
vma->node.size != 2*I915_GTT_PAGE_SIZE) {
- pr_err("i915_gem_gtt_reserve (pass 1) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
- vma->node.start, vma->node.size,
- total, 2*I915_GTT_PAGE_SIZE);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_reserve (pass 1) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
+ vma->node.start, vma->node.size, total,
+ 2 * I915_GTT_PAGE_SIZE);
err = -EINVAL;
goto out;
}
@@ -1624,8 +1670,9 @@ static int igt_gtt_reserve(void *arg)
err = reserve_gtt_with_resource(vma, total);
if (err) {
- pr_err("i915_gem_gtt_reserve (pass 2) failed at %llu/%llu with err=%d\n",
- total, ggtt->vm.total, err);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_reserve (pass 2) failed at %llu/%llu with err=%d\n",
+ total, ggtt->vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1633,9 +1680,10 @@ static int igt_gtt_reserve(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != total ||
vma->node.size != 2*I915_GTT_PAGE_SIZE) {
- pr_err("i915_gem_gtt_reserve (pass 2) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
- vma->node.start, vma->node.size,
- total, 2*I915_GTT_PAGE_SIZE);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_reserve (pass 2) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
+ vma->node.start, vma->node.size, total,
+ 2 * I915_GTT_PAGE_SIZE);
err = -EINVAL;
goto out;
}
@@ -1654,7 +1702,8 @@ static int igt_gtt_reserve(void *arg)
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("i915_vma_unbind failed with err=%d!\n", err);
+ drm_err(&i915->drm,
+ "i915_vma_unbind failed with err=%d!\n", err);
goto out;
}
@@ -1665,8 +1714,9 @@ static int igt_gtt_reserve(void *arg)
err = reserve_gtt_with_resource(vma, offset);
if (err) {
- pr_err("i915_gem_gtt_reserve (pass 3) failed at %llu/%llu with err=%d\n",
- total, ggtt->vm.total, err);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_reserve (pass 3) failed at %llu/%llu with err=%d\n",
+ total, ggtt->vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1674,9 +1724,10 @@ static int igt_gtt_reserve(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != offset ||
vma->node.size != 2*I915_GTT_PAGE_SIZE) {
- pr_err("i915_gem_gtt_reserve (pass 3) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
- vma->node.start, vma->node.size,
- offset, 2*I915_GTT_PAGE_SIZE);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_reserve (pass 3) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
+ vma->node.start, vma->node.size, offset,
+ 2 * I915_GTT_PAGE_SIZE);
err = -EINVAL;
goto out;
}
@@ -1719,6 +1770,7 @@ static int igt_gtt_insert(void *arg)
{
struct i915_ggtt *ggtt = arg;
struct drm_i915_gem_object *obj, *on;
+ struct drm_i915_private *i915 = ggtt->vm.i915;
struct drm_mm_node tmp = {};
const struct invalid_insert {
u64 size;
@@ -1766,9 +1818,10 @@ static int igt_gtt_insert(void *arg)
0);
mutex_unlock(&ggtt->vm.mutex);
if (err != -ENOSPC) {
- pr_err("Invalid i915_gem_gtt_insert(.size=%llx, .alignment=%llx, .start=%llx, .end=%llx) succeeded (err=%d)\n",
- ii->size, ii->alignment, ii->start, ii->end,
- err);
+ drm_err(&i915->drm,
+ "Invalid i915_gem_gtt_insert(.size=%llx, .alignment=%llx, .start=%llx, .end=%llx) succeeded (err=%d)\n",
+ ii->size, ii->alignment, ii->start, ii->end,
+ err);
return -EINVAL;
}
}
@@ -1807,8 +1860,9 @@ static int igt_gtt_insert(void *arg)
break;
}
if (err) {
- pr_err("i915_gem_gtt_insert (pass 1) failed at %llu/%llu with err=%d\n",
- total, ggtt->vm.total, err);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_insert (pass 1) failed at %llu/%llu with err=%d\n",
+ total, ggtt->vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1827,7 +1881,8 @@ static int igt_gtt_insert(void *arg)
}
if (!drm_mm_node_allocated(&vma->node)) {
- pr_err("VMA was unexpectedly evicted!\n");
+ drm_err(&i915->drm,
+ "VMA was unexpectedly evicted!\n");
err = -EINVAL;
goto out;
}
@@ -1851,22 +1906,25 @@ static int igt_gtt_insert(void *arg)
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("i915_vma_unbind failed with err=%d!\n", err);
+ drm_err(&i915->drm,
+ "i915_vma_unbind failed with err=%d!\n", err);
goto out;
}
err = insert_gtt_with_resource(vma);
if (err) {
- pr_err("i915_gem_gtt_insert (pass 2) failed at %llu/%llu with err=%d\n",
- total, ggtt->vm.total, err);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_insert (pass 2) failed at %llu/%llu with err=%d\n",
+ total, ggtt->vm.total, err);
goto out;
}
track_vma_bind(vma);
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != offset) {
- pr_err("i915_gem_gtt_insert did not return node to its previous location (the only hole), expected address %llx, found %llx\n",
- offset, vma->node.start);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_insert did not return node to its previous location (the only hole), expected address %llx, found %llx\n",
+ offset, vma->node.start);
err = -EINVAL;
goto out;
}
@@ -1901,8 +1959,9 @@ static int igt_gtt_insert(void *arg)
err = insert_gtt_with_resource(vma);
if (err) {
- pr_err("i915_gem_gtt_insert (pass 3) failed at %llu/%llu with err=%d\n",
- total, ggtt->vm.total, err);
+ drm_err(&i915->drm,
+ "i915_gem_gtt_insert (pass 3) failed at %llu/%llu with err=%d\n",
+ total, ggtt->vm.total, err);
goto out;
}
track_vma_bind(vma);
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c
index e9469e27f42a..d2a1a901d47b 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf.c
+++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
@@ -14,6 +14,8 @@
#include "igt_flush_test.h"
#include "lib_sw_fence.h"
+#include <drm/drm_print.h>
+
#define TEST_OA_CONFIG_UUID "12345678-1234-1234-1234-1234567890ab"
static int
@@ -263,20 +265,21 @@ static int live_noa_delay(void *arg)
t1 = poll_status(rq, 0x102);
preempt_enable();
- pr_info("CPU delay: %lluns, expected %lluns\n",
- ktime_sub(t1, t0), expected);
+ drm_info(&i915->drm,
+ "CPU delay: %lluns, expected %lluns\n", ktime_sub(t1, t0),
+ expected);
delay = intel_read_status_page(stream->engine, 0x102);
delay -= intel_read_status_page(stream->engine, 0x100);
delay = intel_gt_clock_interval_to_ns(stream->engine->gt, delay);
- pr_info("GPU delay: %uns, expected %lluns\n",
- delay, expected);
+ drm_info(&i915->drm,
+ "GPU delay: %uns, expected %lluns\n", delay, expected);
if (4 * delay < 3 * expected || 2 * delay > 3 * expected) {
- pr_err("GPU delay [%uus] outside of expected threshold! [%lluus, %lluus]\n",
- delay / 1000,
- div_u64(3 * expected, 4000),
- div_u64(3 * expected, 2000));
+ drm_err(&i915->drm,
+ "GPU delay [%uus] outside of expected threshold! [%lluus, %lluus]\n",
+ delay / 1000, div_u64(3 * expected, 4000),
+ div_u64(3 * expected, 2000));
err = -EINVAL;
}
@@ -385,7 +388,7 @@ static int live_noa_gpr(void *arg)
i915_request_add(rq);
if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE, HZ / 2) < 0) {
- pr_err("noa_wait timed out\n");
+ drm_err(&i915->drm, "noa_wait timed out\n");
intel_gt_set_wedged(stream->engine->gt);
err = -EIO;
goto out_rq;
@@ -396,14 +399,16 @@ static int live_noa_gpr(void *arg)
if (store[i] == STACK_MAGIC)
continue;
- pr_err("GPR[%d] lost, found:%08x, expected:%08x!\n",
- i, store[i], STACK_MAGIC);
+ drm_err(&i915->drm,
+ "GPR[%d] lost, found:%08x, expected:%08x!\n", i,
+ store[i], STACK_MAGIC);
err = -EINVAL;
}
/* Verify that the user's scratch page was not used for GPR storage */
if (memchr_inv(scratch, POISON_FREE, PAGE_SIZE)) {
- pr_err("Scratch page overwritten!\n");
+ drm_err(&i915->drm,
+ "Scratch page overwritten!\n");
igt_hexdump(scratch, 4096);
err = -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index e1a7c454a0a9..431298f774e6 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -98,49 +98,54 @@ static int igt_wait_request(void *arg)
i915_request_get(request);
if (i915_request_wait(request, 0, 0) != -ETIME) {
- pr_err("request wait (busy query) succeeded (expected timeout before submit!)\n");
+ drm_err(&i915->drm,
+ "request wait (busy query) succeeded (expected timeout before submit!)\n");
goto out_request;
}
if (i915_request_wait(request, 0, T) != -ETIME) {
- pr_err("request wait succeeded (expected timeout before submit!)\n");
+ drm_err(&i915->drm,
+ "request wait succeeded (expected timeout before submit!)\n");
goto out_request;
}
if (i915_request_completed(request)) {
- pr_err("request completed before submit!!\n");
+ drm_err(&i915->drm, "request completed before submit!!\n");
goto out_request;
}
i915_request_add(request);
if (i915_request_wait(request, 0, 0) != -ETIME) {
- pr_err("request wait (busy query) succeeded (expected timeout after submit!)\n");
+ drm_err(&i915->drm,
+ "request wait (busy query) succeeded (expected timeout after submit!)\n");
goto out_request;
}
if (i915_request_completed(request)) {
- pr_err("request completed immediately!\n");
+ drm_err(&i915->drm, "request completed immediately!\n");
goto out_request;
}
if (i915_request_wait(request, 0, T / 2) != -ETIME) {
- pr_err("request wait succeeded (expected timeout!)\n");
+ drm_err(&i915->drm,
+ "request wait succeeded (expected timeout!)\n");
goto out_request;
}
if (i915_request_wait(request, 0, T) == -ETIME) {
- pr_err("request wait timed out!\n");
+ drm_err(&i915->drm, "request wait timed out!\n");
goto out_request;
}
if (!i915_request_completed(request)) {
- pr_err("request not complete after waiting!\n");
+ drm_err(&i915->drm, "request not complete after waiting!\n");
goto out_request;
}
if (i915_request_wait(request, 0, T) == -ETIME) {
- pr_err("request wait timed out when already complete!\n");
+ drm_err(&i915->drm,
+ "request wait timed out when already complete!\n");
goto out_request;
}
@@ -165,34 +170,38 @@ static int igt_fence_wait(void *arg)
return PTR_ERR(request);
if (dma_fence_wait_timeout(&request->fence, false, T) != -ETIME) {
- pr_err("fence wait success before submit (expected timeout)!\n");
+ drm_err(&i915->drm,
+ "fence wait success before submit (expected timeout)!\n");
goto out;
}
i915_request_add(request);
if (dma_fence_is_signaled(&request->fence)) {
- pr_err("fence signaled immediately!\n");
+ drm_err(&i915->drm, "fence signaled immediately!\n");
goto out;
}
if (dma_fence_wait_timeout(&request->fence, false, T / 2) != -ETIME) {
- pr_err("fence wait success after submit (expected timeout)!\n");
+ drm_err(&i915->drm,
+ "fence wait success after submit (expected timeout)!\n");
goto out;
}
if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
- pr_err("fence wait timed out (expected success)!\n");
+ drm_err(&i915->drm,
+ "fence wait timed out (expected success)!\n");
goto out;
}
if (!dma_fence_is_signaled(&request->fence)) {
- pr_err("fence unsignaled after waiting!\n");
+ drm_err(&i915->drm, "fence unsignaled after waiting!\n");
goto out;
}
if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
- pr_err("fence wait timed out when complete (expected success)!\n");
+ drm_err(&i915->drm,
+ "fence wait timed out when complete (expected success)!\n");
goto out;
}
@@ -245,7 +254,8 @@ static int igt_request_rewind(void *arg)
/* Simulate preemption by manual reordering */
if (!mock_cancel_request(request)) {
- pr_err("failed to cancel request (already executed)!\n");
+ drm_err(&i915->drm,
+ "failed to cancel request (already executed)!\n");
i915_request_add(vip);
goto err_context_1;
}
@@ -257,12 +267,13 @@ static int igt_request_rewind(void *arg)
if (i915_request_wait(vip, 0, HZ) == -ETIME) {
- pr_err("timed out waiting for high priority request\n");
+ drm_err(&i915->drm,
+ "timed out waiting for high priority request\n");
goto err;
}
if (i915_request_completed(request)) {
- pr_err("low priority request already completed\n");
+ drm_err(&i915->drm, "low priority request already completed\n");
goto err;
}
@@ -313,6 +324,7 @@ static void __igt_breadcrumbs_smoketest(struct kthread_work *work)
struct smoke_thread *thread = container_of(work, typeof(*thread), work);
struct smoketest *t = thread->t;
const unsigned int max_batch = min(t->ncontexts, t->max_batch) - 1;
+ struct drm_i915_private *i915 = t->engine->i915;
const unsigned int total = 4 * t->ncontexts + 1;
unsigned int num_waits = 0, num_fences = 0;
struct i915_request **requests;
@@ -406,10 +418,11 @@ static void __igt_breadcrumbs_smoketest(struct kthread_work *work)
5 * HZ)) {
struct i915_request *rq = requests[count - 1];
- pr_err("waiting for %d/%d fences (last %llx:%lld) on %s timed out!\n",
- atomic_read(&wait->pending), count,
- rq->fence.context, rq->fence.seqno,
- t->engine->name);
+ drm_err(&i915->drm,
+ "waiting for %d/%d fences (last %llx:%lld) on %s timed out!\n",
+ atomic_read(&wait->pending), count,
+ rq->fence.context, rq->fence.seqno,
+ t->engine->name);
GEM_TRACE_DUMP();
intel_gt_set_wedged(t->engine->gt);
@@ -423,8 +436,9 @@ static void __igt_breadcrumbs_smoketest(struct kthread_work *work)
if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
&rq->fence.flags)) {
- pr_err("%llu:%llu was not signaled!\n",
- rq->fence.context, rq->fence.seqno);
+ drm_err(&i915->drm,
+ "%llu:%llu was not signaled!\n",
+ rq->fence.context, rq->fence.seqno);
err = -EINVAL;
}
@@ -523,10 +537,10 @@ static int mock_breadcrumbs_smoketest(void *arg)
kthread_destroy_worker(threads[n].worker);
}
- pr_info("Completed %lu waits for %lu fence across %d cpus\n",
- atomic_long_read(&t.num_waits),
- atomic_long_read(&t.num_fences),
- ncpus);
+ drm_info(&i915->drm,
+ "Completed %lu waits for %lu fence across %d cpus\n",
+ atomic_long_read(&t.num_waits),
+ atomic_long_read(&t.num_fences), ncpus);
out_contexts:
for (n = 0; n < t.ncontexts; n++) {
@@ -632,10 +646,10 @@ static int live_nop_request(void *arg)
if (err)
return err;
- pr_info("Request latencies on %s: 1 = %lluns, %lu = %lluns\n",
- engine->name,
- ktime_to_ns(times[0]),
- prime, div64_u64(ktime_to_ns(times[1]), prime));
+ drm_info(&i915->drm,
+ "Request latencies on %s: 1 = %lluns, %lu = %lluns\n",
+ engine->name, ktime_to_ns(times[0]), prime,
+ div64_u64(ktime_to_ns(times[1]), prime));
}
return err;
@@ -643,6 +657,7 @@ static int live_nop_request(void *arg)
static int __cancel_inactive(struct intel_engine_cs *engine)
{
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *ce;
struct igt_spinner spin;
struct i915_request *rq;
@@ -663,7 +678,8 @@ static int __cancel_inactive(struct intel_engine_cs *engine)
goto out_ce;
}
- pr_debug("%s: Cancelling inactive request\n", engine->name);
+ drm_dbg(&i915->drm, "%s: Cancelling inactive request\n",
+ engine->name);
i915_request_cancel(rq, -EINTR);
i915_request_get(rq);
i915_request_add(rq);
@@ -671,15 +687,17 @@ static int __cancel_inactive(struct intel_engine_cs *engine)
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to cancel inactive request\n", engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to cancel inactive request\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
}
if (rq->fence.error != -EINTR) {
- pr_err("%s: fence not cancelled (%u)\n",
- engine->name, rq->fence.error);
+ drm_err(&i915->drm, "%s: fence not cancelled (%u)\n",
+ engine->name, rq->fence.error);
err = -EINVAL;
}
@@ -690,12 +708,14 @@ static int __cancel_inactive(struct intel_engine_cs *engine)
out_spin:
igt_spinner_fini(&spin);
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ drm_err(&i915->drm, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
static int __cancel_active(struct intel_engine_cs *engine)
{
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *ce;
struct igt_spinner spin;
struct i915_request *rq;
@@ -716,13 +736,15 @@ static int __cancel_active(struct intel_engine_cs *engine)
goto out_ce;
}
- pr_debug("%s: Cancelling active request\n", engine->name);
+ drm_dbg(&i915->drm, "%s: Cancelling active request\n",
+ engine->name);
i915_request_get(rq);
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("Failed to start spinner on %s\n", engine->name);
+ drm_err(&i915->drm, "Failed to start spinner on %s\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
@@ -732,15 +754,16 @@ static int __cancel_active(struct intel_engine_cs *engine)
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to cancel active request\n", engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to cancel active request\n", engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
}
if (rq->fence.error != -EINTR) {
- pr_err("%s: fence not cancelled (%u)\n",
- engine->name, rq->fence.error);
+ drm_err(&i915->drm, "%s: fence not cancelled (%u)\n",
+ engine->name, rq->fence.error);
err = -EINVAL;
}
@@ -751,12 +774,14 @@ static int __cancel_active(struct intel_engine_cs *engine)
out_spin:
igt_spinner_fini(&spin);
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ drm_err(&i915->drm, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
static int __cancel_completed(struct intel_engine_cs *engine)
{
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *ce;
struct igt_spinner spin;
struct i915_request *rq;
@@ -785,11 +810,12 @@ static int __cancel_completed(struct intel_engine_cs *engine)
goto out_rq;
}
- pr_debug("%s: Cancelling completed request\n", engine->name);
+ drm_dbg(&i915->drm, "%s: Cancelling completed request\n",
+ engine->name);
i915_request_cancel(rq, -EINTR);
if (rq->fence.error) {
- pr_err("%s: fence not cancelled (%u)\n",
- engine->name, rq->fence.error);
+ drm_err(&i915->drm, "%s: fence not cancelled (%u)\n",
+ engine->name, rq->fence.error);
err = -EINVAL;
}
@@ -800,7 +826,8 @@ static int __cancel_completed(struct intel_engine_cs *engine)
out_spin:
igt_spinner_fini(&spin);
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ drm_err(&i915->drm, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
@@ -846,14 +873,16 @@ static int __cancel_reset(struct drm_i915_private *i915,
goto out_ce;
}
- pr_debug("%s: Cancelling active non-preemptable request\n",
- engine->name);
+ drm_dbg(&i915->drm,
+ "%s: Cancelling active non-preemptable request\n",
+ engine->name);
i915_request_get(rq);
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("Failed to start spinner on %s\n", engine->name);
+ drm_err(&i915->drm, "Failed to start spinner on %s\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
@@ -870,15 +899,16 @@ static int __cancel_reset(struct drm_i915_private *i915,
if (i915_request_wait(rq, 0, HZ) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to cancel hung request\n", engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to cancel hung request\n", engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_nop;
}
if (rq->fence.error != -EINTR) {
- pr_err("%s: fence not cancelled (%u)\n",
- engine->name, rq->fence.error);
+ drm_err(&i915->drm, "%s: fence not cancelled (%u)\n",
+ engine->name, rq->fence.error);
err = -EINVAL;
goto out_nop;
}
@@ -886,15 +916,16 @@ static int __cancel_reset(struct drm_i915_private *i915,
if (i915_request_wait(nop, 0, HZ) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to complete nop request\n", engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to complete nop request\n", engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_nop;
}
if (nop->fence.error != 0) {
- pr_err("%s: Nop request errored (%u)\n",
- engine->name, nop->fence.error);
+ drm_err(&i915->drm, "%s: Nop request errored (%u)\n",
+ engine->name, nop->fence.error);
err = -EINVAL;
}
@@ -909,7 +940,8 @@ static int __cancel_reset(struct drm_i915_private *i915,
out_restore:
engine->props.preempt_timeout_ms = preempt_timeout_ms;
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ drm_err(&engine->i915->drm, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
@@ -1102,10 +1134,10 @@ static int live_empty_request(void *arg)
if (err)
goto out_batch;
- pr_info("Batch latencies on %s: 1 = %lluns, %lu = %lluns\n",
- engine->name,
- ktime_to_ns(times[0]),
- prime, div64_u64(ktime_to_ns(times[1]), prime));
+ drm_info(&i915->drm,
+ "Batch latencies on %s: 1 = %lluns, %lu = %lluns\n",
+ engine->name, ktime_to_ns(times[0]), prime,
+ div64_u64(ktime_to_ns(times[1]), prime));
out_batch:
i915_vma_unpin(batch);
i915_vma_put(batch);
@@ -1218,8 +1250,9 @@ static int live_all_engines(void *arg)
batch = recursive_batch(engine->gt);
if (IS_ERR(batch)) {
err = PTR_ERR(batch);
- pr_err("%s: Unable to create batch, err=%d\n",
- __func__, err);
+ drm_err(&i915->drm,
+ "%s: Unable to create batch, err=%d\n",
+ __func__, err);
goto out_free;
}
@@ -1227,8 +1260,9 @@ static int live_all_engines(void *arg)
request[idx] = intel_engine_create_kernel_request(engine);
if (IS_ERR(request[idx])) {
err = PTR_ERR(request[idx]);
- pr_err("%s: Request allocation failed with err=%d\n",
- __func__, err);
+ drm_err(&i915->drm,
+ "%s: Request allocation failed with err=%d\n",
+ __func__, err);
goto out_unlock;
}
GEM_BUG_ON(request[idx]->context->vm != batch->vm);
@@ -1252,8 +1286,9 @@ static int live_all_engines(void *arg)
idx = 0;
for_each_uabi_engine(engine, i915) {
if (i915_request_completed(request[idx])) {
- pr_err("%s(%s): request completed too early!\n",
- __func__, engine->name);
+ drm_err(&i915->drm,
+ "%s(%s): request completed too early!\n",
+ __func__, engine->name);
err = -EINVAL;
goto out_request;
}
@@ -1264,8 +1299,9 @@ static int live_all_engines(void *arg)
for_each_uabi_engine(engine, i915) {
err = recursive_batch_resolve(request[idx]->batch);
if (err) {
- pr_err("%s: failed to resolve batch, err=%d\n",
- __func__, err);
+ drm_err(&i915->drm,
+ "%s: failed to resolve batch, err=%d\n",
+ __func__, err);
goto out_request;
}
idx++;
@@ -1280,8 +1316,9 @@ static int live_all_engines(void *arg)
MAX_SCHEDULE_TIMEOUT);
if (timeout < 0) {
err = timeout;
- pr_err("%s: error waiting for request on %s, err=%d\n",
- __func__, engine->name, err);
+ drm_err(&i915->drm,
+ "%s: error waiting for request on %s, err=%d\n",
+ __func__, engine->name, err);
goto out_request;
}
@@ -1348,8 +1385,9 @@ static int live_sequential_engines(void *arg)
batch = recursive_batch(engine->gt);
if (IS_ERR(batch)) {
err = PTR_ERR(batch);
- pr_err("%s: Unable to create batch for %s, err=%d\n",
- __func__, engine->name, err);
+ drm_err(&i915->drm,
+ "%s: Unable to create batch for %s, err=%d\n",
+ __func__, engine->name, err);
goto out_free;
}
@@ -1357,8 +1395,9 @@ static int live_sequential_engines(void *arg)
request[idx] = intel_engine_create_kernel_request(engine);
if (IS_ERR(request[idx])) {
err = PTR_ERR(request[idx]);
- pr_err("%s: Request allocation failed for %s with err=%d\n",
- __func__, engine->name, err);
+ drm_err(&i915->drm,
+ "%s: Request allocation failed for %s with err=%d\n",
+ __func__, engine->name, err);
goto out_unlock;
}
GEM_BUG_ON(request[idx]->context->vm != batch->vm);
@@ -1368,8 +1407,9 @@ static int live_sequential_engines(void *arg)
&prev->fence);
if (err) {
i915_request_add(request[idx]);
- pr_err("%s: Request await failed for %s with err=%d\n",
- __func__, engine->name, err);
+ drm_err(&i915->drm,
+ "%s: Request await failed for %s with err=%d\n",
+ __func__, engine->name, err);
goto out_unlock;
}
}
@@ -1398,16 +1438,18 @@ static int live_sequential_engines(void *arg)
long timeout;
if (i915_request_completed(request[idx])) {
- pr_err("%s(%s): request completed too early!\n",
- __func__, engine->name);
+ drm_err(&i915->drm,
+ "%s(%s): request completed too early!\n",
+ __func__, engine->name);
err = -EINVAL;
goto out_request;
}
err = recursive_batch_resolve(request[idx]->batch);
if (err) {
- pr_err("%s: failed to resolve batch, err=%d\n",
- __func__, err);
+ drm_err(&i915->drm,
+ "%s: failed to resolve batch, err=%d\n",
+ __func__, err);
goto out_request;
}
@@ -1415,8 +1457,9 @@ static int live_sequential_engines(void *arg)
MAX_SCHEDULE_TIMEOUT);
if (timeout < 0) {
err = timeout;
- pr_err("%s: error waiting for request on %s, err=%d\n",
- __func__, engine->name, err);
+ drm_err(&i915->drm,
+ "%s: error waiting for request on %s, err=%d\n",
+ __func__, engine->name, err);
goto out_request;
}
@@ -1496,7 +1539,8 @@ static void __live_parallel_engine1(struct kthread_work *work)
} while (!__igt_timeout(end_time, NULL));
intel_engine_pm_put(engine);
- pr_info("%s: %lu request + sync\n", engine->name, count);
+ drm_info(&engine->i915->drm, "%s: %lu request + sync\n", engine->name,
+ count);
thread->result = err;
}
@@ -1525,7 +1569,7 @@ static void __live_parallel_engineN(struct kthread_work *work)
} while (!__igt_timeout(end_time, NULL));
intel_engine_pm_put(engine);
- pr_info("%s: %lu requests\n", engine->name, count);
+ drm_info(&engine->i915->drm, "%s: %lu requests\n", engine->name, count);
thread->result = err;
}
@@ -1592,7 +1636,8 @@ static void __live_parallel_spin(struct kthread_work *work)
/* Occupy this engine for the whole test */
err = wait_for_all(engine->i915);
} else {
- pr_err("Failed to start spinner on %s\n", engine->name);
+ drm_err(&engine->i915->drm, "Failed to start spinner on %s\n",
+ engine->name);
err = -EINVAL;
}
igt_spinner_end(&spin);
@@ -1798,8 +1843,8 @@ static int live_breadcrumbs_smoketest(void *arg)
}
/* One ring interleaved between requests from all cpus */
smoke[idx].max_batch /= ncpus + 1;
- pr_debug("Limiting batches to %d requests on %s\n",
- smoke[idx].max_batch, engine->name);
+ drm_dbg(&i915->drm, "Limiting batches to %d requests on %s\n",
+ smoke[idx].max_batch, engine->name);
for (n = 0; n < ncpus; n++) {
unsigned int i = idx * ncpus + n;
@@ -1849,8 +1894,9 @@ static int live_breadcrumbs_smoketest(void *arg)
num_fences += atomic_long_read(&smoke[idx].num_fences);
idx++;
}
- pr_info("Completed %lu waits for %lu fences across %d engines and %d cpus\n",
- num_waits, num_fences, idx, ncpus);
+ drm_info(&i915->drm,
+ "Completed %lu waits for %lu fences across %d engines and %d cpus\n",
+ num_waits, num_fences, idx, ncpus);
ret = igt_live_test_end(&live) ?: ret;
out_contexts:
@@ -2075,9 +2121,9 @@ static int measure_semaphore_response(struct intel_context *ce)
}
cycles = trifilter(elapsed);
- pr_info("%s: semaphore response %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&ce->engine->i915->drm,
+ "%s: semaphore response %d cycles, %lluns\n", ce->engine->name,
+ cycles >> TF_BIAS, cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2146,9 +2192,10 @@ static int measure_idle_dispatch(struct intel_context *ce)
elapsed[i] = sema[i] - elapsed[i];
cycles = trifilter(elapsed);
- pr_info("%s: idle dispatch latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&ce->engine->i915->drm,
+ "%s: idle dispatch latency %d cycles, %lluns\n",
+ ce->engine->name, cycles >> TF_BIAS,
+ cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2223,9 +2270,10 @@ static int measure_busy_dispatch(struct intel_context *ce)
}
cycles = trifilter(elapsed);
- pr_info("%s: busy dispatch latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&ce->engine->i915->drm,
+ "%s: busy dispatch latency %d cycles, %lluns\n",
+ ce->engine->name, cycles >> TF_BIAS,
+ cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2336,9 +2384,10 @@ static int measure_inter_request(struct intel_context *ce)
elapsed[i - 1] = sema[i + 1] - sema[i];
cycles = trifilter(elapsed);
- pr_info("%s: inter-request latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&ce->engine->i915->drm,
+ "%s: inter-request latency %d cycles, %lluns\n",
+ ce->engine->name, cycles >> TF_BIAS,
+ cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2431,9 +2480,10 @@ static int measure_context_switch(struct intel_context *ce)
elapsed[i - 1] = sema[2 * i + 2] - sema[2 * i + 1];
cycles = trifilter(elapsed);
- pr_info("%s: context switch latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&ce->engine->i915->drm,
+ "%s: context switch latency %d cycles, %lluns\n",
+ ce->engine->name, cycles >> TF_BIAS,
+ cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2448,6 +2498,7 @@ static int measure_context_switch(struct intel_context *ce)
static int measure_preemption(struct intel_context *ce)
{
u32 *sema = hwsp_scratch(ce);
+ struct drm_i915_private *i915 = ce->engine->i915;
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT], cycles;
u32 *cs;
@@ -2534,17 +2585,19 @@ static int measure_preemption(struct intel_context *ce)
elapsed[i - 1] = sema[2 * i + 0] - elapsed[i - 1];
cycles = trifilter(elapsed);
- pr_info("%s: preemption dispatch latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&i915->drm,
+ "%s: preemption dispatch latency %d cycles, %lluns\n",
+ ce->engine->name, cycles >> TF_BIAS,
+ cycles_to_ns(ce->engine, cycles));
for (i = 1; i <= TF_COUNT; i++)
elapsed[i - 1] = sema[2 * i + 1] - sema[2 * i + 0];
cycles = trifilter(elapsed);
- pr_info("%s: preemption switch latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&i915->drm,
+ "%s: preemption switch latency %d cycles, %lluns\n",
+ ce->engine->name, cycles >> TF_BIAS,
+ cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2636,9 +2689,9 @@ static int measure_completion(struct intel_context *ce)
}
cycles = trifilter(elapsed);
- pr_info("%s: completion latency %d cycles, %lluns\n",
- ce->engine->name, cycles >> TF_BIAS,
- cycles_to_ns(ce->engine, cycles));
+ drm_info(&ce->engine->i915->drm,
+ "%s: completion latency %d cycles, %lluns\n", ce->engine->name,
+ cycles >> TF_BIAS, cycles_to_ns(ce->engine, cycles));
return intel_gt_wait_for_idle(ce->engine->gt, HZ);
@@ -2929,11 +2982,12 @@ static int perf_series_engines(void *arg)
decimal = 0;
}
- pr_info("%s %5s: { seqno:%d, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
- name, p->engine->name, ce->timeline->seqno,
- integer, decimal,
- div_u64(p->runtime, 1000 * 1000),
- div_u64(ktime_to_ns(p->time), 1000 * 1000));
+ drm_info(&i915->drm,
+ "%s %5s: { seqno:%d, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
+ name, p->engine->name, ce->timeline->seqno,
+ integer, decimal,
+ div_u64(p->runtime, 1000 * 1000),
+ div_u64(ktime_to_ns(p->time), 1000 * 1000));
}
}
@@ -3275,10 +3329,11 @@ static int perf_parallel_engines(void *arg)
}
GEM_BUG_ON(engine != p->engine);
- pr_info("%s %5s: { count:%lu, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
- name, engine->name, p->count, integer, decimal,
- div_u64(p->runtime, 1000 * 1000),
- div_u64(ktime_to_ns(p->time), 1000 * 1000));
+ drm_info(&i915->drm,
+ "%s %5s: { count:%lu, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
+ name, engine->name, p->count, integer, decimal,
+ div_u64(p->runtime, 1000 * 1000),
+ div_u64(ktime_to_ns(p->time), 1000 * 1000));
idx++;
}
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 7c4111e60f2e..8e1e54ea0585 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -24,6 +24,8 @@
#include <linux/prime_numbers.h>
+#include <drm/drm_print.h>
+
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_internal.h"
#include "gem/selftests/mock_context.h"
@@ -41,19 +43,20 @@ static bool assert_vma(struct i915_vma *vma,
bool ok = true;
if (vma->vm != ctx->vm) {
- pr_err("VMA created with wrong VM\n");
+ drm_err(obj->base.dev, "VMA created with wrong VM\n");
ok = false;
}
if (vma->size != obj->base.size) {
- pr_err("VMA created with wrong size, found %llu, expected %zu\n",
- vma->size, obj->base.size);
+ drm_err(obj->base.dev,
+ "VMA created with wrong size, found %llu, expected %zu\n",
+ vma->size, obj->base.size);
ok = false;
}
if (vma->gtt_view.type != I915_GTT_VIEW_NORMAL) {
- pr_err("VMA created with wrong type [%d]\n",
- vma->gtt_view.type);
+ drm_err(obj->base.dev, "VMA created with wrong type [%d]\n",
+ vma->gtt_view.type);
ok = false;
}
@@ -74,30 +77,34 @@ checked_vma_instance(struct drm_i915_gem_object *obj,
/* Manual checks, will be reinforced by i915_vma_compare! */
if (vma->vm != vm) {
- pr_err("VMA's vm [%p] does not match request [%p]\n",
- vma->vm, vm);
+ drm_err(obj->base.dev,
+ "VMA's vm [%p] does not match request [%p]\n", vma->vm,
+ vm);
ok = false;
}
if (i915_is_ggtt(vm) != i915_vma_is_ggtt(vma)) {
- pr_err("VMA ggtt status [%d] does not match parent [%d]\n",
- i915_vma_is_ggtt(vma), i915_is_ggtt(vm));
+ drm_err(obj->base.dev,
+ "VMA ggtt status [%d] does not match parent [%d]\n",
+ i915_vma_is_ggtt(vma), i915_is_ggtt(vm));
ok = false;
}
if (i915_vma_compare(vma, vm, view)) {
- pr_err("i915_vma_compare failed with create parameters!\n");
+ drm_err(obj->base.dev,
+ "i915_vma_compare failed with create parameters!\n");
return ERR_PTR(-EINVAL);
}
if (i915_vma_compare(vma, vma->vm,
i915_vma_is_ggtt(vma) ? &vma->gtt_view : NULL)) {
- pr_err("i915_vma_compare failed with itself\n");
+ drm_err(obj->base.dev, "i915_vma_compare failed with itself\n");
return ERR_PTR(-EINVAL);
}
if (!ok) {
- pr_err("i915_vma_compare failed to detect the difference!\n");
+ drm_err(obj->base.dev,
+ "i915_vma_compare failed to detect the difference!\n");
return ERR_PTR(-EINVAL);
}
@@ -126,14 +133,16 @@ static int create_vmas(struct drm_i915_private *i915,
return PTR_ERR(vma);
if (!assert_vma(vma, obj, ctx)) {
- pr_err("VMA lookup/create failed\n");
+ drm_err(obj->base.dev,
+ "VMA lookup/create failed\n");
return -EINVAL;
}
if (!pinned) {
err = i915_vma_pin(vma, 0, 0, PIN_USER);
if (err) {
- pr_err("Failed to pin VMA\n");
+ drm_err(obj->base.dev,
+ "Failed to pin VMA\n");
return err;
}
} else {
@@ -332,10 +341,13 @@ static int igt_vma_pin1(void *arg)
for (m = modes; m->assert; m++) {
err = i915_vma_pin(vma, m->size, 0, m->flags);
if (!m->assert(vma, m, err)) {
- pr_err("%s to pin single page into GGTT with mode[%d:%s]: size=%llx flags=%llx, err=%d\n",
- m->assert == assert_pin_valid ? "Failed" : "Unexpectedly succeeded",
- (int)(m - modes), m->string, m->size, m->flags,
- err);
+ drm_err(obj->base.dev,
+ "%s to pin single page into GGTT with mode[%d:%s]: size=%llx flags=%llx, err=%d\n",
+ m->assert == assert_pin_valid ?
+ "Failed" :
+ "Unexpectedly succeeded",
+ (int)(m - modes), m->string, m->size, m->flags,
+ err);
if (!err)
i915_vma_unpin(vma);
err = -EINVAL;
@@ -346,7 +358,9 @@ static int igt_vma_pin1(void *arg)
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Failed to unbind single page from GGTT, err=%d\n", err);
+ drm_err(obj->base.dev,
+ "Failed to unbind single page from GGTT, err=%d\n",
+ err);
goto out;
}
}
@@ -384,8 +398,9 @@ assert_rotated(struct drm_i915_gem_object *obj,
dma_addr_t src;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
- n, x, y);
+ drm_err(obj->base.dev,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
return ERR_PTR(-EINVAL);
}
@@ -393,15 +408,17 @@ assert_rotated(struct drm_i915_gem_object *obj,
src = i915_gem_object_get_dma_address(obj, src_idx);
if (sg_dma_len(sg) != PAGE_SIZE) {
- pr_err("Invalid sg.length, found %d, expected %lu for rotated page (%d, %d) [src index %lu]\n",
- sg_dma_len(sg), PAGE_SIZE,
- x, y, src_idx);
+ drm_err(obj->base.dev,
+ "Invalid sg.length, found %d, expected %lu for rotated page (%d, %d) [src index %lu]\n",
+ sg_dma_len(sg), PAGE_SIZE, x, y,
+ src_idx);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) != src) {
- pr_err("Invalid address for rotated page (%d, %d) [src index %lu]\n",
- x, y, src_idx);
+ drm_err(obj->base.dev,
+ "Invalid address for rotated page (%d, %d) [src index %lu]\n",
+ x, y, src_idx);
return ERR_PTR(-EINVAL);
}
@@ -414,20 +431,23 @@ assert_rotated(struct drm_i915_gem_object *obj,
continue;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
- n, x, y);
+ drm_err(obj->base.dev,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_len(sg) != left) {
- pr_err("Invalid sg.length, found %d, expected %u for rotated page (%d, %d)\n",
- sg_dma_len(sg), left, x, y);
+ drm_err(obj->base.dev,
+ "Invalid sg.length, found %d, expected %u for rotated page (%d, %d)\n",
+ sg_dma_len(sg), left, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) != 0) {
- pr_err("Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
- &sg_dma_address(sg), x, y);
+ drm_err(obj->base.dev,
+ "Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
+ &sg_dma_address(sg), x, y);
return ERR_PTR(-EINVAL);
}
@@ -461,8 +481,9 @@ assert_remapped(struct drm_i915_gem_object *obj,
dma_addr_t src;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
- n, x, y);
+ drm_err(obj->base.dev,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
return ERR_PTR(-EINVAL);
}
if (!left) {
@@ -474,15 +495,17 @@ assert_remapped(struct drm_i915_gem_object *obj,
src = i915_gem_object_get_dma_address(obj, src_idx);
if (left < PAGE_SIZE || left & (PAGE_SIZE-1)) {
- pr_err("Invalid sg.length, found %d, expected %lu for remapped page (%d, %d) [src index %lu]\n",
- sg_dma_len(sg), PAGE_SIZE,
- x, y, src_idx);
+ drm_err(obj->base.dev,
+ "Invalid sg.length, found %d, expected %lu for remapped page (%d, %d) [src index %lu]\n",
+ sg_dma_len(sg), PAGE_SIZE, x, y,
+ src_idx);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) + offset != src) {
- pr_err("Invalid address for remapped page (%d, %d) [src index %lu]\n",
- x, y, src_idx);
+ drm_err(obj->base.dev,
+ "Invalid address for remapped page (%d, %d) [src index %lu]\n",
+ x, y, src_idx);
return ERR_PTR(-EINVAL);
}
@@ -495,9 +518,9 @@ assert_remapped(struct drm_i915_gem_object *obj,
}
if (left) {
- pr_err("Unexpected sg tail with %d size for remapped page (%d, %d)\n",
- left,
- x, y);
+ drm_err(obj->base.dev,
+ "Unexpected sg tail with %d size for remapped page (%d, %d)\n",
+ left, x, y);
return ERR_PTR(-EINVAL);
}
@@ -507,22 +530,23 @@ assert_remapped(struct drm_i915_gem_object *obj,
continue;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
- n, x, y);
+ drm_err(obj->base.dev,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ n, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_len(sg) != left) {
- pr_err("Invalid sg.length, found %u, expected %u for remapped page (%d, %d)\n",
- sg_dma_len(sg), left,
- x, y);
+ drm_err(obj->base.dev,
+ "Invalid sg.length, found %u, expected %u for remapped page (%d, %d)\n",
+ sg_dma_len(sg), left, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) != 0) {
- pr_err("Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
- &sg_dma_address(sg),
- x, y);
+ drm_err(obj->base.dev,
+ "Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
+ &sg_dma_address(sg), x, y);
return ERR_PTR(-EINVAL);
}
@@ -628,7 +652,9 @@ static int igt_vma_rotate_remap(void *arg)
err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL);
if (err) {
- pr_err("Failed to pin VMA, err=%d\n", err);
+ drm_err(obj->base.dev,
+ "Failed to pin VMA, err=%d\n",
+ err);
goto out_object;
}
@@ -636,36 +662,47 @@ static int igt_vma_rotate_remap(void *arg)
if (view.type == I915_GTT_VIEW_ROTATED &&
vma->size != expected_pages * PAGE_SIZE) {
- pr_err("VMA is wrong size, expected %lu, found %llu\n",
- PAGE_SIZE * expected_pages, vma->size);
+ drm_err(obj->base.dev,
+ "VMA is wrong size, expected %lu, found %llu\n",
+ PAGE_SIZE *
+ expected_pages,
+ vma->size);
err = -EINVAL;
goto out_object;
}
if (view.type == I915_GTT_VIEW_REMAPPED &&
vma->size > expected_pages * PAGE_SIZE) {
- pr_err("VMA is wrong size, expected %lu, found %llu\n",
- PAGE_SIZE * expected_pages, vma->size);
+ drm_err(obj->base.dev,
+ "VMA is wrong size, expected %lu, found %llu\n",
+ PAGE_SIZE *
+ expected_pages,
+ vma->size);
err = -EINVAL;
goto out_object;
}
if (vma->pages->nents > expected_pages) {
- pr_err("sg table is wrong sizeo, expected %u, found %u nents\n",
- expected_pages, vma->pages->nents);
+ drm_err(obj->base.dev,
+ "sg table is wrong sizeo, expected %u, found %u nents\n",
+ expected_pages,
+ vma->pages->nents);
err = -EINVAL;
goto out_object;
}
if (vma->node.size < vma->size) {
- pr_err("VMA binding too small, expected %llu, found %llu\n",
- vma->size, vma->node.size);
+ drm_err(obj->base.dev,
+ "VMA binding too small, expected %llu, found %llu\n",
+ vma->size,
+ vma->node.size);
err = -EINVAL;
goto out_object;
}
if (vma->pages == obj->mm.pages) {
- pr_err("VMA using unrotated object pages!\n");
+ drm_err(obj->base.dev,
+ "VMA using unrotated object pages!\n");
err = -EINVAL;
goto out_object;
}
@@ -677,19 +714,20 @@ static int igt_vma_rotate_remap(void *arg)
else
sg = assert_remapped(obj, &view.remapped, n, sg);
if (IS_ERR(sg)) {
- pr_err("Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d, %d), (%d, %d, %d, %d, %d)]\n",
- view.type == I915_GTT_VIEW_ROTATED ?
- "rotated" : "remapped", n,
- plane_info[0].width,
- plane_info[0].height,
- plane_info[0].src_stride,
- plane_info[0].dst_stride,
- plane_info[0].offset,
- plane_info[1].width,
- plane_info[1].height,
- plane_info[1].src_stride,
- plane_info[1].dst_stride,
- plane_info[1].offset);
+ drm_err(obj->base.dev,
+ "Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d, %d), (%d, %d, %d, %d, %d)]\n",
+ view.type == I915_GTT_VIEW_ROTATED ?
+ "rotated" : "remapped", n,
+ plane_info[0].width,
+ plane_info[0].height,
+ plane_info[0].src_stride,
+ plane_info[0].dst_stride,
+ plane_info[0].offset,
+ plane_info[1].width,
+ plane_info[1].height,
+ plane_info[1].src_stride,
+ plane_info[1].dst_stride,
+ plane_info[1].offset);
err = -EINVAL;
goto out_object;
}
@@ -698,7 +736,9 @@ static int igt_vma_rotate_remap(void *arg)
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Unbinding returned %i\n", err);
+ drm_err(obj->base.dev,
+ "Unbinding returned %i\n",
+ err);
goto out_object;
}
cond_resched();
@@ -726,14 +766,16 @@ static bool assert_partial(struct drm_i915_gem_object *obj,
dma_addr_t src;
if (!size) {
- pr_err("Partial scattergather list too long\n");
+ drm_err(obj->base.dev,
+ "Partial scattergather list too long\n");
return false;
}
src = i915_gem_object_get_dma_address(obj, offset);
if (src != dma) {
- pr_err("DMA mismatch for partial page offset %lu\n",
- offset);
+ drm_err(obj->base.dev,
+ "DMA mismatch for partial page offset %lu\n",
+ offset);
return false;
}
@@ -752,38 +794,43 @@ static bool assert_pin(struct i915_vma *vma,
bool ok = true;
if (vma->size != size) {
- pr_err("(%s) VMA is wrong size, expected %llu, found %llu\n",
- name, size, vma->size);
+ drm_err(vma->obj->base.dev,
+ "(%s) VMA is wrong size, expected %llu, found %llu\n",
+ name, size, vma->size);
ok = false;
}
if (vma->node.size < vma->size) {
- pr_err("(%s) VMA binding too small, expected %llu, found %llu\n",
- name, vma->size, vma->node.size);
+ drm_err(vma->obj->base.dev,
+ "(%s) VMA binding too small, expected %llu, found %llu\n",
+ name, vma->size, vma->node.size);
ok = false;
}
if (view && view->type != I915_GTT_VIEW_NORMAL) {
if (memcmp(&vma->gtt_view, view, sizeof(*view))) {
- pr_err("(%s) VMA mismatch upon creation!\n",
- name);
+ drm_err(vma->obj->base.dev,
+ "(%s) VMA mismatch upon creation!\n", name);
ok = false;
}
if (vma->pages == vma->obj->mm.pages) {
- pr_err("(%s) VMA using original object pages!\n",
- name);
+ drm_err(vma->obj->base.dev,
+ "(%s) VMA using original object pages!\n",
+ name);
ok = false;
}
} else {
if (vma->gtt_view.type != I915_GTT_VIEW_NORMAL) {
- pr_err("Not the normal ggtt view! Found %d\n",
- vma->gtt_view.type);
+ drm_err(vma->obj->base.dev,
+ "Not the normal ggtt view! Found %d\n",
+ vma->gtt_view.type);
ok = false;
}
if (vma->pages != vma->obj->mm.pages) {
- pr_err("VMA not using object pages!\n");
+ drm_err(vma->obj->base.dev,
+ "VMA not using object pages!\n");
ok = false;
}
}
@@ -843,15 +890,17 @@ static int igt_vma_partial(void *arg)
goto out_object;
if (!assert_pin(vma, &view, sz*PAGE_SIZE, p->name)) {
- pr_err("(%s) Inconsistent partial pinning for (offset=%d, size=%d)\n",
- p->name, offset, sz);
+ drm_err(obj->base.dev,
+ "(%s) Inconsistent partial pinning for (offset=%d, size=%d)\n",
+ p->name, offset, sz);
err = -EINVAL;
goto out_object;
}
if (!assert_partial(obj, vma, offset, sz)) {
- pr_err("(%s) Inconsistent partial pages for (offset=%d, size=%d)\n",
- p->name, offset, sz);
+ drm_err(obj->base.dev,
+ "(%s) Inconsistent partial pages for (offset=%d, size=%d)\n",
+ p->name, offset, sz);
err = -EINVAL;
goto out_object;
}
@@ -860,7 +909,8 @@ static int igt_vma_partial(void *arg)
nvma++;
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Unbinding returned %i\n", err);
+ drm_err(obj->base.dev,
+ "Unbinding returned %i\n", err);
goto out_object;
}
@@ -872,8 +922,9 @@ static int igt_vma_partial(void *arg)
list_for_each_entry(vma, &obj->vma.list, obj_link)
count++;
if (count != nvma) {
- pr_err("(%s) All partial vma were not recorded on the obj->vma_list: found %u, expected %u\n",
- p->name, count, nvma);
+ drm_err(obj->base.dev,
+ "(%s) All partial vma were not recorded on the obj->vma_list: found %u, expected %u\n",
+ p->name, count, nvma);
err = -EINVAL;
goto out_object;
}
@@ -890,7 +941,8 @@ static int igt_vma_partial(void *arg)
goto out_object;
if (!assert_pin(vma, NULL, obj->base.size, p->name)) {
- pr_err("(%s) inconsistent full pin\n", p->name);
+ drm_err(obj->base.dev, "(%s) inconsistent full pin\n",
+ p->name);
err = -EINVAL;
goto out_object;
}
@@ -899,7 +951,7 @@ static int igt_vma_partial(void *arg)
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Unbinding returned %i\n", err);
+ drm_err(obj->base.dev, "Unbinding returned %i\n", err);
goto out_object;
}
@@ -907,7 +959,8 @@ static int igt_vma_partial(void *arg)
list_for_each_entry(vma, &obj->vma.list, obj_link)
count++;
if (count != nvma) {
- pr_err("(%s) allocated an extra full vma!\n", p->name);
+ drm_err(obj->base.dev,
+ "(%s) allocated an extra full vma!\n", p->name);
err = -EINVAL;
goto out_object;
}
@@ -1080,9 +1133,11 @@ static int igt_vma_remapped_gtt(void *arg)
val = ioread32(&map[offset / sizeof(*map)]);
if (val != exp) {
- pr_err("%s VMA write test failed, expected 0x%x, found 0x%x\n",
- *t == I915_GTT_VIEW_ROTATED ? "Rotated" : "Remapped",
- exp, val);
+ drm_err(vma->obj->base.dev,
+ "%s VMA write test failed, expected 0x%x, found 0x%x\n",
+ *t == I915_GTT_VIEW_ROTATED ?
+ "Rotated" : "Remapped",
+ exp, val);
i915_vma_unpin_iomap(vma);
err = -EINVAL;
goto out;
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 514d2200751b..1f58024150fa 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -26,9 +26,12 @@
#include "gt/intel_gt.h"
+#include <drm/drm_print.h>
+
static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
unsigned int num_ranges,
- bool is_watertight)
+ bool is_watertight,
+ const struct drm_device *drm)
{
unsigned int i;
s32 prev;
@@ -36,22 +39,22 @@ static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
/* Check that the table is watertight */
if (is_watertight && (prev + 1) != (s32)ranges->start) {
- pr_err("%s: entry[%d]:(%x, %x) is not watertight to previous (%x)\n",
- __func__, i, ranges->start, ranges->end, prev);
+ drm_err(drm, "%s: entry[%d]:(%x, %x) is not watertight to previous (%x)\n",
+ __func__, i, ranges->start, ranges->end, prev);
return -EINVAL;
}
/* Check that the table never goes backwards */
if (prev >= (s32)ranges->start) {
- pr_err("%s: entry[%d]:(%x, %x) is less than the previous (%x)\n",
- __func__, i, ranges->start, ranges->end, prev);
+ drm_err(drm, "%s: entry[%d]:(%x, %x) is less than the previous (%x)\n",
+ __func__, i, ranges->start, ranges->end, prev);
return -EINVAL;
}
/* Check that the entry is valid */
if (ranges->start >= ranges->end) {
- pr_err("%s: entry[%d]:(%x, %x) has negative length\n",
- __func__, i, ranges->start, ranges->end);
+ drm_err(drm, "%s: entry[%d]:(%x, %x) has negative length\n",
+ __func__, i, ranges->start, ranges->end);
return -EINVAL;
}
@@ -126,7 +129,8 @@ int intel_uncore_mock_selftests(void)
for (i = 0; i < ARRAY_SIZE(fw); i++) {
err = intel_fw_table_check(fw[i].ranges,
fw[i].num_ranges,
- fw[i].is_watertight);
+ fw[i].is_watertight,
+ NULL);
if (err)
return err;
}
@@ -161,6 +165,7 @@ static int live_forcewake_ops(void *arg)
const struct reg *r;
struct intel_gt *gt = arg;
struct intel_uncore_forcewake_domain *domain;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_uncore *uncore = gt->uncore;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -172,7 +177,7 @@ static int live_forcewake_ops(void *arg)
/* vlv/chv with their pcu behave differently wrt reads */
if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) {
- pr_debug("PCU fakes forcewake badly; skipping\n");
+ drm_dbg(&i915->drm, "PCU fakes forcewake badly; skipping\n");
return 0;
}
@@ -192,8 +197,8 @@ static int live_forcewake_ops(void *arg)
if (IS_GRAPHICS_VER(gt->i915, r->min_graphics_ver, r->max_graphics_ver))
break;
if (!r->name) {
- pr_debug("Forcewaked register not known for %s; skipping\n",
- intel_platform_name(INTEL_INFO(gt->i915)->platform));
+ drm_dbg(&i915->drm, "Forcewaked register not known for %s; skipping\n",
+ intel_platform_name(INTEL_INFO(gt->i915)->platform));
return 0;
}
@@ -225,8 +230,8 @@ static int live_forcewake_ops(void *arg)
if (!domain->wake_count)
continue;
- pr_err("fw_domain %s still active, aborting test!\n",
- intel_uncore_forcewake_domain_to_str(domain->id));
+ drm_err(&i915->drm, "fw_domain %s still active, aborting test!\n",
+ intel_uncore_forcewake_domain_to_str(domain->id));
err = -EINVAL;
goto out_rpm;
}
@@ -245,23 +250,24 @@ static int live_forcewake_ops(void *arg)
err = wait_ack_clear(domain, FORCEWAKE_KERNEL);
preempt_enable();
if (err) {
- pr_err("Failed to clear fw_domain %s\n",
- intel_uncore_forcewake_domain_to_str(domain->id));
+ drm_err(&i915->drm, "Failed to clear fw_domain %s\n",
+ intel_uncore_forcewake_domain_to_str(domain->id));
goto out_rpm;
}
}
if (!val) {
- pr_err("%s:%s was zero while fw was held!\n",
- engine->name, r->name);
+ drm_err(&i915->drm, "%s:%s was zero while fw was held!\n",
+ engine->name, r->name);
err = -EINVAL;
goto out_rpm;
}
/* We then expect the read to return 0 outside of the fw */
if (wait_for(readl(reg) == 0, 100)) {
- pr_err("%s:%s=%0x, fw_domains 0x%x still up after 100ms!\n",
- engine->name, r->name, readl(reg), fw_domains);
+ drm_err(&i915->drm,
+ "%s:%s=%0x, fw_domains 0x%x still up after 100ms!\n",
+ engine->name, r->name, readl(reg), fw_domains);
err = -ETIMEDOUT;
goto out_rpm;
}
@@ -279,7 +285,8 @@ static int live_fw_table(void *arg)
/* Confirm the table we load is still valid */
return intel_fw_table_check(gt->uncore->fw_domains_table,
gt->uncore->fw_domains_table_entries,
- GRAPHICS_VER(gt->i915) >= 9);
+ GRAPHICS_VER(gt->i915) >= 9,
+ >->i915->drm);
}
int intel_uncore_live_selftests(struct drm_i915_private *i915)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests
2026-08-28 10:03 ` [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests Krzysztof Karas
@ 2026-08-28 14:34 ` Andi Shyti
2026-08-28 16:41 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 14:34 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
...
> static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
> unsigned int num_ranges,
> - bool is_watertight)
> + bool is_watertight,
> + const struct drm_device *drm)
> {
> unsigned int i;
> s32 prev;
> @@ -36,22 +39,22 @@ static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
> for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
> /* Check that the table is watertight */
> if (is_watertight && (prev + 1) != (s32)ranges->start) {
> - pr_err("%s: entry[%d]:(%x, %x) is not watertight to previous (%x)\n",
> - __func__, i, ranges->start, ranges->end, prev);
> + drm_err(drm, "%s: entry[%d]:(%x, %x) is not watertight to previous (%x)\n",
> + __func__, i, ranges->start, ranges->end, prev);
> return -EINVAL;
> }
>
> /* Check that the table never goes backwards */
> if (prev >= (s32)ranges->start) {
> - pr_err("%s: entry[%d]:(%x, %x) is less than the previous (%x)\n",
> - __func__, i, ranges->start, ranges->end, prev);
> + drm_err(drm, "%s: entry[%d]:(%x, %x) is less than the previous (%x)\n",
> + __func__, i, ranges->start, ranges->end, prev);
> return -EINVAL;
> }
>
> /* Check that the entry is valid */
> if (ranges->start >= ranges->end) {
> - pr_err("%s: entry[%d]:(%x, %x) has negative length\n",
> - __func__, i, ranges->start, ranges->end);
> + drm_err(drm, "%s: entry[%d]:(%x, %x) has negative length\n",
> + __func__, i, ranges->start, ranges->end);
> return -EINVAL;
> }
>
> @@ -126,7 +129,8 @@ int intel_uncore_mock_selftests(void)
> for (i = 0; i < ARRAY_SIZE(fw); i++) {
> err = intel_fw_table_check(fw[i].ranges,
> fw[i].num_ranges,
> - fw[i].is_watertight);
> + fw[i].is_watertight,
> + NULL);
arrghh! Here we are again at the drm_err(NULL,...) case.
You could eventually do in intel_fw_table_check()
if (drm)
drm_err(drm, ...);
else
pr_err(...);
but I think it's not worth the effort, just leave pr_err().
Besides, passing the drm device is quite out of the scope of the
function itself, it's just odd!
Andi
> if (err)
> return err;
> }
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests
2026-08-28 10:03 ` [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests Krzysztof Karas
2026-08-28 14:34 ` Andi Shyti
@ 2026-08-28 16:41 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Niemiec @ 2026-08-28 16:41 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka
Hi Krzysztof,
On 2026-08-28 at 10:03:33 +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> .../gpu/drm/i915/selftests/i915_gem_evict.c | 75 +++--
> i915_request_put(last);
<snip>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
> index e6bd06774816..0c855f00c3ae 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
> @@ -25,6 +25,8 @@
> #include <linux/list_sort.h>
> #include <linux/prime_numbers.h>
>
> +#include <drm/drm_print.h>
> +
> #include "gem/i915_gem_context.h"
> #include "gem/i915_gem_internal.h"
> #include "gem/i915_gem_lmem.h"
> @@ -34,6 +36,7 @@
> #include "gt/intel_gpu_commands.h"
> #include "gt/intel_gtt.h"
>
> +#include "../i915_drv.h"
Is the ../ really necessary here? It builds for me if i just switch to
#include "i915_drv.h", other includes treat driver/gpu/drm/i915 as the
working dir. I've seen both styles used in the selftests but it just
looks a bit out of place here.
<snip>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c
> index e9469e27f42a..d2a1a901d47b 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_perf.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
> @@ -14,6 +14,8 @@
> #include "igt_flush_test.h"
> #include "lib_sw_fence.h"
>
> +#include <drm/drm_print.h>
> +
Giga nit, but should this be before the "" includes?
<snip>
> diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
> index 514d2200751b..1f58024150fa 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
> @@ -26,9 +26,12 @@
>
> #include "gt/intel_gt.h"
>
> +#include <drm/drm_print.h>
> +
Should this be before the "" includes?
<not snipping here, same file below>
> static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
> unsigned int num_ranges,
> - bool is_watertight)
> + bool is_watertight,
> + const struct drm_device *drm)
> {
> unsigned int i;
> s32 prev;
> @@ -36,22 +39,22 @@ static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
> for (i = 0, prev = -1; i < num_ranges; i++, ranges++) {
> /* Check that the table is watertight */
> if (is_watertight && (prev + 1) != (s32)ranges->start) {
> - pr_err("%s: entry[%d]:(%x, %x) is not watertight to previous (%x)\n",
> - __func__, i, ranges->start, ranges->end, prev);
> + drm_err(drm, "%s: entry[%d]:(%x, %x) is not watertight to previous (%x)\n",
> + __func__, i, ranges->start, ranges->end, prev);
> return -EINVAL;
> }
>
> /* Check that the table never goes backwards */
> if (prev >= (s32)ranges->start) {
> - pr_err("%s: entry[%d]:(%x, %x) is less than the previous (%x)\n",
> - __func__, i, ranges->start, ranges->end, prev);
> + drm_err(drm, "%s: entry[%d]:(%x, %x) is less than the previous (%x)\n",
> + __func__, i, ranges->start, ranges->end, prev);
> return -EINVAL;
> }
>
> /* Check that the entry is valid */
> if (ranges->start >= ranges->end) {
> - pr_err("%s: entry[%d]:(%x, %x) has negative length\n",
> - __func__, i, ranges->start, ranges->end);
> + drm_err(drm, "%s: entry[%d]:(%x, %x) has negative length\n",
> + __func__, i, ranges->start, ranges->end);
> return -EINVAL;
> }
>
> @@ -126,7 +129,8 @@ int intel_uncore_mock_selftests(void)
> for (i = 0; i < ARRAY_SIZE(fw); i++) {
> err = intel_fw_table_check(fw[i].ranges,
> fw[i].num_ranges,
> - fw[i].is_watertight);
> + fw[i].is_watertight,
> + NULL);
I'll join Andi here in that this looks a bit weird. Especially since the
next function in the file intel_shadow_table_check() keeps using
pr_err(). Either convert that too or don't do either.
<snippnig the rest>
Thanks
Krzysztof
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
2026-08-28 10:03 ` [PATCH v3 1/8] drm/i915/selftest: Fix a typo in alloc_workqueue call Krzysztof Karas
2026-08-28 10:03 ` [PATCH v3 2/8] drm/i915/selftests: Use drm_* prints in live selftests Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 15:58 ` Andi Shyti
2026-08-28 16:49 ` Krzysztof Niemiec
2026-08-28 10:03 ` [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests Krzysztof Karas
` (5 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to device context aware drm
versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
drivers/gpu/drm/i915/selftests/i915_active.c | 12 +++++++-----
drivers/gpu/drm/i915/selftests/igt_flush_test.c | 7 +++++--
drivers/gpu/drm/i915/selftests/igt_live_test.c | 6 +++---
drivers/gpu/drm/i915/selftests/igt_reset.c | 5 ++++-
.../gpu/drm/i915/selftests/intel_scheduler_helpers.c | 8 ++++++--
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 4 +++-
6 files changed, 28 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c
index 9fea2fabeac4..79b55df1e71a 100644
--- a/drivers/gpu/drm/i915/selftests/i915_active.c
+++ b/drivers/gpu/drm/i915/selftests/i915_active.c
@@ -115,7 +115,7 @@ __live_active_setup(struct drm_i915_private *i915)
err = i915_active_add_request(&active->base, rq);
i915_request_add(rq);
if (err) {
- pr_err("Failed to track active ref!\n");
+ drm_err(&i915->drm, "Failed to track active ref!\n");
break;
}
@@ -124,12 +124,13 @@ __live_active_setup(struct drm_i915_private *i915)
i915_active_release(&active->base);
if (READ_ONCE(active->retired) && count) {
- pr_err("i915_active retired before submission!\n");
+ drm_err(&i915->drm, "i915_active retired before submission!\n");
err = -EINVAL;
}
if (atomic_read(&active->base.count) != count) {
- pr_err("i915_active not tracking all requests, found %d, expected %d\n",
- atomic_read(&active->base.count), count);
+ drm_err(&i915->drm,
+ "i915_active not tracking all requests, found %d, expected %d\n",
+ atomic_read(&active->base.count), count);
err = -EINVAL;
}
@@ -236,7 +237,8 @@ static int live_active_barrier(void *arg)
__i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
if (!READ_ONCE(active->retired)) {
- pr_err("i915_active not retired after flushing barriers!\n");
+ drm_err(&i915->drm,
+ "i915_active not retired after flushing barriers!\n");
err = -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/selftests/igt_flush_test.c b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
index c383d31d46b0..86164d1258c6 100644
--- a/drivers/gpu/drm/i915/selftests/igt_flush_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
@@ -7,6 +7,8 @@
#include "gt/intel_gt.h"
#include "gt/intel_gt_requests.h"
+#include <drm/drm_print.h>
+
#include "i915_drv.h"
#include "i915_selftest.h"
@@ -35,8 +37,9 @@ int igt_flush_test(struct drm_i915_private *i915)
/* 2x longest preempt timeout, experimentally determined */
if (intel_gt_wait_for_idle(gt, HZ * timeout_ms / 500) == -ETIME) {
- pr_err("%pS timed out, cancelling all further testing.\n",
- __builtin_return_address(0));
+ drm_err(>->i915->drm,
+ "%pS timed out, cancelling all further testing.\n",
+ __builtin_return_address(0));
GEM_TRACE("%pS timed out.\n",
__builtin_return_address(0));
diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.c b/drivers/gpu/drm/i915/selftests/igt_live_test.c
index 7d41874a49c5..c1fbd98d3164 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
@@ -59,9 +59,9 @@ int igt_live_test_end(struct igt_live_test *t)
return -EIO;
if (t->reset_global != i915_reset_count(&i915->gpu_error)) {
- pr_err("%s(%s): GPU was reset %d times!\n",
- t->func, t->name,
- i915_reset_count(&i915->gpu_error) - t->reset_global);
+ drm_err(&i915->drm, "%s(%s): GPU was reset %d times!\n",
+ t->func, t->name,
+ i915_reset_count(&i915->gpu_error) - t->reset_global);
return -EIO;
}
diff --git a/drivers/gpu/drm/i915/selftests/igt_reset.c b/drivers/gpu/drm/i915/selftests/igt_reset.c
index a2838c65f8a5..7902ed9ad339 100644
--- a/drivers/gpu/drm/i915/selftests/igt_reset.c
+++ b/drivers/gpu/drm/i915/selftests/igt_reset.c
@@ -4,6 +4,8 @@
* Copyright © 2018 Intel Corporation
*/
+#include <drm/drm_print.h>
+
#include "igt_reset.h"
#include "gt/intel_engine.h"
@@ -16,7 +18,8 @@ void igt_global_reset_lock(struct intel_gt *gt)
struct intel_engine_cs *engine;
enum intel_engine_id id;
- pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags);
+ drm_dbg(>->i915->drm, "%s: current gpu_error=%08lx\n", __func__,
+ gt->reset.flags);
while (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags))
wait_event(gt->reset.queue,
diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
index e14ac0ab1314..83f66fe4a9d5 100644
--- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
+++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
@@ -5,6 +5,8 @@
#include <linux/jiffies.h>
+#include <drm/drm_print.h>
+
//#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
#include "i915_drv.h"
@@ -24,7 +26,7 @@ struct intel_engine_cs *intel_selftest_find_any_engine(struct intel_gt *gt)
for_each_engine(engine, gt, id)
return engine;
- pr_err("No valid engine found!\n");
+ drm_err(>->i915->drm, "No valid engine found!\n");
return NULL;
}
@@ -60,7 +62,9 @@ int intel_selftest_modify_policy(struct intel_engine_cs *engine,
break;
default:
- pr_err("Invalid scheduler policy modification type: %d!\n", modify_type);
+ drm_err(&engine->i915->drm,
+ "Invalid scheduler policy modification type: %d!\n",
+ modify_type);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 796c9b070e41..c0dadcd961bb 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -169,7 +169,9 @@ struct drm_i915_private *mock_gem_device(void)
i915 = devm_drm_dev_alloc(&pdev->dev, &mock_driver,
struct drm_i915_private, drm);
if (IS_ERR(i915)) {
- pr_err("Failed to allocate mock GEM device: err=%ld\n", PTR_ERR(i915));
+ dev_err(&pdev->dev,
+ "Failed to allocate mock GEM device: err=%ld\n",
+ PTR_ERR(i915));
devres_release_group(&pdev->dev, NULL);
put_device(&pdev->dev);
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers
2026-08-28 10:03 ` [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers Krzysztof Karas
@ 2026-08-28 15:58 ` Andi Shyti
2026-08-28 16:49 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 15:58 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi krzysztof,
> i915 = devm_drm_dev_alloc(&pdev->dev, &mock_driver,
> struct drm_i915_private, drm);
> if (IS_ERR(i915)) {
> - pr_err("Failed to allocate mock GEM device: err=%ld\n", PTR_ERR(i915));
> + dev_err(&pdev->dev,
> + "Failed to allocate mock GEM device: err=%ld\n",
> + PTR_ERR(i915));
good choice here to use dev_err(...);
Reviewed-by: Andi Shyti <andi.shyti@linux.inte.com>
Also here you forgot to add my r-b. People normally spend time to
do reviews and it's not nice to ignore them.
Andi
> devres_release_group(&pdev->dev, NULL);
> put_device(&pdev->dev);
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers
2026-08-28 10:03 ` [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers Krzysztof Karas
2026-08-28 15:58 ` Andi Shyti
@ 2026-08-28 16:49 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Niemiec @ 2026-08-28 16:49 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka
Hi Krzysztof,
On 2026-08-28 at 10:03:34 +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/selftests/i915_active.c | 12 +++++++-----
> drivers/gpu/drm/i915/selftests/igt_flush_test.c | 7 +++++--
> drivers/gpu/drm/i915/selftests/igt_live_test.c | 6 +++---
> drivers/gpu/drm/i915/selftests/igt_reset.c | 5 ++++-
> .../gpu/drm/i915/selftests/intel_scheduler_helpers.c | 8 ++++++--
> drivers/gpu/drm/i915/selftests/mock_gem_device.c | 4 +++-
> 6 files changed, 28 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c
> index 9fea2fabeac4..79b55df1e71a 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_active.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_active.c
> @@ -115,7 +115,7 @@ __live_active_setup(struct drm_i915_private *i915)
> err = i915_active_add_request(&active->base, rq);
> i915_request_add(rq);
> if (err) {
> - pr_err("Failed to track active ref!\n");
> + drm_err(&i915->drm, "Failed to track active ref!\n");
> break;
> }
>
> @@ -124,12 +124,13 @@ __live_active_setup(struct drm_i915_private *i915)
>
> i915_active_release(&active->base);
> if (READ_ONCE(active->retired) && count) {
> - pr_err("i915_active retired before submission!\n");
> + drm_err(&i915->drm, "i915_active retired before submission!\n");
> err = -EINVAL;
> }
> if (atomic_read(&active->base.count) != count) {
> - pr_err("i915_active not tracking all requests, found %d, expected %d\n",
> - atomic_read(&active->base.count), count);
> + drm_err(&i915->drm,
> + "i915_active not tracking all requests, found %d, expected %d\n",
> + atomic_read(&active->base.count), count);
> err = -EINVAL;
> }
>
> @@ -236,7 +237,8 @@ static int live_active_barrier(void *arg)
>
> __i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
> if (!READ_ONCE(active->retired)) {
> - pr_err("i915_active not retired after flushing barriers!\n");
> + drm_err(&i915->drm,
> + "i915_active not retired after flushing barriers!\n");
> err = -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/selftests/igt_flush_test.c b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
> index c383d31d46b0..86164d1258c6 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_flush_test.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
> @@ -7,6 +7,8 @@
> #include "gt/intel_gt.h"
> #include "gt/intel_gt_requests.h"
>
> +#include <drm/drm_print.h>
> +
Same nit as in the previous patch with the drm includes going before ""
i915 specific includes.
Rest LGTM to so far
> #include "i915_drv.h"
> #include "i915_selftest.h"
>
> @@ -35,8 +37,9 @@ int igt_flush_test(struct drm_i915_private *i915)
>
> /* 2x longest preempt timeout, experimentally determined */
> if (intel_gt_wait_for_idle(gt, HZ * timeout_ms / 500) == -ETIME) {
> - pr_err("%pS timed out, cancelling all further testing.\n",
> - __builtin_return_address(0));
> + drm_err(>->i915->drm,
> + "%pS timed out, cancelling all further testing.\n",
> + __builtin_return_address(0));
>
> GEM_TRACE("%pS timed out.\n",
> __builtin_return_address(0));
> diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.c b/drivers/gpu/drm/i915/selftests/igt_live_test.c
> index 7d41874a49c5..c1fbd98d3164 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
> @@ -59,9 +59,9 @@ int igt_live_test_end(struct igt_live_test *t)
> return -EIO;
>
> if (t->reset_global != i915_reset_count(&i915->gpu_error)) {
> - pr_err("%s(%s): GPU was reset %d times!\n",
> - t->func, t->name,
> - i915_reset_count(&i915->gpu_error) - t->reset_global);
> + drm_err(&i915->drm, "%s(%s): GPU was reset %d times!\n",
> + t->func, t->name,
> + i915_reset_count(&i915->gpu_error) - t->reset_global);
> return -EIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/selftests/igt_reset.c b/drivers/gpu/drm/i915/selftests/igt_reset.c
> index a2838c65f8a5..7902ed9ad339 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_reset.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_reset.c
> @@ -4,6 +4,8 @@
> * Copyright © 2018 Intel Corporation
> */
>
> +#include <drm/drm_print.h>
> +
> #include "igt_reset.h"
>
> #include "gt/intel_engine.h"
> @@ -16,7 +18,8 @@ void igt_global_reset_lock(struct intel_gt *gt)
> struct intel_engine_cs *engine;
> enum intel_engine_id id;
>
> - pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags);
> + drm_dbg(>->i915->drm, "%s: current gpu_error=%08lx\n", __func__,
> + gt->reset.flags);
>
> while (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags))
> wait_event(gt->reset.queue,
> diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
> index e14ac0ab1314..83f66fe4a9d5 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
> @@ -5,6 +5,8 @@
>
> #include <linux/jiffies.h>
>
> +#include <drm/drm_print.h>
> +
> //#include "gt/intel_engine_user.h"
> #include "gt/intel_gt.h"
> #include "i915_drv.h"
> @@ -24,7 +26,7 @@ struct intel_engine_cs *intel_selftest_find_any_engine(struct intel_gt *gt)
> for_each_engine(engine, gt, id)
> return engine;
>
> - pr_err("No valid engine found!\n");
> + drm_err(>->i915->drm, "No valid engine found!\n");
> return NULL;
> }
>
> @@ -60,7 +62,9 @@ int intel_selftest_modify_policy(struct intel_engine_cs *engine,
> break;
>
> default:
> - pr_err("Invalid scheduler policy modification type: %d!\n", modify_type);
> + drm_err(&engine->i915->drm,
> + "Invalid scheduler policy modification type: %d!\n",
> + modify_type);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> index 796c9b070e41..c0dadcd961bb 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> @@ -169,7 +169,9 @@ struct drm_i915_private *mock_gem_device(void)
> i915 = devm_drm_dev_alloc(&pdev->dev, &mock_driver,
> struct drm_i915_private, drm);
> if (IS_ERR(i915)) {
> - pr_err("Failed to allocate mock GEM device: err=%ld\n", PTR_ERR(i915));
> + dev_err(&pdev->dev,
> + "Failed to allocate mock GEM device: err=%ld\n",
> + PTR_ERR(i915));
> devres_release_group(&pdev->dev, NULL);
> put_device(&pdev->dev);
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (2 preceding siblings ...)
2026-08-28 10:03 ` [PATCH v3 3/8] drm/i915/selftests: Use drm_* prints in selftest helpers Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 16:18 ` Andi Shyti
2026-08-28 17:40 ` Krzysztof Niemiec
2026-08-28 10:03 ` [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests Krzysztof Karas
` (4 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to device context aware drm
versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_context.c | 33 +-
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 8 +-
drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 58 +--
drivers/gpu/drm/i915/gt/selftest_execlists.c | 353 +++++++++++-------
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 32 +-
drivers/gpu/drm/i915/gt/selftest_migrate.c | 65 ++--
drivers/gpu/drm/i915/gt/selftest_mocs.c | 12 +-
drivers/gpu/drm/i915/gt/selftest_reset.c | 28 +-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 103 +++--
drivers/gpu/drm/i915/gt/selftest_tlb.c | 39 +-
.../gpu/drm/i915/gt/selftest_workarounds.c | 104 ++++--
11 files changed, 513 insertions(+), 322 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index ab76703f6e8b..d9d279991eda 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -136,7 +136,9 @@ static int __live_context_size(struct intel_engine_cs *engine)
goto err_unpin;
if (memchr_inv(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE)) {
- pr_err("%s context overwrote trailing red-zone!", engine->name);
+ drm_err(&engine->i915->drm,
+ "%s context overwrote trailing red-zone!",
+ engine->name);
err = -EINVAL;
}
@@ -196,6 +198,7 @@ static int live_context_size(void *arg)
static int __live_active_context(struct intel_engine_cs *engine)
{
+ struct drm_i915_private *i915 = engine->i915;
unsigned long saved_heartbeat;
struct intel_context *ce;
int pass;
@@ -221,8 +224,8 @@ static int __live_active_context(struct intel_engine_cs *engine)
return 0;
if (intel_engine_pm_is_awake(engine)) {
- pr_err("%s is awake before starting %s!\n",
- engine->name, __func__);
+ drm_err(&i915->drm, "%s is awake before starting %s!\n",
+ engine->name, __func__);
return -EINVAL;
}
@@ -250,15 +253,17 @@ static int __live_active_context(struct intel_engine_cs *engine)
/* Context will be kept active until after an idle-barrier. */
if (i915_active_is_idle(&ce->active)) {
- pr_err("context is not active; expected idle-barrier (%s pass %d)\n",
- engine->name, pass);
+ drm_err(&i915->drm,
+ "context is not active; expected idle-barrier (%s pass %d)\n",
+ engine->name, pass);
err = -EINVAL;
goto out_engine;
}
if (!intel_engine_pm_is_awake(engine)) {
- pr_err("%s is asleep before idle-barrier\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s is asleep before idle-barrier\n",
+ engine->name);
err = -EINVAL;
goto out_engine;
}
@@ -280,14 +285,14 @@ static int __live_active_context(struct intel_engine_cs *engine)
goto err;
if (!i915_active_is_idle(&ce->active)) {
- pr_err("context is still active!");
+ drm_err(&i915->drm, "context is still active!");
err = -EINVAL;
}
intel_engine_pm_flush(engine);
if (intel_engine_pm_is_awake(engine)) {
- struct drm_printer p = drm_dbg_printer(&engine->i915->drm,
+ struct drm_printer p = drm_dbg_printer(&i915->drm,
DRM_UT_DRIVER, NULL);
intel_engine_dump(engine, &p,
@@ -356,6 +361,7 @@ static int __remote_sync(struct intel_context *ce, struct intel_context *remote)
static int __live_remote_context(struct intel_engine_cs *engine)
{
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *local, *remote;
unsigned long saved_heartbeat;
int pass;
@@ -374,8 +380,8 @@ static int __live_remote_context(struct intel_engine_cs *engine)
return 0;
if (intel_engine_pm_is_awake(engine)) {
- pr_err("%s is awake before starting %s!\n",
- engine->name, __func__);
+ drm_err(&i915->drm, "%s is awake before starting %s!\n",
+ engine->name, __func__);
return -EINVAL;
}
@@ -403,8 +409,9 @@ static int __live_remote_context(struct intel_engine_cs *engine)
break;
if (i915_active_is_idle(&remote->active)) {
- pr_err("remote context is not active; expected idle-barrier (%s pass %d)\n",
- engine->name, pass);
+ drm_err(&i915->drm,
+ "remote context is not active; expected idle-barrier (%s pass %d)\n",
+ engine->name, pass);
err = -EINVAL;
break;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 5ffa5e30f419..28c019547b34 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -207,8 +207,8 @@ static int perf_mi_bb_start(void *arg)
if (err)
break;
- pr_info("%s: MI_BB_START cycles: %u\n",
- engine->name, trifilter(cycles));
+ drm_info(>->i915->drm, "%s: MI_BB_START cycles: %u\n",
+ engine->name, trifilter(cycles));
}
if (perf_end(gt, wakeref))
err = -EIO;
@@ -365,8 +365,8 @@ static int perf_mi_noop(void *arg)
if (err)
break;
- pr_info("%s: 16K MI_NOOP cycles: %u\n",
- engine->name, trifilter(cycles));
+ drm_info(>->i915->drm, "%s: 16K MI_NOOP cycles: %u\n",
+ engine->name, trifilter(cycles));
}
if (perf_end(gt, wakeref))
err = -EIO;
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 10e556a7eac4..2813f0c717a9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -5,6 +5,8 @@
#include <linux/sort.h>
+#include <drm/drm_print.h>
+
#include "gt/intel_gt_print.h"
#include "i915_selftest.h"
#include "intel_engine_regs.h"
@@ -128,8 +130,9 @@ static int __measure_timestamps(struct intel_context *ce,
}
i915_request_put(rq);
- pr_debug("%s CTX_TIMESTAMP: [%x, %x], RING_TIMESTAMP: [%x, %x]\n",
- engine->name, sema[1], sema[3], sema[0], sema[4]);
+ drm_dbg(&engine->i915->drm,
+ "%s CTX_TIMESTAMP: [%x, %x], RING_TIMESTAMP: [%x, %x]\n",
+ engine->name, sema[1], sema[3], sema[0], sema[4]);
*d_ctx = sema[3] - sema[1];
*d_ring = sema[4] - sema[0];
@@ -139,6 +142,7 @@ static int __measure_timestamps(struct intel_context *ce,
static int __live_engine_timestamps(struct intel_engine_cs *engine)
{
u64 s_ring[COUNT], s_ctx[COUNT], st[COUNT], d_ring, d_ctx, dt;
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *ce;
int i, err = 0;
@@ -159,15 +163,17 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
d_ring = trifilter(s_ring);
d_ctx = trifilter(s_ctx);
- pr_info("%s elapsed:%lldns, CTX_TIMESTAMP:%lldns, RING_TIMESTAMP:%lldns\n",
- engine->name, dt,
- intel_gt_clock_interval_to_ns(engine->gt, d_ctx),
- intel_gt_clock_interval_to_ns(engine->gt, d_ring));
+ drm_info(&i915->drm,
+ "%s elapsed:%lldns, CTX_TIMESTAMP:%lldns, RING_TIMESTAMP:%lldns\n",
+ engine->name, dt,
+ intel_gt_clock_interval_to_ns(engine->gt, d_ctx),
+ intel_gt_clock_interval_to_ns(engine->gt, d_ring));
d_ring = intel_gt_clock_interval_to_ns(engine->gt, d_ring);
if (3 * dt > 4 * d_ring || 4 * dt < 3 * d_ring) {
- pr_err("%s Mismatch between ring timestamp and walltime!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s Mismatch between ring timestamp and walltime!\n",
+ engine->name);
return -EINVAL;
}
@@ -181,8 +187,9 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
d_ring *= engine->gt->clock_frequency;
if (3 * d_ctx > 4 * d_ring || 4 * d_ctx < 3 * d_ring) {
- pr_err("%s Mismatch between ring and context timestamps!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s Mismatch between ring and context timestamps!\n",
+ engine->name);
return -EINVAL;
}
@@ -232,7 +239,8 @@ static int __spin_until_busier(struct intel_engine_cs *engine, ktime_t busyness)
while (intel_engine_get_busy_time(engine, &unused) == busyness) {
dt = ktime_get() - start;
if (dt > 10000000) {
- pr_err("active wait timed out %lld\n", dt);
+ drm_err(&engine->i915->drm,
+ "active wait timed out %lld\n", dt);
ENGINE_TRACE(engine, "active wait time out %lld\n", dt);
return -ETIME;
}
@@ -244,6 +252,7 @@ static int __spin_until_busier(struct intel_engine_cs *engine, ktime_t busyness)
static int live_engine_busy_stats(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
struct igt_spinner spin;
@@ -284,9 +293,10 @@ static int live_engine_busy_stats(void *arg)
preempt_enable();
dt = ktime_sub(t[1], t[0]);
if (de < 0 || de > 10) {
- pr_err("%s: reported %lldns [%d%%] busyness while sleeping [for %lldns]\n",
- engine->name,
- de, (int)div64_u64(100 * de, dt), dt);
+ drm_err(&i915->drm,
+ "%s: reported %lldns [%d%%] busyness while sleeping [for %lldns]\n",
+ engine->name, de, (int)div64_u64(100 * de, dt),
+ dt);
GEM_TRACE_DUMP();
err = -EINVAL;
goto end;
@@ -323,9 +333,10 @@ static int live_engine_busy_stats(void *arg)
preempt_enable();
dt = ktime_sub(t[1], t[0]);
if (100 * de < 95 * dt || 95 * de > 100 * dt) {
- pr_err("%s: reported %lldns [%d%%] busyness while spinning [for %lldns]\n",
- engine->name,
- de, (int)div64_u64(100 * de, dt), dt);
+ drm_err(&i915->drm,
+ "%s: reported %lldns [%d%%] busyness while spinning [for %lldns]\n",
+ engine->name, de, (int)div64_u64(100 * de, dt),
+ dt);
GEM_TRACE_DUMP();
err = -EINVAL;
goto end;
@@ -349,6 +360,7 @@ static int live_engine_busy_stats(void *arg)
static int live_engine_pm(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -358,7 +370,7 @@ static int live_engine_pm(void *arg)
* tell us.
*/
if (intel_gt_pm_wait_for_idle(gt)) {
- pr_err("Unable to flush GT pm before test\n");
+ drm_err(&i915->drm, "Unable to flush GT pm before test\n");
return -EBUSY;
}
@@ -386,8 +398,9 @@ static int live_engine_pm(void *arg)
p->critical_section_begin();
if (!intel_engine_pm_get_if_awake(engine))
- pr_err("intel_engine_pm_get_if_awake(%s) failed under %s\n",
- engine->name, p->name);
+ drm_err(&i915->drm,
+ "intel_engine_pm_get_if_awake(%s) failed under %s\n",
+ engine->name, p->name);
else
intel_engine_pm_put_async(engine);
intel_engine_pm_put_async(engine);
@@ -396,8 +409,9 @@ static int live_engine_pm(void *arg)
intel_engine_pm_flush(engine);
if (intel_engine_pm_is_awake(engine)) {
- pr_err("%s is still awake after flushing pm\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s is still awake after flushing pm\n",
+ engine->name);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 21e5ed9f72a3..97dc44cf615f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
+++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
@@ -72,6 +72,8 @@ static int wait_for_reset(struct intel_engine_cs *engine,
struct i915_request *rq,
unsigned long timeout)
{
+ struct drm_i915_private *i915 = engine->i915;
+
timeout += jiffies;
do {
@@ -89,20 +91,18 @@ static int wait_for_reset(struct intel_engine_cs *engine,
} while (time_before(jiffies, timeout));
if (rq->fence.error != -EIO) {
- pr_err("%s: hanging request %llx:%lld not reset\n",
- engine->name,
- rq->fence.context,
- rq->fence.seqno);
+ drm_err(&i915->drm,
+ "%s: hanging request %llx:%lld not reset\n",
+ engine->name, rq->fence.context, rq->fence.seqno);
return -EINVAL;
}
/* Give the request a jiffy to complete after flushing the worker */
if (i915_request_wait(rq, 0,
max(0l, (long)(timeout - jiffies)) + 1) < 0) {
- pr_err("%s: hanging request %llx:%lld did not complete\n",
- engine->name,
- rq->fence.context,
- rq->fence.seqno);
+ drm_err(&i915->drm,
+ "%s: hanging request %llx:%lld did not complete\n",
+ engine->name, rq->fence.context, rq->fence.seqno);
return -ETIME;
}
@@ -328,6 +328,7 @@ static int live_unlite_preempt(void *arg)
static int live_unlite_ring(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct igt_spinner spin;
enum intel_engine_id id;
@@ -419,12 +420,10 @@ static int live_unlite_ring(void *arg)
n++;
}
intel_engine_flush_submission(engine);
- pr_debug("%s: Filled ring with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
- engine->name, n,
- ce[0]->ring->size,
- ce[0]->ring->tail,
- ce[0]->ring->emit,
- rq->tail);
+ drm_dbg(&i915->drm,
+ "%s: Filled ring with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
+ engine->name, n, ce[0]->ring->size, ce[0]->ring->tail,
+ ce[0]->ring->emit, rq->tail);
GEM_BUG_ON(intel_ring_direction(ce[0]->ring,
rq->tail,
ce[0]->ring->tail) <= 0);
@@ -444,15 +443,16 @@ static int live_unlite_ring(void *arg)
err = wait_for_submit(engine, rq, HZ / 2);
i915_request_put(rq);
if (err) {
- pr_err("%s: preemption request was not submitted\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: preemption request was not submitted\n",
+ engine->name);
err = -ETIME;
}
- pr_debug("%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
- engine->name,
- ce[0]->ring->tail, ce[0]->ring->emit,
- ce[1]->ring->tail, ce[1]->ring->emit);
+ drm_dbg(&i915->drm,
+ "%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
+ engine->name, ce[0]->ring->tail, ce[0]->ring->emit,
+ ce[1]->ring->tail, ce[1]->ring->emit);
err_ce:
intel_engine_flush_submission(engine);
@@ -582,6 +582,7 @@ static void engine_unlock_reset_tasklet(struct intel_engine_cs *engine)
static int live_hold_reset(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
struct igt_spinner spin;
@@ -644,8 +645,9 @@ static int live_hold_reset(void *arg)
/* Check that we do not resubmit the held request */
if (!i915_request_wait(rq, 0, HZ / 5)) {
- pr_err("%s: on hold request completed!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: on hold request completed!\n",
+ engine->name);
i915_request_put(rq);
err = -EIO;
goto out;
@@ -655,8 +657,9 @@ static int live_hold_reset(void *arg)
/* But is resubmitted on release */
execlists_unhold(engine, rq);
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
- pr_err("%s: held request did not complete!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: held request did not complete!\n",
+ engine->name);
intel_gt_set_wedged(gt);
err = -ETIME;
}
@@ -689,6 +692,7 @@ static int live_error_interrupt(void *arg)
{ { GOOD, GOOD } }, /* sentinel */
};
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -764,22 +768,25 @@ static int live_error_interrupt(void *arg)
err = wait_for_submit(engine, client[0], HZ / 2);
if (err) {
- pr_err("%s: first request did not start within time!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: first request did not start within time!\n",
+ engine->name);
err = -ETIME;
goto out;
}
for (i = 0; i < ARRAY_SIZE(client); i++) {
if (i915_request_wait(client[i], 0, HZ / 5) < 0)
- pr_debug("%s: %s request incomplete!\n",
- engine->name,
- error_repr(p->error[i]));
+ drm_dbg(&i915->drm,
+ "%s: %s request incomplete!\n",
+ engine->name,
+ error_repr(p->error[i]));
if (!i915_request_started(client[i])) {
- pr_err("%s: %s request not started!\n",
- engine->name,
- error_repr(p->error[i]));
+ drm_err(&i915->drm,
+ "%s: %s request not started!\n",
+ engine->name,
+ error_repr(p->error[i]));
err = -ETIME;
goto out;
}
@@ -787,11 +794,15 @@ static int live_error_interrupt(void *arg)
/* Kick the tasklet to process the error */
intel_engine_flush_submission(engine);
if (client[i]->fence.error != p->error[i]) {
- pr_err("%s: %s request (%s) with wrong error code: %d\n",
- engine->name,
- error_repr(p->error[i]),
- i915_request_completed(client[i]) ? "completed" : "running",
- client[i]->fence.error);
+ drm_err(&i915->drm,
+ "%s: %s request (%s) with wrong error code: %d\n",
+ engine->name,
+ error_repr(p->error[i]),
+ i915_request_completed(
+ client[i]) ?
+ "completed" :
+ "running",
+ client[i]->fence.error);
err = -EINVAL;
goto out;
}
@@ -802,9 +813,10 @@ static int live_error_interrupt(void *arg)
if (client[i])
i915_request_put(client[i]);
if (err) {
- pr_err("%s: failed at phase[%zd] { %d, %d }\n",
- engine->name, p - phases,
- p->error[0], p->error[1]);
+ drm_err(&i915->drm,
+ "%s: failed at phase[%zd] { %d, %d }\n",
+ engine->name, p - phases, p->error[0],
+ p->error[1]);
break;
}
}
@@ -964,8 +976,9 @@ slice_semaphore_queue(struct intel_engine_cs *outer,
if (i915_request_wait(head, 0,
2 * outer->gt->info.num_engines * (count + 2) * (count + 3)) < 0) {
- pr_err("%s: Failed to slice along semaphore chain of length (%d, %d)!\n",
- outer->name, count, n);
+ drm_err(&outer->gt->i915->drm,
+ "%s: Failed to slice along semaphore chain of length (%d, %d)!\n",
+ outer->name, count, n);
GEM_TRACE_DUMP();
intel_gt_set_wedged(outer->gt);
err = -EIO;
@@ -1114,6 +1127,7 @@ create_rewinder(struct intel_context *ce,
static int live_timeslice_rewind(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -1174,8 +1188,9 @@ static int live_timeslice_rewind(void *arg)
err = wait_for_submit(engine, rq[A2], HZ / 2);
if (err) {
- pr_err("%s: failed to submit first context\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: failed to submit first context\n",
+ engine->name);
goto err;
}
@@ -1192,8 +1207,9 @@ static int live_timeslice_rewind(void *arg)
err = wait_for_submit(engine, rq[B1], HZ / 2);
if (err) {
- pr_err("%s: failed to submit second context\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: failed to submit second context\n",
+ engine->name);
goto err;
}
@@ -1222,21 +1238,23 @@ static int live_timeslice_rewind(void *arg)
;
if (!time_before(jiffies, timeout)) {
- pr_err("%s: rq[%d] timed out\n",
- engine->name, i - 1);
+ drm_err(&i915->drm,
+ "%s: rq[%d] timed out\n", engine->name,
+ i - 1);
err = -ETIME;
goto err;
}
- pr_debug("%s: slot[%d]:%x\n", engine->name, i, slot[i]);
+ drm_dbg(&i915->drm, "%s: slot[%d]:%x\n",
+ engine->name, i, slot[i]);
}
/* XZY: XZ < XY */
if (slot[Z] - slot[X] >= slot[Y] - slot[X]) {
- pr_err("%s: timeslicing did not run context B [%u] before A [%u]!\n",
- engine->name,
- slot[Z] - slot[X],
- slot[Y] - slot[X]);
+ drm_err(&i915->drm,
+ "%s: timeslicing did not run context B [%u] before A [%u]!\n",
+ engine->name, slot[Z] - slot[X],
+ slot[Y] - slot[X]);
err = -EINVAL;
}
@@ -1287,6 +1305,7 @@ static long slice_timeout(struct intel_engine_cs *engine)
static int live_timeslice_queue(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct drm_i915_gem_object *obj;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -1347,8 +1366,9 @@ static int live_timeslice_queue(void *arg)
engine->sched_engine->schedule(rq, &attr);
err = wait_for_submit(engine, rq, HZ / 2);
if (err) {
- pr_err("%s: Timed out trying to submit semaphores\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Timed out trying to submit semaphores\n",
+ engine->name);
goto err_rq;
}
@@ -1361,8 +1381,9 @@ static int live_timeslice_queue(void *arg)
err = wait_for_submit(engine, nop, HZ / 2);
i915_request_put(nop);
if (err) {
- pr_err("%s: Timed out trying to submit nop\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Timed out trying to submit nop\n",
+ engine->name);
goto err_rq;
}
@@ -1385,8 +1406,9 @@ static int live_timeslice_queue(void *arg)
struct drm_printer p =
drm_info_printer(gt->i915->drm.dev);
- pr_err("%s: Failed to timeslice into queue\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to timeslice into queue\n",
+ engine->name);
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -1501,8 +1523,9 @@ static int live_timeslice_nopreempt(void *arg)
* enough to see if it is timesliced in by mistake.
*/
if (i915_request_wait(rq, 0, slice_timeout(engine)) >= 0) {
- pr_err("%s: I915_PRIORITY_BARRIER request completed, bypassing no-preempt request\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: I915_PRIORITY_BARRIER request completed, bypassing no-preempt request\n",
+ engine->name);
err = -EINVAL;
}
i915_request_put(rq);
@@ -1529,6 +1552,7 @@ static int live_busywait_preempt(void *arg)
{
struct intel_gt *gt = arg;
struct i915_gem_context *ctx_hi, *ctx_lo;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
@@ -1648,8 +1672,9 @@ static int live_busywait_preempt(void *arg)
/* Low priority request should be busywaiting now */
if (i915_request_wait(lo, 0, 1) != -ETIME) {
i915_request_put(lo);
- pr_err("%s: Busywaiting request did not!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Busywaiting request did not!\n",
+ engine->name);
err = -EIO;
goto err_vma;
}
@@ -1680,8 +1705,9 @@ static int live_busywait_preempt(void *arg)
if (i915_request_wait(lo, 0, HZ / 5) < 0) {
struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
- pr_err("%s: Failed to preempt semaphore busywait!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to preempt semaphore busywait!\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
GEM_TRACE_DUMP();
@@ -1827,6 +1853,7 @@ static int live_late_preempt(void *arg)
{
struct intel_gt *gt = arg;
struct i915_gem_context *ctx_hi, *ctx_lo;
+ struct drm_i915_private *i915 = gt->i915;
struct igt_spinner spin_hi, spin_lo;
struct intel_engine_cs *engine;
struct i915_sched_attr attr = {};
@@ -1871,7 +1898,8 @@ static int live_late_preempt(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin_lo, rq)) {
- pr_err("First context failed to start\n");
+ drm_err(&i915->drm,
+ "First context failed to start\n");
goto err_wedged;
}
@@ -1885,7 +1913,8 @@ static int live_late_preempt(void *arg)
i915_request_add(rq);
if (igt_wait_for_spinner(&spin_hi, rq)) {
- pr_err("Second context overtook first?\n");
+ drm_err(&i915->drm,
+ "Second context overtook first?\n");
goto err_wedged;
}
@@ -1893,7 +1922,8 @@ static int live_late_preempt(void *arg)
engine->sched_engine->schedule(rq, &attr);
if (!igt_wait_for_spinner(&spin_hi, rq)) {
- pr_err("High priority context failed to preempt the low priority context\n");
+ drm_err(&i915->drm,
+ "High priority context failed to preempt the low priority context\n");
GEM_TRACE_DUMP();
goto err_wedged;
}
@@ -1956,6 +1986,7 @@ static void preempt_client_fini(struct preempt_client *c)
static int live_nopreempt(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct preempt_client a, b;
enum intel_engine_id id;
@@ -1993,7 +2024,8 @@ static int live_nopreempt(void *arg)
i915_request_add(rq_a);
if (!igt_wait_for_spinner(&a.spin, rq_a)) {
- pr_err("First client failed to start\n");
+ drm_err(&i915->drm,
+ "First client failed to start\n");
goto err_wedged;
}
@@ -2012,22 +2044,25 @@ static int live_nopreempt(void *arg)
/* Wait long enough for preemption and timeslicing */
if (igt_wait_for_spinner(&b.spin, rq_b)) {
- pr_err("Second client started too early!\n");
+ drm_err(&i915->drm,
+ "Second client started too early!\n");
goto err_wedged;
}
igt_spinner_end(&a.spin);
if (!igt_wait_for_spinner(&b.spin, rq_b)) {
- pr_err("Second client failed to start\n");
+ drm_err(&i915->drm,
+ "Second client failed to start\n");
goto err_wedged;
}
igt_spinner_end(&b.spin);
if (engine->execlists.preempt_hang.count) {
- pr_err("Preemption recorded x%d; should have been suppressed!\n",
- engine->execlists.preempt_hang.count);
+ drm_err(&i915->drm,
+ "Preemption recorded x%d; should have been suppressed!\n",
+ engine->execlists.preempt_hang.count);
err = -EINVAL;
goto err_wedged;
}
@@ -2089,7 +2124,8 @@ static int __cancel_active0(struct live_preempt_cancel *arg)
err = wait_for_reset(arg->engine, rq, HZ / 2);
if (err) {
- pr_err("Cancelled inflight0 request did not reset\n");
+ drm_err(&arg->engine->i915->drm,
+ "Cancelled inflight0 request did not reset\n");
goto out;
}
@@ -2102,6 +2138,7 @@ static int __cancel_active0(struct live_preempt_cancel *arg)
static int __cancel_active1(struct live_preempt_cancel *arg)
{
+ struct drm_i915_private *i915 = arg->engine->i915;
struct i915_request *rq[2] = {};
struct igt_live_test t;
int err;
@@ -2152,13 +2189,15 @@ static int __cancel_active1(struct live_preempt_cancel *arg)
goto out;
if (rq[0]->fence.error != 0) {
- pr_err("Normal inflight0 request did not complete\n");
+ drm_err(&i915->drm,
+ "Normal inflight0 request did not complete\n");
err = -EINVAL;
goto out;
}
if (rq[1]->fence.error != -EIO) {
- pr_err("Cancelled inflight1 request did not report -EIO\n");
+ drm_err(&i915->drm,
+ "Cancelled inflight1 request did not report -EIO\n");
err = -EINVAL;
goto out;
}
@@ -2173,6 +2212,7 @@ static int __cancel_active1(struct live_preempt_cancel *arg)
static int __cancel_queued(struct live_preempt_cancel *arg)
{
+ struct drm_i915_private *i915 = arg->engine->i915;
struct i915_request *rq[3] = {};
struct igt_live_test t;
int err;
@@ -2234,7 +2274,8 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
goto out;
if (rq[0]->fence.error != -EIO) {
- pr_err("Cancelled inflight0 request did not report -EIO\n");
+ drm_err(&i915->drm,
+ "Cancelled inflight0 request did not report -EIO\n");
err = -EINVAL;
goto out;
}
@@ -2246,13 +2287,15 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
*/
if (intel_engine_has_semaphores(rq[1]->engine) &&
rq[1]->fence.error != 0) {
- pr_err("Normal inflight1 request did not complete\n");
+ drm_err(&i915->drm,
+ "Normal inflight1 request did not complete\n");
err = -EINVAL;
goto out;
}
if (rq[2]->fence.error != -EIO) {
- pr_err("Cancelled queued request did not report -EIO\n");
+ drm_err(&i915->drm,
+ "Cancelled queued request did not report -EIO\n");
err = -EINVAL;
goto out;
}
@@ -2300,7 +2343,8 @@ static int __cancel_hostile(struct live_preempt_cancel *arg)
err = wait_for_reset(arg->engine, rq, HZ / 2);
if (err) {
- pr_err("Cancelled inflight0 request did not reset\n");
+ drm_err(&arg->engine->i915->drm,
+ "Cancelled inflight0 request did not reset\n");
goto out;
}
@@ -2371,7 +2415,8 @@ static int __cancel_fail(struct live_preempt_cancel *arg)
intel_engine_set_heartbeat(engine,
engine->defaults.heartbeat_interval_ms);
if (err) {
- pr_err("Cancelled inflight0 request did not reset\n");
+ drm_err(&engine->i915->drm,
+ "Cancelled inflight0 request did not reset\n");
goto out;
}
@@ -2443,6 +2488,7 @@ static int live_suppress_self_preempt(void *arg)
{
struct i915_sched_attr attr = { .priority = I915_PRIORITY_MAX };
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct preempt_client a, b;
enum intel_engine_id id;
@@ -2490,7 +2536,8 @@ static int live_suppress_self_preempt(void *arg)
i915_request_add(rq_a);
if (!igt_wait_for_spinner(&a.spin, rq_a)) {
- pr_err("First client failed to start\n");
+ drm_err(&i915->drm,
+ "First client failed to start\n");
st_engine_heartbeat_enable(engine);
goto err_wedged;
}
@@ -2513,7 +2560,8 @@ static int live_suppress_self_preempt(void *arg)
igt_spinner_end(&a.spin);
if (!igt_wait_for_spinner(&b.spin, rq_b)) {
- pr_err("Second client failed to start\n");
+ drm_err(&i915->drm,
+ "Second client failed to start\n");
st_engine_heartbeat_enable(engine);
goto err_wedged;
}
@@ -2524,10 +2572,10 @@ static int live_suppress_self_preempt(void *arg)
igt_spinner_end(&a.spin);
if (engine->execlists.preempt_hang.count) {
- pr_err("Preemption on %s recorded x%d, depth %d; should have been suppressed!\n",
- engine->name,
- engine->execlists.preempt_hang.count,
- depth);
+ drm_err(&i915->drm,
+ "Preemption on %s recorded x%d, depth %d; should have been suppressed!\n",
+ engine->name,
+ engine->execlists.preempt_hang.count, depth);
st_engine_heartbeat_enable(engine);
err = -EINVAL;
goto err_client_b;
@@ -2556,6 +2604,7 @@ static int live_suppress_self_preempt(void *arg)
static int live_chain_preempt(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct preempt_client hi, lo;
enum intel_engine_id id;
@@ -2595,12 +2644,15 @@ static int live_chain_preempt(void *arg)
if (ring_size < 0)
ring_size += rq->ring->size;
ring_size = rq->ring->size / ring_size;
- pr_debug("%s(%s): Using maximum of %d requests\n",
- __func__, engine->name, ring_size);
+ drm_dbg(&i915->drm,
+ "%s(%s): Using maximum of %d requests\n", __func__,
+ engine->name, ring_size);
igt_spinner_end(&lo.spin);
if (i915_request_wait(rq, 0, HZ / 2) < 0) {
- pr_err("Timed out waiting to flush %s\n", engine->name);
+ drm_err(&i915->drm,
+ "Timed out waiting to flush %s\n",
+ engine->name);
i915_request_put(rq);
goto err_wedged;
}
@@ -2648,8 +2700,9 @@ static int live_chain_preempt(void *arg)
struct drm_printer p =
drm_info_printer(gt->i915->drm.dev);
- pr_err("Failed to preempt over chain of %d\n",
- count);
+ drm_err(&i915->drm,
+ "Failed to preempt over chain of %d\n",
+ count);
intel_engine_dump(engine, &p,
"%s\n", engine->name);
i915_request_put(rq);
@@ -2669,8 +2722,9 @@ static int live_chain_preempt(void *arg)
struct drm_printer p =
drm_info_printer(gt->i915->drm.dev);
- pr_err("Failed to flush low priority chain of %d requests\n",
- count);
+ drm_err(&i915->drm,
+ "Failed to flush low priority chain of %d requests\n",
+ count);
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -2800,6 +2854,7 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
struct igt_spinner *spin,
int queue_sz, int ring_sz)
{
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *ce[2] = {};
struct i915_request *rq;
struct igt_live_test t;
@@ -2867,12 +2922,10 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
n++;
}
intel_engine_flush_submission(engine);
- pr_debug("%s: Filled %d with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
- engine->name, queue_sz, n,
- ce[0]->ring->size,
- ce[0]->ring->tail,
- ce[0]->ring->emit,
- rq->tail);
+ drm_dbg(&i915->drm,
+ "%s: Filled %d with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
+ engine->name, queue_sz, n, ce[0]->ring->size, ce[0]->ring->tail,
+ ce[0]->ring->emit, rq->tail);
i915_request_put(rq);
/* Create a second request to preempt the first ring */
@@ -2889,15 +2942,16 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
err = wait_for_submit(engine, rq, HZ / 2);
i915_request_put(rq);
if (err) {
- pr_err("%s: preemption request was not submitted\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: preemption request was not submitted\n",
+ engine->name);
err = -ETIME;
}
- pr_debug("%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
- engine->name,
- ce[0]->ring->tail, ce[0]->ring->emit,
- ce[1]->ring->tail, ce[1]->ring->emit);
+ drm_dbg(&i915->drm,
+ "%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
+ engine->name, ce[0]->ring->tail, ce[0]->ring->emit,
+ ce[1]->ring->tail, ce[1]->ring->emit);
err_ce:
intel_engine_flush_submission(engine);
@@ -2961,6 +3015,7 @@ static int live_preempt_ring(void *arg)
static int live_preempt_gang(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -2999,8 +3054,9 @@ static int live_preempt_gang(void *arg)
engine->sched_engine->schedule(rq, &attr);
} while (prio <= I915_PRIORITY_MAX &&
!__igt_timeout(end_time, NULL));
- pr_debug("%s: Preempt chain of %d requests\n",
- engine->name, prio);
+ drm_dbg(&i915->drm,
+ "%s: Preempt chain of %d requests\n", engine->name,
+ prio);
/*
* Such that the last spinner is the highest priority and
@@ -3024,8 +3080,9 @@ static int live_preempt_gang(void *arg)
struct drm_printer p =
drm_info_printer(engine->i915->drm.dev);
- pr_err("Failed to flush chain of %d requests, at %d\n",
- prio, rq_prio(rq));
+ drm_err(&i915->drm,
+ "Failed to flush chain of %d requests, at %d\n",
+ prio, rq_prio(rq));
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -3250,6 +3307,7 @@ static int preempt_user(struct intel_engine_cs *engine,
static int live_preempt_user(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct i915_vma *global;
enum intel_engine_id id;
@@ -3319,8 +3377,9 @@ static int live_preempt_user(void *arg)
}
if (READ_ONCE(result[0]) != NUM_GPR) {
- pr_err("%s: Failed to release semaphore\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Failed to release semaphore\n",
+ engine->name);
err = -EIO;
goto end_test;
}
@@ -3335,9 +3394,10 @@ static int live_preempt_user(void *arg)
for (gpr = 1; gpr < NUM_GPR; gpr++) {
if (result[NUM_GPR * i + gpr] != 1) {
- pr_err("%s: Invalid result, client %d, gpr %d, result: %d\n",
- engine->name,
- i, gpr, result[NUM_GPR * i + gpr]);
+ drm_err(&i915->drm,
+ "%s: Invalid result, client %d, gpr %d, result: %d\n",
+ engine->name, i, gpr,
+ result[NUM_GPR * i + gpr]);
err = -EINVAL;
goto end_test;
}
@@ -3601,8 +3661,9 @@ static int smoke_crescendo(struct preempt_smoke *smoke, unsigned int flags)
kthread_destroy_worker(worker[id]);
}
- pr_info("Submitted %lu crescendo:%x requests across %d engines and %d contexts\n",
- count, flags, smoke->gt->info.num_engines, smoke->ncontext);
+ drm_info(&smoke->gt->i915->drm,
+ "Submitted %lu crescendo:%x requests across %d engines and %d contexts\n",
+ count, flags, smoke->gt->info.num_engines, smoke->ncontext);
kfree(arg);
return 0;
@@ -3630,8 +3691,9 @@ static int smoke_random(struct preempt_smoke *smoke, unsigned int flags)
}
} while (count < smoke->ncontext && !__igt_timeout(end_time, NULL));
- pr_info("Submitted %lu random:%x requests across %d engines and %d contexts\n",
- count, flags, smoke->gt->info.num_engines, smoke->ncontext);
+ drm_info(&smoke->gt->i915->drm,
+ "Submitted %lu random:%x requests across %d engines and %d contexts\n",
+ count, flags, smoke->gt->info.num_engines, smoke->ncontext);
return 0;
}
@@ -3716,6 +3778,7 @@ static int nop_virtual_engine(struct intel_gt *gt,
unsigned int flags)
#define CHAIN BIT(0)
{
+ struct drm_i915_private *i915 = gt->i915;
IGT_TIMEOUT(end_time);
struct i915_request *request[16] = {};
struct intel_context *ve[16];
@@ -3787,10 +3850,11 @@ static int nop_virtual_engine(struct intel_gt *gt,
for (nc = 0; nc < nctx; nc++) {
if (i915_request_wait(request[nc], 0, HZ / 10) < 0) {
- pr_err("%s(%s): wait for %llx:%lld timed out\n",
- __func__, ve[0]->engine->name,
- request[nc]->fence.context,
- request[nc]->fence.seqno);
+ drm_err(&i915->drm,
+ "%s(%s): wait for %llx:%lld timed out\n",
+ __func__, ve[0]->engine->name,
+ request[nc]->fence.context,
+ request[nc]->fence.seqno);
GEM_TRACE("%s(%s) failed at request %llx:%lld\n",
__func__, ve[0]->engine->name,
@@ -3819,9 +3883,10 @@ static int nop_virtual_engine(struct intel_gt *gt,
if (err)
goto out;
- pr_info("Requestx%d latencies on %s: 1 = %lluns, %lu = %lluns\n",
- nctx, ve[0]->engine->name, ktime_to_ns(times[0]),
- prime, div64_u64(ktime_to_ns(times[1]), prime));
+ drm_info(&i915->drm,
+ "Requestx%d latencies on %s: 1 = %lluns, %lu = %lluns\n", nctx,
+ ve[0]->engine->name, ktime_to_ns(times[0]), prime,
+ div64_u64(ktime_to_ns(times[1]), prime));
out:
if (igt_flush_test(gt->i915))
@@ -3880,8 +3945,9 @@ static int live_virtual_engine(void *arg)
for_each_engine(engine, gt, id) {
err = nop_virtual_engine(gt, &engine, 1, 1, 0);
if (err) {
- pr_err("Failed to wrap engine %s: err=%d\n",
- engine->name, err);
+ drm_err(&engine->i915->drm,
+ "Failed to wrap engine %s: err=%d\n",
+ engine->name, err);
return err;
}
}
@@ -3913,6 +3979,7 @@ static int mask_virtual_engine(struct intel_gt *gt,
unsigned int nsibling)
{
struct i915_request *request[MAX_ENGINE_INSTANCE + 1];
+ struct drm_i915_private *i915 = gt->i915;
struct intel_context *ve;
struct igt_live_test t;
unsigned int n;
@@ -3954,10 +4021,11 @@ static int mask_virtual_engine(struct intel_gt *gt,
for (n = 0; n < nsibling; n++) {
if (i915_request_wait(request[n], 0, HZ / 10) < 0) {
- pr_err("%s(%s): wait for %llx:%lld timed out\n",
- __func__, ve->engine->name,
- request[n]->fence.context,
- request[n]->fence.seqno);
+ drm_err(&i915->drm,
+ "%s(%s): wait for %llx:%lld timed out\n",
+ __func__, ve->engine->name,
+ request[n]->fence.context,
+ request[n]->fence.seqno);
GEM_TRACE("%s(%s) failed at request %llx:%lld\n",
__func__, ve->engine->name,
@@ -3970,9 +4038,10 @@ static int mask_virtual_engine(struct intel_gt *gt,
}
if (request[n]->engine != siblings[nsibling - n - 1]) {
- pr_err("Executed on wrong sibling '%s', expected '%s'\n",
- request[n]->engine->name,
- siblings[nsibling - n - 1]->name);
+ drm_err(&i915->drm,
+ "Executed on wrong sibling '%s', expected '%s'\n",
+ request[n]->engine->name,
+ siblings[nsibling - n - 1]->name);
err = -EINVAL;
goto out;
}
@@ -4272,8 +4341,9 @@ static int preserved_virtual_engine(struct intel_gt *gt,
for (n = 0; n < NUM_GPR_DW; n++) {
if (cs[n] != n) {
- pr_err("Incorrect value[%d] found for GPR[%d]\n",
- cs[n], n);
+ drm_err(>->i915->drm,
+ "Incorrect value[%d] found for GPR[%d]\n",
+ cs[n], n);
err = -EINVAL;
break;
}
@@ -4332,6 +4402,7 @@ static int reset_virtual_engine(struct intel_gt *gt,
struct intel_engine_cs **siblings,
unsigned int nsibling)
{
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
struct intel_context *ve;
struct igt_spinner spin;
@@ -4400,8 +4471,8 @@ static int reset_virtual_engine(struct intel_gt *gt,
/* Check that we do not resubmit the held request */
i915_request_get(rq);
if (!i915_request_wait(rq, 0, HZ / 5)) {
- pr_err("%s: on hold request completed!\n",
- engine->name);
+ drm_err(&i915->drm, "%s: on hold request completed!\n",
+ engine->name);
intel_gt_set_wedged(gt);
err = -EIO;
goto out_rq;
@@ -4411,8 +4482,8 @@ static int reset_virtual_engine(struct intel_gt *gt,
/* But is resubmitted on release */
execlists_unhold(engine, rq);
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
- pr_err("%s: held request did not complete!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: held request did not complete!\n", engine->name);
intel_gt_set_wedged(gt);
err = -ETIME;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
index 07eaf71955c4..4e583fcb1cf9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
@@ -5,6 +5,8 @@
#include <linux/sort.h>
+#include <drm/drm_print.h>
+
#include "intel_engine_regs.h"
#include "intel_gt_clock_utils.h"
@@ -79,13 +81,14 @@ static void measure_clocks(struct intel_engine_cs *engine,
static int live_gt_clocks(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
intel_wakeref_t wakeref;
int err = 0;
if (!gt->clock_frequency) { /* unknown */
- pr_info("CS_TIMESTAMP frequency unknown\n");
+ drm_info(&i915->drm, "CS_TIMESTAMP frequency unknown\n");
return 0;
}
@@ -109,20 +112,23 @@ static int live_gt_clocks(void *arg)
time = intel_gt_clock_interval_to_ns(engine->gt, cycles);
expected = intel_gt_ns_to_clock_interval(engine->gt, dt);
- pr_info("%s: TIMESTAMP %d cycles [%lldns] in %lldns [%d cycles], using CS clock frequency of %uKHz\n",
- engine->name, cycles, time, dt, expected,
- engine->gt->clock_frequency / 1000);
+ drm_info(&i915->drm,
+ "%s: TIMESTAMP %d cycles [%lldns] in %lldns [%d cycles], using CS clock frequency of %uKHz\n",
+ engine->name, cycles, time, dt, expected,
+ engine->gt->clock_frequency / 1000);
if (9 * time < 8 * dt || 8 * time > 9 * dt) {
- pr_err("%s: CS ticks did not match walltime!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: CS ticks did not match walltime!\n",
+ engine->name);
err = -EINVAL;
break;
}
if (9 * expected < 8 * cycles || 8 * expected > 9 * cycles) {
- pr_err("%s: walltime did not match CS ticks!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: walltime did not match CS ticks!\n",
+ engine->name);
err = -EINVAL;
break;
}
@@ -137,6 +143,7 @@ static int live_gt_clocks(void *arg)
static int live_gt_resume(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
IGT_TIMEOUT(end_time);
int err;
@@ -146,7 +153,8 @@ static int live_gt_resume(void *arg)
intel_gt_suspend_late(gt);
if (gt->rc6.enabled) {
- pr_err("rc6 still enabled after suspend!\n");
+ drm_err(&i915->drm,
+ "rc6 still enabled after suspend!\n");
intel_gt_set_wedged_on_init(gt);
err = -EINVAL;
break;
@@ -157,7 +165,8 @@ static int live_gt_resume(void *arg)
break;
if (gt->rc6.supported && !gt->rc6.enabled) {
- pr_err("rc6 not enabled upon resume!\n");
+ drm_err(&i915->drm,
+ "rc6 not enabled upon resume!\n");
intel_gt_set_wedged_on_init(gt);
err = -EINVAL;
break;
@@ -165,7 +174,8 @@ static int live_gt_resume(void *arg)
err = st_llc_verify(>->llc);
if (err) {
- pr_err("llc state not restored upon resume!\n");
+ drm_err(&i915->drm,
+ "llc state not restored upon resume!\n");
intel_gt_set_wedged_on_init(gt);
break;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c b/drivers/gpu/drm/i915/gt/selftest_migrate.c
index 5b986a7687d9..fb348aa82e05 100644
--- a/drivers/gpu/drm/i915/gt/selftest_migrate.c
+++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c
@@ -5,6 +5,8 @@
#include <linux/sort.h>
+#include <drm/drm_print.h>
+
#include "gem/i915_gem_internal.h"
#include "gem/i915_gem_lmem.h"
@@ -92,7 +94,7 @@ static int copy(struct intel_migrate *migrate,
continue;
if (err != -EDEADLK && err != -EINTR && err != -ERESTARTSYS)
- pr_err("%ps failed, size: %u\n", fn, sz);
+ drm_err(&i915->drm, "%ps failed, size: %u\n", fn, sz);
if (rq) {
i915_request_wait(rq, 0, HZ);
i915_request_put(rq);
@@ -106,7 +108,8 @@ static int copy(struct intel_migrate *migrate,
if (rq) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n", fn, sz);
+ drm_err(&i915->drm, "%ps timed out, size: %u\n", fn,
+ sz);
err = -ETIME;
}
i915_request_put(rq);
@@ -116,8 +119,9 @@ static int copy(struct intel_migrate *migrate,
int x = i * 1024 + i915_prandom_u32_max_state(1024, prng);
if (vaddr[x] != x) {
- pr_err("%ps failed, size: %u, offset: %zu\n",
- fn, sz, x * sizeof(u32));
+ drm_err(&i915->drm,
+ "%ps failed, size: %u, offset: %zu\n", fn, sz,
+ x * sizeof(u32));
igt_hexdump(vaddr + i * 1024, 4096);
err = -EINVAL;
}
@@ -304,8 +308,9 @@ static int clear(struct intel_migrate *migrate,
true, &rq);
if (rq && !err) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n",
- fn, sz);
+ drm_err(&i915->drm,
+ "%ps timed out, size: %u\n", fn,
+ sz);
err = -ETIME;
}
i915_request_put(rq);
@@ -318,7 +323,8 @@ static int clear(struct intel_migrate *migrate,
err = fn(migrate, &ww, obj, val, &rq);
if (rq && !err) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n", fn, sz);
+ drm_err(&i915->drm, "%ps timed out, size: %u\n",
+ fn, sz);
err = -ETIME;
}
i915_request_put(rq);
@@ -335,8 +341,9 @@ static int clear(struct intel_migrate *migrate,
i915_prandom_u32_max_state(1024, prng);
if (vaddr[x] != val) {
- pr_err("%ps failed, (%u != %u), offset: %zu\n",
- fn, vaddr[x], val, x * sizeof(u32));
+ drm_err(&i915->drm,
+ "%ps failed, (%u != %u), offset: %zu\n",
+ fn, vaddr[x], val, x * sizeof(u32));
igt_hexdump(vaddr + i * 1024, 4096);
err = -EINVAL;
}
@@ -355,8 +362,9 @@ static int clear(struct intel_migrate *migrate,
false, &rq);
if (rq && !err) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n",
- fn, sz);
+ drm_err(&i915->drm,
+ "%ps timed out, size: %u\n", fn,
+ sz);
err = -ETIME;
}
i915_request_put(rq);
@@ -377,8 +385,11 @@ static int clear(struct intel_migrate *migrate,
ccs_bytes_left), prng);
if (vaddr[offset + x]) {
- pr_err("%ps ccs clearing failed, offset: %ld/%d\n",
- fn, i * PAGE_SIZE + x * sizeof(u32), ccs_bytes);
+ drm_err(&i915->drm,
+ "%ps ccs clearing failed, offset: %ld/%d\n",
+ fn,
+ i * PAGE_SIZE + x * sizeof(u32),
+ ccs_bytes);
igt_hexdump(vaddr + offset,
min_t(int, 4096,
ccs_bytes_left * sizeof(u32)));
@@ -394,7 +405,7 @@ static int clear(struct intel_migrate *migrate,
if (err) {
if (err != -EDEADLK && err != -EINTR && err != -ERESTARTSYS)
- pr_err("%ps failed, size: %u\n", fn, sz);
+ drm_err(&i915->drm, "%ps failed, size: %u\n", fn, sz);
if (rq && err != -EINVAL) {
i915_request_wait(rq, 0, HZ);
i915_request_put(rq);
@@ -540,7 +551,7 @@ static void spinner_kill(struct timer_list *timer)
struct spinner_timer *st = timer_container_of(st, timer, timer);
igt_spinner_end(&st->spin);
- pr_info("%s\n", __func__);
+ drm_info(st->spin.hws->base.dev, "killing spinner\n");
}
static int live_emit_pte_full_ring(void *arg)
@@ -633,7 +644,8 @@ static int live_emit_pte_full_ring(void *arg)
cs += sz;
intel_ring_advance(rq, cs);
- pr_info("%s emit=%u sz=%d\n", __func__, rq->ring->emit, sz);
+ drm_info(&i915->drm, "%s emit=%u sz=%d\n", __func__,
+ rq->ring->emit, sz);
prev = rq;
} while (rq->ring->space > (rq->reserved_space +
@@ -646,7 +658,8 @@ static int live_emit_pte_full_ring(void *arg)
* This should wait for the spinner to be killed, otherwise we should go
* down in flames when doing i915_request_add().
*/
- pr_info("%s emite_pte ring space=%u\n", __func__, rq->ring->space);
+ drm_info(&i915->drm, "%s emite_pte ring space=%u\n", __func__,
+ rq->ring->space);
it = sg_sgt(obj->mm.pages->sgl);
len = emit_pte(rq, &it, obj->pat_index, false, 0, CHUNK_SZ);
if (!len) {
@@ -880,11 +893,10 @@ static int __perf_clear_blt(struct intel_context *ce,
return err;
sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
- pr_info("%s: %zd KiB fill: %lld MiB/s\n",
- ce->engine->name, sz >> 10,
- div64_u64(mul_u32_u32(4 * sz,
- 1000 * 1000 * 1000),
- t[1] + 2 * t[2] + t[3]) >> 20);
+ drm_info(&ce->engine->i915->drm, "%s: %zd KiB fill: %lld MiB/s\n",
+ ce->engine->name, sz >> 10,
+ div64_u64(mul_u32_u32(4 * sz, 1000 * 1000 * 1000),
+ t[1] + 2 * t[2] + t[3]) >> 20);
return 0;
}
@@ -963,11 +975,10 @@ static int __perf_copy_blt(struct intel_context *ce,
return err;
sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
- pr_info("%s: %zd KiB copy: %lld MiB/s\n",
- ce->engine->name, sz >> 10,
- div64_u64(mul_u32_u32(4 * sz,
- 1000 * 1000 * 1000),
- t[1] + 2 * t[2] + t[3]) >> 20);
+ drm_info(&ce->engine->i915->drm, "%s: %zd KiB copy: %lld MiB/s\n",
+ ce->engine->name, sz >> 10,
+ div64_u64(mul_u32_u32(4 * sz, 1000 * 1000 * 1000),
+ t[1] + 2 * t[2] + t[3]) >> 20);
return 0;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c
index d73e438fb85f..770516c6c7da 100644
--- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
@@ -13,6 +13,8 @@
#include "selftests/igt_spinner.h"
#include "selftests/intel_scheduler_helpers.h"
+#include <drm/drm_print.h>
+
struct live_mocs {
struct drm_i915_mocs_table table;
struct drm_i915_mocs_table *mocs;
@@ -169,8 +171,9 @@ static int check_mocs_table(struct intel_engine_cs *engine,
for_each_mocs(expect, table, i) {
if (**vaddr != expect) {
- pr_err("%s: Invalid MOCS[%d] entry, found %08x, expected %08x\n",
- engine->name, i, **vaddr, expect);
+ drm_err(&engine->i915->drm,
+ "%s: Invalid MOCS[%d] entry, found %08x, expected %08x\n",
+ engine->name, i, **vaddr, expect);
return -EINVAL;
}
++*vaddr;
@@ -203,8 +206,9 @@ static int check_l3cc_table(struct intel_engine_cs *engine,
for_each_l3cc(expect, table, i) {
if (!mcr_range(engine->i915, reg) && **vaddr != expect) {
- pr_err("%s: Invalid L3CC[%d] entry, found %08x, expected %08x\n",
- engine->name, i, **vaddr, expect);
+ drm_err(&engine->i915->drm,
+ "%s: Invalid L3CC[%d] entry, found %08x, expected %08x\n",
+ engine->name, i, **vaddr, expect);
return -EINVAL;
}
++*vaddr;
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 2cfc23c58e90..938218e0d5bc 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -14,11 +14,14 @@
#include "selftests/igt_atomic.h"
#include "selftests/igt_spinner.h"
+#include <drm/drm_print.h>
+
static int
__igt_reset_stolen(struct intel_gt *gt,
intel_engine_mask_t mask,
const char *msg)
{
+ struct drm_i915_private *i915 = gt->i915;
struct i915_ggtt *ggtt = gt->ggtt;
const struct resource *dsm = >->i915->dsm.stolen;
resource_size_t num_pages, page;
@@ -147,8 +150,9 @@ __igt_reset_stolen(struct intel_gt *gt,
!__drm_mm_interval_first(>->i915->mm.stolen,
page << PAGE_SHIFT,
((page + 1) << PAGE_SHIFT) - 1)) {
- pr_debug("unused stolen page %pa modified by GPU reset\n",
- &page);
+ drm_dbg(&i915->drm,
+ "unused stolen page %pa modified by GPU reset\n",
+ &page);
if (count++ == 0)
igt_hexdump(in, PAGE_SIZE);
max = page;
@@ -160,12 +164,14 @@ __igt_reset_stolen(struct intel_gt *gt,
ggtt->vm.clear_range(&ggtt->vm, ggtt->error_capture.start, PAGE_SIZE);
if (count > 0) {
- pr_info("%s reset clobbered %ld pages of stolen, last clobber at page %ld\n",
- msg, count, max);
+ drm_info(&i915->drm,
+ "%s reset clobbered %ld pages of stolen, last clobber at page %ld\n",
+ msg, count, max);
}
if (max >= I915_GEM_STOLEN_BIAS >> PAGE_SHIFT) {
- pr_err("%s reset clobbered unreserved area [above %x] of stolen; may cause severe faults\n",
- msg, I915_GEM_STOLEN_BIAS);
+ drm_err(&i915->drm,
+ "%s reset clobbered unreserved area [above %x] of stolen; may cause severe faults\n",
+ msg, I915_GEM_STOLEN_BIAS);
err = -EINVAL;
}
@@ -223,7 +229,7 @@ static int igt_global_reset(void *arg)
intel_gt_reset(gt, ALL_ENGINES, NULL);
if (i915_reset_count(>->i915->gpu_error) == reset_count) {
- pr_err("No GPU reset recorded!\n");
+ drm_err(>->i915->drm, "No GPU reset recorded!\n");
err = -EINVAL;
}
@@ -287,7 +293,8 @@ static int igt_atomic_reset(void *arg)
reset_finish(gt, awake);
if (err) {
- pr_err("__intel_gt_reset failed under %s\n", p->name);
+ drm_err(>->i915->drm,
+ "__intel_gt_reset failed under %s\n", p->name);
break;
}
}
@@ -347,8 +354,9 @@ static int igt_atomic_engine_reset(void *arg)
local_bh_enable();
if (err) {
- pr_err("intel_engine_reset(%s) failed under %s\n",
- engine->name, p->name);
+ drm_err(&engine->i915->drm,
+ "intel_engine_reset(%s) failed under %s\n",
+ engine->name, p->name);
break;
}
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index c3c918248989..531dbc08c8c3 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -3,6 +3,10 @@
* Copyright © 2021 Intel Corporation
*/
+#include <drm/drm_print.h>
+
+#include "uc/intel_guc.h"
+
#define NUM_STEPS 5
#define H2G_DELAY 50000
#define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 10000)
@@ -23,13 +27,22 @@ struct slpc_thread {
int result;
};
+static struct intel_gt *selftest_slpc_to_gt(struct intel_guc_slpc *slpc)
+{
+ struct intel_guc *guc = container_of(slpc, struct intel_guc, slpc);
+
+ return guc_to_gt(guc);
+}
+
static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
{
+ struct intel_gt *gt = selftest_slpc_to_gt(slpc);
int ret;
ret = intel_guc_slpc_set_min_freq(slpc, freq);
if (ret)
- pr_err("Could not set min frequency to [%u]\n", freq);
+ drm_err(>->i915->drm, "Could not set min frequency to [%u]\n",
+ freq);
else /* Delay to ensure h2g completes */
delay_for_h2g();
@@ -38,12 +51,13 @@ static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
{
+ struct intel_gt *gt = selftest_slpc_to_gt(slpc);
int ret;
ret = intel_guc_slpc_set_max_freq(slpc, freq);
if (ret)
- pr_err("Could not set maximum frequency [%u]\n",
- freq);
+ drm_err(>->i915->drm,
+ "Could not set maximum frequency [%u]\n", freq);
else /* Delay to ensure h2g completes */
delay_for_h2g();
@@ -52,18 +66,19 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
static int slpc_set_freq(struct intel_gt *gt, u32 freq)
{
+ struct drm_i915_private *i915 = gt->i915;
int err;
struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
err = slpc_set_max_freq(slpc, freq);
if (err) {
- pr_err("Unable to update max freq");
+ drm_err(&i915->drm, "Unable to update max freq");
return err;
}
err = slpc_set_min_freq(slpc, freq);
if (err) {
- pr_err("Unable to update min freq");
+ drm_err(&i915->drm, "Unable to update min freq");
return err;
}
@@ -72,23 +87,25 @@ static int slpc_set_freq(struct intel_gt *gt, u32 freq)
static int slpc_restore_freq(struct intel_guc_slpc *slpc, u32 min, u32 max)
{
+ struct intel_gt *gt = selftest_slpc_to_gt(slpc);
+ struct drm_i915_private *i915 = gt->i915;
int err;
err = slpc_set_max_freq(slpc, max);
if (err) {
- pr_err("Unable to restore max freq");
+ drm_err(&i915->drm, "Unable to restore max freq");
return err;
}
err = slpc_set_min_freq(slpc, min);
if (err) {
- pr_err("Unable to restore min freq");
+ drm_err(&i915->drm, "Unable to restore min freq");
return err;
}
err = intel_guc_slpc_set_ignore_eff_freq(slpc, false);
if (err) {
- pr_err("Unable to restore efficient freq");
+ drm_err(&i915->drm, "Unable to restore efficient freq");
return err;
}
@@ -143,8 +160,9 @@ static int vary_max_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
/* GuC requests freq in multiples of 50/3 MHz */
if (req_freq > (max_freq + FREQUENCY_REQ_UNIT)) {
- pr_err("SWReq is %d, should be at most %d\n", req_freq,
- max_freq + FREQUENCY_REQ_UNIT);
+ drm_err(&rps_to_i915(rps)->drm,
+ "SWReq is %d, should be at most %d\n", req_freq,
+ max_freq + FREQUENCY_REQ_UNIT);
err = -EINVAL;
}
@@ -179,8 +197,9 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
/* GuC requests freq in multiples of 50/3 MHz */
if (req_freq < (min_freq - FREQUENCY_REQ_UNIT)) {
- pr_err("SWReq is %d, should be at least %d\n", req_freq,
- min_freq - FREQUENCY_REQ_UNIT);
+ drm_err(&rps_to_i915(rps)->drm,
+ "SWReq is %d, should be at least %d\n",
+ req_freq, min_freq - FREQUENCY_REQ_UNIT);
err = -EINVAL;
}
@@ -198,6 +217,7 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
{
struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
+ struct drm_i915_private *i915 = gt->i915;
struct {
u64 power;
int freq;
@@ -224,19 +244,20 @@ static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
if (err)
return err;
- pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
- engine->name,
- min.power, min.freq,
- max.power, max.freq);
+ drm_info(&i915->drm,
+ "%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n", engine->name,
+ min.power, min.freq, max.power, max.freq);
if (10 * min.freq >= 9 * max.freq) {
- pr_notice("Could not control frequency, ran at [%uMHz, %uMhz]\n",
- min.freq, max.freq);
+ drm_notice(&i915->drm,
+ "Could not control frequency, ran at [%uMHz, %uMhz]\n",
+ min.freq, max.freq);
}
if (11 * min.power > 10 * max.power) {
- pr_err("%s: did not conserve power when setting lower frequency!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: did not conserve power when setting lower frequency!\n",
+ engine->name);
err = -EINVAL;
}
@@ -250,6 +271,7 @@ static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps, u32 *max_act_freq)
{
struct intel_gt *gt = rps_to_gt(rps);
+ struct drm_i915_private *i915 = gt->i915;
u32 perf_limit_reasons;
int err = 0;
@@ -265,10 +287,13 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
/* If not, this is an error */
if (!(perf_limit_reasons & GT0_PERF_LIMIT_REASONS_MASK)) {
- pr_err("Pcode did not grant max freq\n");
+ drm_err(&i915->drm,
+ "Pcode did not grant max freq\n");
err = -EINVAL;
} else {
- pr_info("Pcode throttled frequency 0x%x\n", perf_limit_reasons);
+ drm_info(&i915->drm,
+ "Pcode throttled frequency 0x%x\n",
+ perf_limit_reasons);
}
}
@@ -278,6 +303,7 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
static int run_test(struct intel_gt *gt, int test_type)
{
struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -290,7 +316,8 @@ static int run_test(struct intel_gt *gt, int test_type)
return 0;
if (slpc->min_freq == slpc->rp0_freq) {
- pr_err("Min/Max are fused to the same value\n");
+ drm_err(&i915->drm,
+ "Min/Max are fused to the same value\n");
return -EINVAL;
}
@@ -298,12 +325,12 @@ static int run_test(struct intel_gt *gt, int test_type)
return -ENOMEM;
if (intel_guc_slpc_get_max_freq(slpc, &slpc_max_freq)) {
- pr_err("Could not get SLPC max freq\n");
+ drm_err(&i915->drm, "Could not get SLPC max freq\n");
return -EIO;
}
if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) {
- pr_err("Could not get SLPC min freq\n");
+ drm_err(&i915->drm, "Could not get SLPC min freq\n");
return -EIO;
}
@@ -313,7 +340,7 @@ static int run_test(struct intel_gt *gt, int test_type)
*/
err = slpc_set_min_freq(slpc, slpc->min_freq);
if (err) {
- pr_err("Unable to update min freq!");
+ drm_err(&i915->drm, "Unable to update min freq!");
return err;
}
@@ -322,7 +349,7 @@ static int run_test(struct intel_gt *gt, int test_type)
*/
err = intel_guc_slpc_set_ignore_eff_freq(slpc, true);
if (err) {
- pr_err("Unable to turn off efficient freq!");
+ drm_err(&i915->drm, "Unable to turn off efficient freq!");
return err;
}
@@ -349,8 +376,8 @@ static int run_test(struct intel_gt *gt, int test_type)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: Spinner did not start\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Spinner did not start\n", engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -387,15 +414,18 @@ static int run_test(struct intel_gt *gt, int test_type)
}
if (test_type != SLPC_POWER) {
- pr_info("Max actual frequency for %s was %d\n",
- engine->name, max_act_freq);
+ drm_info(&i915->drm,
+ "%s: Max actual frequency was %d\n",
+ engine->name, max_act_freq);
/* Actual frequency should rise above min */
if (max_act_freq <= slpc->min_freq) {
- pr_err("Actual freq did not rise above min\n");
- pr_err("Perf Limit Reasons: 0x%x\n",
- intel_uncore_read(gt->uncore,
- intel_gt_perf_limit_reasons_reg(gt)));
+ drm_err(&i915->drm,
+ "Actual freq did not rise above min\n");
+ drm_err(&i915->drm,
+ "Perf Limit Reasons: 0x%x\n",
+ intel_uncore_read(gt->uncore,
+ intel_gt_perf_limit_reasons_reg(gt)));
err = -EINVAL;
}
}
@@ -525,7 +555,8 @@ static int live_slpc_tile_interaction(void *arg)
kthread_flush_work(&threads[i].work);
status = READ_ONCE(threads[i].result);
if (status && !ret) {
- pr_err("%s GT %d failed ", __func__, gt->info.id);
+ drm_err(>->i915->drm, "%s GT %d failed ", __func__,
+ gt->info.id);
ret = status;
}
kthread_destroy_worker(threads[i].worker);
diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c
index a5184f09d1de..89420f07f681 100644
--- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
+++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
@@ -20,6 +20,8 @@
#include "selftests/igt_flush_test.h"
#include "selftests/i915_random.h"
+#include <drm/drm_print.h>
+
static void vma_set_qw(struct i915_vma *vma, u64 addr, u64 val)
{
GEM_BUG_ON(addr < i915_vma_offset(vma));
@@ -39,6 +41,7 @@ pte_tlbinv(struct intel_context *ce,
{
const unsigned int pat_index =
i915_gem_get_pat_index(ce->vm->i915, I915_CACHE_NONE);
+ struct drm_i915_private *i915 = ce->engine->i915;
struct drm_i915_gem_object *batch;
struct drm_mm_node vb_node;
struct i915_request *rq;
@@ -68,7 +71,8 @@ pte_tlbinv(struct intel_context *ce,
va->size, align);
err = i915_vma_pin(va, 0, 0, addr | PIN_OFFSET_FIXED | PIN_USER);
if (err) {
- pr_err("Cannot pin at %llx+%llx\n", addr, va->size);
+ drm_err(&i915->drm, "Cannot pin at %llx+%llx\n",
+ addr, va->size);
goto out;
}
GEM_BUG_ON(i915_vma_offset(va) != addr);
@@ -91,11 +95,12 @@ pte_tlbinv(struct intel_context *ce,
addr = igt_random_offset(prng, addr, addr + align, 8, 8);
if (va != vb)
- pr_info("%s(%s): Sampling %llx, with alignment %llx, using PTE size %x (phys %x, sg %x), invalidate:%llx+%llx\n",
- ce->engine->name, va->obj->mm.region->name ?: "smem",
- addr, align, va->resource->page_sizes_gtt,
- va->page_sizes.phys, va->page_sizes.sg,
- addr & -length, length);
+ drm_info(&i915->drm,
+ "%s(%s): Sampling %llx, with alignment %llx, using PTE size %x (phys %x, sg %x), invalidate:%llx+%llx\n",
+ ce->engine->name, va->obj->mm.region->name ?: "smem",
+ addr, align, va->resource->page_sizes_gtt,
+ va->page_sizes.phys, va->page_sizes.sg,
+ addr & -length, length);
cs = i915_gem_object_pin_map_unlocked(batch, I915_MAP_WC);
*cs++ = MI_NOOP; /* for later termination */
@@ -147,10 +152,12 @@ pte_tlbinv(struct intel_context *ce,
if (va == vb) {
if (!i915_request_completed(rq)) {
- pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
- ce->engine->name, va->obj->mm.region->name ?: "smem",
- addr, align, va->resource->page_sizes_gtt,
- va->page_sizes.phys, va->page_sizes.sg);
+ drm_err(&i915->drm,
+ "%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
+ ce->engine->name,
+ va->obj->mm.region->name ?: "smem", addr, align,
+ va->resource->page_sizes_gtt,
+ va->page_sizes.phys, va->page_sizes.sg);
err = -EIO;
}
} else if (!i915_request_completed(rq)) {
@@ -171,12 +178,13 @@ pte_tlbinv(struct intel_context *ce,
tlbinv(ce->vm, addr & -length, length);
if (wait_for(i915_request_completed(rq), HZ / 2)) {
- pr_err("%s: Request did not complete; the COND_BBE did not read the updated PTE\n",
- ce->engine->name);
+ drm_err(&i915->drm,
+ "%s: Request did not complete; the COND_BBE did not read the updated PTE\n",
+ ce->engine->name);
err = -EINVAL;
}
} else {
- pr_err("Spinner ended unexpectedly\n");
+ drm_err(&i915->drm, "Spinner ended unexpectedly\n");
err = -EIO;
}
i915_request_put(rq);
@@ -271,8 +279,9 @@ mem_tlbinv(struct intel_gt *gt,
GEM_BUG_ON(A->base.size != B->base.size);
if ((A->mm.page_sizes.phys | B->mm.page_sizes.phys) & (A->base.size - 1))
- pr_warn("Failed to allocate contiguous pages for size %zx\n",
- A->base.size);
+ drm_warn(>->i915->drm,
+ "Failed to allocate contiguous pages for size %zx\n",
+ A->base.size);
ppgtt = i915_ppgtt_create(gt, 0);
if (IS_ERR(ppgtt)) {
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 4e4c420ae67f..8b74d62e7ca5 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -16,6 +16,8 @@
#include "selftests/intel_scheduler_helpers.h"
#include "selftests/mock_drm.h"
+#include <drm/drm_print.h>
+
#include "gem/selftests/igt_gem_utils.h"
#include "gem/selftests/mock_context.h"
@@ -193,8 +195,9 @@ print_results(const struct intel_engine_cs *engine, const u32 *results)
u32 expected = get_whitelist_reg(engine, i);
u32 actual = results[i];
- pr_info("RING_NONPRIV[%d]: expected 0x%08x, found 0x%08x\n",
- i, expected, actual);
+ drm_info(&engine->i915->drm,
+ "RING_NONPRIV[%d]: expected 0x%08x, found 0x%08x\n",
+ i, expected, actual);
}
}
@@ -233,8 +236,9 @@ static int check_whitelist(struct intel_context *ce)
if (expected != actual) {
print_results(engine, vaddr);
- pr_err("Invalid RING_NONPRIV[%d], expected 0x%08x, found 0x%08x\n",
- i, expected, actual);
+ drm_err(&engine->i915->drm,
+ "Invalid RING_NONPRIV[%d], expected 0x%08x, found 0x%08x\n",
+ i, expected, actual);
err = -EINVAL;
break;
@@ -298,14 +302,16 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
int (*reset)(struct intel_engine_cs *),
const char *name)
{
+ struct drm_i915_private *i915 = engine->i915;
struct intel_context *ce, *tmp;
struct igt_spinner spin;
struct i915_request *rq;
intel_wakeref_t wakeref;
int err;
- pr_info("Checking %d whitelisted registers on %s (RING_NONPRIV) [%s]\n",
- engine->whitelist.count, engine->name, name);
+ drm_info(&i915->drm,
+ "Checking %d whitelisted registers on %s (RING_NONPRIV) [%s]\n",
+ engine->whitelist.count, engine->name, name);
ce = intel_context_create(engine);
if (IS_ERR(ce))
@@ -317,7 +323,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
err = check_whitelist(ce);
if (err) {
- pr_err("Invalid whitelist *before* %s reset!\n", name);
+ drm_err(&i915->drm,
+ "Invalid whitelist *before* %s reset!\n", name);
goto out_spin;
}
@@ -327,7 +334,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
/* Ensure the spinner hasn't aborted */
if (i915_request_completed(rq)) {
- pr_err("%s spinner failed to start\n", name);
+ drm_err(&i915->drm, "%s spinner failed to start\n",
+ name);
err = -ETIMEDOUT;
goto out_spin;
}
@@ -342,14 +350,15 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
igt_spinner_end(&spin);
if (err) {
- pr_err("%s reset failed\n", name);
+ drm_err(&i915->drm, "%s reset failed\n", name);
goto out_spin;
}
err = check_whitelist(ce);
if (err) {
- pr_err("Whitelist not preserved in context across %s reset!\n",
- name);
+ drm_err(&i915->drm,
+ "Whitelist not preserved in context across %s reset!\n",
+ name);
goto out_spin;
}
@@ -363,8 +372,9 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
err = check_whitelist(ce);
if (err) {
- pr_err("Invalid whitelist *after* %s reset in fresh context!\n",
- name);
+ drm_err(&i915->drm,
+ "Invalid whitelist *after* %s reset in fresh context!\n",
+ name);
goto out_spin;
}
@@ -500,6 +510,7 @@ static int check_dirty_whitelist(struct intel_context *ce)
0xffffffff,
};
struct intel_engine_cs *engine = ce->engine;
+ struct drm_i915_private *i915 = engine->i915;
struct i915_vma *scratch;
struct i915_vma *batch;
int err = 0, i, v, sz;
@@ -565,8 +576,8 @@ static int check_dirty_whitelist(struct intel_context *ce)
if (GRAPHICS_VER(engine->i915) >= 8)
lrm++, srm++;
- pr_debug("%s: Writing garbage to %x\n",
- engine->name, reg);
+ drm_dbg(&i915->drm, "%s: Writing garbage to %x\n",
+ engine->name, reg);
/* SRM original */
*cs++ = srm;
@@ -646,8 +657,9 @@ static int check_dirty_whitelist(struct intel_context *ce)
err_request:
err = request_add_sync(rq, err);
if (err) {
- pr_err("%s: Futzing %x timedout; cancelling test\n",
- engine->name, reg);
+ drm_err(&i915->drm,
+ "%s: Futzing %x timedout; cancelling test\n",
+ engine->name, reg);
intel_gt_set_wedged(engine->gt);
goto out_unmap_scratch;
}
@@ -657,8 +669,9 @@ static int check_dirty_whitelist(struct intel_context *ce)
/* detect write masking */
rsvd = results[ARRAY_SIZE(values)];
if (!rsvd) {
- pr_err("%s: Unable to write to whitelisted register %x\n",
- engine->name, reg);
+ drm_err(&i915->drm,
+ "%s: Unable to write to whitelisted register %x\n",
+ engine->name, reg);
err = -EINVAL;
goto out_unmap_scratch;
}
@@ -689,15 +702,18 @@ static int check_dirty_whitelist(struct intel_context *ce)
idx++;
}
if (err) {
- pr_err("%s: %d mismatch between values written to whitelisted register [%x], and values read back!\n",
- engine->name, err, reg);
+ drm_err(&i915->drm,
+ "%s: %d mismatch between values written to whitelisted register [%x], and values read back!\n",
+ engine->name, err, reg);
if (ro_reg)
- pr_info("%s: Whitelisted read-only register: %x, original value %08x\n",
- engine->name, reg, results[0]);
+ drm_info(&i915->drm,
+ "%s: Whitelisted read-only register: %x, original value %08x\n",
+ engine->name, reg, results[0]);
else
- pr_info("%s: Whitelisted register: %x, original value %08x, rsvd %08x\n",
- engine->name, reg, results[0], rsvd);
+ drm_info(&i915->drm,
+ "%s: Whitelisted register: %x, original value %08x, rsvd %08x\n",
+ engine->name, reg, results[0], rsvd);
expect = results[0];
idx = 1;
@@ -708,8 +724,9 @@ static int check_dirty_whitelist(struct intel_context *ce)
expect = results[0];
else
expect = reg_write(expect, w, rsvd);
- pr_info("Wrote %08x, read %08x, expect %08x\n",
- w, results[idx], expect);
+ drm_info(&i915->drm,
+ "Wrote %08x, read %08x, expect %08x\n",
+ w, results[idx], expect);
idx++;
}
for (v = 0; v < ARRAY_SIZE(values); v++) {
@@ -719,8 +736,9 @@ static int check_dirty_whitelist(struct intel_context *ce)
expect = results[0];
else
expect = reg_write(expect, w, rsvd);
- pr_info("Wrote %08x, read %08x, expect %08x\n",
- w, results[idx], expect);
+ drm_info(&i915->drm,
+ "Wrote %08x, read %08x, expect %08x\n",
+ w, results[idx], expect);
idx++;
}
@@ -985,8 +1003,9 @@ static bool result_eq(struct intel_engine_cs *engine,
u32 a, u32 b, i915_reg_t reg)
{
if (a != b && !pardon_reg(engine->i915, reg)) {
- pr_err("Whitelisted register 0x%4x not context saved: A=%08x, B=%08x\n",
- i915_mmio_reg_offset(reg), a, b);
+ drm_err(&engine->i915->drm,
+ "Whitelisted register 0x%4x not context saved: A=%08x, B=%08x\n",
+ i915_mmio_reg_offset(reg), a, b);
return false;
}
@@ -1007,8 +1026,9 @@ static bool result_neq(struct intel_engine_cs *engine,
u32 a, u32 b, i915_reg_t reg)
{
if (a == b && !writeonly_reg(engine->i915, reg)) {
- pr_err("Whitelist register 0x%4x:%08x was unwritable\n",
- i915_mmio_reg_offset(reg), a);
+ drm_err(&engine->i915->drm,
+ "Whitelist register 0x%4x:%08x was unwritable\n",
+ i915_mmio_reg_offset(reg), a);
return false;
}
@@ -1211,7 +1231,7 @@ live_gpu_reset_workarounds(void *arg)
if (!lists)
return -ENOMEM;
- pr_info("Verifying after GPU reset...\n");
+ drm_info(>->i915->drm, "Verifying after GPU reset...\n");
igt_global_reset_lock(gt);
wakeref = intel_runtime_pm_get(gt->uncore->rpm);
@@ -1239,6 +1259,7 @@ static int
live_engine_reset_workarounds(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
enum intel_engine_id id;
struct intel_context *ce;
@@ -1266,7 +1287,8 @@ live_engine_reset_workarounds(void *arg)
bool ok;
int ret2;
- pr_info("Verifying after %s reset...\n", engine->name);
+ drm_info(&i915->drm, "Verifying after %s reset...\n",
+ engine->name);
ret = intel_selftest_modify_policy(engine, &saved,
SELFTEST_SCHEDULER_MODIFY_FAST_RESET);
if (ret)
@@ -1287,7 +1309,9 @@ live_engine_reset_workarounds(void *arg)
ret = intel_engine_reset(engine, "live_workarounds:idle");
if (ret) {
- pr_err("%s: Reset failed while idle\n", engine->name);
+ drm_err(&i915->drm,
+ "%s: Reset failed while idle\n",
+ engine->name);
goto err;
}
@@ -1311,7 +1335,8 @@ live_engine_reset_workarounds(void *arg)
ret = request_add_spin(rq, &spin);
if (ret) {
- pr_err("%s: Spinner failed to start\n", engine->name);
+ drm_err(&i915->drm,
+ "%s: Spinner failed to start\n", engine->name);
igt_spinner_fini(&spin);
goto err;
}
@@ -1325,8 +1350,9 @@ live_engine_reset_workarounds(void *arg)
if (!using_guc) {
ret = intel_engine_reset(engine, "live_workarounds:active");
if (ret) {
- pr_err("%s: Reset failed on an active spinner\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: Reset failed on an active spinner\n",
+ engine->name);
igt_spinner_fini(&spin);
goto err;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests
2026-08-28 10:03 ` [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests Krzysztof Karas
@ 2026-08-28 16:18 ` Andi Shyti
2026-08-28 17:40 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 16:18 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
On Fri, Aug 28, 2026 at 10:03:35AM +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
what a ride!
While reviewing everything I was thinking whether it would make
sense to add an i915_err() like xe and gt.
...
> @@ -540,7 +551,7 @@ static void spinner_kill(struct timer_list *timer)
> struct spinner_timer *st = timer_container_of(st, timer, timer);
>
> igt_spinner_end(&st->spin);
> - pr_info("%s\n", __func__);
> + drm_info(st->spin.hws->base.dev, "killing spinner\n");
considering that you kept the __func__ reference everywhere else,
you could have also kept it here. I like that you have added a
message, though.
As you are going to resend, anyway, please fix this little nit.
> }
...
> sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
> - pr_info("%s: %zd KiB copy: %lld MiB/s\n",
> - ce->engine->name, sz >> 10,
> - div64_u64(mul_u32_u32(4 * sz,
> - 1000 * 1000 * 1000),
> - t[1] + 2 * t[2] + t[3]) >> 20);
> + drm_info(&ce->engine->i915->drm, "%s: %zd KiB copy: %lld MiB/s\n",
Not a binding comment: rq->i915 would have made it a bit shorter.
> + ce->engine->name, sz >> 10,
> + div64_u64(mul_u32_u32(4 * sz, 1000 * 1000 * 1000),
> + t[1] + 2 * t[2] + t[3]) >> 20);
> return 0;
> }
...
> @@ -1211,7 +1231,7 @@ live_gpu_reset_workarounds(void *arg)
> if (!lists)
> return -ENOMEM;
>
> - pr_info("Verifying after GPU reset...\n");
> + drm_info(>->i915->drm, "Verifying after GPU reset...\n");
I'm thinking whether it's better to use gt_info() when we have
the gt reference.
Andi
>
> igt_global_reset_lock(gt);
> wakeref = intel_runtime_pm_get(gt->uncore->rpm);
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests
2026-08-28 10:03 ` [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests Krzysztof Karas
2026-08-28 16:18 ` Andi Shyti
@ 2026-08-28 17:40 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Niemiec @ 2026-08-28 17:40 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka
Hi Krzysztof,
On 2026-08-28 at 10:03:35 +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_context.c | 33 +-
> drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 8 +-
> drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 58 +--
> drivers/gpu/drm/i915/gt/selftest_execlists.c | 353 +++++++++++-------
> drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 32 +-
> drivers/gpu/drm/i915/gt/selftest_migrate.c | 65 ++--
> drivers/gpu/drm/i915/gt/selftest_mocs.c | 12 +-
> drivers/gpu/drm/i915/gt/selftest_reset.c | 28 +-
> drivers/gpu/drm/i915/gt/selftest_slpc.c | 103 +++--
> drivers/gpu/drm/i915/gt/selftest_tlb.c | 39 +-
> .../gpu/drm/i915/gt/selftest_workarounds.c | 104 ++++--
> 11 files changed, 513 insertions(+), 322 deletions(-)
>
<snip>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c
> index 21e5ed9f72a3..97dc44cf615f 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
> @@ -72,6 +72,8 @@ static int wait_for_reset(struct intel_engine_cs *engine,
> struct i915_request *rq,
> unsigned long timeout)
> {
> + struct drm_i915_private *i915 = engine->i915;
> +
> timeout += jiffies;
>
> do {
> @@ -89,20 +91,18 @@ static int wait_for_reset(struct intel_engine_cs *engine,
> } while (time_before(jiffies, timeout));
>
> if (rq->fence.error != -EIO) {
> - pr_err("%s: hanging request %llx:%lld not reset\n",
> - engine->name,
> - rq->fence.context,
> - rq->fence.seqno);
> + drm_err(&i915->drm,
> + "%s: hanging request %llx:%lld not reset\n",
> + engine->name, rq->fence.context, rq->fence.seqno);
> return -EINVAL;
> }
>
> /* Give the request a jiffy to complete after flushing the worker */
> if (i915_request_wait(rq, 0,
> max(0l, (long)(timeout - jiffies)) + 1) < 0) {
> - pr_err("%s: hanging request %llx:%lld did not complete\n",
> - engine->name,
> - rq->fence.context,
> - rq->fence.seqno);
> + drm_err(&i915->drm,
> + "%s: hanging request %llx:%lld did not complete\n",
> + engine->name, rq->fence.context, rq->fence.seqno);
> return -ETIME;
> }
>
> @@ -328,6 +328,7 @@ static int live_unlite_preempt(void *arg)
> static int live_unlite_ring(void *arg)
> {
> struct intel_gt *gt = arg;
> + struct drm_i915_private *i915 = gt->i915;
> struct intel_engine_cs *engine;
> struct igt_spinner spin;
> enum intel_engine_id id;
> @@ -419,12 +420,10 @@ static int live_unlite_ring(void *arg)
> n++;
> }
> intel_engine_flush_submission(engine);
> - pr_debug("%s: Filled ring with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
> - engine->name, n,
> - ce[0]->ring->size,
> - ce[0]->ring->tail,
> - ce[0]->ring->emit,
> - rq->tail);
> + drm_dbg(&i915->drm,
> + "%s: Filled ring with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
> + engine->name, n, ce[0]->ring->size, ce[0]->ring->tail,
> + ce[0]->ring->emit, rq->tail);
> GEM_BUG_ON(intel_ring_direction(ce[0]->ring,
> rq->tail,
> ce[0]->ring->tail) <= 0);
Here...
> @@ -444,15 +443,16 @@ static int live_unlite_ring(void *arg)
> err = wait_for_submit(engine, rq, HZ / 2);
> i915_request_put(rq);
> if (err) {
> - pr_err("%s: preemption request was not submitted\n",
> - engine->name);
> + drm_err(&i915->drm,
> + "%s: preemption request was not submitted\n",
> + engine->name);
> err = -ETIME;
> }
>
> - pr_debug("%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
> - engine->name,
> - ce[0]->ring->tail, ce[0]->ring->emit,
> - ce[1]->ring->tail, ce[1]->ring->emit);
> + drm_dbg(&i915->drm,
> + "%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
> + engine->name, ce[0]->ring->tail, ce[0]->ring->emit,
> + ce[1]->ring->tail, ce[1]->ring->emit);
>
here...
<snip within same file>
>
> @@ -2800,6 +2854,7 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
> struct igt_spinner *spin,
> int queue_sz, int ring_sz)
> {
> + struct drm_i915_private *i915 = engine->i915;
> struct intel_context *ce[2] = {};
> struct i915_request *rq;
> struct igt_live_test t;
> @@ -2867,12 +2922,10 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
> n++;
> }
> intel_engine_flush_submission(engine);
> - pr_debug("%s: Filled %d with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
> - engine->name, queue_sz, n,
> - ce[0]->ring->size,
> - ce[0]->ring->tail,
> - ce[0]->ring->emit,
> - rq->tail);
> + drm_dbg(&i915->drm,
> + "%s: Filled %d with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
> + engine->name, queue_sz, n, ce[0]->ring->size, ce[0]->ring->tail,
> + ce[0]->ring->emit, rq->tail);
and here..
> i915_request_put(rq);
>
> /* Create a second request to preempt the first ring */
> @@ -2889,15 +2942,16 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
> err = wait_for_submit(engine, rq, HZ / 2);
> i915_request_put(rq);
> if (err) {
> - pr_err("%s: preemption request was not submitted\n",
> - engine->name);
> + drm_err(&i915->drm,
> + "%s: preemption request was not submitted\n",
> + engine->name);
> err = -ETIME;
> }
>
> - pr_debug("%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
> - engine->name,
> - ce[0]->ring->tail, ce[0]->ring->emit,
> - ce[1]->ring->tail, ce[1]->ring->emit);
> + drm_dbg(&i915->drm,
> + "%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
> + engine->name, ce[0]->ring->tail, ce[0]->ring->emit,
> + ce[1]->ring->tail, ce[1]->ring->emit);
>
and here.
Maybe it's worth keeping the arguments in these snippets stacked like
they were stacked before for readability? You greedily rearrange arguments
all over your series, which I don't think matters that much, but here it
is particularly easy on the eyes before your patch, and kind of lost that
quality. Giga nit though so don't address this if you don't feel like it
> diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c
> index d73e438fb85f..770516c6c7da 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
> @@ -13,6 +13,8 @@
> #include "selftests/igt_spinner.h"
> #include "selftests/intel_scheduler_helpers.h"
>
> +#include <drm/drm_print.h>
> +
Same nit with drm includes as before
> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
> index 2cfc23c58e90..938218e0d5bc 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
> @@ -14,11 +14,14 @@
> #include "selftests/igt_atomic.h"
> #include "selftests/igt_spinner.h"
>
> +#include <drm/drm_print.h>
> +
Include nit again
> diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
> index c3c918248989..531dbc08c8c3 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
> @@ -3,6 +3,10 @@
> * Copyright © 2021 Intel Corporation
> */
>
> +#include <drm/drm_print.h>
> +
> +#include "uc/intel_guc.h"
> +
> #define NUM_STEPS 5
> #define H2G_DELAY 50000
> #define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 10000)
> @@ -23,13 +27,22 @@ struct slpc_thread {
> int result;
> };
>
> +static struct intel_gt *selftest_slpc_to_gt(struct intel_guc_slpc *slpc)
> +{
> + struct intel_guc *guc = container_of(slpc, struct intel_guc, slpc);
> +
> + return guc_to_gt(guc);
> +}
> +
> static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
> {
> + struct intel_gt *gt = selftest_slpc_to_gt(slpc);
> int ret;
>
> ret = intel_guc_slpc_set_min_freq(slpc, freq);
> if (ret)
> - pr_err("Could not set min frequency to [%u]\n", freq);
> + drm_err(>->i915->drm, "Could not set min frequency to [%u]\n",
> + freq);
> else /* Delay to ensure h2g completes */
> delay_for_h2g();
>
> @@ -38,12 +51,13 @@ static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
>
> static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
> {
> + struct intel_gt *gt = selftest_slpc_to_gt(slpc);
> int ret;
>
> ret = intel_guc_slpc_set_max_freq(slpc, freq);
> if (ret)
> - pr_err("Could not set maximum frequency [%u]\n",
> - freq);
> + drm_err(>->i915->drm,
> + "Could not set maximum frequency [%u]\n", freq);
Here you could use just directly
gt_err(gt, "Could not set...
Since gt_err is just [1]
#define gt_err(_gt, _fmt, ...) \
drm_err(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
and it seems like there's a decently accessible reference to gt all over
this file, so I'd consider converting the drm_prints to gt_prints all
over too.
[1] https://elixir.bootlin.com/linux/v7.2/source/drivers/gpu/drm/i915/gt/intel_gt_print.h#L13-L14
> else /* Delay to ensure h2g completes */
> delay_for_h2g();
>
> @@ -52,18 +66,19 @@ static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
>
> static int slpc_set_freq(struct intel_gt *gt, u32 freq)
> {
> + struct drm_i915_private *i915 = gt->i915;
> int err;
> struct intel_guc_slpc *slpc = >_to_guc(gt)->slpc;
>
> err = slpc_set_max_freq(slpc, freq);
> if (err) {
> - pr_err("Unable to update max freq");
> + drm_err(&i915->drm, "Unable to update max freq");
Like here for example, you could get rid of the i915 struct entirely and
just do 'gt_err(gt, "Unable to...', since at this point you're rewriting
the macro by hand anyway.
The gt_prints give even more context for the error (in the form of the GT
id) compared to drm_prints, so I think they are be preferable for that
reason in places where we can access the GT ref. So I'd look for other
places where you could use gt prints too.
> return err;
> }
>
> err = slpc_set_min_freq(slpc, freq);
> if (err) {
> - pr_err("Unable to update min freq");
> + drm_err(&i915->drm, "Unable to update min freq");
> return err;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c
> index a5184f09d1de..89420f07f681 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
> @@ -20,6 +20,8 @@
> #include "selftests/igt_flush_test.h"
> #include "selftests/i915_random.h"
>
> +#include <drm/drm_print.h>
> +
Nit for include
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 4e4c420ae67f..8b74d62e7ca5 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -16,6 +16,8 @@
> #include "selftests/intel_scheduler_helpers.h"
> #include "selftests/mock_drm.h"
>
> +#include <drm/drm_print.h>
> +
Nit for include
> #include "gem/selftests/igt_gem_utils.h"
> #include "gem/selftests/mock_context.h"
>
Thanks
Krzysztof
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (3 preceding siblings ...)
2026-08-28 10:03 ` [PATCH v3 4/8] drm/i915/gt/selftests: Use drm_* prints in aggregated gt selftests Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 16:23 ` Andi Shyti
2026-08-28 18:02 ` Krzysztof Niemiec
2026-08-28 10:03 ` [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers Krzysztof Karas
` (3 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to device context aware drm
versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_rc6.c | 59 +++--
drivers/gpu/drm/i915/gt/selftest_rps.c | 297 ++++++++++++++-----------
2 files changed, 203 insertions(+), 153 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c
index 68fb1830d411..c744579a942f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rc6.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c
@@ -14,6 +14,8 @@
#include "selftests/i915_random.h"
#include "selftests/librapl.h"
+#include <drm/drm_print.h>
+
static u64 rc6_residency(struct intel_rc6 *rc6)
{
u64 result;
@@ -32,6 +34,7 @@ static u64 rc6_residency(struct intel_rc6 *rc6)
int live_rc6_manual(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rc6 *rc6 = >->rc6;
struct intel_rps *rps = >->rps;
intel_wakeref_t wakeref;
@@ -80,8 +83,9 @@ int live_rc6_manual(void *arg)
res[1] = rc6_residency(rc6);
rc0_freq = intel_rps_read_actual_frequency_fw(rps);
if ((res[1] - res[0]) >> 10) {
- pr_err("RC6 residency increased by %lldus while disabled for 1000ms!\n",
- (res[1] - res[0]) >> 10);
+ drm_err(&i915->drm,
+ "RC6 residency increased by %lldus while disabled for 1000ms!\n",
+ (res[1] - res[0]) >> 10);
err = -EINVAL;
goto out_unlock;
}
@@ -92,10 +96,12 @@ int live_rc6_manual(void *arg)
if (!rc0_power) {
if (rc0_freq)
- pr_err("No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
- rc0_freq);
+ drm_dbg(&i915->drm,
+ "No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
+ rc0_freq);
else
- pr_err("No power and freq measured while in RC0\n");
+ drm_err(&i915->drm,
+ "No power and freq measured while in RC0\n");
err = -EINVAL;
goto out_unlock;
}
@@ -114,32 +120,37 @@ int live_rc6_manual(void *arg)
dt = ktime_sub(ktime_get(), dt);
res[1] = rc6_residency(rc6);
if (res[1] == res[0]) {
- pr_err("Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x, residency=%lld\n",
- intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE),
- intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL),
- res[0]);
+ drm_err(&i915->drm,
+ "Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x, residency=%lld\n",
+ intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE),
+ intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL),
+ res[0]);
err = -EINVAL;
}
if (has_power) {
rc6_power = div64_u64(NSEC_PER_SEC * rc6_sample_energy[1],
ktime_to_ns(dt));
- pr_info("GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
- rc0_power, rc6_power);
+ drm_info(&i915->drm,
+ "GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
+ rc0_power, rc6_power);
if (2 * rc6_power > rc0_power) {
- pr_err("GPU leaked energy while in RC6!\n"
- "GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
- "RC0 energy before & after sleep respectively: %lluuJ %lluuJ\n"
- "RC6 energy before & after sleep respectively: %lluuJ %lluuJ\n",
- rc6_freq, rc0_freq, rc0_sample_energy[0], rc0_sample_energy[1],
- rc6_sample_energy[0], rc6_sample_energy[1]);
+ drm_err(&i915->drm,
+ "GPU leaked energy while in RC6!\n"
+ "GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
+ "RC0 energy before & after sleep respectively: %lluuJ %lluuJ\n"
+ "RC6 energy before & after sleep respectively: %lluuJ %lluuJ\n",
+ rc6_freq, rc0_freq, rc0_sample_energy[0],
+ rc0_sample_energy[1], rc6_sample_energy[0],
+ rc6_sample_energy[1]);
diff = res[1] - res[0];
threshold = (9 * NSEC_PER_MSEC * sleep_time) / 10;
if (diff < threshold)
- pr_err("Did not enter RC6 properly, RC6 start residency=%lluns, RC6 end residency=%lluns\n",
- res[0], res[1]);
+ drm_err(&i915->drm,
+ "Did not enter RC6 properly, RC6 start residency=%lluns, RC6 end residency=%lluns\n",
+ res[0], res[1]);
err = -EINVAL;
goto out_unlock;
}
@@ -218,6 +229,7 @@ randomised_engines(struct intel_gt *gt,
int live_rc6_ctx_wa(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs **engines;
unsigned int n, count;
I915_RND_STATE(prng);
@@ -265,13 +277,14 @@ int live_rc6_ctx_wa(void *arg)
}
intel_gt_pm_wait_for_idle(gt);
- pr_debug("%s: CTX_INFO=%0x\n",
- engine->name, READ_ONCE(*res));
+ drm_dbg(&i915->drm, "%s: CTX_INFO=%0x\n",
+ engine->name, READ_ONCE(*res));
if (resets !=
i915_reset_engine_count(error, engine)) {
- pr_err("%s: GPU reset required\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: GPU reset required\n",
+ engine->name);
add_taint_for_CI(gt->i915, TAINT_WARN);
err = -EIO;
goto out;
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c
index be77fba2ec49..35de41c96923 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rps.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rps.c
@@ -6,6 +6,8 @@
#include <linux/pm_qos.h>
#include <linux/sort.h>
+#include <drm/drm_print.h>
+
#include "gem/i915_gem_internal.h"
#include "i915_reg.h"
@@ -204,21 +206,22 @@ static void show_pstate_limits(struct intel_rps *rps)
struct drm_i915_private *i915 = rps_to_i915(rps);
if (IS_BROXTON(i915)) {
- pr_info("P_STATE_CAP[%x]: 0x%08x\n",
- i915_mmio_reg_offset(BXT_RP_STATE_CAP),
- intel_uncore_read(rps_to_uncore(rps),
- BXT_RP_STATE_CAP));
+ drm_info(&i915->drm, "P_STATE_CAP[%x]: 0x%08x\n",
+ i915_mmio_reg_offset(BXT_RP_STATE_CAP),
+ intel_uncore_read(rps_to_uncore(rps),
+ BXT_RP_STATE_CAP));
} else if (GRAPHICS_VER(i915) == 9) {
- pr_info("P_STATE_LIMITS[%x]: 0x%08x\n",
- i915_mmio_reg_offset(GEN9_RP_STATE_LIMITS),
- intel_uncore_read(rps_to_uncore(rps),
- GEN9_RP_STATE_LIMITS));
+ drm_info(&i915->drm, "P_STATE_LIMITS[%x]: 0x%08x\n",
+ i915_mmio_reg_offset(GEN9_RP_STATE_LIMITS),
+ intel_uncore_read(rps_to_uncore(rps),
+ GEN9_RP_STATE_LIMITS));
}
}
int live_rps_clock_interval(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
void (*saved_work)(struct work_struct *wrk);
struct intel_engine_cs *engine;
@@ -264,8 +267,9 @@ int live_rps_clock_interval(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS spinner did not start\n",
+ engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -290,8 +294,9 @@ int live_rps_clock_interval(void *arg)
GEN6_RP_CUR_UP_EI),
10)) {
/* Just skip the test; assume lack of HW support */
- pr_notice("%s: rps evaluation interval not ticking\n",
- engine->name);
+ drm_notice(&i915->drm,
+ "%s: rps evaluation interval not ticking\n",
+ engine->name);
err = -ENODEV;
} else {
ktime_t dt_[5];
@@ -330,21 +335,24 @@ int live_rps_clock_interval(void *arg)
u32 expected =
intel_gt_ns_to_pm_interval(gt, dt);
- pr_info("%s: rps counted %d C0 cycles [%lldns] in %lldns [%d cycles], using GT clock frequency of %uKHz\n",
- engine->name, cycles, time, dt, expected,
- gt->clock_frequency / 1000);
+ drm_info(&i915->drm,
+ "%s: rps counted %d C0 cycles [%lldns] in %lldns [%d cycles], using GT clock frequency of %uKHz\n",
+ engine->name, cycles, time, dt, expected,
+ gt->clock_frequency / 1000);
if (10 * time < 8 * dt ||
8 * time > 10 * dt) {
- pr_err("%s: rps clock time does not match walltime!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: rps clock time does not match walltime!\n",
+ engine->name);
err = -EINVAL;
}
if (10 * expected < 8 * cycles ||
8 * expected > 10 * cycles) {
- pr_err("%s: walltime does not match rps clock ticks!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: walltime does not match rps clock ticks!\n",
+ engine->name);
err = -EINVAL;
}
}
@@ -372,6 +380,7 @@ int live_rps_clock_interval(void *arg)
int live_rps_control(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
void (*saved_work)(struct work_struct *wrk);
struct intel_engine_cs *engine;
@@ -424,8 +433,9 @@ int live_rps_control(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS spinner did not start\n",
+ engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -434,8 +444,9 @@ int live_rps_control(void *arg)
}
if (rps_set_check(rps, rps->min_freq) != rps->min_freq) {
- pr_err("%s: could not set minimum frequency [%x], only %x!\n",
- engine->name, rps->min_freq, read_cagf(rps));
+ drm_err(&i915->drm,
+ "%s: could not set minimum frequency [%x], only %x!\n",
+ engine->name, rps->min_freq, read_cagf(rps));
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
show_pstate_limits(rps);
@@ -451,8 +462,9 @@ int live_rps_control(void *arg)
limit = rps_set_check(rps, f);
if (rps_set_check(rps, rps->min_freq) != rps->min_freq) {
- pr_err("%s: could not restore minimum frequency [%x], only %x!\n",
- engine->name, rps->min_freq, read_cagf(rps));
+ drm_err(&i915->drm,
+ "%s: could not restore minimum frequency [%x], only %x!\n",
+ engine->name, rps->min_freq, read_cagf(rps));
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
show_pstate_limits(rps);
@@ -474,17 +486,19 @@ int live_rps_control(void *arg)
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
- pr_info("%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz], %x:%x response %lluns:%lluns\n",
- engine->name,
- rps->min_freq, intel_gpu_freq(rps, rps->min_freq),
- rps->max_freq, intel_gpu_freq(rps, rps->max_freq),
- limit, intel_gpu_freq(rps, limit),
- min, max, ktime_to_ns(min_dt), ktime_to_ns(max_dt));
+ drm_info(&i915->drm,
+ "%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz], %x:%x response %lluns:%lluns\n",
+ engine->name, rps->min_freq,
+ intel_gpu_freq(rps, rps->min_freq), rps->max_freq,
+ intel_gpu_freq(rps, rps->max_freq), limit,
+ intel_gpu_freq(rps, limit), min, max,
+ ktime_to_ns(min_dt), ktime_to_ns(max_dt));
if (limit != rps->max_freq) {
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
- engine->name, throttle);
+ drm_warn(&i915->drm,
+ "%s: GPU throttled with reasons 0x%08x\n",
+ engine->name, throttle);
show_pstate_limits(rps);
}
@@ -523,17 +537,17 @@ static void show_pcu_config(struct intel_rps *rps)
wakeref = intel_runtime_pm_get(rps_to_uncore(rps)->rpm);
- pr_info("%5s %5s %5s\n", "GPU", "eCPU", "eRing");
+ drm_info(&i915->drm, "%5s %5s %5s\n", "GPU", "eCPU", "eRing");
for (gpu_freq = min_gpu_freq; gpu_freq <= max_gpu_freq; gpu_freq++) {
int ia_freq = gpu_freq;
snb_pcode_read(rps_to_gt(rps)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE,
&ia_freq, NULL);
- pr_info("%5d %5d %5d\n",
- gpu_freq * 50,
- ((ia_freq >> 0) & 0xff) * 100,
- ((ia_freq >> 8) & 0xff) * 100);
+ drm_info(&i915->drm, "%5d %5d %5d\n",
+ gpu_freq * 50,
+ ((ia_freq >> 0) & 0xff) * 100,
+ ((ia_freq >> 8) & 0xff) * 100);
}
intel_runtime_pm_put(rps_to_uncore(rps)->rpm, wakeref);
@@ -607,6 +621,7 @@ int live_rps_frequency_cs(void *arg)
{
void (*saved_work)(struct work_struct *wrk);
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
struct intel_engine_cs *engine;
struct pm_qos_request qos;
@@ -669,8 +684,8 @@ int live_rps_frequency_cs(void *arg)
if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)),
10)) {
- pr_err("%s: timed loop did not start\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: timed loop did not start\n", engine->name);
goto err_vma;
}
@@ -680,22 +695,22 @@ int live_rps_frequency_cs(void *arg)
max.freq = rps->max_freq;
max.count = measure_cs_frequency_at(rps, engine, &max.freq);
- pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
- engine->name,
- min.count, intel_gpu_freq(rps, min.freq),
- max.count, intel_gpu_freq(rps, max.freq),
- (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count,
- max.freq * min.count));
+ drm_info(&i915->drm,
+ "%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
+ engine->name, min.count, intel_gpu_freq(rps, min.freq),
+ max.count, intel_gpu_freq(rps, max.freq),
+ (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count,
+ max.freq * min.count));
if (!scaled_within(max.freq * min.count,
min.freq * max.count,
2, 3)) {
int f;
- pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
- engine->name,
- max.freq * min.count,
- min.freq * max.count);
+ drm_err(&i915->drm,
+ "%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
+ engine->name, max.freq * min.count,
+ min.freq * max.count);
show_pcu_config(rps);
for (f = min.freq + 1; f <= rps->max_freq; f++) {
@@ -706,11 +721,12 @@ int live_rps_frequency_cs(void *arg)
if (act < f)
break;
- pr_info("%s: %x:%uMHz: %lluKHz [%d%%]\n",
- engine->name,
- act, intel_gpu_freq(rps, act), count,
- (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,
- act * min.count));
+ drm_info(&i915->drm,
+ "%s: %x:%uMHz: %lluKHz [%d%%]\n",
+ engine->name, act,
+ intel_gpu_freq(rps, act), count,
+ (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,
+ act * min.count));
f = act; /* may skip ahead [pcu granularity] */
}
@@ -746,6 +762,7 @@ int live_rps_frequency_srm(void *arg)
{
void (*saved_work)(struct work_struct *wrk);
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
struct intel_engine_cs *engine;
struct pm_qos_request qos;
@@ -807,8 +824,8 @@ int live_rps_frequency_srm(void *arg)
goto err_vma;
if (wait_for(READ_ONCE(*cntr), 10)) {
- pr_err("%s: timed loop did not start\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: timed loop did not start\n", engine->name);
goto err_vma;
}
@@ -818,22 +835,22 @@ int live_rps_frequency_srm(void *arg)
max.freq = rps->max_freq;
max.count = measure_frequency_at(rps, cntr, &max.freq);
- pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
- engine->name,
- min.count, intel_gpu_freq(rps, min.freq),
- max.count, intel_gpu_freq(rps, max.freq),
- (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count,
- max.freq * min.count));
+ drm_info(&i915->drm,
+ "%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
+ engine->name, min.count, intel_gpu_freq(rps, min.freq),
+ max.count, intel_gpu_freq(rps, max.freq),
+ (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count,
+ max.freq * min.count));
if (!scaled_within(max.freq * min.count,
min.freq * max.count,
1, 2)) {
int f;
- pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
- engine->name,
- max.freq * min.count,
- min.freq * max.count);
+ drm_err(&i915->drm,
+ "%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
+ engine->name, max.freq * min.count,
+ min.freq * max.count);
show_pcu_config(rps);
for (f = min.freq + 1; f <= rps->max_freq; f++) {
@@ -844,11 +861,12 @@ int live_rps_frequency_srm(void *arg)
if (act < f)
break;
- pr_info("%s: %x:%uMHz: %lluKHz [%d%%]\n",
- engine->name,
- act, intel_gpu_freq(rps, act), count,
- (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,
- act * min.count));
+ drm_info(&i915->drm,
+ "%s: %x:%uMHz: %lluKHz [%d%%]\n",
+ engine->name, act,
+ intel_gpu_freq(rps, act), count,
+ (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,
+ act * min.count));
f = act; /* may skip ahead [pcu granularity] */
}
@@ -899,6 +917,7 @@ static int __rps_up_interrupt(struct intel_rps *rps,
struct igt_spinner *spin)
{
struct intel_uncore *uncore = engine->uncore;
+ struct drm_i915_private *i915 = engine->i915;
struct i915_request *rq;
u32 timeout;
@@ -915,31 +934,34 @@ static int __rps_up_interrupt(struct intel_rps *rps,
i915_request_add(rq);
if (!igt_wait_for_spinner(spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&i915->drm, "%s: RPS spinner did not start\n",
+ engine->name);
i915_request_put(rq);
intel_gt_set_wedged(engine->gt);
return -EIO;
}
if (!intel_rps_is_active(rps)) {
- pr_err("%s: RPS not enabled on starting spinner\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS not enabled on starting spinner\n",
+ engine->name);
igt_spinner_end(spin);
i915_request_put(rq);
return -EINVAL;
}
if (!(rps->pm_events & GEN6_PM_RP_UP_THRESHOLD)) {
- pr_err("%s: RPS did not register UP interrupt\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS did not register UP interrupt\n",
+ engine->name);
i915_request_put(rq);
return -EINVAL;
}
if (rps->last_freq != rps->min_freq) {
- pr_err("%s: RPS did not program min frequency\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS did not program min frequency\n",
+ engine->name);
i915_request_put(rq);
return -EINVAL;
}
@@ -955,17 +977,19 @@ static int __rps_up_interrupt(struct intel_rps *rps,
i915_request_put(rq);
if (rps->cur_freq != rps->min_freq) {
- pr_err("%s: Frequency unexpectedly changed [up], now %d!\n",
- engine->name, intel_rps_read_actual_frequency(rps));
+ drm_err(&i915->drm,
+ "%s: Frequency unexpectedly changed [up], now %d!\n",
+ engine->name, intel_rps_read_actual_frequency(rps));
return -EINVAL;
}
if (!(rps->pm_iir & GEN6_PM_RP_UP_THRESHOLD)) {
- pr_err("%s: UP interrupt not recorded for spinner, pm_iir:%x, prev_up:%x, up_threshold:%x, up_ei:%x\n",
- engine->name, rps->pm_iir,
- intel_uncore_read(uncore, GEN6_RP_PREV_UP),
- intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
- intel_uncore_read(uncore, GEN6_RP_UP_EI));
+ drm_err(&i915->drm,
+ "%s: UP interrupt not recorded for spinner, pm_iir:%x, prev_up:%x, up_threshold:%x, up_ei:%x\n",
+ engine->name, rps->pm_iir,
+ intel_uncore_read(uncore, GEN6_RP_PREV_UP),
+ intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
+ intel_uncore_read(uncore, GEN6_RP_UP_EI));
return -EINVAL;
}
@@ -976,19 +1000,22 @@ static int __rps_down_interrupt(struct intel_rps *rps,
struct intel_engine_cs *engine)
{
struct intel_uncore *uncore = engine->uncore;
+ struct drm_i915_private *i915 = engine->i915;
u32 timeout;
rps_set_check(rps, rps->max_freq);
if (!(rps->pm_events & GEN6_PM_RP_DOWN_THRESHOLD)) {
- pr_err("%s: RPS did not register DOWN interrupt\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS did not register DOWN interrupt\n",
+ engine->name);
return -EINVAL;
}
if (rps->last_freq != rps->max_freq) {
- pr_err("%s: RPS did not program max frequency\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS did not program max frequency\n",
+ engine->name);
return -EINVAL;
}
@@ -999,21 +1026,22 @@ static int __rps_down_interrupt(struct intel_rps *rps,
sleep_for_ei(rps, timeout);
if (rps->cur_freq != rps->max_freq) {
- pr_err("%s: Frequency unexpectedly changed [down], now %d!\n",
- engine->name,
- intel_rps_read_actual_frequency(rps));
+ drm_err(&i915->drm,
+ "%s: Frequency unexpectedly changed [down], now %d!\n",
+ engine->name, intel_rps_read_actual_frequency(rps));
return -EINVAL;
}
if (!(rps->pm_iir & (GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT))) {
- pr_err("%s: DOWN interrupt not recorded for idle, pm_iir:%x, prev_down:%x, down_threshold:%x, down_ei:%x [prev_up:%x, up_threshold:%x, up_ei:%x]\n",
- engine->name, rps->pm_iir,
- intel_uncore_read(uncore, GEN6_RP_PREV_DOWN),
- intel_uncore_read(uncore, GEN6_RP_DOWN_THRESHOLD),
- intel_uncore_read(uncore, GEN6_RP_DOWN_EI),
- intel_uncore_read(uncore, GEN6_RP_PREV_UP),
- intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
- intel_uncore_read(uncore, GEN6_RP_UP_EI));
+ drm_err(&i915->drm,
+ "%s: DOWN interrupt not recorded for idle, pm_iir:%x, prev_down:%x, down_threshold:%x, down_ei:%x [prev_up:%x, up_threshold:%x, up_ei:%x]\n",
+ engine->name, rps->pm_iir,
+ intel_uncore_read(uncore, GEN6_RP_PREV_DOWN),
+ intel_uncore_read(uncore, GEN6_RP_DOWN_THRESHOLD),
+ intel_uncore_read(uncore, GEN6_RP_DOWN_EI),
+ intel_uncore_read(uncore, GEN6_RP_PREV_UP),
+ intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
+ intel_uncore_read(uncore, GEN6_RP_UP_EI));
return -EINVAL;
}
@@ -1043,7 +1071,8 @@ int live_rps_interrupt(void *arg)
with_intel_gt_pm(gt, wakeref)
pm_events = rps->pm_events;
if (!pm_events) {
- pr_err("No RPS PM events registered, but RPS is enabled?\n");
+ drm_err(>->i915->drm,
+ "No RPS PM events registered, but RPS is enabled?\n");
return -ENODEV;
}
@@ -1135,6 +1164,7 @@ static u64 measure_power_at(struct intel_rps *rps, int *freq)
int live_rps_power(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
void (*saved_work)(struct work_struct *wrk);
struct intel_engine_cs *engine;
@@ -1186,8 +1216,9 @@ int live_rps_power(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: RPS spinner did not start\n",
+ engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -1207,29 +1238,33 @@ int live_rps_power(void *arg)
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
- pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
- engine->name,
- min.power, intel_gpu_freq(rps, min.freq),
- max.power, intel_gpu_freq(rps, max.freq));
+ drm_info(&i915->drm,
+ "%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
+ engine->name, min.power, intel_gpu_freq(rps, min.freq),
+ max.power, intel_gpu_freq(rps, max.freq));
if (10 * min.freq >= 9 * max.freq) {
- pr_notice("Could not control frequency, ran at [%d:%uMHz, %d:%uMhz]\n",
- min.freq, intel_gpu_freq(rps, min.freq),
- max.freq, intel_gpu_freq(rps, max.freq));
+ drm_notice(&i915->drm,
+ "Could not control frequency, ran at [%d:%uMHz, %d:%uMhz]\n",
+ min.freq, intel_gpu_freq(rps, min.freq),
+ max.freq, intel_gpu_freq(rps, max.freq));
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
- engine->name, throttle);
+ drm_warn(&i915->drm,
+ "%s: GPU throttled with reasons 0x%08x\n",
+ engine->name, throttle);
continue;
}
if (11 * min.power > 10 * max.power) {
- pr_err("%s: did not conserve power when setting lower frequency!\n",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: did not conserve power when setting lower frequency!\n",
+ engine->name);
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
- engine->name, throttle);
+ drm_warn(&i915->drm,
+ "%s: GPU throttled with reasons 0x%08x\n",
+ engine->name, throttle);
err = -EINVAL;
break;
@@ -1252,6 +1287,7 @@ int live_rps_power(void *arg)
int live_rps_dynamic(void *arg)
{
struct intel_gt *gt = arg;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_rps *rps = >->rps;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -1273,9 +1309,9 @@ int live_rps_dynamic(void *arg)
return -ENOMEM;
if (intel_rps_has_interrupts(rps))
- pr_info("RPS has interrupt support\n");
+ drm_info(&i915->drm, "RPS has interrupt support\n");
if (intel_rps_uses_timer(rps))
- pr_info("RPS has timer support\n");
+ drm_info(&i915->drm, "RPS has timer support\n");
for_each_engine(engine, gt, id) {
struct i915_request *rq;
@@ -1318,19 +1354,20 @@ int live_rps_dynamic(void *arg)
min.freq = wait_for_freq(rps, rps->min_freq, 2000);
min.dt = ktime_sub(ktime_get(), min.dt);
- pr_info("%s: dynamically reclocked to %u:%uMHz while busy in %lluns, and %u:%uMHz while idle in %lluns\n",
- engine->name,
- max.freq, intel_gpu_freq(rps, max.freq),
- ktime_to_ns(max.dt),
- min.freq, intel_gpu_freq(rps, min.freq),
- ktime_to_ns(min.dt));
+ drm_info(&i915->drm,
+ "%s: dynamically reclocked to %u:%uMHz while busy in %lluns, and %u:%uMHz while idle in %lluns\n",
+ engine->name, max.freq, intel_gpu_freq(rps, max.freq),
+ ktime_to_ns(max.dt), min.freq,
+ intel_gpu_freq(rps, min.freq), ktime_to_ns(min.dt));
if (min.freq >= max.freq) {
- pr_err("%s: dynamic reclocking of spinner failed\n!",
- engine->name);
+ drm_err(&i915->drm,
+ "%s: dynamic reclocking of spinner failed\n!",
+ engine->name);
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
- engine->name, throttle);
+ drm_warn(&i915->drm,
+ "%s: GPU throttled with reasons 0x%08x\n",
+ engine->name, throttle);
err = -EINVAL;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests
2026-08-28 10:03 ` [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests Krzysztof Karas
@ 2026-08-28 16:23 ` Andi Shyti
2026-08-28 18:02 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 16:23 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi krzysztof,
...
> @@ -80,8 +83,9 @@ int live_rc6_manual(void *arg)
> res[1] = rc6_residency(rc6);
> rc0_freq = intel_rps_read_actual_frequency_fw(rps);
> if ((res[1] - res[0]) >> 10) {
> - pr_err("RC6 residency increased by %lldus while disabled for 1000ms!\n",
> - (res[1] - res[0]) >> 10);
> + drm_err(&i915->drm,
> + "RC6 residency increased by %lldus while disabled for 1000ms!\n",
> + (res[1] - res[0]) >> 10);
yeah... I think here we should be using gt_err()
> err = -EINVAL;
> goto out_unlock;
> }
> @@ -92,10 +96,12 @@ int live_rc6_manual(void *arg)
>
> if (!rc0_power) {
> if (rc0_freq)
> - pr_err("No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
> - rc0_freq);
> + drm_dbg(&i915->drm,
> + "No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
> + rc0_freq);
this is moving from _err level to _dbg level.
Andi
> else
> - pr_err("No power and freq measured while in RC0\n");
> + drm_err(&i915->drm,
> + "No power and freq measured while in RC0\n");
> err = -EINVAL;
> goto out_unlock;
> }
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests
2026-08-28 10:03 ` [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests Krzysztof Karas
2026-08-28 16:23 ` Andi Shyti
@ 2026-08-28 18:02 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Niemiec @ 2026-08-28 18:02 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka
Hi Krzysztof,
On 2026-08-28 at 10:03:36 +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_rc6.c | 59 +++--
> drivers/gpu/drm/i915/gt/selftest_rps.c | 297 ++++++++++++++-----------
> 2 files changed, 203 insertions(+), 153 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c
> index 68fb1830d411..c744579a942f 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c
> @@ -14,6 +14,8 @@
> #include "selftests/i915_random.h"
> #include "selftests/librapl.h"
>
> +#include <drm/drm_print.h>
> +
Nit for include
> static u64 rc6_residency(struct intel_rc6 *rc6)
> {
> u64 result;
> @@ -32,6 +34,7 @@ static u64 rc6_residency(struct intel_rc6 *rc6)
> int live_rc6_manual(void *arg)
> {
> struct intel_gt *gt = arg;
> + struct drm_i915_private *i915 = gt->i915;
> struct intel_rc6 *rc6 = >->rc6;
> struct intel_rps *rps = >->rps;
> intel_wakeref_t wakeref;
> @@ -80,8 +83,9 @@ int live_rc6_manual(void *arg)
> res[1] = rc6_residency(rc6);
> rc0_freq = intel_rps_read_actual_frequency_fw(rps);
> if ((res[1] - res[0]) >> 10) {
> - pr_err("RC6 residency increased by %lldus while disabled for 1000ms!\n",
> - (res[1] - res[0]) >> 10);
> + drm_err(&i915->drm,
> + "RC6 residency increased by %lldus while disabled for 1000ms!\n",
> + (res[1] - res[0]) >> 10);
To drive the point home, this is another place where gt_err would be
better, since the test is concerned with a specific gt, and all kinds of
values can differ between different gts on the same multi-gt system.
I'm pretty sure the pr_err was written before multi-gt was a thing (last
two commits changing that line were 599b0d8ce6eda in 2024 that only
changed the string, and before that 730eaeb524261 was in 2019), so there
was no gt id to report. But now having the gt id stated in the error log
could be really valuable for debugging, so this series is a good chance
to improve the logging with gt_prints instead of drm_prints, unless it's
considered out of scope.
(In this case this specific test is always run on the gt with id 0, because
the file that runs it is not adapted for multi gt, but that's another
issue entirely and I hope you see my point)
Snipping the rest, looks okay to me.
Thanks
Krzysztof
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (4 preceding siblings ...)
2026-08-28 10:03 ` [PATCH v3 5/8] drm/i915/gt/selftests: Use drm_* prints in gt standalone tests Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 16:28 ` Andi Shyti
2026-08-28 18:06 ` Krzysztof Niemiec
2026-08-28 10:03 ` [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers Krzysztof Karas
` (2 subsequent siblings)
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to device context aware drm
versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
.../drm/i915/gt/selftest_engine_heartbeat.c | 13 +++++----
drivers/gpu/drm/i915/gt/selftest_llc.c | 29 ++++++++++++-------
2 files changed, 26 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
index b893a8fde895..d26441ee837b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
@@ -195,6 +195,7 @@ static int live_idle_pulse(void *arg)
static int __live_heartbeat_off(struct intel_engine_cs *engine)
{
+ struct drm_i915_private *i915 = engine->i915;
int err;
intel_engine_pm_get(engine);
@@ -202,8 +203,8 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
engine->serial++;
flush_delayed_work(&engine->heartbeat.work);
if (!delayed_work_pending(&engine->heartbeat.work)) {
- pr_err("%s: heartbeat not running\n",
- engine->name);
+ drm_err(&i915->drm, "%s: heartbeat not running\n",
+ engine->name);
err = -EINVAL;
goto err_pm;
}
@@ -215,15 +216,15 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
engine->serial++;
flush_delayed_work(&engine->heartbeat.work);
if (delayed_work_pending(&engine->heartbeat.work)) {
- pr_err("%s: heartbeat still running\n",
- engine->name);
+ drm_err(&i915->drm, "%s: heartbeat still running\n",
+ engine->name);
err = -EINVAL;
goto err_beat;
}
if (READ_ONCE(engine->heartbeat.systole)) {
- pr_err("%s: heartbeat still allocated\n",
- engine->name);
+ drm_err(&i915->drm, "%s: heartbeat still allocated\n",
+ engine->name);
err = -EINVAL;
goto err_beat;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_llc.c b/drivers/gpu/drm/i915/gt/selftest_llc.c
index 779fadcec7c4..17a86e876f9f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_llc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_llc.c
@@ -6,6 +6,8 @@
#include "selftest_llc.h"
#include "intel_rps.h"
+#include <drm/drm_print.h>
+
static int gen6_verify_ring_freq(struct intel_llc *llc)
{
struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
@@ -23,6 +25,7 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)
gpu_freq <= consts.max_gpu_freq;
gpu_freq++) {
struct intel_rps *rps = &llc_to_gt(llc)->rps;
+ u32 scaler = GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1;
unsigned int ia_freq, ring_freq, found;
u32 val;
@@ -32,28 +35,34 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)
val = gpu_freq;
if (snb_pcode_read(llc_to_gt(llc)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE,
&val, NULL)) {
- pr_err("Failed to read freq table[%d], range [%d, %d]\n",
- gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq);
+ drm_err(&i915->drm,
+ "Failed to read freq table[%d], range [%d, %d]\n",
+ gpu_freq, consts.min_gpu_freq,
+ consts.max_gpu_freq);
err = -ENXIO;
break;
}
found = (val >> 0) & 0xff;
if (found != ia_freq) {
- pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
- gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
- intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
- found, ia_freq);
+ drm_err(&i915->drm,
+ "Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
+ gpu_freq, consts.min_gpu_freq,
+ consts.max_gpu_freq,
+ intel_gpu_freq(rps, gpu_freq * scaler),
+ found, ia_freq);
err = -EINVAL;
break;
}
found = (val >> 8) & 0xff;
if (found != ring_freq) {
- pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
- gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
- intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
- found, ring_freq);
+ drm_err(&i915->drm,
+ "Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
+ gpu_freq, consts.min_gpu_freq,
+ consts.max_gpu_freq,
+ intel_gpu_freq(rps, gpu_freq * scaler),
+ found, ring_freq);
err = -EINVAL;
break;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers
2026-08-28 10:03 ` [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers Krzysztof Karas
@ 2026-08-28 16:28 ` Andi Shyti
2026-08-28 18:06 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 16:28 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
...
> @@ -23,6 +25,7 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)
> gpu_freq <= consts.max_gpu_freq;
> gpu_freq++) {
> struct intel_rps *rps = &llc_to_gt(llc)->rps;
> + u32 scaler = GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1;
>
As you are at it, you can remove this ugly blank line here.
Andi
> unsigned int ia_freq, ring_freq, found;
> u32 val;
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers
2026-08-28 10:03 ` [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers Krzysztof Karas
2026-08-28 16:28 ` Andi Shyti
@ 2026-08-28 18:06 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Niemiec @ 2026-08-28 18:06 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka
Hi Krzysztof,
On 2026-08-28 at 10:03:37 +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> .../drm/i915/gt/selftest_engine_heartbeat.c | 13 +++++----
> drivers/gpu/drm/i915/gt/selftest_llc.c | 29 ++++++++++++-------
> 2 files changed, 26 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> index b893a8fde895..d26441ee837b 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> @@ -195,6 +195,7 @@ static int live_idle_pulse(void *arg)
>
> static int __live_heartbeat_off(struct intel_engine_cs *engine)
> {
> + struct drm_i915_private *i915 = engine->i915;
> int err;
>
> intel_engine_pm_get(engine);
> @@ -202,8 +203,8 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
> engine->serial++;
> flush_delayed_work(&engine->heartbeat.work);
> if (!delayed_work_pending(&engine->heartbeat.work)) {
> - pr_err("%s: heartbeat not running\n",
> - engine->name);
> + drm_err(&i915->drm, "%s: heartbeat not running\n",
> + engine->name);
> err = -EINVAL;
> goto err_pm;
> }
> @@ -215,15 +216,15 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
> engine->serial++;
> flush_delayed_work(&engine->heartbeat.work);
> if (delayed_work_pending(&engine->heartbeat.work)) {
> - pr_err("%s: heartbeat still running\n",
> - engine->name);
> + drm_err(&i915->drm, "%s: heartbeat still running\n",
> + engine->name);
> err = -EINVAL;
> goto err_beat;
> }
>
> if (READ_ONCE(engine->heartbeat.systole)) {
> - pr_err("%s: heartbeat still allocated\n",
> - engine->name);
> + drm_err(&i915->drm, "%s: heartbeat still allocated\n",
> + engine->name);
> err = -EINVAL;
> goto err_beat;
> }
> diff --git a/drivers/gpu/drm/i915/gt/selftest_llc.c b/drivers/gpu/drm/i915/gt/selftest_llc.c
> index 779fadcec7c4..17a86e876f9f 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_llc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_llc.c
> @@ -6,6 +6,8 @@
> #include "selftest_llc.h"
> #include "intel_rps.h"
>
> +#include <drm/drm_print.h>
> +
Include nit, rest looks okay to me
Thanks
Krzysztof
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (5 preceding siblings ...)
2026-08-28 10:03 ` [PATCH v3 6/8] drm/i915/gt/selftests: Use drm_* prints in gt selftest helpers Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 16:30 ` Andi Shyti
2026-08-28 18:08 ` Krzysztof Niemiec
2026-08-28 10:03 ` [PATCH v3 8/8] drm/i915/selftests: Add drm_device to selftest wrappers Krzysztof Karas
2026-08-28 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/selftests: Modernize printing in i915 selftests (rev4) Patchwork
8 siblings, 2 replies; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to device context aware drm
versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
drivers/gpu/drm/i915/selftests/i915_selftest.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
index 3adcfdab75ae..fa840a7e651e 100644
--- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
+++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
@@ -23,6 +23,8 @@
#include <linux/random.h>
+#include <drm/drm_print.h>
+
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_gt_regs.h"
@@ -47,7 +49,7 @@ int i915_mock_sanitycheck(void)
int i915_live_sanitycheck(struct drm_i915_private *i915)
{
- pr_info("%s: %s() - ok!\n", i915->drm.driver->name, __func__);
+ drm_info(&i915->drm, "%s() - ok!\n", __func__);
return 0;
}
@@ -154,7 +156,7 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)
if (need_to_wait && wait_for(!__gsc_proxy_init_progressing(&i915->media_gt->uc.gsc),
timeout_ms))
- pr_warn(DRIVER_NAME "Timed out waiting for gsc_proxy_completion!\n");
+ drm_warn(&i915->drm, "Timed out waiting for gsc_proxy_completion!\n");
}
static void
@@ -178,7 +180,7 @@ __wait_gsc_huc_load_completed(struct drm_i915_private *i915)
if (need_to_wait &&
wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms))
- pr_warn(DRIVER_NAME "Timed out waiting for huc load via GSC!\n");
+ drm_warn(&i915->drm, "Timed out waiting for huc load via GSC!\n");
}
static struct mm_struct *get_selftest_mm(int u_pid_nr)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers
2026-08-28 10:03 ` [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers Krzysztof Karas
@ 2026-08-28 16:30 ` Andi Shyti
2026-08-28 18:08 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 16:30 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
On Fri, Aug 28, 2026 at 10:03:38AM +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/selftests/i915_selftest.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
in the title you are stating that you are using drm_* in headers.
Please, fix the title according to the change.
Thanks,
Andi
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers
2026-08-28 10:03 ` [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers Krzysztof Karas
2026-08-28 16:30 ` Andi Shyti
@ 2026-08-28 18:08 ` Krzysztof Niemiec
1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Niemiec @ 2026-08-28 18:08 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka
Hi Krzysztof,
On 2026-08-28 at 10:03:38 +0000, Krzysztof Karas wrote:
> Move away from generic pr prints to device context aware drm
> versions.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/selftests/i915_selftest.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> index 3adcfdab75ae..fa840a7e651e 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> @@ -23,6 +23,8 @@
>
> #include <linux/random.h>
>
> +#include <drm/drm_print.h>
> +
> #include "gt/intel_gt.h"
> #include "gt/intel_gt_pm.h"
> #include "gt/intel_gt_regs.h"
> @@ -47,7 +49,7 @@ int i915_mock_sanitycheck(void)
>
> int i915_live_sanitycheck(struct drm_i915_private *i915)
> {
> - pr_info("%s: %s() - ok!\n", i915->drm.driver->name, __func__);
> + drm_info(&i915->drm, "%s() - ok!\n", __func__);
> return 0;
> }
>
> @@ -154,7 +156,7 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)
>
> if (need_to_wait && wait_for(!__gsc_proxy_init_progressing(&i915->media_gt->uc.gsc),
> timeout_ms))
> - pr_warn(DRIVER_NAME "Timed out waiting for gsc_proxy_completion!\n");
> + drm_warn(&i915->drm, "Timed out waiting for gsc_proxy_completion!\n");
> }
>
> static void
> @@ -178,7 +180,7 @@ __wait_gsc_huc_load_completed(struct drm_i915_private *i915)
>
> if (need_to_wait &&
> wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms))
> - pr_warn(DRIVER_NAME "Timed out waiting for huc load via GSC!\n");
> + drm_warn(&i915->drm, "Timed out waiting for huc load via GSC!\n");
> }
>
> static struct mm_struct *get_selftest_mm(int u_pid_nr)
> --
> 2.34.1
>
LGTM
Reviewed-by: Krzysztof Niemiec <krzysztof.niemiec@intel.com>
Thanks
Krzysztof
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 8/8] drm/i915/selftests: Add drm_device to selftest wrappers
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (6 preceding siblings ...)
2026-08-28 10:03 ` [PATCH v3 7/8] drm/i915/selftests: Use drm_* prints in selftest headers Krzysztof Karas
@ 2026-08-28 10:03 ` Krzysztof Karas
2026-08-28 16:36 ` Andi Shyti
2026-08-28 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/selftests: Modernize printing in i915 selftests (rev4) Patchwork
8 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Karas @ 2026-08-28 10:03 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Pass device pointer to the selftest wrapper macros, so we can
use device context in message printing.
If the caller chooses not to pass a device, use old style
formatting instead of embedding NULL device into the messages.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
.../gpu/drm/i915/gem/selftests/huge_pages.c | 4 +-
.../i915/gem/selftests/i915_gem_client_blt.c | 2 +-
.../i915/gem/selftests/i915_gem_coherency.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_context.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_dmabuf.c | 4 +-
.../drm/i915/gem/selftests/i915_gem_migrate.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_mman.c | 4 +-
.../drm/i915/gem/selftests/i915_gem_object.c | 4 +-
.../drm/i915/gem/selftests/i915_gem_phys.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 +-
.../drm/i915/gt/selftest_engine_heartbeat.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 4 +-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_migrate.c | 4 +-
drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_ring.c | 2 +-
.../drm/i915/gt/selftest_ring_submission.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_timeline.c | 4 +-
drivers/gpu/drm/i915/gt/selftest_tlb.c | 2 +-
.../gpu/drm/i915/gt/selftest_workarounds.c | 2 +-
drivers/gpu/drm/i915/gt/st_shmem_utils.c | 2 +-
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 2 +-
.../drm/i915/gt/uc/selftest_guc_hangcheck.c | 2 +-
.../drm/i915/gt/uc/selftest_guc_multi_lrc.c | 2 +-
drivers/gpu/drm/i915/i915_selftest.h | 16 ++---
drivers/gpu/drm/i915/selftests/i915_active.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 +-
.../gpu/drm/i915/selftests/i915_gem_evict.c | 4 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +-
drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 6 +-
.../gpu/drm/i915/selftests/i915_selftest.c | 63 ++++++++++++++-----
.../gpu/drm/i915/selftests/i915_sw_fence.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_syncmap.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 4 +-
.../drm/i915/selftests/intel_memory_region.c | 6 +-
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
drivers/gpu/drm/i915/selftests/scatterlist.c | 2 +-
44 files changed, 113 insertions(+), 80 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index 44718e728291..50199faf0a0e 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -1991,7 +1991,7 @@ int i915_gem_huge_page_mock_selftests(void)
goto out_put;
}
- err = i915_subtests(tests, ppgtt);
+ err = i915_subtests(tests, ppgtt, &i915->drm);
out_put:
i915_vm_put(&ppgtt->vm);
@@ -2021,5 +2021,5 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index 1d4d7cfb3f9c..48ac2b7d80df 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
@@ -742,5 +742,5 @@ int i915_gem_client_blt_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 2a0c0634d446..316bab3d86ab 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -430,5 +430,5 @@ int i915_gem_coherency_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_gem_coherency),
};
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 9d405098f9e7..f85f4b8b1ef3 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -1912,5 +1912,5 @@ int i915_gem_context_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
index 2fda549dd82d..a1c611d287c8 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c
@@ -541,7 +541,7 @@ int i915_gem_dmabuf_mock_selftests(void)
if (!i915)
return -ENOMEM;
- err = i915_subtests(tests, i915);
+ err = i915_subtests(tests, i915, &i915->drm);
mock_destroy_device(i915);
return err;
@@ -556,5 +556,5 @@ int i915_gem_dmabuf_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_dmabuf_import_same_driver_lmem_smem),
};
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
index d8f4a10d71de..553bf14f8274 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
@@ -524,5 +524,5 @@ int i915_gem_migrate_live_selftests(struct drm_i915_private *i915)
if (!HAS_LMEM(i915))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index d01acfb7d93d..a15bdec2177b 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -1860,12 +1860,12 @@ int i915_gem_mman_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_mmap_gpu),
};
- ret = i915_live_subtests(tests, i915);
+ ret = i915_live_subtests(tests, i915, &i915->drm);
if (ret)
return ret;
if (current->mm)
- ret = i915_live_subtests(vma_tests, i915);
+ ret = i915_live_subtests(vma_tests, i915, &i915->drm);
else
pr_warn("No current->mm to safely borrow userspace memory from. Skipping VMA tests.\n");
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
index 19e374f68ff7..4317e6a5362e 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_object.c
@@ -83,7 +83,7 @@ int i915_gem_object_mock_selftests(void)
if (!i915)
return -ENOMEM;
- err = i915_subtests(tests, i915);
+ err = i915_subtests(tests, i915, &i915->drm);
mock_destroy_device(i915);
return err;
@@ -95,5 +95,5 @@ int i915_gem_object_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_gem_huge),
};
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c
index d43d8dae0f69..9c05e8db3861 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c
@@ -80,7 +80,7 @@ int i915_gem_phys_mock_selftests(void)
if (!i915)
return -ENOMEM;
- err = i915_subtests(tests, i915);
+ err = i915_subtests(tests, i915, &i915->drm);
mock_destroy_device(i915);
return err;
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index d9d279991eda..e02eb41205a5 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -458,5 +458,5 @@ int intel_context_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(gt))
return 0;
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 28c019547b34..88f8ee5efa42 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -384,7 +384,7 @@ int intel_engine_cs_perf_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
static int intel_mmio_bases_check(void *arg)
@@ -439,5 +439,5 @@ int intel_engine_cs_mock_selftests(void)
SUBTEST(intel_mmio_bases_check),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
index d26441ee837b..3d22f1f85f95 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
@@ -275,7 +275,7 @@ int intel_heartbeat_live_selftests(struct drm_i915_private *i915)
saved_hangcheck = i915->params.enable_hangcheck;
i915->params.enable_hangcheck = INT_MAX;
- err = intel_gt_live_subtests(tests, to_gt(i915));
+ err = intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
i915->params.enable_hangcheck = saved_hangcheck;
return err;
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 2813f0c717a9..acf3ae1da919 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -434,5 +434,5 @@ int live_engine_pm_selftests(struct intel_gt *gt)
SUBTEST(live_engine_pm),
};
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, >->i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 97dc44cf615f..6764d8284d6c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
+++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
@@ -4573,5 +4573,5 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
index 4e583fcb1cf9..534012012c34 100644
--- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
@@ -202,7 +202,7 @@ int intel_gt_pm_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
int intel_gt_pm_late_selftests(struct drm_i915_private *i915)
@@ -219,5 +219,5 @@ int intel_gt_pm_late_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 00dfc37221fa..3234d88a611a 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -2028,7 +2028,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
wakeref = intel_runtime_pm_get(gt->uncore->rpm);
- err = intel_gt_live_subtests(tests, gt);
+ err = intel_gt_live_subtests(tests, gt, &i915->drm);
intel_runtime_pm_put(gt->uncore->rpm, wakeref);
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 23f04f6f8fba..0e8c9626ee56 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -1990,5 +1990,5 @@ int intel_lrc_live_selftests(struct drm_i915_private *i915)
if (!HAS_LOGICAL_RING_CONTEXTS(i915))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c b/drivers/gpu/drm/i915/gt/selftest_migrate.c
index fb348aa82e05..321ca87b7d06 100644
--- a/drivers/gpu/drm/i915/gt/selftest_migrate.c
+++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c
@@ -824,7 +824,7 @@ int intel_migrate_live_selftests(struct drm_i915_private *i915)
if (!gt->migrate.context)
return 0;
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
static struct drm_i915_gem_object *
@@ -1046,5 +1046,5 @@ int intel_migrate_perf_selftests(struct drm_i915_private *i915)
if (!gt->migrate.context)
return 0;
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c
index 770516c6c7da..6b927e7d6c21 100644
--- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
@@ -453,5 +453,5 @@ int intel_mocs_live_selftests(struct drm_i915_private *i915)
if (!get_mocs_settings(i915, &table))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 938218e0d5bc..02acac8cd04c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -398,5 +398,5 @@ int intel_reset_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(gt))
return -EIO; /* we're long past hope of a successful reset */
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_ring.c b/drivers/gpu/drm/i915/gt/selftest_ring.c
index 2a8c534dc125..97ffcaadd412 100644
--- a/drivers/gpu/drm/i915/gt/selftest_ring.c
+++ b/drivers/gpu/drm/i915/gt/selftest_ring.c
@@ -106,5 +106,5 @@ int intel_ring_mock_selftests(void)
SUBTEST(igt_ring_direction),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
index 600333ae6c8c..1234b74ee407 100644
--- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
@@ -295,5 +295,5 @@ int intel_ring_submission_live_selftests(struct drm_i915_private *i915)
if (to_gt(i915)->submission_method > INTEL_SUBMISSION_RING)
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index 531dbc08c8c3..c8096c7c628e 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -584,5 +584,5 @@ int intel_slpc_live_selftests(struct drm_i915_private *i915)
return 0;
}
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index 29d860a5c9c8..bd9d39cfdffe 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -448,7 +448,7 @@ int intel_timeline_mock_selftests(void)
SUBTEST(bench_sync),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
static int emit_ggtt_store_dw(struct i915_request *rq, u32 addr, u32 value)
@@ -1425,5 +1425,5 @@ int intel_timeline_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c
index 89420f07f681..e81567067991 100644
--- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
+++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
@@ -405,7 +405,7 @@ int intel_tlb_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(gt))
continue;
- err = intel_gt_live_subtests(tests, gt);
+ err = intel_gt_live_subtests(tests, gt, &i915->drm);
if (err)
return err;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 8b74d62e7ca5..460233fdb333 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -1404,5 +1404,5 @@ int intel_workarounds_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/st_shmem_utils.c b/drivers/gpu/drm/i915/gt/st_shmem_utils.c
index b279fe88b70e..b00e29737c11 100644
--- a/drivers/gpu/drm/i915/gt/st_shmem_utils.c
+++ b/drivers/gpu/drm/i915/gt/st_shmem_utils.c
@@ -59,5 +59,5 @@ int shmem_utils_mock_selftests(void)
SUBTEST(igt_shmem_basic),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
index 63a75272924f..e201410c2e2c 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
@@ -415,5 +415,5 @@ int intel_guc_live_selftests(struct drm_i915_private *i915)
if (!intel_uc_uses_guc_submission(>->uc))
return 0;
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
index 83801c992488..bcce2afaa4f7 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
@@ -158,5 +158,5 @@ int intel_guc_hang_check(struct drm_i915_private *i915)
if (!intel_uc_uses_guc_submission(>->uc))
return 0;
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
index 18077801b2e6..89a1ad08ddb0 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
@@ -180,5 +180,5 @@ int intel_guc_multi_lrc_live_selftests(struct drm_i915_private *i915)
if (!intel_uc_uses_guc_submission(>->uc))
return 0;
- return intel_gt_live_subtests(tests, gt);
+ return intel_gt_live_subtests(tests, gt, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/i915_selftest.h b/drivers/gpu/drm/i915/i915_selftest.h
index e29ca298e7eb..f102d61bfa3b 100644
--- a/drivers/gpu/drm/i915/i915_selftest.h
+++ b/drivers/gpu/drm/i915/i915_selftest.h
@@ -29,6 +29,7 @@
#define STACK_MAGIC 0xdeadbeef
struct pci_dev;
+struct drm_device;
struct drm_i915_private;
struct i915_selftest {
@@ -88,24 +89,25 @@ int __i915_subtests(const char *caller,
int (*teardown)(int err, void *data),
const struct i915_subtest *st,
unsigned int count,
- void *data);
-#define i915_subtests(T, data) \
+ void *data,
+ struct drm_device *device);
+#define i915_subtests(T, data, device) \
__i915_subtests(__func__, \
__i915_nop_setup, __i915_nop_teardown, \
- T, ARRAY_SIZE(T), data)
-#define i915_live_subtests(T, data) ({ \
+ T, ARRAY_SIZE(T), data, device)
+#define i915_live_subtests(T, data, device) ({ \
typecheck(struct drm_i915_private *, data); \
(data)->gt[0]->uc.guc.submission_state.sched_disable_delay_ms = 0; \
__i915_subtests(__func__, \
__i915_live_setup, __i915_live_teardown, \
- T, ARRAY_SIZE(T), data); \
+ T, ARRAY_SIZE(T), data, device); \
})
-#define intel_gt_live_subtests(T, data) ({ \
+#define intel_gt_live_subtests(T, data, device) ({ \
typecheck(struct intel_gt *, data); \
(data)->uc.guc.submission_state.sched_disable_delay_ms = 0; \
__i915_subtests(__func__, \
__intel_gt_live_setup, __intel_gt_live_teardown, \
- T, ARRAY_SIZE(T), data); \
+ T, ARRAY_SIZE(T), data, device); \
})
#define SUBTEST(x) { x, #x }
diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c
index 79b55df1e71a..8bb9994aa116 100644
--- a/drivers/gpu/drm/i915/selftests/i915_active.c
+++ b/drivers/gpu/drm/i915/selftests/i915_active.c
@@ -262,7 +262,7 @@ int i915_active_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_subtests(tests, i915);
+ return i915_subtests(tests, i915, &i915->drm);
}
static struct intel_engine_cs *node_to_barrier(struct active_node *it)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index ad650f67114a..e5ee5ddad81a 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -258,5 +258,5 @@ int i915_gem_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index 604289814f79..5abb0b9d7ae7 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -571,7 +571,7 @@ int i915_gem_evict_mock_selftests(void)
return -ENOMEM;
with_intel_runtime_pm(&i915->runtime_pm, wakeref)
- err = i915_subtests(tests, to_gt(i915));
+ err = i915_subtests(tests, to_gt(i915), &i915->drm);
mock_destroy_device(i915);
return err;
@@ -586,5 +586,5 @@ int i915_gem_evict_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 0c855f00c3ae..5c3f9626f19a 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -2004,7 +2004,7 @@ int i915_gem_gtt_mock_selftests(void)
mock_init_ggtt(gt);
- err = i915_subtests(tests, gt->ggtt);
+ err = i915_subtests(tests, gt->ggtt, &i915->drm);
mock_device_flush(i915);
i915_gem_drain_freed_objects(i915);
@@ -2038,5 +2038,5 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915)
GEM_BUG_ON(offset_in_page(to_gt(i915)->ggtt->vm.total));
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c
index d2a1a901d47b..7b95b0719765 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf.c
+++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
@@ -442,7 +442,7 @@ int i915_perf_live_selftests(struct drm_i915_private *i915)
if (err)
return err;
- err = i915_live_subtests(tests, i915);
+ err = i915_live_subtests(tests, i915, &i915->drm);
destroy_empty_config(&i915->perf);
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index 431298f774e6..5c4d8137916c 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -572,7 +572,7 @@ int i915_request_mock_selftests(void)
return -ENOMEM;
with_intel_runtime_pm(&i915->runtime_pm, wakeref)
- err = i915_subtests(tests, i915);
+ err = i915_subtests(tests, i915, &i915->drm);
mock_destroy_device(i915);
@@ -1928,7 +1928,7 @@ int i915_request_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
static int switch_to_kernel_sync(struct intel_context *ce, int err)
@@ -3354,5 +3354,5 @@ int i915_request_perf_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_subtests(tests, i915);
+ return i915_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
index fa840a7e651e..7feda1ae7d20 100644
--- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
+++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
@@ -224,7 +224,8 @@ static struct mm_struct *get_selftest_mm(int u_pid_nr)
static int __run_selftests(const char *name,
struct selftest *st,
unsigned int count,
- void *data)
+ void *data,
+ struct drm_device *device)
{
struct mm_struct *mm = NULL;
int u_pid_nr = -1;
@@ -243,8 +244,15 @@ static int __run_selftests(const char *name,
set_default_test_all(st, count);
- pr_info(DRIVER_NAME ": Performing %s selftests with st_random_seed=0x%x st_timeout=%u\n",
- name, i915_selftest.random_seed, i915_selftest.timeout_ms);
+ if (device)
+ drm_info(device, "Performing %s selftests with st_random_seed=0x%x st_timeout=%u\n",
+ name, i915_selftest.random_seed,
+ i915_selftest.timeout_ms);
+ else
+ pr_info(DRIVER_NAME
+ ": Performing %s selftests with st_random_seed=0x%x st_timeout=%u\n",
+ name, i915_selftest.random_seed,
+ i915_selftest.timeout_ms);
/*
* If we are running in a kthread on a multi NUMA system and the user passed
@@ -258,7 +266,11 @@ static int __run_selftests(const char *name,
if (unlikely(!current->mm)) {
mmput(mm);
mm = NULL;
- pr_warn("Could not set mm as current->mm\n");
+ if (device)
+ drm_warn(device,
+ "Could not set mm as current->mm\n");
+ else
+ pr_warn("Could not set mm as current->mm\n");
}
}
}
@@ -277,7 +289,11 @@ static int __run_selftests(const char *name,
return -EINTR;
}
- pr_info(DRIVER_NAME ": Running %s\n", st->name);
+ if (device)
+ drm_info(device, "Running %s\n", st->name);
+ else
+ pr_info(DRIVER_NAME ": Running %s\n", st->name);
+
if (data)
err = st->live(data);
else
@@ -301,8 +317,9 @@ static int __run_selftests(const char *name,
return err;
}
-#define run_selftests(x, data) \
- __run_selftests(#x, x##_selftests, ARRAY_SIZE(x##_selftests), data)
+#define run_selftests(x, data, device) \
+ __run_selftests(#x, x##_selftests, ARRAY_SIZE(x##_selftests), \
+ data, device)
int i915_mock_selftests(void)
{
@@ -311,7 +328,7 @@ int i915_mock_selftests(void)
if (!i915_selftest.mock)
return 0;
- err = run_selftests(mock, NULL);
+ err = run_selftests(mock, NULL, NULL);
if (err) {
i915_selftest.mock = err;
return 1;
@@ -352,7 +369,7 @@ int i915_live_selftests(struct pci_dev *pdev)
__wait_gsc_proxy_completed(i915);
__wait_gsc_huc_load_completed(i915);
- err = run_selftests(live, i915);
+ err = run_selftests(live, i915, &i915->drm);
if (err) {
i915_selftest.live = err;
return err;
@@ -377,7 +394,7 @@ int i915_perf_selftests(struct pci_dev *pdev)
__wait_gsc_proxy_completed(i915);
__wait_gsc_huc_load_completed(i915);
- err = run_selftests(perf, i915);
+ err = run_selftests(perf, i915, &i915->drm);
if (err) {
i915_selftest.perf = err;
return err;
@@ -495,7 +512,8 @@ int __i915_subtests(const char *caller,
int (*teardown)(int err, void *data),
const struct i915_subtest *st,
unsigned int count,
- void *data)
+ void *data,
+ struct drm_device *device)
{
int err;
@@ -509,18 +527,31 @@ int __i915_subtests(const char *caller,
err = setup(data);
if (err) {
- pr_err(DRIVER_NAME "/%s: setup failed for %s\n",
- caller, st->name);
+ if (device)
+ drm_err(device, "%s: setup failed for %s\n",
+ caller, st->name);
+ else
+ pr_err(DRIVER_NAME "/%s: setup failed for %s\n",
+ caller, st->name);
return err;
}
- pr_info(DRIVER_NAME ": Running %s/%s\n", caller, st->name);
+ if (device)
+ drm_info(device, "Running %s/%s\n", caller, st->name);
+ else
+ pr_info(DRIVER_NAME ": Running %s/%s\n", caller, st->name);
+
GEM_TRACE("Running %s/%s\n", caller, st->name);
err = teardown(st->func(data), data);
if (err && err != -EINTR) {
- pr_err(DRIVER_NAME "/%s: %s failed with error %d\n",
- caller, st->name, err);
+ if (device)
+ drm_err(device, "%s: %s failed with error %d\n",
+ caller, st->name, err);
+ else
+ pr_err(DRIVER_NAME
+ "/%s: %s failed with error %d\n",
+ caller, st->name, err);
return err;
}
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index ecb2d718f6a6..ddb3c63ddd63 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -763,5 +763,5 @@ int i915_sw_fence_mock_selftests(void)
SUBTEST(test_dma_fence),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_syncmap.c b/drivers/gpu/drm/i915/selftests/i915_syncmap.c
index 88fa845e9f4a..163782c7c276 100644
--- a/drivers/gpu/drm/i915/selftests/i915_syncmap.c
+++ b/drivers/gpu/drm/i915/selftests/i915_syncmap.c
@@ -612,5 +612,5 @@ int i915_syncmap_mock_selftests(void)
SUBTEST(igt_syncmap_random),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 8e1e54ea0585..c754de5afa02 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -997,7 +997,7 @@ int i915_vma_mock_selftests(void)
mock_init_ggtt(gt);
- err = i915_subtests(tests, gt->ggtt);
+ err = i915_subtests(tests, gt->ggtt, &i915->drm);
mock_device_flush(i915);
i915_gem_drain_freed_objects(i915);
@@ -1163,5 +1163,5 @@ int i915_vma_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_vma_remapped_gtt),
};
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
index 8307390943a2..ba6e6c5bbb2f 100644
--- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
@@ -1363,7 +1363,7 @@ int intel_memory_region_mock_selftests(void)
goto out_unref;
}
- err = i915_subtests(tests, mem);
+ err = i915_subtests(tests, mem, &i915->drm);
intel_memory_region_destroy(mem);
out_unref:
@@ -1389,7 +1389,7 @@ int intel_memory_region_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
int intel_memory_region_perf_selftests(struct drm_i915_private *i915)
@@ -1401,5 +1401,5 @@ int intel_memory_region_perf_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(to_gt(i915)))
return 0;
- return i915_live_subtests(tests, i915);
+ return i915_live_subtests(tests, i915, &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 1f58024150fa..a1b77e752379 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -296,5 +296,5 @@ int intel_uncore_live_selftests(struct drm_i915_private *i915)
SUBTEST(live_forcewake_ops),
};
- return intel_gt_live_subtests(tests, to_gt(i915));
+ return intel_gt_live_subtests(tests, to_gt(i915), &i915->drm);
}
diff --git a/drivers/gpu/drm/i915/selftests/scatterlist.c b/drivers/gpu/drm/i915/selftests/scatterlist.c
index 7e59591bbed6..88ad1d7e14f7 100644
--- a/drivers/gpu/drm/i915/selftests/scatterlist.c
+++ b/drivers/gpu/drm/i915/selftests/scatterlist.c
@@ -380,5 +380,5 @@ int scatterlist_mock_selftests(void)
SUBTEST(igt_sg_trim),
};
- return i915_subtests(tests, NULL);
+ return i915_subtests(tests, NULL, NULL);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH v3 8/8] drm/i915/selftests: Add drm_device to selftest wrappers
2026-08-28 10:03 ` [PATCH v3 8/8] drm/i915/selftests: Add drm_device to selftest wrappers Krzysztof Karas
@ 2026-08-28 16:36 ` Andi Shyti
0 siblings, 0 replies; 25+ messages in thread
From: Andi Shyti @ 2026-08-28 16:36 UTC (permalink / raw)
To: Krzysztof Karas
Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec
Hi Krzysztof,
...
> @@ -88,24 +89,25 @@ int __i915_subtests(const char *caller,
> int (*teardown)(int err, void *data),
> const struct i915_subtest *st,
> unsigned int count,
> - void *data);
> -#define i915_subtests(T, data) \
> + void *data,
> + struct drm_device *device);
> +#define i915_subtests(T, data, device) \
> __i915_subtests(__func__, \
> __i915_nop_setup, __i915_nop_teardown, \
> - T, ARRAY_SIZE(T), data)
> -#define i915_live_subtests(T, data) ({ \
> + T, ARRAY_SIZE(T), data, device)
> +#define i915_live_subtests(T, data, device) ({ \
> typecheck(struct drm_i915_private *, data); \
> (data)->gt[0]->uc.guc.submission_state.sched_disable_delay_ms = 0; \
> __i915_subtests(__func__, \
> __i915_live_setup, __i915_live_teardown, \
> - T, ARRAY_SIZE(T), data); \
> + T, ARRAY_SIZE(T), data, device); \
> })
> -#define intel_gt_live_subtests(T, data) ({ \
> +#define intel_gt_live_subtests(T, data, device) ({ \
As I stated in my previous review, here perhaps it's better to
use gt_*() and we can drop this change. What do you think?
Andi
> typecheck(struct intel_gt *, data); \
> (data)->uc.guc.submission_state.sched_disable_delay_ms = 0; \
> __i915_subtests(__func__, \
> __intel_gt_live_setup, __intel_gt_live_teardown, \
> - T, ARRAY_SIZE(T), data); \
> + T, ARRAY_SIZE(T), data, device); \
> })
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/selftests: Modernize printing in i915 selftests (rev4)
2026-08-28 10:03 [PATCH v3 0/8] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (7 preceding siblings ...)
2026-08-28 10:03 ` [PATCH v3 8/8] drm/i915/selftests: Add drm_device to selftest wrappers Krzysztof Karas
@ 2026-08-28 11:31 ` Patchwork
8 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2026-08-28 11:31 UTC (permalink / raw)
To: Krzysztof Karas; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 14217 bytes --]
== Series Details ==
Series: drm/i915/selftests: Modernize printing in i915 selftests (rev4)
URL : https://patchwork.freedesktop.org/series/171991/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_19057 -> Patchwork_171991v4
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_171991v4 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_171991v4, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/index.html
Participating hosts (39 -> 39)
------------------------------
Additional (2): fi-hsw-4770 bat-arls-5
Missing (2): bat-dg2-13 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_171991v4:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live:
- fi-bsw-n3050: [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/fi-bsw-n3050/igt@i915_selftest@live.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-bsw-n3050/igt@i915_selftest@live.html
- bat-dg1-7: [PASS][3] -> [DMESG-WARN][4] +1 other test dmesg-warn
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/bat-dg1-7/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-dg1-7/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_pm:
- fi-tgl-1115g4: NOTRUN -> [DMESG-WARN][5] +1 other test dmesg-warn
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@gt_tlb:
- fi-kbl-7567u: [PASS][6] -> [DMESG-WARN][7] +1 other test dmesg-warn
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/fi-kbl-7567u/igt@i915_selftest@live@gt_tlb.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-kbl-7567u/igt@i915_selftest@live@gt_tlb.html
- fi-cfl-guc: [PASS][8] -> [DMESG-WARN][9] +1 other test dmesg-warn
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/fi-cfl-guc/igt@i915_selftest@live@gt_tlb.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-cfl-guc/igt@i915_selftest@live@gt_tlb.html
- bat-adlp-11: [PASS][10] -> [DMESG-WARN][11] +1 other test dmesg-warn
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/bat-adlp-11/igt@i915_selftest@live@gt_tlb.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-adlp-11/igt@i915_selftest@live@gt_tlb.html
- bat-dg1-6: [PASS][12] -> [DMESG-WARN][13] +1 other test dmesg-warn
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/bat-dg1-6/igt@i915_selftest@live@gt_tlb.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-dg1-6/igt@i915_selftest@live@gt_tlb.html
- bat-adlp-6: [PASS][14] -> [DMESG-WARN][15] +1 other test dmesg-warn
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/bat-adlp-6/igt@i915_selftest@live@gt_tlb.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-adlp-6/igt@i915_selftest@live@gt_tlb.html
- fi-cfl-8700k: [PASS][16] -> [DMESG-WARN][17] +1 other test dmesg-warn
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/fi-cfl-8700k/igt@i915_selftest@live@gt_tlb.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-cfl-8700k/igt@i915_selftest@live@gt_tlb.html
- fi-bsw-nick: [PASS][18] -> [DMESG-WARN][19] +1 other test dmesg-warn
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/fi-bsw-nick/igt@i915_selftest@live@gt_tlb.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-bsw-nick/igt@i915_selftest@live@gt_tlb.html
Known issues
------------
Here are the changes found in Patchwork_171991v4 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@basic:
- bat-arls-5: NOTRUN -> [SKIP][20] ([i915#10213] / [i915#11671]) +3 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-tgl-1115g4: NOTRUN -> [SKIP][21] ([i915#4613]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_mmap@basic:
- bat-arls-5: NOTRUN -> [SKIP][22] ([i915#4083])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@gem_mmap@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-arls-5: NOTRUN -> [SKIP][23] ([i915#10197] / [i915#10211] / [i915#4079])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@gem_render_tiled_blits@basic.html
* igt@gem_softpin@allocator-basic-reserve:
- fi-hsw-4770: NOTRUN -> [SKIP][24] +15 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-hsw-4770/igt@gem_softpin@allocator-basic-reserve.html
* igt@gem_tiled_blits@basic:
- bat-arls-5: NOTRUN -> [SKIP][25] ([i915#12637] / [i915#4077]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@gem_tiled_blits@basic.html
* igt@gem_tiled_pread_basic@basic:
- bat-arls-5: NOTRUN -> [SKIP][26] ([i915#15657])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@gem_tiled_pread_basic@basic.html
* igt@i915_pm_rps@basic-api:
- bat-arls-5: NOTRUN -> [SKIP][27] ([i915#10209] / [i915#11681])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@i915_pm_rps@basic-api.html
* igt@intel_hwmon@hwmon-read:
- bat-arls-5: NOTRUN -> [SKIP][28] ([i915#7707]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@intel_hwmon@hwmon-read.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770: NOTRUN -> [SKIP][29] ([i915#5190])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-hsw-4770/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-arls-5: NOTRUN -> [SKIP][30] ([i915#10200] / [i915#12203])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@clobberred-modifier:
- bat-arls-5: NOTRUN -> [SKIP][31] ([i915#10200]) +8 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_addfb_basic@clobberred-modifier.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-arls-5: NOTRUN -> [SKIP][32] ([i915#10202]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-arls-5: NOTRUN -> [SKIP][33] ([i915#16361])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-arls-5: NOTRUN -> [SKIP][34] ([i915#10207])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_force_connector_basic@force-load-detect.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][35]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_hdmi_inject@inject-audio:
- fi-tgl-1115g4: NOTRUN -> [FAIL][36] ([i915#16664])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_pm_backlight@basic-brightness:
- bat-arls-5: NOTRUN -> [SKIP][37] ([i915#9812])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_pm_backlight@basic-brightness.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][38] ([i915#12343] / [i915#9812])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-page-flip:
- bat-arls-5: NOTRUN -> [SKIP][39] ([i915#9732]) +3 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_psr@psr-primary-page-flip.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][40] ([i915#9732]) +3 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr@psr-sprite-plane-onoff:
- fi-hsw-4770: NOTRUN -> [SKIP][41] ([i915#1072]) +3 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-hsw-4770/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-arls-5: NOTRUN -> [SKIP][42] ([i915#10208] / [i915#8809])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@kms_setmode@basic-clone-single-crtc.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][43] ([i915#3555])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-arls-5: NOTRUN -> [SKIP][44] ([i915#10212] / [i915#3708])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-gtt:
- bat-arls-5: NOTRUN -> [SKIP][45] ([i915#12637] / [i915#3708] / [i915#4077]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@basic-read:
- bat-arls-5: NOTRUN -> [SKIP][46] ([i915#10214] / [i915#3708])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-write:
- bat-arls-5: NOTRUN -> [SKIP][47] ([i915#10216] / [i915#3708])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/bat-arls-5/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a1:
- fi-tgl-1115g4: [ABORT][48] ([i915#16837] / [i915#16872] / [i915#16881]) -> [PASS][49] +1 other test pass
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19057/fi-tgl-1115g4/igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a1.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/fi-tgl-1115g4/igt@kms_flip@basic-flip-vs-dpms@d-hdmi-a1.html
[i915#10197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10197
[i915#10200]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10200
[i915#10202]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10202
[i915#10207]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10207
[i915#10208]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10208
[i915#10209]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10209
[i915#10211]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10211
[i915#10212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10212
[i915#10213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10213
[i915#10214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10214
[i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11671]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11671
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#12203]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12203
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12637
[i915#15657]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15657
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#16664]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16664
[i915#16837]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16837
[i915#16872]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16872
[i915#16881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16881
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
Build changes
-------------
* Linux: CI_DRM_19057 -> Patchwork_171991v4
CI-20190529: 20190529
CI_DRM_19057: 5901f93eb5a007e8b7c21ca2b5bfae5958467832 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9078: 9078
Patchwork_171991v4: 5901f93eb5a007e8b7c21ca2b5bfae5958467832 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v4/index.html
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