From: Miles Glenn <milesg@linux.ibm.com>
To: Chinmay Rath <rathc@linux.ibm.com>,
qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
harshpb@linux.ibm.com
Cc: npiggin@gmail.com, richard.henderson@linaro.org,
vishalc@linux.ibm.com, tshah@linux.ibm.com,
shivangu@linux.ibm.com, ojaswin@linux.ibm.com,
aboorvad@linux.ibm.com, amachhiw@linux.ibm.com, sv@linux.ibm.com,
shivani@linux.ibm.com, mkchauras@gmail.com, uverma@linux.ibm.com,
nikhilks@linux.ibm.com
Subject: Re: [PATCH 05/29] target/ppc: Move vector pack instructions to decodetree
Date: Mon, 24 Aug 2026 09:28:23 -0500 [thread overview]
Message-ID: <b29e475066aebe67ca4ff40ee228f79890a12b2a.camel@linux.ibm.com> (raw)
In-Reply-To: <2bbe5177b2a19b3bbd2e83e09ebea006cbd4dd9a.camel@linux.ibm.com>
On Mon, 2026-08-24 at 09:22 -0500, Miles Glenn wrote:
> On Thu, 2026-08-20 at 19:30 +0530, Chinmay Rath wrote:
> > From: Aboorva Devarajan <aboorvad@linux.ibm.com>
> >
>
> Why the 'From' tag?
>
> -Glenn
>
Please disregard my last comment.
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Thanks,
Glenn
> > Move below instructions to decodetree specification:
> >
> > vpkuhum, vpkuwum, vpkuhus, vpkuwus : VX-form (PPC_ALTIVEC)
> > vpkshus, vpkswus, vpkshss, vpkswss : VX-form (PPC_ALTIVEC)
> > vpkpx : VX-form (PPC_ALTIVEC)
> > vpkudum, vpkudus, vpksdus, vpksdss : VX-form (PPC2_ALTIVEC_207)
> >
> > The legacy GEN_VXFORM_ENV/GEN_VXFORM macros that generated gen_vpk*()
> > functions reading register fields from ctx->opcode are replaced by new
> > do_vpk_env()/do_vpk() helpers in vmx-impl.c.inc that use the
> > pre-extracted decodetree argument fields (a->vrt, a->vra, a->vrb)
> > directly. The existing gen_helper_vpk*() implementations in
> > int_helper.c are reused without changes.
> >
> > The changes were verified by validating that the tcg ops generated by
> > those instructions remain the same, which were captured with the '-d
> > in_asm,op' option before and after the patch.
> >
> > Signed-off-by: Aboorva Devarajan <aboorvad@linux.ibm.com>
> > Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
> > Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
> > ---
> > target/ppc/helper.h | 26 +++++++--------
> > target/ppc/insn32.decode | 16 +++++++++
> > target/ppc/int_helper.c | 28 ++++++++--------
> > target/ppc/translate/vmx-impl.c.inc | 51 +++++++++++++++++++++--------
> > target/ppc/translate/vmx-ops.c.inc | 13 --------
> > 5 files changed, 81 insertions(+), 53 deletions(-)
> >
> > diff --git a/target/ppc/helper.h b/target/ppc/helper.h
> > index 6db917935c..6df3de6516 100644
> > --- a/target/ppc/helper.h
> > +++ b/target/ppc/helper.h
> > @@ -249,19 +249,19 @@ DEF_HELPER_FLAGS_4(VMSUMUBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> > DEF_HELPER_FLAGS_4(VMSUMMBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> > DEF_HELPER_FLAGS_4(VPERM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> > DEF_HELPER_FLAGS_4(VPERMR, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> > -DEF_HELPER_4(vpkshss, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkshus, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkswss, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkswus, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpksdss, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpksdus, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkuhus, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkuwus, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkudus, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkuhum, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkuwum, void, env, avr, avr, avr)
> > -DEF_HELPER_4(vpkudum, void, env, avr, avr, avr)
> > -DEF_HELPER_FLAGS_3(vpkpx, TCG_CALL_NO_RWG, void, avr, avr, avr)
> > +DEF_HELPER_4(VPKSHSS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKSHUS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKSWSS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKSWUS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKSDSS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKSDUS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKUHUS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKUWUS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKUDUS, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKUHUM, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKUWUM, void, env, avr, avr, avr)
> > +DEF_HELPER_4(VPKUDUM, void, env, avr, avr, avr)
> > +DEF_HELPER_FLAGS_3(VPKPX, TCG_CALL_NO_RWG, void, avr, avr, avr)
> > DEF_HELPER_5(VMHADDSHS, void, env, avr, avr, avr, avr)
> > DEF_HELPER_5(VMHRADDSHS, void, env, avr, avr, avr, avr)
> > DEF_HELPER_FLAGS_4(VMSUMUHM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
> > diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
> > index 8aca8a00c0..c51efbfd33 100644
> > --- a/target/ppc/insn32.decode
> > +++ b/target/ppc/insn32.decode
> > @@ -1054,6 +1054,22 @@ VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc
> > VCLRLB 000100 ..... ..... ..... 00110001101 @VX
> > VCLRRB 000100 ..... ..... ..... 00111001101 @VX
> >
> > +## Vector Pack Instructions
> > +
> > +VPKUHUM 000100 ..... ..... ..... 0000000111 0 @VX
> > +VPKUWUM 000100 ..... ..... ..... 0000100111 0 @VX
> > +VPKUDUM 000100 ..... ..... ..... 1000100111 0 @VX
> > +VPKUHUS 000100 ..... ..... ..... 0001000111 0 @VX
> > +VPKUWUS 000100 ..... ..... ..... 0001100111 0 @VX
> > +VPKUDUS 000100 ..... ..... ..... 1001100111 0 @VX
> > +VPKSHUS 000100 ..... ..... ..... 0010000111 0 @VX
> > +VPKSWUS 000100 ..... ..... ..... 0010100111 0 @VX
> > +VPKSDUS 000100 ..... ..... ..... 1010100111 0 @VX
> > +VPKSHSS 000100 ..... ..... ..... 0011000111 0 @VX
> > +VPKSWSS 000100 ..... ..... ..... 0011100111 0 @VX
> > +VPKSDSS 000100 ..... ..... ..... 1011100111 0 @VX
> > +VPKPX 000100 ..... ..... ..... 0110000111 0 @VX
> > +
> > # VSX Load/Store Instructions
> >
> > LXSD 111001 ..... ..... .............. 10 @DS
> > diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
> > index a3adf746bd..dc55ccadf7 100644
> > --- a/target/ppc/int_helper.c
> > +++ b/target/ppc/int_helper.c
> > @@ -1465,7 +1465,7 @@ void helper_VPMSUMD(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> > #else
> > #define PKBIG 0
> > #endif
> > -void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> > +void helper_VPKPX(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> > {
> > int i, j;
> > ppc_avr_t result;
> > @@ -1488,7 +1488,7 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> > }
> >
> > #define VPK(suffix, from, to, cvt, dosat) \
> > - void helper_vpk##suffix(CPUPPCState *env, ppc_avr_t *r, \
> > + void helper_VPK##suffix(CPUPPCState *env, ppc_avr_t *r, \
> > ppc_avr_t *a, ppc_avr_t *b) \
> > { \
> > int i; \
> > @@ -1507,18 +1507,18 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> > } \
> > }
> > #define I(x, y) (x)
> > -VPK(shss, s16, s8, cvtshsb, 1)
> > -VPK(shus, s16, u8, cvtshub, 1)
> > -VPK(swss, s32, s16, cvtswsh, 1)
> > -VPK(swus, s32, u16, cvtswuh, 1)
> > -VPK(sdss, s64, s32, cvtsdsw, 1)
> > -VPK(sdus, s64, u32, cvtsduw, 1)
> > -VPK(uhus, u16, u8, cvtuhub, 1)
> > -VPK(uwus, u32, u16, cvtuwuh, 1)
> > -VPK(udus, u64, u32, cvtuduw, 1)
> > -VPK(uhum, u16, u8, I, 0)
> > -VPK(uwum, u32, u16, I, 0)
> > -VPK(udum, u64, u32, I, 0)
> > +VPK(SHSS, s16, s8, cvtshsb, 1)
> > +VPK(SHUS, s16, u8, cvtshub, 1)
> > +VPK(SWSS, s32, s16, cvtswsh, 1)
> > +VPK(SWUS, s32, u16, cvtswuh, 1)
> > +VPK(SDSS, s64, s32, cvtsdsw, 1)
> > +VPK(SDUS, s64, u32, cvtsduw, 1)
> > +VPK(UHUS, u16, u8, cvtuhub, 1)
> > +VPK(UWUS, u32, u16, cvtuwuh, 1)
> > +VPK(UDUS, u64, u32, cvtuduw, 1)
> > +VPK(UHUM, u16, u8, I, 0)
> > +VPK(UWUM, u32, u16, I, 0)
> > +VPK(UDUM, u64, u32, I, 0)
> > #undef I
> > #undef VPK
> > #undef PKBIG
> > diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
> > index 00b359f031..65230f3461 100644
> > --- a/target/ppc/translate/vmx-impl.c.inc
> > +++ b/target/ppc/translate/vmx-impl.c.inc
> > @@ -1070,19 +1070,44 @@ TRANS(VRLQMI, do_vector_rotl_quad, false, true)
> >
> > GEN_VXFORM_TRANS(vsl, 2, 7);
> > GEN_VXFORM_TRANS(vsr, 2, 11);
> > -GEN_VXFORM_ENV(vpkuhum, 7, 0);
> > -GEN_VXFORM_ENV(vpkuwum, 7, 1);
> > -GEN_VXFORM_ENV(vpkudum, 7, 17);
> > -GEN_VXFORM_ENV(vpkuhus, 7, 2);
> > -GEN_VXFORM_ENV(vpkuwus, 7, 3);
> > -GEN_VXFORM_ENV(vpkudus, 7, 19);
> > -GEN_VXFORM_ENV(vpkshus, 7, 4);
> > -GEN_VXFORM_ENV(vpkswus, 7, 5);
> > -GEN_VXFORM_ENV(vpksdus, 7, 21);
> > -GEN_VXFORM_ENV(vpkshss, 7, 6);
> > -GEN_VXFORM_ENV(vpkswss, 7, 7);
> > -GEN_VXFORM_ENV(vpksdss, 7, 23);
> > -GEN_VXFORM(vpkpx, 7, 12);
> > +static bool do_vpk_env(DisasContext *ctx, arg_VX *a,
> > + void (*gen_helper)(TCGv_ptr, TCGv_ptr,
> > + TCGv_ptr, TCGv_ptr))
> > +{
> > + TCGv_ptr ra, rb, rd;
> > + REQUIRE_VECTOR(ctx);
> > + ra = gen_avr_ptr(a->vra);
> > + rb = gen_avr_ptr(a->vrb);
> > + rd = gen_avr_ptr(a->vrt);
> > + gen_helper(tcg_env, rd, ra, rb);
> > + return true;
> > +}
> > +
> > +static bool do_vpk(DisasContext *ctx, arg_VX *a,
> > + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr))
> > +{
> > + TCGv_ptr ra, rb, rd;
> > + REQUIRE_VECTOR(ctx);
> > + ra = gen_avr_ptr(a->vra);
> > + rb = gen_avr_ptr(a->vrb);
> > + rd = gen_avr_ptr(a->vrt);
> > + gen_helper(rd, ra, rb);
> > + return true;
> > +}
> > +
> > +TRANS_FLAGS(ALTIVEC, VPKUHUM, do_vpk_env, gen_helper_VPKUHUM)
> > +TRANS_FLAGS(ALTIVEC, VPKUWUM, do_vpk_env, gen_helper_VPKUWUM)
> > +TRANS_FLAGS2(ALTIVEC_207, VPKUDUM, do_vpk_env, gen_helper_VPKUDUM)
> > +TRANS_FLAGS(ALTIVEC, VPKUHUS, do_vpk_env, gen_helper_VPKUHUS)
> > +TRANS_FLAGS(ALTIVEC, VPKUWUS, do_vpk_env, gen_helper_VPKUWUS)
> > +TRANS_FLAGS2(ALTIVEC_207, VPKUDUS, do_vpk_env, gen_helper_VPKUDUS)
> > +TRANS_FLAGS(ALTIVEC, VPKSHUS, do_vpk_env, gen_helper_VPKSHUS)
> > +TRANS_FLAGS(ALTIVEC, VPKSWUS, do_vpk_env, gen_helper_VPKSWUS)
> > +TRANS_FLAGS2(ALTIVEC_207, VPKSDUS, do_vpk_env, gen_helper_VPKSDUS)
> > +TRANS_FLAGS(ALTIVEC, VPKSHSS, do_vpk_env, gen_helper_VPKSHSS)
> > +TRANS_FLAGS(ALTIVEC, VPKSWSS, do_vpk_env, gen_helper_VPKSWSS)
> > +TRANS_FLAGS2(ALTIVEC_207, VPKSDSS, do_vpk_env, gen_helper_VPKSDSS)
> > +TRANS_FLAGS(ALTIVEC, VPKPX, do_vpk, gen_helper_VPKPX)
> > GEN_VXFORM_ENV(vsum4ubs, 4, 24);
> > GEN_VXFORM_ENV(vsum4sbs, 4, 28);
> > GEN_VXFORM_ENV(vsum4shs, 4, 25);
> > diff --git a/target/ppc/translate/vmx-ops.c.inc b/target/ppc/translate/vmx-ops.c.inc
> > index b8f77d3d2c..2820976c0f 100644
> > --- a/target/ppc/translate/vmx-ops.c.inc
> > +++ b/target/ppc/translate/vmx-ops.c.inc
> > @@ -59,19 +59,6 @@ GEN_VXFORM_300(bcdtrunc, 0, 20),
> > GEN_VXFORM_300(bcdutrunc, 0, 21),
> > GEN_VXFORM(vsl, 2, 7),
> > GEN_VXFORM(vsr, 2, 11),
> > -GEN_VXFORM(vpkuhum, 7, 0),
> > -GEN_VXFORM(vpkuwum, 7, 1),
> > -GEN_VXFORM_207(vpkudum, 7, 17),
> > -GEN_VXFORM(vpkuhus, 7, 2),
> > -GEN_VXFORM(vpkuwus, 7, 3),
> > -GEN_VXFORM_207(vpkudus, 7, 19),
> > -GEN_VXFORM(vpkshus, 7, 4),
> > -GEN_VXFORM(vpkswus, 7, 5),
> > -GEN_VXFORM_207(vpksdus, 7, 21),
> > -GEN_VXFORM(vpkshss, 7, 6),
> > -GEN_VXFORM(vpkswss, 7, 7),
> > -GEN_VXFORM_207(vpksdss, 7, 23),
> > -GEN_VXFORM(vpkpx, 7, 12),
> > GEN_VXFORM(vsum4ubs, 4, 24),
> > GEN_VXFORM(vsum4sbs, 4, 28),
> > GEN_VXFORM(vsum4shs, 4, 25),
next prev parent reply other threads:[~2026-08-24 14:28 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-20 14:00 [PATCH 00/29] target/ppc: Moving instructions to decodetree specification Chinmay Rath
2026-08-20 14:00 ` [PATCH 01/29] target/ppc: Migrate extswsli to decodetree Chinmay Rath
2026-08-24 14:05 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 02/29] target/ppc: Migrate atomic loads " Chinmay Rath
2026-08-24 14:09 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 03/29] target/ppc: Convert cache instructions " Chinmay Rath
2026-08-24 14:10 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 04/29] target/ppc: Move vector merge " Chinmay Rath
2026-08-24 14:20 ` Miles Glenn
2026-08-24 14:26 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 05/29] target/ppc: Move vector pack " Chinmay Rath
2026-08-24 14:22 ` Miles Glenn
2026-08-24 14:28 ` Miles Glenn [this message]
2026-08-20 14:00 ` [PATCH 06/29] target/ppc: Move st{b, h, w, d, q}cx " Chinmay Rath
2026-08-24 14:29 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 07/29] target/ppc: convert slw, srw instruction via decode spec Chinmay Rath
2026-08-24 14:31 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 08/29] target/ppc: convert sraw[i] " Chinmay Rath
2026-08-24 14:32 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 09/29] target/ppc: Convert mcrf to decode tree Chinmay Rath
2026-08-24 14:33 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 10/29] target/ppc: Move fixed-point Shift insns to decodetree Chinmay Rath
2026-08-24 14:35 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 11/29] target/ppc: Move fixed-point byte-reversal store " Chinmay Rath
2026-08-24 14:36 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 12/29] target/ppc: Move GPR atomic load/store instructions " Chinmay Rath
2026-08-24 14:38 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 13/29] target/ppc: Move isync instruction " Chinmay Rath
2026-08-24 14:39 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 14/29] target/ppc: Convert b{a, l, la} to decode tree Chinmay Rath
2026-08-24 14:41 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 15/29] target/ppc: move various conditional branch insns to decodetree Chinmay Rath
2026-08-24 14:42 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 16/29] target/ppc: Fix TRANS* macro variadic arguments handling Chinmay Rath
2026-08-24 14:43 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 17/29] target/ppc: Move wait instruction to decodetree Chinmay Rath
2026-08-24 14:46 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 18/29] target/ppc: Move sleep & friends " Chinmay Rath
2026-08-24 14:49 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 19/29] target/ppc: Refactor sleep and its variants to use a common helper Chinmay Rath
2026-08-20 15:15 ` Miles Glenn
2026-08-21 7:27 ` Chinmay Rath
2026-08-21 16:36 ` Miles Glenn
2026-08-24 13:10 ` Chinmay Rath
2026-08-20 14:00 ` [PATCH 20/29] target/ppc: Move Condition Register access instructions to decodetree Chinmay Rath
2026-08-24 15:16 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 21/29] target/ppc: Move Condition Register logical " Chinmay Rath
2026-08-24 15:18 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 22/29] target/ppc: make do_ea_calc_ra available for 32 bit builds Chinmay Rath
2026-08-24 15:19 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 23/29] target/ppc: Move Fixed-Point Load/Store String instructions to decodetree Chinmay Rath
2026-08-24 15:20 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 24/29] target/ppc: Move VMX integer arithmetic and BCD " Chinmay Rath
2026-08-24 15:22 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 25/29] target/ppc: Move rlwimi, rlwinm " Chinmay Rath
2026-08-24 15:23 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 26/29] target/ppc: Move lmw, stmw " Chinmay Rath
2026-08-24 15:24 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 27/29] target/ppc: Move mfmsr, mtmsr[d] " Chinmay Rath
2026-08-24 15:26 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 28/29] target/ppc: Move byte-reverse " Chinmay Rath
2026-08-24 15:41 ` Miles Glenn
2026-08-20 14:00 ` [PATCH 29/29] target/ppc: Move system call and rfi " Chinmay Rath
2026-08-24 15:56 ` Miles Glenn
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