* [PATCH 0/6] Interruptible bb wait + related bits
@ 2026-10-30 11:49 Matthew Auld
2026-10-30 11:49 ` [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears Matthew Auld
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe
Original motivation comes from user issue:
https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
Previous attempt:
https://patchwork.freedesktop.org/series/176670/
In this version the approach is to try to reduce overall pressure on
the bb pool. And then for the bb wait, which is now much less likely to
be hit, keeping it uinterruptible only where it makes sense, like when
caller asked for it.
---
Matthew Auld (6):
drm/xe/migrate: allow larger chunk sizes for identity VRAM clears
drm/xe/bb: drop per-batch prefetch padding
drm/xe/sa: remove unused shadow BO and two-step bb helpers
drm/xe/sa: allow callers to specify interruptible suballocator waits
drm/xe/migrate: plumb interruptible wait flag to clear and copy
drm/xe/migrate: avoid interruptible waits once passes are in flight
drivers/gpu/drm/xe/tests/xe_bo.c | 2 +-
drivers/gpu/drm/xe/tests/xe_migrate.c | 12 ++--
drivers/gpu/drm/xe/xe_bb.c | 90 ++----------------------
drivers/gpu/drm/xe/xe_bb.h | 12 ++--
drivers/gpu/drm/xe/xe_bo.c | 9 +--
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 3 +-
drivers/gpu/drm/xe/xe_guc_buf.c | 6 +-
drivers/gpu/drm/xe/xe_migrate.c | 25 +++++--
drivers/gpu/drm/xe/xe_migrate.h | 6 +-
drivers/gpu/drm/xe/xe_page_reclaim.c | 2 +-
drivers/gpu/drm/xe/xe_sa.c | 109 ++---------------------------
drivers/gpu/drm/xe/xe_sa.h | 31 +++-----
drivers/gpu/drm/xe/xe_sa_types.h | 3 -
drivers/gpu/drm/xe/xe_vram.c | 2 +-
14 files changed, 69 insertions(+), 243 deletions(-)
---
base-commit: 29f9258a2788a1066c0910c480e65c80887f4d20
change-id: 20261028-migrate-bb-optimise-65bb54cf303e
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
@ 2026-10-30 11:49 ` Matthew Auld
2026-10-30 15:20 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 2/6] drm/xe/bb: drop per-batch prefetch padding Matthew Auld
` (6 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe; +Cc: Thomas Hellström, Matthew Brost
xe_migrate_clear() currently clamps every clear pass to 8M. On platforms
with Xe2 blitter instructions and no separate CCS copy emission, VRAM
clears use the identity map without dynamic PTE updates and execute on
the dedicated migration engine, so clamping each pass to 8M splits
a 1G+ clear into 100+ jobs. 1G VRAM pages look quite normal in real
workloads like llama.py with even a small model.
It looks like the 8M limit comes from wanting a ~1ms preemption
granularity, and dates back to i915. But consider:
1. Xe has kernel reserved BCS engine just for migrations on newer hw,
so no need to duke it out with userspace jobs. Further, we now also
dropped the GPU VM_BIND path, so there is now only a single migration
queue, so the ~1ms preemption granularity is maybe not a big deal
anymore.
2. It does not take ~1ms to clear 8M (single MEM_SET) of VRAM through
the identity map. Currently we just lump everything in the same
bucket, even though we have VRAM clearing with identity, VRAM
clearing with PTE emit, and then copying between VRAM and system
memory, which will have different characteristics and performance.
Applying the same 8M limit everywhere seems overly cautious.
With that be more optimistic and bump the fast path VRAM clearing
through identity map to 128M per single MEM_SET instruction. This still
only takes up to around < ~2ms, or < ~1ms if boosted. For very large
clears, this massively lowers the number of GPU jobs, reducing pressure
on the bb pool and as a bonus gives slightly lower CPU/GPU overhead.
Assisted-by: LLM
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 70408fa0a606..1a216fb12d2b 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -246,6 +246,7 @@ struct xe_migrate {
#define MAX_PREEMPTDISABLE_TRANSFER SZ_8M /* Around 1ms. */
#define MAX_CCS_LIMITED_TRANSFER SZ_4M /* XE_PAGE_SIZE * (FIELD_MAX(XE2_CCS_SIZE_MASK) + 1) */
+#define MAX_IDENTITY_CLEAR_TRANSFER SZ_128M
#define NUM_PT_SLOTS 48
#define LEVEL0_PAGE_TABLE_ENCODE_SIZE SZ_2M
#define MAX_NUM_PTE 512
@@ -1964,6 +1965,11 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
u32 avail_pts = max_mem_transfer_per_pass(xe) / LEVEL0_PAGE_TABLE_ENCODE_SIZE;
clear_L0 = xe_migrate_res_sizes(m, &src_it);
+ if (clear_vram && !xe_migrate_needs_ccs_emit(xe) &&
+ gt->info.has_xe2_blt_instructions &&
+ xe_migrate_allow_identity(clear_L0, &src_it))
+ clear_L0 = min_t(u64, MAX_IDENTITY_CLEAR_TRANSFER,
+ src_it.size);
/* Calculate final sizes and batch size.. */
pte_flags = clear_vram ? PTE_UPDATE_FLAG_IS_VRAM : 0;
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/6] drm/xe/bb: drop per-batch prefetch padding
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
2026-10-30 11:49 ` [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears Matthew Auld
@ 2026-10-30 11:49 ` Matthew Auld
2026-10-30 15:21 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 3/6] drm/xe/sa: remove unused shadow BO and two-step bb helpers Matthew Auld
` (5 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe; +Cc: Thomas Hellström, Matthew Brost
xe_bb_new() currently appends bb_prefetch() (512B or 1K) to every
batch suballocation, inflating a 36B identity-mapped clear batch to
~1K and also causing xe_sa_bo_flush_write() to copy up to 1K of unused
padding to VRAM on every batch.
However, both kernel_bb_pool and usm.bb_pool are initialised via
xe_sa_bo_manager_init(), which already reserves a 4K guard region at
the end of the backing BO to cover CS prefetch, and prefetching into
adjacent suballocations within the mapped pool should be harmless. Drop
bb_prefetch().
This should reduce pressure on the bb pool.
Assisted-by: LLM
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_bb.c | 26 ++++++--------------------
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
index b896b6f6615c..b2603902c147 100644
--- a/drivers/gpu/drm/xe/xe_bb.c
+++ b/drivers/gpu/drm/xe/xe_bb.c
@@ -14,20 +14,6 @@
#include "xe_sched_job.h"
#include "xe_vm_types.h"
-static int bb_prefetch(struct xe_gt *gt)
-{
- struct xe_device *xe = gt_to_xe(gt);
-
- if (GRAPHICS_VERx100(xe) >= 1250 && xe_gt_is_main_type(gt))
- /*
- * RCS and CCS require 1K, although other engines would be
- * okay with 512.
- */
- return SZ_1K;
- else
- return SZ_512;
-}
-
struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
{
struct xe_tile *tile = gt_to_tile(gt);
@@ -38,13 +24,13 @@ struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
return ERR_PTR(-ENOMEM);
/*
- * We need to allocate space for the requested number of dwords,
- * one additional MI_BATCH_BUFFER_END dword, and additional buffer
- * space to accommodate the platform-specific hardware prefetch
- * requirements.
+ * We need to allocate space for the requested number of dwords and
+ * one additional MI_BATCH_BUFFER_END dword. Hardware CS prefetch
+ * at the end of the pool BO is covered by the SZ_4K guard region
+ * reserved by xe_sa_bo_manager_init().
*/
bb->bo = xe_sa_bo_new(!usm ? tile->mem.kernel_bb_pool : gt->usm.bb_pool,
- 4 * (dwords + 1) + bb_prefetch(gt));
+ 4 * (dwords + 1));
if (IS_ERR(bb->bo)) {
err = PTR_ERR(bb->bo);
goto err;
@@ -129,7 +115,7 @@ __xe_bb_create_job(struct xe_exec_queue *q, struct xe_bb *bb, u64 *addr)
if (bb->len == 0 || bb->cs[bb->len - 1] != MI_BATCH_BUFFER_END)
bb->cs[bb->len++] = MI_BATCH_BUFFER_END;
- xe_gt_assert(q->gt, bb->len * 4 + bb_prefetch(q->gt) <= size);
+ xe_gt_assert(q->gt, bb->len * 4 <= size);
xe_sa_bo_flush_write(bb->bo);
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/6] drm/xe/sa: remove unused shadow BO and two-step bb helpers
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
2026-10-30 11:49 ` [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears Matthew Auld
2026-10-30 11:49 ` [PATCH 2/6] drm/xe/bb: drop per-batch prefetch padding Matthew Auld
@ 2026-10-30 11:49 ` Matthew Auld
2026-10-30 15:23 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 4/6] drm/xe/sa: allow callers to specify interruptible suballocator waits Matthew Auld
` (4 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe; +Cc: Thomas Hellström, Matthew Brost
Since commit 1460eae74fbb ("drm/xe/vf: Use drm mm instead of drm sa for
CCS read/write"), the two-step bb/sa allocation helpers and SA shadow BO
support have no callers. Remove the dead code along with the unused
flags argument of __xe_sa_bo_manager_init().
Assisted-by: LLM
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_bb.c | 62 -----------------------
drivers/gpu/drm/xe/xe_bb.h | 3 --
drivers/gpu/drm/xe/xe_guc_buf.c | 2 +-
drivers/gpu/drm/xe/xe_sa.c | 103 +--------------------------------------
drivers/gpu/drm/xe/xe_sa.h | 22 +--------
drivers/gpu/drm/xe/xe_sa_types.h | 3 --
6 files changed, 4 insertions(+), 191 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
index b2603902c147..771e50e7c4e3 100644
--- a/drivers/gpu/drm/xe/xe_bb.c
+++ b/drivers/gpu/drm/xe/xe_bb.c
@@ -45,68 +45,6 @@ struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
return ERR_PTR(err);
}
-/**
- * xe_bb_alloc() - Allocate a new batch buffer structure
- * @gt: the &xe_gt
- *
- * Allocates and initializes a new xe_bb structure with an associated
- * uninitialized suballoc object.
- *
- * Returns: Batch buffer structure or an ERR_PTR(-ENOMEM).
- */
-struct xe_bb *xe_bb_alloc(struct xe_gt *gt)
-{
- struct xe_bb *bb = kmalloc_obj(*bb);
- int err;
-
- if (!bb)
- return ERR_PTR(-ENOMEM);
-
- bb->bo = xe_sa_bo_alloc(GFP_KERNEL);
- if (IS_ERR(bb->bo)) {
- err = PTR_ERR(bb->bo);
- goto err;
- }
-
- return bb;
-
-err:
- kfree(bb);
- return ERR_PTR(err);
-}
-
-/**
- * xe_bb_init() - Initialize a batch buffer with memory from a sub-allocator pool
- * @bb: Batch buffer structure to initialize
- * @bb_pool: Suballoc memory pool to allocate from
- * @dwords: Number of dwords to be allocated
- *
- * Initializes the batch buffer by allocating memory from the specified
- * suballoc pool.
- *
- * Return: 0 on success, negative error code on failure.
- */
-int xe_bb_init(struct xe_bb *bb, struct xe_sa_manager *bb_pool, u32 dwords)
-{
- int err;
-
- /*
- * We need to allocate space for the requested number of dwords &
- * one additional MI_BATCH_BUFFER_END dword. Since the whole SA
- * is submitted to HW, we need to make sure that the last instruction
- * is not over written when the last chunk of SA is allocated for BB.
- * So, this extra DW acts as a guard here.
- */
- err = xe_sa_bo_init(bb_pool, bb->bo, 4 * (dwords + 1));
- if (err)
- return err;
-
- bb->cs = xe_sa_bo_cpu_addr(bb->bo);
- bb->len = 0;
-
- return 0;
-}
-
static struct xe_sched_job *
__xe_bb_create_job(struct xe_exec_queue *q, struct xe_bb *bb, u64 *addr)
{
diff --git a/drivers/gpu/drm/xe/xe_bb.h b/drivers/gpu/drm/xe/xe_bb.h
index 231870b24c2f..b5cc65506696 100644
--- a/drivers/gpu/drm/xe/xe_bb.h
+++ b/drivers/gpu/drm/xe/xe_bb.h
@@ -12,12 +12,9 @@ struct dma_fence;
struct xe_gt;
struct xe_exec_queue;
-struct xe_sa_manager;
struct xe_sched_job;
struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm);
-struct xe_bb *xe_bb_alloc(struct xe_gt *gt);
-int xe_bb_init(struct xe_bb *bb, struct xe_sa_manager *bb_pool, u32 dwords);
struct xe_sched_job *xe_bb_create_job(struct xe_exec_queue *q,
struct xe_bb *bb);
struct xe_sched_job *xe_bb_create_migration_job(struct xe_exec_queue *q,
diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c b/drivers/gpu/drm/xe/xe_guc_buf.c
index 11f77decd8d1..7a8efb62df60 100644
--- a/drivers/gpu/drm/xe/xe_guc_buf.c
+++ b/drivers/gpu/drm/xe/xe_guc_buf.c
@@ -29,7 +29,7 @@ static int guc_buf_cache_init(struct xe_guc_buf_cache *cache, u32 size)
struct xe_gt *gt = cache_to_gt(cache);
struct xe_sa_manager *sam;
- sam = __xe_sa_bo_manager_init(gt_to_tile(gt), size, 0, sizeof(u32), 0);
+ sam = __xe_sa_bo_manager_init(gt_to_tile(gt), size, 0, sizeof(u32));
if (IS_ERR(sam))
return PTR_ERR(sam);
cache->sam = sam;
diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c
index f32045f40b7a..b356d4327c97 100644
--- a/drivers/gpu/drm/xe/xe_sa.c
+++ b/drivers/gpu/drm/xe/xe_sa.c
@@ -29,7 +29,6 @@ static void xe_sa_bo_manager_fini(struct drm_device *drm, void *arg)
kvfree(sa_manager->cpu_ptr);
sa_manager->bo = NULL;
- sa_manager->shadow = NULL;
}
/**
@@ -38,14 +37,12 @@ static void xe_sa_bo_manager_fini(struct drm_device *drm, void *arg)
* @size: number of bytes to allocate
* @guard: number of bytes to exclude from suballocations
* @align: alignment for each suballocated chunk
- * @flags: flags for suballocator
*
* Prepares the suballocation manager for suballocations.
*
* Return: a pointer to the &xe_sa_manager or an ERR_PTR on failure.
*/
-struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
- u32 guard, u32 align, u32 flags)
+struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 guard, u32 align)
{
struct xe_device *xe = tile_to_xe(tile);
struct xe_sa_manager *sa_manager;
@@ -82,32 +79,6 @@ struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
memset(sa_manager->cpu_ptr, 0, bo->ttm.base.size);
}
- if (flags & XE_SA_BO_MANAGER_FLAG_SHADOW) {
- struct xe_bo *shadow;
-
- ret = drmm_mutex_init(&xe->drm, &sa_manager->swap_guard);
- if (ret)
- return ERR_PTR(ret);
-
- if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {
- fs_reclaim_acquire(GFP_KERNEL);
- might_lock(&sa_manager->swap_guard);
- fs_reclaim_release(GFP_KERNEL);
- }
-
- shadow = xe_managed_bo_create_pin_map(xe, tile, size,
- XE_BO_FLAG_VRAM_IF_DGFX(tile) |
- XE_BO_FLAG_GGTT |
- XE_BO_FLAG_GGTT_INVALIDATE |
- XE_BO_FLAG_PINNED_NORESTORE);
- if (IS_ERR(shadow)) {
- drm_err(&xe->drm, "Failed to prepare %uKiB BO for SA manager (%pe)\n",
- size / SZ_1K, shadow);
- return ERR_CAST(shadow);
- }
- sa_manager->shadow = shadow;
- }
-
drm_suballoc_manager_init(&sa_manager->base, managed_size, align);
ret = drmm_add_action_or_reset(&xe->drm, xe_sa_bo_manager_fini,
sa_manager);
@@ -117,48 +88,6 @@ struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
return sa_manager;
}
-/**
- * xe_sa_bo_swap_shadow() - Swap the SA BO with shadow BO.
- * @sa_manager: the XE sub allocator manager
- *
- * Swaps the sub-allocator primary buffer object with shadow buffer object.
- *
- * Return: None.
- */
-void xe_sa_bo_swap_shadow(struct xe_sa_manager *sa_manager)
-{
- struct xe_device *xe = tile_to_xe(sa_manager->bo->tile);
-
- xe_assert(xe, sa_manager->shadow);
- lockdep_assert_held(&sa_manager->swap_guard);
-
- swap(sa_manager->bo, sa_manager->shadow);
- if (!sa_manager->bo->vmap.is_iomem)
- sa_manager->cpu_ptr = sa_manager->bo->vmap.vaddr;
-}
-
-/**
- * xe_sa_bo_sync_shadow() - Sync the SA Shadow BO with primary BO.
- * @sa_bo: the sub-allocator buffer object.
- *
- * Synchronize sub-allocator shadow buffer object with primary buffer object.
- *
- * Return: None.
- */
-void xe_sa_bo_sync_shadow(struct drm_suballoc *sa_bo)
-{
- struct xe_sa_manager *sa_manager = to_xe_sa_manager(sa_bo->manager);
- struct xe_device *xe = tile_to_xe(sa_manager->bo->tile);
-
- xe_assert(xe, sa_manager->shadow);
- lockdep_assert_held(&sa_manager->swap_guard);
-
- xe_map_memcpy_to(xe, &sa_manager->shadow->vmap,
- drm_suballoc_soffset(sa_bo),
- xe_sa_bo_cpu_addr(sa_bo),
- drm_suballoc_size(sa_bo));
-}
-
/**
* __xe_sa_bo_new() - Make a suballocation but use custom gfp flags.
* @sa_manager: the &xe_sa_manager
@@ -181,36 +110,6 @@ struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size,
return drm_suballoc_new(&sa_manager->base, size, gfp, true, 0);
}
-/**
- * xe_sa_bo_alloc() - Allocate uninitialized suballoc object.
- * @gfp: gfp flags used for memory allocation.
- *
- * Allocate memory for an uninitialized suballoc object. Intended usage is
- * allocate memory for suballoc object outside of a reclaim tainted context
- * and then be initialized at a later time in a reclaim tainted context.
- *
- * Return: a new uninitialized suballoc object, or an ERR_PTR(-ENOMEM).
- */
-struct drm_suballoc *xe_sa_bo_alloc(gfp_t gfp)
-{
- return drm_suballoc_alloc(gfp);
-}
-
-/**
- * xe_sa_bo_init() - Initialize a suballocation.
- * @sa_manager: pointer to the sa_manager
- * @sa: The struct drm_suballoc.
- * @size: number of bytes we want to suballocate.
- *
- * Try to make a suballocation on a pre-allocated suballoc object of size @size.
- *
- * Return: zero on success, errno on failure.
- */
-int xe_sa_bo_init(struct xe_sa_manager *sa_manager, struct drm_suballoc *sa, size_t size)
-{
- return drm_suballoc_insert(&sa_manager->base, sa, size, true, 0);
-}
-
/**
* xe_sa_bo_flush_write() - Copy the data from the sub-allocation to the GPU memory.
* @sa_bo: the &drm_suballoc to flush
diff --git a/drivers/gpu/drm/xe/xe_sa.h b/drivers/gpu/drm/xe/xe_sa.h
index 50218b0d1404..1be744350836 100644
--- a/drivers/gpu/drm/xe/xe_sa.h
+++ b/drivers/gpu/drm/xe/xe_sa.h
@@ -14,14 +14,12 @@
struct dma_fence;
struct xe_tile;
-#define XE_SA_BO_MANAGER_FLAG_SHADOW BIT(0)
-struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
- u32 guard, u32 align, u32 flags);
+struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 guard, u32 align);
struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size, gfp_t gfp);
static inline struct xe_sa_manager *xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 align)
{
- return __xe_sa_bo_manager_init(tile, size, SZ_4K, align, 0);
+ return __xe_sa_bo_manager_init(tile, size, SZ_4K, align);
}
/**
@@ -38,8 +36,6 @@ static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager *sa_manager
return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL);
}
-struct drm_suballoc *xe_sa_bo_alloc(gfp_t gfp);
-int xe_sa_bo_init(struct xe_sa_manager *sa_manager, struct drm_suballoc *sa, size_t size);
void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo);
void xe_sa_bo_sync_read(struct drm_suballoc *sa_bo);
void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence *fence);
@@ -73,18 +69,4 @@ static inline void *xe_sa_bo_cpu_addr(struct drm_suballoc *sa)
drm_suballoc_soffset(sa);
}
-void xe_sa_bo_swap_shadow(struct xe_sa_manager *sa_manager);
-void xe_sa_bo_sync_shadow(struct drm_suballoc *sa_bo);
-
-/**
- * xe_sa_bo_swap_guard() - Retrieve the SA BO swap guard within sub-allocator.
- * @sa_manager: the &xe_sa_manager
- *
- * Return: Sub alloctor swap guard mutex.
- */
-static inline struct mutex *xe_sa_bo_swap_guard(struct xe_sa_manager *sa_manager)
-{
- return &sa_manager->swap_guard;
-}
-
#endif
diff --git a/drivers/gpu/drm/xe/xe_sa_types.h b/drivers/gpu/drm/xe/xe_sa_types.h
index 1085c9c37d6b..cb7238799dcb 100644
--- a/drivers/gpu/drm/xe/xe_sa_types.h
+++ b/drivers/gpu/drm/xe/xe_sa_types.h
@@ -12,9 +12,6 @@ struct xe_bo;
struct xe_sa_manager {
struct drm_suballoc_manager base;
struct xe_bo *bo;
- struct xe_bo *shadow;
- /** @swap_guard: Timeline guard updating @bo and @shadow */
- struct mutex swap_guard;
void *cpu_ptr;
bool is_iomem;
};
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/6] drm/xe/sa: allow callers to specify interruptible suballocator waits
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
` (2 preceding siblings ...)
2026-10-30 11:49 ` [PATCH 3/6] drm/xe/sa: remove unused shadow BO and two-step bb helpers Matthew Auld
@ 2026-10-30 11:49 ` Matthew Auld
2026-10-30 15:25 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 5/6] drm/xe/migrate: plumb interruptible wait flag to clear and copy Matthew Auld
` (3 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe; +Cc: Thomas Hellström, Matthew Brost
__xe_sa_bo_new() currently hardcodes intr=true when calling
drm_suballoc_new(), making every suballocator wait interruptible even
when the caller cannot tolerate -ERESTARTSYS.
Plumb a bool intr parameter through __xe_sa_bo_new(), xe_sa_bo_new(),
and __xe_bb_new(), while defaulting xe_bb_new() to false for
kernel-internal callers.
Assisted-by: LLM
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_bb.c | 4 ++--
drivers/gpu/drm/xe/xe_bb.h | 9 ++++++++-
drivers/gpu/drm/xe/xe_guc_buf.c | 4 ++--
drivers/gpu/drm/xe/xe_page_reclaim.c | 2 +-
drivers/gpu/drm/xe/xe_sa.c | 6 ++++--
drivers/gpu/drm/xe/xe_sa.h | 9 ++++++---
6 files changed, 23 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
index 771e50e7c4e3..7f71233b1036 100644
--- a/drivers/gpu/drm/xe/xe_bb.c
+++ b/drivers/gpu/drm/xe/xe_bb.c
@@ -14,7 +14,7 @@
#include "xe_sched_job.h"
#include "xe_vm_types.h"
-struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
+struct xe_bb *__xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm, bool intr)
{
struct xe_tile *tile = gt_to_tile(gt);
struct xe_bb *bb = kmalloc_obj(*bb);
@@ -30,7 +30,7 @@ struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
* reserved by xe_sa_bo_manager_init().
*/
bb->bo = xe_sa_bo_new(!usm ? tile->mem.kernel_bb_pool : gt->usm.bb_pool,
- 4 * (dwords + 1));
+ 4 * (dwords + 1), intr);
if (IS_ERR(bb->bo)) {
err = PTR_ERR(bb->bo);
goto err;
diff --git a/drivers/gpu/drm/xe/xe_bb.h b/drivers/gpu/drm/xe/xe_bb.h
index b5cc65506696..6f685176d4e8 100644
--- a/drivers/gpu/drm/xe/xe_bb.h
+++ b/drivers/gpu/drm/xe/xe_bb.h
@@ -6,6 +6,8 @@
#ifndef _XE_BB_H_
#define _XE_BB_H_
+#include <linux/types.h>
+
#include "xe_bb_types.h"
struct dma_fence;
@@ -14,7 +16,12 @@ struct xe_gt;
struct xe_exec_queue;
struct xe_sched_job;
-struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm);
+struct xe_bb *__xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm, bool intr);
+
+static inline struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
+{
+ return __xe_bb_new(gt, dwords, usm, false);
+}
struct xe_sched_job *xe_bb_create_job(struct xe_exec_queue *q,
struct xe_bb *bb);
struct xe_sched_job *xe_bb_create_migration_job(struct xe_exec_queue *q,
diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c b/drivers/gpu/drm/xe/xe_guc_buf.c
index 7a8efb62df60..ec0b64a1d4c1 100644
--- a/drivers/gpu/drm/xe/xe_guc_buf.c
+++ b/drivers/gpu/drm/xe/xe_guc_buf.c
@@ -95,7 +95,7 @@ struct xe_guc_buf xe_guc_buf_reserve(struct xe_guc_buf_cache *cache, u32 dwords)
struct drm_suballoc *sa;
if (cache->sam)
- sa = __xe_sa_bo_new(cache->sam, dwords * sizeof(u32), GFP_ATOMIC);
+ sa = __xe_sa_bo_new(cache->sam, dwords * sizeof(u32), GFP_ATOMIC, false);
else
sa = ERR_PTR(-EOPNOTSUPP);
@@ -117,7 +117,7 @@ struct xe_guc_buf xe_guc_buf_from_data(struct xe_guc_buf_cache *cache,
{
struct drm_suballoc *sa;
- sa = __xe_sa_bo_new(cache->sam, size, GFP_ATOMIC);
+ sa = __xe_sa_bo_new(cache->sam, size, GFP_ATOMIC, false);
if (!IS_ERR(sa))
memcpy(xe_sa_bo_cpu_addr(sa), data, size);
diff --git a/drivers/gpu/drm/xe/xe_page_reclaim.c b/drivers/gpu/drm/xe/xe_page_reclaim.c
index da1ed99cd3f8..921f30ffb4cb 100644
--- a/drivers/gpu/drm/xe/xe_page_reclaim.c
+++ b/drivers/gpu/drm/xe/xe_page_reclaim.c
@@ -76,7 +76,7 @@ struct drm_suballoc *xe_page_reclaim_create_prl_bo(struct xe_tlb_inval *tlb_inva
/* Maximum size of PRL is 1 4K-page */
prl_sa = __xe_sa_bo_new(tile->mem.reclaim_pool,
- prl_size, GFP_ATOMIC);
+ prl_size, GFP_ATOMIC, false);
if (IS_ERR(prl_sa))
return prl_sa;
diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c
index b356d4327c97..d9da4276b5dd 100644
--- a/drivers/gpu/drm/xe/xe_sa.c
+++ b/drivers/gpu/drm/xe/xe_sa.c
@@ -93,12 +93,14 @@ struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u3
* @sa_manager: the &xe_sa_manager
* @size: number of bytes we want to suballocate
* @gfp: gfp flags used for memory allocation. Typically GFP_KERNEL.
+ * @intr: whether to wait interruptibly if space is not immediately available
*
* Try to make a suballocation of size @size.
*
* Return: a &drm_suballoc, or an ERR_PTR.
*/
-struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size, gfp_t gfp)
+struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size,
+ gfp_t gfp, bool intr)
{
/*
* BB to large, return -ENOBUFS indicating user should split
@@ -107,7 +109,7 @@ struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size,
if (size > sa_manager->base.size)
return ERR_PTR(-ENOBUFS);
- return drm_suballoc_new(&sa_manager->base, size, gfp, true, 0);
+ return drm_suballoc_new(&sa_manager->base, size, gfp, intr, 0);
}
/**
diff --git a/drivers/gpu/drm/xe/xe_sa.h b/drivers/gpu/drm/xe/xe_sa.h
index 1be744350836..bf81be165ea0 100644
--- a/drivers/gpu/drm/xe/xe_sa.h
+++ b/drivers/gpu/drm/xe/xe_sa.h
@@ -15,7 +15,8 @@ struct dma_fence;
struct xe_tile;
struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 guard, u32 align);
-struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size, gfp_t gfp);
+struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size,
+ gfp_t gfp, bool intr);
static inline struct xe_sa_manager *xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 align)
{
@@ -26,14 +27,16 @@ static inline struct xe_sa_manager *xe_sa_bo_manager_init(struct xe_tile *tile,
* xe_sa_bo_new() - Make a suballocation.
* @sa_manager: the &xe_sa_manager
* @size: number of bytes we want to suballocate
+ * @intr: whether to wait interruptibly if space is not immediately available
*
* Try to make a suballocation of size @size.
*
* Return: a &drm_suballoc, or an ERR_PTR.
*/
-static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size)
+static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager *sa_manager,
+ u32 size, bool intr)
{
- return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL);
+ return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL, intr);
}
void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo);
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/6] drm/xe/migrate: plumb interruptible wait flag to clear and copy
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
` (3 preceding siblings ...)
2026-10-30 11:49 ` [PATCH 4/6] drm/xe/sa: allow callers to specify interruptible suballocator waits Matthew Auld
@ 2026-10-30 11:49 ` Matthew Auld
2026-10-30 15:28 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 6/6] drm/xe/migrate: avoid interruptible waits once passes are in flight Matthew Auld
` (2 subsequent siblings)
7 siblings, 1 reply; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe; +Cc: Thomas Hellström, Matthew Brost
Plumb a bool intr parameter into xe_migrate_clear() and
xe_migrate_copy() and pass it to __xe_bb_new(), forwarding
ctx->interruptible from xe_bo_move() and false from non-interruptible
kernel callers so suballocator waits respect the caller's context.
Assisted-by: LLM
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/tests/xe_bo.c | 2 +-
drivers/gpu/drm/xe/tests/xe_migrate.c | 12 ++++++------
drivers/gpu/drm/xe/xe_bo.c | 9 +++++----
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 3 ++-
drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++-------
drivers/gpu/drm/xe/xe_migrate.h | 6 ++++--
drivers/gpu/drm/xe/xe_vram.c | 2 +-
7 files changed, 31 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
index 6a17e13d58cf..22a2e8f8143a 100644
--- a/drivers/gpu/drm/xe/tests/xe_bo.c
+++ b/drivers/gpu/drm/xe/tests/xe_bo.c
@@ -270,7 +270,7 @@ static int ccs_test_migrate(struct xe_tile *tile, struct xe_bo *bo,
/* Optionally clear bo *and* CCS data in VRAM. */
if (clear) {
fence = xe_migrate_clear(tile->migrate, bo, bo->ttm.resource,
- XE_MIGRATE_CLEAR_FLAG_FULL);
+ XE_MIGRATE_CLEAR_FLAG_FULL, false);
if (IS_ERR(fence)) {
KUNIT_FAIL(test, "Failed to submit bo clear.\n");
return PTR_ERR(fence);
diff --git a/drivers/gpu/drm/xe/tests/xe_migrate.c b/drivers/gpu/drm/xe/tests/xe_migrate.c
index a9ef8f2dcebb..162532412426 100644
--- a/drivers/gpu/drm/xe/tests/xe_migrate.c
+++ b/drivers/gpu/drm/xe/tests/xe_migrate.c
@@ -112,7 +112,7 @@ static void test_copy(struct xe_migrate *m, struct xe_bo *bo,
xe_map_memset(xe, &remote->vmap, 0, 0xd0, xe_bo_size(remote));
fence = xe_migrate_clear(m, remote, remote->ttm.resource,
- XE_MIGRATE_CLEAR_FLAG_FULL);
+ XE_MIGRATE_CLEAR_FLAG_FULL, false);
if (!sanity_fence_failed(xe, fence, big ? "Clearing remote big bo" :
"Clearing remote small bo", test)) {
retval = xe_map_rd(xe, &remote->vmap, 0, u64);
@@ -130,7 +130,7 @@ static void test_copy(struct xe_migrate *m, struct xe_bo *bo,
expected = 0xc0c0c0c0c0c0c0c0;
fence = xe_migrate_copy(m, remote, bo, remote->ttm.resource,
- bo->ttm.resource, false);
+ bo->ttm.resource, false, false);
if (!sanity_fence_failed(xe, fence, big ? "Copying big bo remote -> vram" :
"Copying small bo remote -> vram", test)) {
retval = xe_map_rd(xe, &bo->vmap, 0, u64);
@@ -147,7 +147,7 @@ static void test_copy(struct xe_migrate *m, struct xe_bo *bo,
xe_map_memset(xe, &bo->vmap, 0, 0xc0, xe_bo_size(bo));
fence = xe_migrate_copy(m, bo, remote, bo->ttm.resource,
- remote->ttm.resource, false);
+ remote->ttm.resource, false, false);
if (!sanity_fence_failed(xe, fence, big ? "Copying big bo vram -> remote" :
"Copying small bo vram -> remote", test)) {
retval = xe_map_rd(xe, &remote->vmap, 0, u64);
@@ -287,7 +287,7 @@ static void xe_migrate_sanity_test(struct xe_migrate *m, struct kunit *test,
xe_map_memset(xe, &tiny->vmap, 0, 0x22, xe_bo_size(tiny));
expected = 0;
fence = xe_migrate_clear(m, tiny, tiny->ttm.resource,
- XE_MIGRATE_CLEAR_FLAG_FULL);
+ XE_MIGRATE_CLEAR_FLAG_FULL, false);
if (sanity_fence_failed(xe, fence, "Clearing small bo", test))
goto out;
@@ -309,7 +309,7 @@ static void xe_migrate_sanity_test(struct xe_migrate *m, struct kunit *test,
xe_map_memset(xe, &big->vmap, 0, 0x11, xe_bo_size(big));
expected = 0;
fence = xe_migrate_clear(m, big, big->ttm.resource,
- XE_MIGRATE_CLEAR_FLAG_FULL);
+ XE_MIGRATE_CLEAR_FLAG_FULL, false);
if (sanity_fence_failed(xe, fence, "Clearing big bo", test))
goto out;
@@ -611,7 +611,7 @@ static void test_clear(struct xe_device *xe, struct xe_tile *tile,
kunit_info(test, "Clear vram buffer object\n");
expected = 0x0000000000000000;
fence = xe_migrate_clear(tile->migrate, vram_bo, vram_bo->ttm.resource,
- XE_MIGRATE_CLEAR_FLAG_FULL);
+ XE_MIGRATE_CLEAR_FLAG_FULL, false);
if (sanity_fence_failed(xe, fence, "Clear vram_bo", test))
return;
dma_fence_put(fence);
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 42a6aa1a2e4a..e01143c0ccd7 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1298,10 +1298,11 @@ static int xe_bo_move(struct ttm_buffer_object *ttm_bo, bool evict,
else if (handle_system_ccs)
flags |= XE_MIGRATE_CLEAR_FLAG_CCS_DATA;
- fence = xe_migrate_clear(migrate, bo, new_mem, flags);
+ fence = xe_migrate_clear(migrate, bo, new_mem, flags,
+ ctx->interruptible);
} else {
fence = xe_migrate_copy(migrate, bo, bo, old_mem, new_mem,
- handle_system_ccs);
+ handle_system_ccs, ctx->interruptible);
}
if (IS_ERR(fence)) {
ret = PTR_ERR(fence);
@@ -1594,7 +1595,7 @@ static int xe_bo_evict_pinned_copy(struct xe_bo *bo, struct xe_bo *backup)
goto out_backup;
fence = xe_migrate_copy(migrate, bo, backup, bo->ttm.resource,
- backup->ttm.resource, false);
+ backup->ttm.resource, false, false);
if (IS_ERR(fence)) {
ret = PTR_ERR(fence);
goto out_backup;
@@ -1744,7 +1745,7 @@ int xe_bo_restore_pinned(struct xe_bo *bo)
fence = xe_migrate_copy(migrate, backup, bo,
backup->ttm.resource, bo->ttm.resource,
- false);
+ false, ctx.interruptible);
if (IS_ERR(fence)) {
ret = PTR_ERR(fence);
goto out_unlock_bo;
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index 0a47458e5bf2..c410a8e86cd9 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -3019,7 +3019,8 @@ static int pf_sanitize_lmem(struct xe_tile *tile, struct xe_bo *bo, long timeout
return 0;
xe_bo_lock(bo, false);
- fence = xe_migrate_clear(m, bo, bo->ttm.resource, XE_MIGRATE_CLEAR_FLAG_FULL);
+ fence = xe_migrate_clear(m, bo, bo->ttm.resource,
+ XE_MIGRATE_CLEAR_FLAG_FULL, false);
if (IS_ERR(fence)) {
err = PTR_ERR(fence);
} else if (!fence) {
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 1a216fb12d2b..dd326bcd12b1 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1213,7 +1213,8 @@ static struct dma_fence *__xe_migrate_copy(struct xe_migrate *m,
struct ttm_resource *src,
struct ttm_resource *dst,
bool copy_only_ccs,
- bool is_vram_resolve)
+ bool is_vram_resolve,
+ bool intr)
{
struct xe_gt *gt = m->tile->primary_gt;
struct xe_device *xe = gt_to_xe(gt);
@@ -1315,7 +1316,7 @@ static struct dma_fence *__xe_migrate_copy(struct xe_migrate *m,
batch_size += ((copy_only_ccs) ? 0 : emit_copy_cmd_len(xe)) +
((needs_ccs_emit ? EMIT_COPY_CCS_DW : 0));
- bb = xe_bb_new(gt, batch_size, usm);
+ bb = __xe_bb_new(gt, batch_size, usm, intr);
if (IS_ERR(bb)) {
err = PTR_ERR(bb);
goto err_sync;
@@ -1409,6 +1410,7 @@ static struct dma_fence *__xe_migrate_copy(struct xe_migrate *m,
* @src: The source TTM resource.
* @dst: The dst TTM resource.
* @copy_only_ccs: If true copy only CCS metadata
+ * @intr: Whether to perform any wait interruptibly
*
* Copies the contents of @src to @dst: On flat CCS devices,
* the CCS metadata is copied as well if needed, or if not present,
@@ -1423,9 +1425,10 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
struct xe_bo *dst_bo,
struct ttm_resource *src,
struct ttm_resource *dst,
- bool copy_only_ccs)
+ bool copy_only_ccs,
+ bool intr)
{
- return __xe_migrate_copy(m, src_bo, dst_bo, src, dst, copy_only_ccs, false);
+ return __xe_migrate_copy(m, src_bo, dst_bo, src, dst, copy_only_ccs, false, intr);
}
/**
@@ -1443,7 +1446,7 @@ struct dma_fence *xe_migrate_resolve(struct xe_migrate *m,
struct xe_bo *bo,
struct ttm_resource *res)
{
- return __xe_migrate_copy(m, bo, bo, res, res, false, true);
+ return __xe_migrate_copy(m, bo, bo, res, res, false, true, true);
}
/**
@@ -1913,6 +1916,7 @@ static void emit_clear(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
* @bo: The buffer object @dst is currently bound to.
* @dst: The dst TTM resource to be cleared.
* @clear_flags: flags to specify which data to clear: CCS, BO, or both.
+ * @intr: Whether to perform any wait interruptibly.
*
* Clear the contents of @dst to zero when XE_MIGRATE_CLEAR_FLAG_BO_DATA is set.
* On flat CCS devices, the CCS metadata is cleared to zero with XE_MIGRATE_CLEAR_FLAG_CCS_DATA.
@@ -1926,7 +1930,8 @@ static void emit_clear(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
struct xe_bo *bo,
struct ttm_resource *dst,
- u32 clear_flags)
+ u32 clear_flags,
+ bool intr)
{
bool clear_vram = mem_type_is_vram(dst->mem_type);
bool clear_bo_data = XE_MIGRATE_CLEAR_FLAG_BO_DATA & clear_flags;
@@ -1987,7 +1992,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
if (WARN_ON_ONCE(!clear_L0))
break;
- bb = xe_bb_new(gt, batch_size, usm);
+ bb = __xe_bb_new(gt, batch_size, usm, intr);
if (IS_ERR(bb)) {
err = PTR_ERR(bb);
goto err_sync;
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 2e8be10fdb71..30fb236ea520 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -54,7 +54,8 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
struct xe_bo *dst_bo,
struct ttm_resource *src,
struct ttm_resource *dst,
- bool copy_only_ccs);
+ bool copy_only_ccs,
+ bool intr);
struct dma_fence *xe_migrate_resolve(struct xe_migrate *m,
struct xe_bo *bo,
@@ -85,7 +86,8 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
struct xe_bo *bo,
struct ttm_resource *dst,
- u32 clear_flags);
+ u32 clear_flags,
+ bool intr);
struct xe_vm *xe_migrate_get_vm(struct xe_migrate *m);
diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
index 1c02889ba29b..946970236208 100644
--- a/drivers/gpu/drm/xe/xe_vram.c
+++ b/drivers/gpu/drm/xe/xe_vram.c
@@ -526,7 +526,7 @@ int xe_vram_memtest(struct xe_device *xe)
xe_bo_lock(last_page_bo, false);
fence = xe_migrate_clear(tile->migrate, last_page_bo,
last_page_bo->ttm.resource,
- XE_MIGRATE_CLEAR_FLAG_BO_DATA);
+ XE_MIGRATE_CLEAR_FLAG_BO_DATA, false);
xe_bo_unlock(last_page_bo);
if (!IS_ERR(fence)) {
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/6] drm/xe/migrate: avoid interruptible waits once passes are in flight
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
` (4 preceding siblings ...)
2026-10-30 11:49 ` [PATCH 5/6] drm/xe/migrate: plumb interruptible wait flag to clear and copy Matthew Auld
@ 2026-10-30 11:49 ` Matthew Auld
2026-10-30 15:32 ` Thomas Hellström
2026-10-30 12:33 ` ✓ CI.KUnit: success for Interruptible bb wait + related bits Patchwork
2026-10-30 13:16 ` ✓ Xe.CI.BAT: " Patchwork
7 siblings, 1 reply; 15+ messages in thread
From: Matthew Auld @ 2026-10-30 11:49 UTC (permalink / raw)
To: intel-xe; +Cc: Thomas Hellström, Matthew Brost
Once at least one pass has been submitted in xe_migrate_clear() or
__xe_migrate_copy() (fence != NULL), aborting a later pass with
-ERESTARTSYS when the bb pool is full still has to wait uninterruptibly
in err_sync for all in-flight passes to complete, only to discard that
work and restart the entire transfer from scratch.
Only wait interruptibly on the first pass (!fence && intr).
Assisted-by: LLM
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index dd326bcd12b1..881ff933c736 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1316,7 +1316,7 @@ static struct dma_fence *__xe_migrate_copy(struct xe_migrate *m,
batch_size += ((copy_only_ccs) ? 0 : emit_copy_cmd_len(xe)) +
((needs_ccs_emit ? EMIT_COPY_CCS_DW : 0));
- bb = __xe_bb_new(gt, batch_size, usm, intr);
+ bb = __xe_bb_new(gt, batch_size, usm, !fence && intr);
if (IS_ERR(bb)) {
err = PTR_ERR(bb);
goto err_sync;
@@ -1992,7 +1992,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
if (WARN_ON_ONCE(!clear_L0))
break;
- bb = __xe_bb_new(gt, batch_size, usm, intr);
+ bb = __xe_bb_new(gt, batch_size, usm, !fence && intr);
if (IS_ERR(bb)) {
err = PTR_ERR(bb);
goto err_sync;
--
2.56.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for Interruptible bb wait + related bits
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
` (5 preceding siblings ...)
2026-10-30 11:49 ` [PATCH 6/6] drm/xe/migrate: avoid interruptible waits once passes are in flight Matthew Auld
@ 2026-10-30 12:33 ` Patchwork
2026-10-30 13:16 ` ✓ Xe.CI.BAT: " Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-10-30 12:33 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
== Series Details ==
Series: Interruptible bb wait + related bits
URL : https://patchwork.freedesktop.org/series/177249/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[12:31:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:31:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:31:46] Starting KUnit Kernel (1/1)...
[12:31:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:31:46] ================= gpu_buddy (14 subtests) ==================
[12:31:46] [PASSED] gpu_test_buddy_alloc_limit
[12:31:46] [PASSED] gpu_test_buddy_alloc_optimistic
[12:31:46] [PASSED] gpu_test_buddy_alloc_pessimistic
[12:31:46] [PASSED] gpu_test_buddy_alloc_pathological
[12:31:46] [PASSED] gpu_test_buddy_alloc_contiguous
[12:31:46] [PASSED] gpu_test_buddy_alloc_clear
[12:31:46] [PASSED] gpu_test_buddy_alloc_range
[12:31:46] [PASSED] gpu_test_buddy_alloc_range_bias
[12:31:47] [PASSED] gpu_test_buddy_fragmentation_performance
[12:31:48] [PASSED] gpu_test_buddy_dirty_tracker_performance
[12:31:48] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[12:31:48] [PASSED] gpu_test_buddy_offset_aligned_allocation
[12:31:48] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[12:31:48] [PASSED] gpu_test_buddy_addr_to_block
[12:31:48] ==================== [PASSED] gpu_buddy ====================
[12:31:48] ============================================================
[12:31:48] Testing complete. Ran 14 tests: passed: 14
[12:31:48] Elapsed time: 26.713s total, 4.439s configuring, 20.407s building, 1.816s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:31:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:31:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:32:29] Starting KUnit Kernel (1/1)...
[12:32:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:32:29] ================== guc_buf (11 subtests) ===================
[12:32:29] [PASSED] test_smallest
[12:32:29] [PASSED] test_largest
[12:32:29] [PASSED] test_granular
[12:32:29] [PASSED] test_unique
[12:32:29] [PASSED] test_overlap
[12:32:29] [PASSED] test_reusable
[12:32:29] [PASSED] test_too_big
[12:32:29] [PASSED] test_flush
[12:32:29] [PASSED] test_lookup
[12:32:29] [PASSED] test_data
[12:32:29] [PASSED] test_class
[12:32:29] ===================== [PASSED] guc_buf =====================
[12:32:29] =================== guc_dbm (7 subtests) ===================
[12:32:29] [PASSED] test_empty
[12:32:29] [PASSED] test_default
[12:32:29] ======================== test_size ========================
[12:32:29] [PASSED] 4
[12:32:29] [PASSED] 8
[12:32:29] [PASSED] 32
[12:32:29] [PASSED] 256
[12:32:29] ==================== [PASSED] test_size ====================
[12:32:29] ======================= test_reuse ========================
[12:32:29] [PASSED] 4
[12:32:29] [PASSED] 8
[12:32:29] [PASSED] 32
[12:32:29] [PASSED] 256
[12:32:29] =================== [PASSED] test_reuse ====================
[12:32:29] =================== test_range_overlap ====================
[12:32:29] [PASSED] 4
[12:32:29] [PASSED] 8
[12:32:29] [PASSED] 32
[12:32:29] [PASSED] 256
[12:32:29] =============== [PASSED] test_range_overlap ================
[12:32:29] =================== test_range_compact ====================
[12:32:29] [PASSED] 4
[12:32:29] [PASSED] 8
[12:32:29] [PASSED] 32
[12:32:29] [PASSED] 256
[12:32:29] =============== [PASSED] test_range_compact ================
[12:32:29] ==================== test_range_spare =====================
[12:32:29] [PASSED] 4
[12:32:29] [PASSED] 8
[12:32:29] [PASSED] 32
[12:32:29] [PASSED] 256
[12:32:29] ================ [PASSED] test_range_spare =================
[12:32:29] ===================== [PASSED] guc_dbm =====================
[12:32:29] ================== guc_idm (22 subtests) ===================
[12:32:29] [PASSED] bad_init
[12:32:29] [PASSED] no_init
[12:32:29] [PASSED] init_fini
[12:32:29] [PASSED] check_init_small
[12:32:29] [PASSED] check_init_shared
[12:32:29] [PASSED] check_used
[12:32:29] [PASSED] check_quota
[12:32:29] [PASSED] check_all
[12:32:29] [PASSED] check_limits
[12:32:29] [PASSED] check_overlap
[12:32:29] [PASSED] check_overlap_alloc
[12:32:29] [PASSED] check_overlap_release
[12:32:29] [PASSED] check_overlap_partial_init
[12:32:29] [PASSED] check_overlap_partial_shared_range_blocking
[12:32:29] [PASSED] check_used_usable
[12:32:29] [PASSED] check_used_shareable
[12:32:29] [PASSED] check_used_mixed
[12:32:29] [PASSED] check_release_usable_range
[12:32:29] [PASSED] check_release_shareable_range
[12:32:29] [PASSED] check_split_boundaries
[12:32:29] [PASSED] check_shareable_spare
[12:32:29] [PASSED] check_shareable_spare_fragmented_tail
[12:32:29] ===================== [PASSED] guc_idm =====================
[12:32:29] ============== guc_klv_helpers (13 subtests) ===============
[12:32:29] [PASSED] test_count
[12:32:29] [PASSED] test_encode_u32
[12:32:29] [PASSED] test_encode_u64
[12:32:29] [PASSED] test_encode_string
[12:32:29] [PASSED] test_encode_object_raw
[12:32:29] [PASSED] test_encode_object_klv
[12:32:29] [PASSED] test_encode_object_nested
[12:32:29] [PASSED] test_encode_object_basic
[12:32:29] ===================== test_decode_u16 =====================
[12:32:29] [PASSED] empty
[12:32:29] [PASSED] valid
[12:32:29] [PASSED] max
[12:32:29] [PASSED] big
[12:32:29] [PASSED] long
[12:32:29] ================= [PASSED] test_decode_u16 =================
[12:32:29] ===================== test_decode_u32 =====================
[12:32:29] [PASSED] empty
[12:32:29] [PASSED] valid
[12:32:29] [PASSED] max
[12:32:29] [PASSED] long
[12:32:29] ================= [PASSED] test_decode_u32 =================
[12:32:29] ===================== test_decode_u64 =====================
[12:32:29] [PASSED] empty
[12:32:29] [PASSED] short
[12:32:29] [PASSED] valid
[12:32:29] [PASSED] max
[12:32:29] [PASSED] long
[12:32:29] ================= [PASSED] test_decode_u64 =================
[12:32:29] ===================== test_decode_str =====================
[12:32:29] [PASSED] empty
[12:32:29] [PASSED] one
[12:32:29] [PASSED] one_trash
[12:32:29] [PASSED] two
[12:32:29] [PASSED] two_trash
[12:32:29] [PASSED] three
[12:32:29] [PASSED] dword
[12:32:29] [PASSED] four
[12:32:29] [PASSED] five
[12:32:29] [PASSED] six
[12:32:29] [PASSED] seven
[12:32:29] [PASSED] qword
[12:32:29] ================= [PASSED] test_decode_str =================
[12:32:29] [PASSED] test_print
[12:32:29] ================= [PASSED] guc_klv_helpers =================
[12:32:29] =================== xe_log (4 subtests) ====================
[12:32:29] [PASSED] demo_cper
[12:32:29] [PASSED] demo_dmesg
[12:32:29] ======================= test_dmesg ========================
[12:32:29] [PASSED] test_fatal
[12:32:29] [PASSED] test_fatal_tile
[12:32:29] [PASSED] test_fatal_gt
[12:32:29] [PASSED] test_fatal_comp
[12:32:29] [PASSED] test_fatal_comp_tile
[12:32:29] [PASSED] test_fatal_comp_gt
[12:32:29] [PASSED] test_fatal_all
[12:32:29] [PASSED] test_recoverable
[12:32:29] [PASSED] test_recoverable_tile
[12:32:29] [PASSED] test_recoverable_gt
[12:32:29] [PASSED] test_recoverable_comp
[12:32:29] [PASSED] test_recoverable_comp_tile
[12:32:29] [PASSED] test_recoverable_comp_gt
[12:32:29] [PASSED] test_recoverable_all
[12:32:29] [PASSED] test_info
[12:32:29] [PASSED] test_info_tile
[12:32:29] [PASSED] test_info_gt
[12:32:29] [PASSED] test_info_err
[12:32:29] [PASSED] test_info_comp
[12:32:29] [PASSED] test_info_comp_tile
[12:32:29] [PASSED] test_info_comp_gt
[12:32:29] [PASSED] test_info_all
[12:32:29] [PASSED] test_hw_fatal
[12:32:29] [PASSED] test_hw_recoverable
[12:32:29] [PASSED] test_hw_corrected
[12:32:29] [PASSED] test_hw_informational
[12:32:29] =================== [PASSED] test_dmesg ====================
[12:32:29] ====================== test_invalid =======================
[12:32:29] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[12:32:29] ================== [SKIPPED] test_invalid ==================
[12:32:29] ===================== [PASSED] xe_log ======================
[12:32:29] ================== no_relay (3 subtests) ===================
[12:32:29] [PASSED] xe_drops_guc2pf_if_not_ready
[12:32:29] [PASSED] xe_drops_guc2vf_if_not_ready
[12:32:29] [PASSED] xe_rejects_send_if_not_ready
[12:32:29] ==================== [PASSED] no_relay =====================
[12:32:29] ================== pf_relay (14 subtests) ==================
[12:32:29] [PASSED] pf_rejects_guc2pf_too_short
[12:32:29] [PASSED] pf_rejects_guc2pf_too_long
[12:32:29] [PASSED] pf_rejects_guc2pf_no_payload
[12:32:29] [PASSED] pf_fails_no_payload
[12:32:29] [PASSED] pf_fails_bad_origin
[12:32:29] [PASSED] pf_fails_bad_type
[12:32:29] [PASSED] pf_txn_reports_error
[12:32:29] [PASSED] pf_txn_sends_pf2guc
[12:32:29] [PASSED] pf_sends_pf2guc
[12:32:29] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:32:29] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:32:29] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:32:29] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:32:29] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:32:29] ==================== [PASSED] pf_relay =====================
[12:32:29] ================== vf_relay (3 subtests) ===================
[12:32:29] [PASSED] vf_rejects_guc2vf_too_short
[12:32:29] [PASSED] vf_rejects_guc2vf_too_long
[12:32:29] [PASSED] vf_rejects_guc2vf_no_payload
[12:32:29] ==================== [PASSED] vf_relay =====================
[12:32:29] ================ pf_gt_config (9 subtests) =================
[12:32:29] [PASSED] fair_contexts_1vf
[12:32:29] [PASSED] fair_doorbells_1vf
[12:32:29] [PASSED] fair_ggtt_1vf
[12:32:29] ====================== fair_vram_1vf ======================
[12:32:29] [PASSED] 3.50 GiB
[12:32:29] [PASSED] 11.5 GiB
[12:32:29] [PASSED] 15.5 GiB
[12:32:29] [PASSED] 31.5 GiB
[12:32:29] [PASSED] 63.5 GiB
[12:32:29] [PASSED] 1.91 GiB
[12:32:29] ================== [PASSED] fair_vram_1vf ==================
[12:32:29] ================ fair_vram_1vf_admin_only =================
[12:32:29] [PASSED] 3.50 GiB
[12:32:29] [PASSED] 11.5 GiB
[12:32:29] [PASSED] 15.5 GiB
[12:32:29] [PASSED] 31.5 GiB
[12:32:29] [PASSED] 63.5 GiB
[12:32:29] [PASSED] 1.91 GiB
[12:32:29] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:32:29] ====================== fair_contexts ======================
[12:32:29] [PASSED] 1 VF
[12:32:29] [PASSED] 2 VFs
[12:32:29] [PASSED] 3 VFs
[12:32:29] [PASSED] 4 VFs
[12:32:29] [PASSED] 5 VFs
[12:32:29] [PASSED] 6 VFs
[12:32:29] [PASSED] 7 VFs
[12:32:29] [PASSED] 8 VFs
[12:32:29] [PASSED] 9 VFs
[12:32:29] [PASSED] 10 VFs
[12:32:29] [PASSED] 11 VFs
[12:32:29] [PASSED] 12 VFs
[12:32:29] [PASSED] 13 VFs
[12:32:29] [PASSED] 14 VFs
[12:32:29] [PASSED] 15 VFs
[12:32:29] [PASSED] 16 VFs
[12:32:29] [PASSED] 17 VFs
[12:32:29] [PASSED] 18 VFs
[12:32:29] [PASSED] 19 VFs
[12:32:29] [PASSED] 20 VFs
[12:32:29] [PASSED] 21 VFs
[12:32:29] [PASSED] 22 VFs
[12:32:29] [PASSED] 23 VFs
[12:32:29] [PASSED] 24 VFs
[12:32:29] [PASSED] 25 VFs
[12:32:29] [PASSED] 26 VFs
[12:32:29] [PASSED] 27 VFs
[12:32:29] [PASSED] 28 VFs
[12:32:29] [PASSED] 29 VFs
[12:32:29] [PASSED] 30 VFs
[12:32:29] [PASSED] 31 VFs
[12:32:29] [PASSED] 32 VFs
[12:32:29] [PASSED] 33 VFs
[12:32:29] [PASSED] 34 VFs
[12:32:29] [PASSED] 35 VFs
[12:32:29] [PASSED] 36 VFs
[12:32:29] [PASSED] 37 VFs
[12:32:29] [PASSED] 38 VFs
[12:32:29] [PASSED] 39 VFs
[12:32:29] [PASSED] 40 VFs
[12:32:29] [PASSED] 41 VFs
[12:32:29] [PASSED] 42 VFs
[12:32:29] [PASSED] 43 VFs
[12:32:29] [PASSED] 44 VFs
[12:32:29] [PASSED] 45 VFs
[12:32:29] [PASSED] 46 VFs
[12:32:29] [PASSED] 47 VFs
[12:32:29] [PASSED] 48 VFs
[12:32:29] [PASSED] 49 VFs
[12:32:29] [PASSED] 50 VFs
[12:32:29] [PASSED] 51 VFs
[12:32:29] [PASSED] 52 VFs
[12:32:29] [PASSED] 53 VFs
[12:32:29] [PASSED] 54 VFs
[12:32:29] [PASSED] 55 VFs
[12:32:29] [PASSED] 56 VFs
[12:32:29] [PASSED] 57 VFs
[12:32:29] [PASSED] 58 VFs
[12:32:29] [PASSED] 59 VFs
[12:32:29] [PASSED] 60 VFs
[12:32:29] [PASSED] 61 VFs
[12:32:29] [PASSED] 62 VFs
[12:32:29] [PASSED] 63 VFs
[12:32:29] ================== [PASSED] fair_contexts ==================
[12:32:29] ===================== fair_doorbells ======================
[12:32:29] [PASSED] 1 VF
[12:32:29] [PASSED] 2 VFs
[12:32:29] [PASSED] 3 VFs
[12:32:29] [PASSED] 4 VFs
[12:32:29] [PASSED] 5 VFs
[12:32:29] [PASSED] 6 VFs
[12:32:29] [PASSED] 7 VFs
[12:32:29] [PASSED] 8 VFs
[12:32:29] [PASSED] 9 VFs
[12:32:29] [PASSED] 10 VFs
[12:32:29] [PASSED] 11 VFs
[12:32:29] [PASSED] 12 VFs
[12:32:29] [PASSED] 13 VFs
[12:32:29] [PASSED] 14 VFs
[12:32:29] [PASSED] 15 VFs
[12:32:29] [PASSED] 16 VFs
[12:32:29] [PASSED] 17 VFs
[12:32:29] [PASSED] 18 VFs
[12:32:29] [PASSED] 19 VFs
[12:32:29] [PASSED] 20 VFs
[12:32:29] [PASSED] 21 VFs
[12:32:29] [PASSED] 22 VFs
[12:32:29] [PASSED] 23 VFs
[12:32:29] [PASSED] 24 VFs
[12:32:29] [PASSED] 25 VFs
[12:32:29] [PASSED] 26 VFs
[12:32:29] [PASSED] 27 VFs
[12:32:30] [PASSED] 28 VFs
[12:32:30] [PASSED] 29 VFs
[12:32:30] [PASSED] 30 VFs
[12:32:30] [PASSED] 31 VFs
[12:32:30] [PASSED] 32 VFs
[12:32:30] [PASSED] 33 VFs
[12:32:30] [PASSED] 34 VFs
[12:32:30] [PASSED] 35 VFs
[12:32:30] [PASSED] 36 VFs
[12:32:30] [PASSED] 37 VFs
[12:32:30] [PASSED] 38 VFs
[12:32:30] [PASSED] 39 VFs
[12:32:30] [PASSED] 40 VFs
[12:32:30] [PASSED] 41 VFs
[12:32:30] [PASSED] 42 VFs
[12:32:30] [PASSED] 43 VFs
[12:32:30] [PASSED] 44 VFs
[12:32:30] [PASSED] 45 VFs
[12:32:30] [PASSED] 46 VFs
[12:32:30] [PASSED] 47 VFs
[12:32:30] [PASSED] 48 VFs
[12:32:30] [PASSED] 49 VFs
[12:32:30] [PASSED] 50 VFs
[12:32:30] [PASSED] 51 VFs
[12:32:30] [PASSED] 52 VFs
[12:32:30] [PASSED] 53 VFs
[12:32:30] [PASSED] 54 VFs
[12:32:30] [PASSED] 55 VFs
[12:32:30] [PASSED] 56 VFs
[12:32:30] [PASSED] 57 VFs
[12:32:30] [PASSED] 58 VFs
[12:32:30] [PASSED] 59 VFs
[12:32:30] [PASSED] 60 VFs
[12:32:30] [PASSED] 61 VFs
[12:32:30] [PASSED] 62 VFs
[12:32:30] [PASSED] 63 VFs
[12:32:30] ================= [PASSED] fair_doorbells ==================
[12:32:30] ======================== fair_ggtt ========================
[12:32:30] [PASSED] 1 VF
[12:32:30] [PASSED] 2 VFs
[12:32:30] [PASSED] 3 VFs
[12:32:30] [PASSED] 4 VFs
[12:32:30] [PASSED] 5 VFs
[12:32:30] [PASSED] 6 VFs
[12:32:30] [PASSED] 7 VFs
[12:32:30] [PASSED] 8 VFs
[12:32:30] [PASSED] 9 VFs
[12:32:30] [PASSED] 10 VFs
[12:32:30] [PASSED] 11 VFs
[12:32:30] [PASSED] 12 VFs
[12:32:30] [PASSED] 13 VFs
[12:32:30] [PASSED] 14 VFs
[12:32:30] [PASSED] 15 VFs
[12:32:30] [PASSED] 16 VFs
[12:32:30] [PASSED] 17 VFs
[12:32:30] [PASSED] 18 VFs
[12:32:30] [PASSED] 19 VFs
[12:32:30] [PASSED] 20 VFs
[12:32:30] [PASSED] 21 VFs
[12:32:30] [PASSED] 22 VFs
[12:32:30] [PASSED] 23 VFs
[12:32:30] [PASSED] 24 VFs
[12:32:30] [PASSED] 25 VFs
[12:32:30] [PASSED] 26 VFs
[12:32:30] [PASSED] 27 VFs
[12:32:30] [PASSED] 28 VFs
[12:32:30] [PASSED] 29 VFs
[12:32:30] [PASSED] 30 VFs
[12:32:30] [PASSED] 31 VFs
[12:32:30] [PASSED] 32 VFs
[12:32:30] [PASSED] 33 VFs
[12:32:30] [PASSED] 34 VFs
[12:32:30] [PASSED] 35 VFs
[12:32:30] [PASSED] 36 VFs
[12:32:30] [PASSED] 37 VFs
[12:32:30] [PASSED] 38 VFs
[12:32:30] [PASSED] 39 VFs
[12:32:30] [PASSED] 40 VFs
[12:32:30] [PASSED] 41 VFs
[12:32:30] [PASSED] 42 VFs
[12:32:30] [PASSED] 43 VFs
[12:32:30] [PASSED] 44 VFs
[12:32:30] [PASSED] 45 VFs
[12:32:30] [PASSED] 46 VFs
[12:32:30] [PASSED] 47 VFs
[12:32:30] [PASSED] 48 VFs
[12:32:30] [PASSED] 49 VFs
[12:32:30] [PASSED] 50 VFs
[12:32:30] [PASSED] 51 VFs
[12:32:30] [PASSED] 52 VFs
[12:32:30] [PASSED] 53 VFs
[12:32:30] [PASSED] 54 VFs
[12:32:30] [PASSED] 55 VFs
[12:32:30] [PASSED] 56 VFs
[12:32:30] [PASSED] 57 VFs
[12:32:30] [PASSED] 58 VFs
[12:32:30] [PASSED] 59 VFs
[12:32:30] [PASSED] 60 VFs
[12:32:30] [PASSED] 61 VFs
[12:32:30] [PASSED] 62 VFs
[12:32:30] [PASSED] 63 VFs
[12:32:30] ==================== [PASSED] fair_ggtt ====================
[12:32:30] ======================== fair_vram ========================
[12:32:30] [PASSED] 1 VF
[12:32:30] [PASSED] 2 VFs
[12:32:30] [PASSED] 3 VFs
[12:32:30] [PASSED] 4 VFs
[12:32:30] [PASSED] 5 VFs
[12:32:30] [PASSED] 6 VFs
[12:32:30] [PASSED] 7 VFs
[12:32:30] [PASSED] 8 VFs
[12:32:30] [PASSED] 9 VFs
[12:32:30] [PASSED] 10 VFs
[12:32:30] [PASSED] 11 VFs
[12:32:30] [PASSED] 12 VFs
[12:32:30] [PASSED] 13 VFs
[12:32:30] [PASSED] 14 VFs
[12:32:30] [PASSED] 15 VFs
[12:32:30] [PASSED] 16 VFs
[12:32:30] [PASSED] 17 VFs
[12:32:30] [PASSED] 18 VFs
[12:32:30] [PASSED] 19 VFs
[12:32:30] [PASSED] 20 VFs
[12:32:30] [PASSED] 21 VFs
[12:32:30] [PASSED] 22 VFs
[12:32:30] [PASSED] 23 VFs
[12:32:30] [PASSED] 24 VFs
[12:32:30] [PASSED] 25 VFs
[12:32:30] [PASSED] 26 VFs
[12:32:30] [PASSED] 27 VFs
[12:32:30] [PASSED] 28 VFs
[12:32:30] [PASSED] 29 VFs
[12:32:30] [PASSED] 30 VFs
[12:32:30] [PASSED] 31 VFs
[12:32:30] [PASSED] 32 VFs
[12:32:30] [PASSED] 33 VFs
[12:32:30] [PASSED] 34 VFs
[12:32:30] [PASSED] 35 VFs
[12:32:30] [PASSED] 36 VFs
[12:32:30] [PASSED] 37 VFs
[12:32:30] [PASSED] 38 VFs
[12:32:30] [PASSED] 39 VFs
[12:32:30] [PASSED] 40 VFs
[12:32:30] [PASSED] 41 VFs
[12:32:30] [PASSED] 42 VFs
[12:32:30] [PASSED] 43 VFs
[12:32:30] [PASSED] 44 VFs
[12:32:30] [PASSED] 45 VFs
[12:32:30] [PASSED] 46 VFs
[12:32:30] [PASSED] 47 VFs
[12:32:30] [PASSED] 48 VFs
[12:32:30] [PASSED] 49 VFs
[12:32:30] [PASSED] 50 VFs
[12:32:30] [PASSED] 51 VFs
[12:32:30] [PASSED] 52 VFs
[12:32:30] [PASSED] 53 VFs
[12:32:30] [PASSED] 54 VFs
[12:32:30] [PASSED] 55 VFs
[12:32:30] [PASSED] 56 VFs
[12:32:30] [PASSED] 57 VFs
[12:32:30] [PASSED] 58 VFs
[12:32:30] [PASSED] 59 VFs
[12:32:30] [PASSED] 60 VFs
[12:32:30] [PASSED] 61 VFs
[12:32:30] [PASSED] 62 VFs
[12:32:30] [PASSED] 63 VFs
[12:32:30] ==================== [PASSED] fair_vram ====================
[12:32:30] ================== [PASSED] pf_gt_config ===================
[12:32:30] ===================== lmtt (1 subtest) =====================
[12:32:30] ======================== test_ops =========================
[12:32:30] [PASSED] 2-level
[12:32:30] [PASSED] multi-level
[12:32:30] ==================== [PASSED] test_ops =====================
[12:32:30] ====================== [PASSED] lmtt =======================
[12:32:30] ================= sriov_packet (1 subtest) =================
[12:32:30] [PASSED] test_descriptor_init
[12:32:30] ================== [PASSED] sriov_packet ===================
[12:32:30] ================= pf_service (11 subtests) =================
[12:32:30] [PASSED] pf_negotiate_any
[12:32:30] [PASSED] pf_negotiate_base_match
[12:32:30] [PASSED] pf_negotiate_base_newer
[12:32:30] [PASSED] pf_negotiate_base_next
[12:32:30] [SKIPPED] pf_negotiate_base_older (no older minor)
[12:32:30] [PASSED] pf_negotiate_base_prev
[12:32:30] [PASSED] pf_negotiate_latest_match
[12:32:30] [PASSED] pf_negotiate_latest_newer
[12:32:30] [PASSED] pf_negotiate_latest_next
[12:32:30] [SKIPPED] pf_negotiate_latest_older (no older minor)
[12:32:30] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[12:32:30] =================== [PASSED] pf_service ====================
[12:32:30] ================= xe_guc_g2g (2 subtests) ==================
[12:32:30] ============== xe_live_guc_g2g_kunit_default ==============
[12:32:30] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:32:30] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:32:30] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:32:30] =================== [SKIPPED] xe_guc_g2g ===================
[12:32:30] =================== xe_mocs (2 subtests) ===================
[12:32:30] ================ xe_live_mocs_kernel_kunit ================
[12:32:30] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:32:30] ================ xe_live_mocs_reset_kunit =================
[12:32:30] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:32:30] ==================== [SKIPPED] xe_mocs =====================
[12:32:30] ================= xe_migrate (3 subtests) ==================
[12:32:30] ================= xe_migrate_sanity_kunit =================
[12:32:30] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:32:30] ================== xe_validate_ccs_kunit ==================
[12:32:30] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:32:30] ============= xe_migrate_access_memory_kunit ==============
[12:32:30] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[12:32:30] =================== [SKIPPED] xe_migrate ===================
[12:32:30] ================== xe_dma_buf (1 subtest) ==================
[12:32:30] ==================== xe_dma_buf_kunit =====================
[12:32:30] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:32:30] =================== [SKIPPED] xe_dma_buf ===================
[12:32:30] ================= xe_bo_shrink (1 subtest) =================
[12:32:30] =================== xe_bo_shrink_kunit ====================
[12:32:30] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:32:30] ================== [SKIPPED] xe_bo_shrink ==================
[12:32:30] ==================== xe_bo (2 subtests) ====================
[12:32:30] ================== xe_ccs_migrate_kunit ===================
[12:32:30] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:32:30] ==================== xe_bo_evict_kunit ====================
[12:32:30] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:32:30] ===================== [SKIPPED] xe_bo ======================
[12:32:30] =================== xe_any (9 subtests) ====================
[12:32:30] [PASSED] test_to_xe
[12:32:30] [PASSED] test_to_dev
[12:32:30] [PASSED] test_to_pdev
[12:32:30] [PASSED] test_to_drm
[12:32:30] [PASSED] test_if_pdev
[12:32:30] [PASSED] test_if_xe
[12:32:30] [PASSED] test_if_tile
[12:32:30] [PASSED] test_if_gt
[12:32:30] [PASSED] test_to_id
[12:32:30] ===================== [PASSED] xe_any ======================
[12:32:30] ==================== args (13 subtests) ====================
[12:32:30] [PASSED] count_args_test
[12:32:30] [PASSED] call_args_example
[12:32:30] [PASSED] call_args_test
[12:32:30] [PASSED] drop_first_arg_example
[12:32:30] [PASSED] drop_first_arg_test
[12:32:30] [PASSED] first_arg_example
[12:32:30] [PASSED] first_arg_test
[12:32:30] [PASSED] last_arg_example
[12:32:30] [PASSED] last_arg_test
[12:32:30] [PASSED] pick_arg_example
[12:32:30] [PASSED] if_args_example
[12:32:30] [PASSED] if_args_test
[12:32:30] [PASSED] sep_comma_example
[12:32:30] ====================== [PASSED] args =======================
[12:32:30] =================== xe_pci (3 subtests) ====================
[12:32:30] ==================== check_graphics_ip ====================
[12:32:30] [PASSED] 12.00 Xe_LP
[12:32:30] [PASSED] 12.10 Xe_LP+
[12:32:30] [PASSED] 12.55 Xe_HPG
[12:32:30] [PASSED] 12.60 Xe_HPC
[12:32:30] [PASSED] 12.70 Xe_LPG
[12:32:30] [PASSED] 12.71 Xe_LPG
[12:32:30] [PASSED] 12.74 Xe_LPG+
[12:32:30] [PASSED] 20.01 Xe2_HPG
[12:32:30] [PASSED] 20.02 Xe2_HPG
[12:32:30] [PASSED] 20.04 Xe2_LPG
[12:32:30] [PASSED] 30.00 Xe3_LPG
[12:32:30] [PASSED] 30.01 Xe3_LPG
[12:32:30] [PASSED] 30.03 Xe3_LPG
[12:32:30] [PASSED] 30.04 Xe3_LPG
[12:32:30] [PASSED] 30.05 Xe3_LPG
[12:32:30] [PASSED] 35.10 Xe3p_LPG
[12:32:30] [PASSED] 35.11 Xe3p_XPC
[12:32:30] ================ [PASSED] check_graphics_ip ================
[12:32:30] ===================== check_media_ip ======================
[12:32:30] [PASSED] 12.00 Xe_M
[12:32:30] [PASSED] 12.55 Xe_HPM
[12:32:30] [PASSED] 13.00 Xe_LPM+
[12:32:30] [PASSED] 13.01 Xe2_HPM
[12:32:30] [PASSED] 20.00 Xe2_LPM
[12:32:30] [PASSED] 30.00 Xe3_LPM
[12:32:30] [PASSED] 30.02 Xe3_LPM
[12:32:30] [PASSED] 35.00 Xe3p_LPM
[12:32:30] [PASSED] 35.03 Xe3p_HPM
[12:32:30] ================= [PASSED] check_media_ip ==================
[12:32:30] =================== check_platform_desc ===================
[12:32:30] [PASSED] 0x9A60 (TIGERLAKE)
[12:32:30] [PASSED] 0x9A68 (TIGERLAKE)
[12:32:30] [PASSED] 0x9A70 (TIGERLAKE)
[12:32:30] [PASSED] 0x9A40 (TIGERLAKE)
[12:32:30] [PASSED] 0x9A49 (TIGERLAKE)
[12:32:30] [PASSED] 0x9A59 (TIGERLAKE)
[12:32:30] [PASSED] 0x9A78 (TIGERLAKE)
[12:32:30] [PASSED] 0x9AC0 (TIGERLAKE)
[12:32:30] [PASSED] 0x9AC9 (TIGERLAKE)
[12:32:30] [PASSED] 0x9AD9 (TIGERLAKE)
[12:32:30] [PASSED] 0x9AF8 (TIGERLAKE)
[12:32:30] [PASSED] 0x4C80 (ROCKETLAKE)
[12:32:30] [PASSED] 0x4C8A (ROCKETLAKE)
[12:32:30] [PASSED] 0x4C8B (ROCKETLAKE)
[12:32:30] [PASSED] 0x4C8C (ROCKETLAKE)
[12:32:30] [PASSED] 0x4C90 (ROCKETLAKE)
[12:32:30] [PASSED] 0x4C9A (ROCKETLAKE)
[12:32:30] [PASSED] 0x4680 (ALDERLAKE_S)
[12:32:30] [PASSED] 0x4682 (ALDERLAKE_S)
[12:32:30] [PASSED] 0x4688 (ALDERLAKE_S)
[12:32:30] [PASSED] 0x468A (ALDERLAKE_S)
[12:32:30] [PASSED] 0x468B (ALDERLAKE_S)
[12:32:30] [PASSED] 0x4690 (ALDERLAKE_S)
[12:32:30] [PASSED] 0x4692 (ALDERLAKE_S)
[12:32:30] [PASSED] 0x4693 (ALDERLAKE_S)
[12:32:30] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46AA (ALDERLAKE_P)
[12:32:30] [PASSED] 0x462A (ALDERLAKE_P)
[12:32:30] [PASSED] 0x4626 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x4628 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:32:30] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:32:30] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:32:30] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:32:30] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:32:30] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:32:30] [PASSED] 0xA721 (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA720 (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:32:30] [PASSED] 0xA780 (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA781 (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA782 (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA783 (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA788 (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA789 (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA78A (ALDERLAKE_S)
[12:32:30] [PASSED] 0xA78B (ALDERLAKE_S)
[12:32:30] [PASSED] 0x4905 (DG1)
[12:32:30] [PASSED] 0x4906 (DG1)
[12:32:30] [PASSED] 0x4907 (DG1)
[12:32:30] [PASSED] 0x4908 (DG1)
[12:32:30] [PASSED] 0x4909 (DG1)
[12:32:30] [PASSED] 0x56C0 (DG2)
[12:32:30] [PASSED] 0x56C2 (DG2)
[12:32:30] [PASSED] 0x56C1 (DG2)
[12:32:30] [PASSED] 0x7D51 (METEORLAKE)
[12:32:30] [PASSED] 0x7DD1 (METEORLAKE)
[12:32:30] [PASSED] 0x7D41 (METEORLAKE)
[12:32:30] [PASSED] 0x7D67 (METEORLAKE)
[12:32:30] [PASSED] 0xB640 (METEORLAKE)
[12:32:30] [PASSED] 0x56A0 (DG2)
[12:32:30] [PASSED] 0x56A1 (DG2)
[12:32:30] [PASSED] 0x56A2 (DG2)
[12:32:30] [PASSED] 0x56BE (DG2)
[12:32:30] [PASSED] 0x56BF (DG2)
[12:32:30] [PASSED] 0x5690 (DG2)
[12:32:30] [PASSED] 0x5691 (DG2)
[12:32:30] [PASSED] 0x5692 (DG2)
[12:32:30] [PASSED] 0x56A5 (DG2)
[12:32:30] [PASSED] 0x56A6 (DG2)
[12:32:30] [PASSED] 0x56B0 (DG2)
[12:32:30] [PASSED] 0x56B1 (DG2)
[12:32:30] [PASSED] 0x56BA (DG2)
[12:32:30] [PASSED] 0x56BB (DG2)
[12:32:30] [PASSED] 0x56BC (DG2)
[12:32:30] [PASSED] 0x56BD (DG2)
[12:32:30] [PASSED] 0x5693 (DG2)
[12:32:30] [PASSED] 0x5694 (DG2)
[12:32:30] [PASSED] 0x5695 (DG2)
[12:32:30] [PASSED] 0x56A3 (DG2)
[12:32:30] [PASSED] 0x56A4 (DG2)
[12:32:30] [PASSED] 0x56B2 (DG2)
[12:32:30] [PASSED] 0x56B3 (DG2)
[12:32:30] [PASSED] 0x5696 (DG2)
[12:32:30] [PASSED] 0x5697 (DG2)
[12:32:30] [PASSED] 0xB69 (PVC)
[12:32:30] [PASSED] 0xB6E (PVC)
[12:32:30] [PASSED] 0xBD4 (PVC)
[12:32:30] [PASSED] 0xBD5 (PVC)
[12:32:30] [PASSED] 0xBD6 (PVC)
[12:32:30] [PASSED] 0xBD7 (PVC)
[12:32:30] [PASSED] 0xBD8 (PVC)
[12:32:30] [PASSED] 0xBD9 (PVC)
[12:32:30] [PASSED] 0xBDA (PVC)
[12:32:30] [PASSED] 0xBDB (PVC)
[12:32:30] [PASSED] 0xBE0 (PVC)
[12:32:30] [PASSED] 0xBE1 (PVC)
[12:32:30] [PASSED] 0xBE5 (PVC)
[12:32:30] [PASSED] 0x7D40 (METEORLAKE)
[12:32:30] [PASSED] 0x7D45 (METEORLAKE)
[12:32:30] [PASSED] 0x7D55 (METEORLAKE)
[12:32:30] [PASSED] 0x7D60 (METEORLAKE)
[12:32:30] [PASSED] 0x7DD5 (METEORLAKE)
[12:32:30] [PASSED] 0x6420 (LUNARLAKE)
[12:32:30] [PASSED] 0x64A0 (LUNARLAKE)
[12:32:30] [PASSED] 0x64B0 (LUNARLAKE)
[12:32:30] [PASSED] 0xE202 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE209 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE20B (BATTLEMAGE)
[12:32:30] [PASSED] 0xE20C (BATTLEMAGE)
[12:32:30] [PASSED] 0xE20D (BATTLEMAGE)
[12:32:30] [PASSED] 0xE210 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE211 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE212 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE216 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE220 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE221 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE222 (BATTLEMAGE)
[12:32:30] [PASSED] 0xE223 (BATTLEMAGE)
[12:32:30] [PASSED] 0xB080 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB081 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB082 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB083 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB084 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB085 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB086 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB087 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB08F (PANTHERLAKE)
[12:32:30] [PASSED] 0xB090 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB0A1 (PANTHERLAKE)
[12:32:30] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:32:30] [PASSED] 0xFD80 (PANTHERLAKE)
[12:32:30] [PASSED] 0xFD81 (PANTHERLAKE)
[12:32:30] [PASSED] 0xD740 (NOVALAKE_S)
[12:32:30] [PASSED] 0xD741 (NOVALAKE_S)
[12:32:30] [PASSED] 0xD742 (NOVALAKE_S)
[12:32:30] [PASSED] 0xD743 (NOVALAKE_S)
[12:32:30] [PASSED] 0xD745 (NOVALAKE_S)
[12:32:30] [PASSED] 0xD74A (NOVALAKE_S)
[12:32:30] [PASSED] 0xD74B (NOVALAKE_S)
[12:32:30] [PASSED] 0x674C (CRESCENTISLAND)
[12:32:30] [PASSED] 0x674D (CRESCENTISLAND)
[12:32:30] [PASSED] 0x674E (CRESCENTISLAND)
[12:32:30] [PASSED] 0x674F (CRESCENTISLAND)
[12:32:30] [PASSED] 0x6750 (CRESCENTISLAND)
[12:32:30] [PASSED] 0x6751 (CRESCENTISLAND)
[12:32:30] [PASSED] 0x6752 (CRESCENTISLAND)
[12:32:30] [PASSED] 0xD750 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD751 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD752 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD753 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD754 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD755 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD756 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD757 (NOVALAKE_P)
[12:32:30] [PASSED] 0xD75F (NOVALAKE_P)
[12:32:30] =============== [PASSED] check_platform_desc ===============
[12:32:30] ===================== [PASSED] xe_pci ======================
[12:32:30] ============= xe_rtp_tables_test (5 subtests) ==============
[12:32:30] ================== xe_rtp_table_gt_test ===================
[12:32:30] [PASSED] gt_was/14011060649
[12:32:30] [PASSED] gt_was/14011059788
[12:32:30] [PASSED] gt_was/14015795083
[12:32:30] [PASSED] gt_was/16021867713
[12:32:30] [PASSED] gt_was/14019449301
[12:32:30] [PASSED] gt_was/16028005424
[12:32:30] [PASSED] gt_was/14026578760
[12:32:30] [PASSED] gt_was/1409420604
[12:32:30] [PASSED] gt_was/1408615072
[12:32:30] [PASSED] gt_was/22010523718
[12:32:30] [PASSED] gt_was/14011006942
[12:32:30] [PASSED] gt_was/14014830051
[12:32:30] [PASSED] gt_was/18018781329
[12:32:30] [PASSED] gt_was/1509235366
[12:32:30] [PASSED] gt_was/18018781329
[12:32:30] [PASSED] gt_was/16016694945
[12:32:30] [PASSED] gt_was/14018575942
[12:32:30] [PASSED] gt_was/22016670082
[12:32:30] [PASSED] gt_was/22016670082
[12:32:30] [PASSED] gt_was/14017421178
[12:32:30] [PASSED] gt_was/16025250150
[12:32:30] [PASSED] gt_was/14021871409
[12:32:30] [PASSED] gt_was/16021865536
[12:32:30] [PASSED] gt_was/14021486841
[12:32:30] [PASSED] gt_was/14025160223
[12:32:30] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:32:30] [PASSED] gt_was/14025635424
[12:32:30] [PASSED] gt_was/16028005424
[12:32:30] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:32:30] ================== xe_rtp_table_gt_test ===================
[12:32:30] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:32:30] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:32:30] [PASSED] gt_tunings/Tuning: L3 cache
[12:32:30] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:32:30] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:32:30] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:32:30] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:32:30] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:32:30] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:32:30] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:32:30] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:32:30] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:32:30] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:32:30] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:32:30] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:32:30] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[12:32:30] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:32:30] ================== xe_rtp_table_oob_test ==================
[12:32:30] [PASSED] oob_was/1607983814
[12:32:30] [PASSED] oob_was/16010904313
[12:32:30] [PASSED] oob_was/18022495364
[12:32:30] [PASSED] oob_was/22012773006
[12:32:30] [PASSED] oob_was/14014475959
[12:32:30] [PASSED] oob_was/22011391025
[12:32:30] [PASSED] oob_was/22012727170
[12:32:30] [PASSED] oob_was/22012727685
[12:32:30] [PASSED] oob_was/22016596838
[12:32:30] [PASSED] oob_was/18020744125
[12:32:30] [PASSED] oob_was/1409600907
[12:32:30] [PASSED] oob_was/22014953428
[12:32:30] [PASSED] oob_was/16017236439
[12:32:30] [PASSED] oob_was/14019821291
[12:32:30] [PASSED] oob_was/14015076503
[12:32:30] [PASSED] oob_was/22016122933
[12:32:30] [PASSED] oob_was/14018913170
[12:32:30] [PASSED] oob_was/14018094691
[12:32:30] [PASSED] oob_was/18024947630
[12:32:30] [PASSED] oob_was/16022287689
[12:32:30] [PASSED] oob_was/13011645652
[12:32:30] [PASSED] oob_was/14022293748
[12:32:30] [PASSED] oob_was/22019794406
[12:32:30] [PASSED] oob_was/22019338487
[12:32:30] [PASSED] oob_was/16023588340
[12:32:30] [PASSED] oob_was/14019789679
[12:32:30] [PASSED] oob_was/14022866841
[12:32:30] [PASSED] oob_was/16021333562
[12:32:30] [PASSED] oob_was/14016712196
[12:32:30] [PASSED] oob_was/14015568240
[12:32:30] [PASSED] oob_was/18013179988
[12:32:30] [PASSED] oob_was/1508761755
[12:32:30] [PASSED] oob_was/16023105232
[12:32:30] [PASSED] oob_was/16026508708
[12:32:30] [PASSED] oob_was/14020001231
[12:32:30] [PASSED] oob_was/16023683509
[12:32:30] [PASSED] oob_was/14025515070
[12:32:30] [PASSED] oob_was/15015404425_disable
[12:32:30] [PASSED] oob_was/16026007364
[12:32:30] [PASSED] oob_was/14020316580
[12:32:30] [PASSED] oob_was/14025883347
[12:32:30] [PASSED] oob_was/16029380221
[12:32:30] [PASSED] oob_was/22022079272
[12:32:30] [PASSED] oob_was/16029897822
[12:32:30] [PASSED] oob_was/14026539277
[12:32:30] [PASSED] oob_was/14027054324
[12:32:30] [PASSED] oob_was/14025941587
[12:32:30] [PASSED] oob_was/16030224309
[12:32:30] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:32:30] ================ xe_rtp_table_dev_oob_test ================
[12:32:30] [PASSED] device_oob_was/22010954014
[12:32:30] [PASSED] device_oob_was/15015404425
[12:32:30] [PASSED] device_oob_was/22019338487_display
[12:32:30] [PASSED] device_oob_was/14022085890
[12:32:30] [PASSED] device_oob_was/14026633728
[12:32:30] [PASSED] device_oob_was/14026746987
[12:32:30] [PASSED] device_oob_was/14026779378
[12:32:30] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:32:30] ========== xe_rtp_table_missing_upper_bound_test ==========
[12:32:30] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[12:32:30] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[12:32:30] [PASSED] register_whitelist/1806527549
[12:32:30] [PASSED] register_whitelist/allow_read_ctx_timestamp
[12:32:30] [PASSED] register_whitelist/allow_read_queue_timestamp
[12:32:30] [PASSED] register_whitelist/16014440446
[12:32:30] [PASSED] register_whitelist/16017236439
[12:32:30] [PASSED] register_whitelist/16020183090
[12:32:30] [PASSED] register_whitelist/14024997852
[12:32:30] [PASSED] register_whitelist/14024997852
[12:32:30] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[12:32:30] =============== [PASSED] xe_rtp_tables_test ================
[12:32:30] =================== xe_rtp (3 subtests) ====================
[12:32:30] =================== xe_rtp_rules_tests ====================
[12:32:30] [PASSED] no
[12:32:30] [PASSED] yes
[12:32:30] [PASSED] no-and-no
[12:32:30] [PASSED] no-and-yes
[12:32:30] [PASSED] yes-and-no
[12:32:30] [PASSED] yes-and-yes
[12:32:30] [PASSED] no-or-no
[12:32:30] [PASSED] no-or-yes
[12:32:30] [PASSED] yes-or-no
[12:32:30] [PASSED] yes-or-yes
[12:32:30] [PASSED] no-yes-or-yes-no
[12:32:30] [PASSED] no-yes-or-yes-yes
[12:32:30] [PASSED] yes-yes-or-no-yes
[12:32:30] [PASSED] yes-yes-or-yes-yes
[12:32:30] [PASSED] no-no-or-yes-or-no
[12:32:30] [PASSED] or
[12:32:30] [PASSED] or-yes
[12:32:30] [PASSED] or-no
[12:32:30] [PASSED] yes-or
[12:32:30] [PASSED] no-or
[12:32:30] [PASSED] no-or-or-yes
[12:32:30] [PASSED] yes-or-or-no
[12:32:30] [PASSED] no-or-or-no
[12:32:30] [PASSED] missing-context-engine-class
[12:32:30] [PASSED] missing-context-engine-class-or-yes
[12:32:30] [PASSED] missing-context-engine-class-or-or-yes
[12:32:30] =============== [PASSED] xe_rtp_rules_tests ================
[12:32:30] =============== xe_rtp_process_to_sr_tests ================
[12:32:30] [PASSED] coalesce-same-reg
[12:32:30] [PASSED] coalesce-same-reg-literal-and-func
[12:32:30] [PASSED] no-match-no-add
[12:32:30] [PASSED] two-regs-two-entries
[12:32:30] [PASSED] clr-one-set-other
[12:32:30] [PASSED] set-field
[12:32:30] [PASSED] conflict-duplicate
[12:32:30] [PASSED] conflict-not-disjoint
[12:32:30] [PASSED] conflict-not-disjoint-literal-and-func
[12:32:30] [PASSED] conflict-reg-type
[12:32:30] [PASSED] bad-mcr-reg-forced-to-regular
[12:32:30] [PASSED] bad-regular-reg-forced-to-mcr
[12:32:30] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:32:30] ================== xe_rtp_process_tests ===================
[12:32:30] [PASSED] active1
[12:32:30] [PASSED] active2
[12:32:30] [PASSED] active-inactive
[12:32:30] [PASSED] inactive-active
[12:32:30] [PASSED] inactive-active-inactive
[12:32:30] [PASSED] inactive-inactive-inactive
[12:32:30] ============== [PASSED] xe_rtp_process_tests ===============
[12:32:30] ===================== [PASSED] xe_rtp ======================
[12:32:30] ==================== xe_wa (1 subtest) =====================
[12:32:30] ======================== xe_wa_gt =========================
[12:32:30] [PASSED] TIGERLAKE B0
[12:32:30] [PASSED] DG1 A0
[12:32:30] [PASSED] DG1 B0
[12:32:30] [PASSED] ALDERLAKE_S A0
[12:32:30] [PASSED] ALDERLAKE_S B0
[12:32:30] [PASSED] ALDERLAKE_S C0
[12:32:30] [PASSED] ALDERLAKE_S D0
[12:32:30] [PASSED] ALDERLAKE_P A0
[12:32:30] [PASSED] ALDERLAKE_P B0
[12:32:30] [PASSED] ALDERLAKE_P C0
[12:32:30] [PASSED] ALDERLAKE_S RPLS D0
[12:32:30] [PASSED] ALDERLAKE_P RPLU E0
[12:32:30] [PASSED] DG2 G10 C0
[12:32:30] [PASSED] DG2 G11 B1
[12:32:30] [PASSED] DG2 G12 A1
[12:32:30] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:32:30] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:32:30] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:32:30] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:32:30] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:32:30] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:32:30] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:32:30] ==================== [PASSED] xe_wa_gt =====================
[12:32:30] ====================== [PASSED] xe_wa ======================
[12:32:30] ============================================================
[12:32:30] Testing complete. Ran 839 tests: passed: 810, skipped: 29
[12:32:30] Elapsed time: 41.846s total, 1.885s configuring, 39.195s building, 0.725s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:32:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:32:32] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:32:57] Starting KUnit Kernel (1/1)...
[12:32:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:32:57] ============ drm_test_pick_cmdline (2 subtests) ============
[12:32:57] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:32:57] =============== drm_test_pick_cmdline_named ===============
[12:32:57] [PASSED] NTSC
[12:32:57] [PASSED] NTSC-J
[12:32:57] [PASSED] PAL
[12:32:57] [PASSED] PAL-M
[12:32:57] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:32:57] ============== [PASSED] drm_test_pick_cmdline ==============
[12:32:57] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:32:57] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:32:57] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:32:57] =========== drm_validate_clone_mode (2 subtests) ===========
[12:32:57] ============== drm_test_check_in_clone_mode ===============
[12:32:57] [PASSED] in_clone_mode
[12:32:57] [PASSED] not_in_clone_mode
[12:32:57] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:32:57] =============== drm_test_check_valid_clones ===============
[12:32:57] [PASSED] not_in_clone_mode
[12:32:57] [PASSED] valid_clone
[12:32:57] [PASSED] invalid_clone
[12:32:57] =========== [PASSED] drm_test_check_valid_clones ===========
[12:32:57] ============= [PASSED] drm_validate_clone_mode =============
[12:32:57] ============= drm_validate_modeset (1 subtest) =============
[12:32:57] [PASSED] drm_test_check_connector_changed_modeset
[12:32:57] ============== [PASSED] drm_validate_modeset ===============
[12:32:57] ====== drm_test_bridge_get_current_state (1 subtest) =======
[12:32:57] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:32:57] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:32:57] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:32:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:32:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:32:57] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:32:57] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:32:57] ============== drm_bridge_alloc (2 subtests) ===============
[12:32:57] [PASSED] drm_test_drm_bridge_alloc_basic
[12:32:57] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:32:57] ================ [PASSED] drm_bridge_alloc =================
[12:32:57] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:32:57] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:32:57] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:32:57] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:32:57] [PASSED] drm_test_bridge_auto_first
[12:32:57] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:32:57] =============== [PASSED] drm_bridge_bus_fmt ================
[12:32:57] ============= drm_cmdline_parser (40 subtests) =============
[12:32:57] [PASSED] drm_test_cmdline_force_d_only
[12:32:57] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:32:57] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:32:57] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:32:57] [PASSED] drm_test_cmdline_force_e_only
[12:32:57] [PASSED] drm_test_cmdline_res
[12:32:57] [PASSED] drm_test_cmdline_res_vesa
[12:32:57] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:32:57] [PASSED] drm_test_cmdline_res_rblank
[12:32:57] [PASSED] drm_test_cmdline_res_bpp
[12:32:57] [PASSED] drm_test_cmdline_res_refresh
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:32:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:32:57] [PASSED] drm_test_cmdline_res_margins_force_on
[12:32:57] [PASSED] drm_test_cmdline_res_vesa_margins
[12:32:57] [PASSED] drm_test_cmdline_name
[12:32:57] [PASSED] drm_test_cmdline_name_bpp
[12:32:57] [PASSED] drm_test_cmdline_name_option
[12:32:57] [PASSED] drm_test_cmdline_name_bpp_option
[12:32:57] [PASSED] drm_test_cmdline_rotate_0
[12:32:57] [PASSED] drm_test_cmdline_rotate_90
[12:32:57] [PASSED] drm_test_cmdline_rotate_180
[12:32:57] [PASSED] drm_test_cmdline_rotate_270
[12:32:57] [PASSED] drm_test_cmdline_hmirror
[12:32:57] [PASSED] drm_test_cmdline_vmirror
[12:32:57] [PASSED] drm_test_cmdline_margin_options
[12:32:57] [PASSED] drm_test_cmdline_multiple_options
[12:32:57] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:32:57] [PASSED] drm_test_cmdline_extra_and_option
[12:32:57] [PASSED] drm_test_cmdline_freestanding_options
[12:32:57] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:32:57] [PASSED] drm_test_cmdline_panel_orientation
[12:32:57] ================ drm_test_cmdline_invalid =================
[12:32:57] [PASSED] margin_only
[12:32:57] [PASSED] interlace_only
[12:32:57] [PASSED] res_missing_x
[12:32:57] [PASSED] res_missing_y
[12:32:57] [PASSED] res_bad_y
[12:32:57] [PASSED] res_missing_y_bpp
[12:32:57] [PASSED] res_bad_bpp
[12:32:57] [PASSED] res_bad_refresh
[12:32:57] [PASSED] res_bpp_refresh_force_on_off
[12:32:57] [PASSED] res_invalid_mode
[12:32:57] [PASSED] res_bpp_wrong_place_mode
[12:32:57] [PASSED] name_bpp_refresh
[12:32:57] [PASSED] name_refresh
[12:32:57] [PASSED] name_refresh_wrong_mode
[12:32:57] [PASSED] name_refresh_invalid_mode
[12:32:57] [PASSED] rotate_multiple
[12:32:57] [PASSED] rotate_invalid_val
[12:32:57] [PASSED] rotate_truncated
[12:32:57] [PASSED] invalid_option
[12:32:57] [PASSED] invalid_tv_option
[12:32:57] [PASSED] truncated_tv_option
[12:32:57] ============ [PASSED] drm_test_cmdline_invalid =============
[12:32:57] =============== drm_test_cmdline_tv_options ===============
[12:32:57] [PASSED] NTSC
[12:32:57] [PASSED] NTSC_443
[12:32:57] [PASSED] NTSC_J
[12:32:57] [PASSED] PAL
[12:32:57] [PASSED] PAL_M
[12:32:57] [PASSED] PAL_N
[12:32:57] [PASSED] SECAM
[12:32:57] [PASSED] MONO_525
[12:32:57] [PASSED] MONO_625
[12:32:57] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:32:57] =============== [PASSED] drm_cmdline_parser ================
[12:32:57] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:32:57] [PASSED] drm_test_connector_hdmi_init_valid
[12:32:57] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:32:57] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:32:57] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:32:57] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:32:57] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:32:57] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:32:57] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:32:57] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:32:57] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:32:57] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:32:57] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:32:57] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:32:57] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:32:57] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:32:57] [PASSED] drm_test_connector_hdmi_init_null_product
[12:32:57] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:32:57] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:32:57] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:32:57] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:32:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:32:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:32:57] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:32:57] ========= drm_test_connector_hdmi_init_type_valid =========
[12:32:57] [PASSED] HDMI-A
[12:32:57] [PASSED] HDMI-B
[12:32:57] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:32:57] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:32:57] [PASSED] Unknown
[12:32:57] [PASSED] VGA
[12:32:57] [PASSED] DVI-I
[12:32:57] [PASSED] DVI-D
[12:32:57] [PASSED] DVI-A
[12:32:57] [PASSED] Composite
[12:32:57] [PASSED] SVIDEO
[12:32:57] [PASSED] LVDS
[12:32:57] [PASSED] Component
[12:32:57] [PASSED] DIN
[12:32:57] [PASSED] DP
[12:32:57] [PASSED] TV
[12:32:57] [PASSED] eDP
[12:32:57] [PASSED] Virtual
[12:32:57] [PASSED] DSI
[12:32:57] [PASSED] DPI
[12:32:57] [PASSED] Writeback
[12:32:57] [PASSED] SPI
[12:32:57] [PASSED] USB
[12:32:57] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:32:57] ============ [PASSED] drmm_connector_hdmi_init =============
[12:32:57] ============= drmm_connector_init (3 subtests) =============
[12:32:57] [PASSED] drm_test_drmm_connector_init
[12:32:57] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:32:57] ========= drm_test_drmm_connector_init_type_valid =========
[12:32:57] [PASSED] Unknown
[12:32:57] [PASSED] VGA
[12:32:57] [PASSED] DVI-I
[12:32:57] [PASSED] DVI-D
[12:32:57] [PASSED] DVI-A
[12:32:57] [PASSED] Composite
[12:32:57] [PASSED] SVIDEO
[12:32:57] [PASSED] LVDS
[12:32:57] [PASSED] Component
[12:32:57] [PASSED] DIN
[12:32:57] [PASSED] DP
[12:32:57] [PASSED] HDMI-A
[12:32:57] [PASSED] HDMI-B
[12:32:57] [PASSED] TV
[12:32:57] [PASSED] eDP
[12:32:57] [PASSED] Virtual
[12:32:57] [PASSED] DSI
[12:32:57] [PASSED] DPI
[12:32:57] [PASSED] Writeback
[12:32:57] [PASSED] SPI
[12:32:57] [PASSED] USB
[12:32:57] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:32:57] =============== [PASSED] drmm_connector_init ===============
[12:32:57] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_init
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:32:57] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:32:57] [PASSED] Unknown
[12:32:57] [PASSED] VGA
[12:32:57] [PASSED] DVI-I
[12:32:57] [PASSED] DVI-D
[12:32:57] [PASSED] DVI-A
[12:32:57] [PASSED] Composite
[12:32:57] [PASSED] SVIDEO
[12:32:57] [PASSED] LVDS
[12:32:57] [PASSED] Component
[12:32:57] [PASSED] DIN
[12:32:57] [PASSED] DP
[12:32:57] [PASSED] HDMI-A
[12:32:57] [PASSED] HDMI-B
[12:32:57] [PASSED] TV
[12:32:57] [PASSED] eDP
[12:32:57] [PASSED] Virtual
[12:32:57] [PASSED] DSI
[12:32:57] [PASSED] DPI
[12:32:57] [PASSED] Writeback
[12:32:57] [PASSED] SPI
[12:32:57] [PASSED] USB
[12:32:57] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:32:57] ======== drm_test_drm_connector_dynamic_init_name =========
[12:32:57] [PASSED] Unknown
[12:32:57] [PASSED] VGA
[12:32:57] [PASSED] DVI-I
[12:32:57] [PASSED] DVI-D
[12:32:57] [PASSED] DVI-A
[12:32:57] [PASSED] Composite
[12:32:57] [PASSED] SVIDEO
[12:32:57] [PASSED] LVDS
[12:32:57] [PASSED] Component
[12:32:57] [PASSED] DIN
[12:32:57] [PASSED] DP
[12:32:57] [PASSED] HDMI-A
[12:32:57] [PASSED] HDMI-B
[12:32:57] [PASSED] TV
[12:32:57] [PASSED] eDP
[12:32:57] [PASSED] Virtual
[12:32:57] [PASSED] DSI
[12:32:57] [PASSED] DPI
[12:32:57] [PASSED] Writeback
[12:32:57] [PASSED] SPI
[12:32:57] [PASSED] USB
[12:32:57] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:32:57] =========== [PASSED] drm_connector_dynamic_init ============
[12:32:57] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:32:57] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:32:57] ======= drm_connector_dynamic_register (7 subtests) ========
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:32:57] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:32:57] ========= [PASSED] drm_connector_dynamic_register ==========
[12:32:57] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:32:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:32:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:32:57] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:32:57] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:32:57] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:32:57] [PASSED] NTSC
[12:32:57] [PASSED] NTSC-443
[12:32:57] [PASSED] NTSC-J
[12:32:57] [PASSED] PAL
[12:32:57] [PASSED] PAL-M
[12:32:57] [PASSED] PAL-N
[12:32:57] [PASSED] SECAM
[12:32:57] [PASSED] Mono
[12:32:57] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:32:57] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:32:57] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:32:57] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:32:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:32:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:32:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:32:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:32:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:32:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:32:57] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:32:57] [PASSED] VIC 96
[12:32:57] [PASSED] VIC 97
[12:32:57] [PASSED] VIC 101
[12:32:57] [PASSED] VIC 102
[12:32:57] [PASSED] VIC 106
[12:32:57] [PASSED] VIC 107
[12:32:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:32:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:32:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:32:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:32:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:32:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:32:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:32:57] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:32:57] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:32:57] [PASSED] Automatic
[12:32:57] [PASSED] Full
[12:32:57] [PASSED] Limited 16:235
[12:32:57] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:32:57] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:32:57] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:32:57] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:32:57] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:32:57] [PASSED] RGB
[12:32:57] [PASSED] YUV 4:2:0
[12:32:57] [PASSED] YUV 4:2:2
[12:32:57] [PASSED] YUV 4:4:4
[12:32:57] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:32:57] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:32:57] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:32:57] ============= drm_damage_helper (21 subtests) ==============
[12:32:57] [PASSED] drm_test_damage_iter_no_damage
[12:32:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:32:57] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:32:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:32:57] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:32:57] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:32:57] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:32:57] [PASSED] drm_test_damage_iter_simple_damage
[12:32:57] [PASSED] drm_test_damage_iter_single_damage
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:32:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:32:57] [PASSED] drm_test_damage_iter_damage
[12:32:57] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:32:57] [PASSED] drm_test_damage_iter_damage_one_outside
[12:32:57] [PASSED] drm_test_damage_iter_damage_src_moved
[12:32:57] [PASSED] drm_test_damage_iter_damage_not_visible
[12:32:57] ================ [PASSED] drm_damage_helper ================
[12:32:57] ============== drm_dp_mst_helper (3 subtests) ==============
[12:32:57] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:32:57] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:32:57] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:32:57] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:32:57] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:32:57] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:32:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:32:57] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:32:57] [PASSED] Link rate 2000000 lane count 4
[12:32:57] [PASSED] Link rate 2000000 lane count 2
[12:32:57] [PASSED] Link rate 2000000 lane count 1
[12:32:57] [PASSED] Link rate 1350000 lane count 4
[12:32:57] [PASSED] Link rate 1350000 lane count 2
[12:32:57] [PASSED] Link rate 1350000 lane count 1
[12:32:57] [PASSED] Link rate 1000000 lane count 4
[12:32:57] [PASSED] Link rate 1000000 lane count 2
[12:32:57] [PASSED] Link rate 1000000 lane count 1
[12:32:57] [PASSED] Link rate 810000 lane count 4
[12:32:57] [PASSED] Link rate 810000 lane count 2
[12:32:57] [PASSED] Link rate 810000 lane count 1
[12:32:57] [PASSED] Link rate 540000 lane count 4
[12:32:57] [PASSED] Link rate 540000 lane count 2
[12:32:57] [PASSED] Link rate 540000 lane count 1
[12:32:57] [PASSED] Link rate 270000 lane count 4
[12:32:57] [PASSED] Link rate 270000 lane count 2
[12:32:57] [PASSED] Link rate 270000 lane count 1
[12:32:57] [PASSED] Link rate 162000 lane count 4
[12:32:57] [PASSED] Link rate 162000 lane count 2
[12:32:57] [PASSED] Link rate 162000 lane count 1
[12:32:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:32:57] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:32:57] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:32:57] [PASSED] DP_POWER_UP_PHY with port number
[12:32:57] [PASSED] DP_POWER_DOWN_PHY with port number
[12:32:57] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:32:57] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:32:57] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:32:57] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:32:57] [PASSED] DP_QUERY_PAYLOAD with port number
[12:32:57] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:32:57] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:32:57] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:32:57] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:32:57] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:32:57] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:32:57] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:32:57] [PASSED] DP_REMOTE_I2C_READ with port number
[12:32:57] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:32:57] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:32:57] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:32:57] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:32:57] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:32:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:32:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:32:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:32:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:32:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:32:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:32:57] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:32:57] ================ [PASSED] drm_dp_mst_helper ================
[12:32:57] ================== drm_exec (7 subtests) ===================
[12:32:57] [PASSED] sanitycheck
[12:32:57] [PASSED] test_lock
[12:32:57] [PASSED] test_lock_unlock
[12:32:57] [PASSED] test_duplicates
[12:32:57] [PASSED] test_prepare
[12:32:57] [PASSED] test_prepare_array
[12:32:57] [PASSED] test_multiple_loops
[12:32:57] ==================== [PASSED] drm_exec =====================
[12:32:57] =========== drm_format_helper_test (17 subtests) ===========
[12:32:57] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:32:57] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:32:57] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:32:57] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:32:57] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:32:57] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:32:57] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:32:57] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:32:57] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:32:57] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:32:57] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:32:57] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:32:57] ==================== drm_test_fb_swab =====================
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ================ [PASSED] drm_test_fb_swab =================
[12:32:57] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:32:57] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:32:57] [PASSED] single_pixel_source_buffer
[12:32:57] [PASSED] single_pixel_clip_rectangle
[12:32:57] [PASSED] well_known_colors
[12:32:57] [PASSED] destination_pitch
[12:32:57] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:32:57] ================= drm_test_fb_clip_offset =================
[12:32:57] [PASSED] pass through
[12:32:57] [PASSED] horizontal offset
[12:32:57] [PASSED] vertical offset
[12:32:57] [PASSED] horizontal and vertical offset
[12:32:57] [PASSED] horizontal offset (custom pitch)
[12:32:57] [PASSED] vertical offset (custom pitch)
[12:32:57] [PASSED] horizontal and vertical offset (custom pitch)
[12:32:57] ============= [PASSED] drm_test_fb_clip_offset =============
[12:32:57] =================== drm_test_fb_memcpy ====================
[12:32:57] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:32:57] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:32:57] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:32:57] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:32:57] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:32:57] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:32:57] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:32:57] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:32:57] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:32:57] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:32:57] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:32:57] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:32:57] =============== [PASSED] drm_test_fb_memcpy ================
[12:32:57] ============= [PASSED] drm_format_helper_test ==============
[12:32:57] ================= drm_format (18 subtests) =================
[12:32:57] [PASSED] drm_test_format_block_width_invalid
[12:32:57] [PASSED] drm_test_format_block_width_one_plane
[12:32:57] [PASSED] drm_test_format_block_width_two_plane
[12:32:57] [PASSED] drm_test_format_block_width_three_plane
[12:32:57] [PASSED] drm_test_format_block_width_tiled
[12:32:57] [PASSED] drm_test_format_block_height_invalid
[12:32:57] [PASSED] drm_test_format_block_height_one_plane
[12:32:57] [PASSED] drm_test_format_block_height_two_plane
[12:32:57] [PASSED] drm_test_format_block_height_three_plane
[12:32:57] [PASSED] drm_test_format_block_height_tiled
[12:32:57] [PASSED] drm_test_format_min_pitch_invalid
[12:32:57] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:32:57] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:32:57] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:32:57] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:32:57] [PASSED] drm_test_format_min_pitch_two_plane
[12:32:57] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:32:57] [PASSED] drm_test_format_min_pitch_tiled
[12:32:57] =================== [PASSED] drm_format ====================
[12:32:57] ============== drm_framebuffer (10 subtests) ===============
[12:32:57] ========== drm_test_framebuffer_check_src_coords ==========
[12:32:57] [PASSED] Success: source fits into fb
[12:32:57] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:32:57] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:32:57] [PASSED] Fail: overflowing fb with source width
[12:32:57] [PASSED] Fail: overflowing fb with source height
[12:32:57] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:32:57] [PASSED] drm_test_framebuffer_cleanup
[12:32:57] =============== drm_test_framebuffer_create ===============
[12:32:57] [PASSED] ABGR8888 normal sizes
[12:32:57] [PASSED] ABGR8888 max sizes
[12:32:57] [PASSED] ABGR8888 pitch greater than min required
[12:32:57] [PASSED] ABGR8888 pitch less than min required
[12:32:57] [PASSED] ABGR8888 Invalid width
[12:32:57] [PASSED] ABGR8888 Invalid buffer handle
[12:32:57] [PASSED] No pixel format
[12:32:57] [PASSED] ABGR8888 Width 0
[12:32:57] [PASSED] ABGR8888 Height 0
[12:32:57] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:32:57] [PASSED] ABGR8888 Large buffer offset
[12:32:57] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:32:57] [PASSED] ABGR8888 Invalid flag
[12:32:57] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:32:57] [PASSED] ABGR8888 Valid buffer modifier
[12:32:57] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:32:57] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] NV12 Normal sizes
[12:32:57] [PASSED] NV12 Max sizes
[12:32:57] [PASSED] NV12 Invalid pitch
[12:32:57] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:32:57] [PASSED] NV12 different modifier per-plane
[12:32:57] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:32:57] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] NV12 Modifier for inexistent plane
[12:32:57] [PASSED] NV12 Handle for inexistent plane
[12:32:57] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:32:57] [PASSED] YVU420 Normal sizes
[12:32:57] [PASSED] YVU420 Max sizes
[12:32:57] [PASSED] YVU420 Invalid pitch
[12:32:57] [PASSED] YVU420 Different pitches
[12:32:57] [PASSED] YVU420 Different buffer offsets/pitches
[12:32:57] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:32:57] [PASSED] YVU420 Valid modifier
[12:32:57] [PASSED] YVU420 Different modifiers per plane
[12:32:57] [PASSED] YVU420 Modifier for inexistent plane
[12:32:57] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:32:57] [PASSED] X0L2 Normal sizes
[12:32:57] [PASSED] X0L2 Max sizes
[12:32:57] [PASSED] X0L2 Invalid pitch
[12:32:57] [PASSED] X0L2 Pitch greater than minimum required
[12:32:57] [PASSED] X0L2 Handle for inexistent plane
[12:32:57] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:32:57] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:32:57] [PASSED] X0L2 Valid modifier
[12:32:57] [PASSED] X0L2 Modifier for inexistent plane
[12:32:57] =========== [PASSED] drm_test_framebuffer_create ===========
[12:32:57] [PASSED] drm_test_framebuffer_free
[12:32:57] [PASSED] drm_test_framebuffer_init
[12:32:57] [PASSED] drm_test_framebuffer_init_bad_format
[12:32:57] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:32:57] [PASSED] drm_test_framebuffer_lookup
[12:32:57] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:32:57] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:32:57] ================= [PASSED] drm_framebuffer =================
[12:32:57] ================ drm_gem_shmem (8 subtests) ================
[12:32:57] [PASSED] drm_gem_shmem_test_obj_create
[12:32:57] [PASSED] drm_gem_shmem_test_obj_create_private
[12:32:57] [PASSED] drm_gem_shmem_test_pin_pages
[12:32:57] [PASSED] drm_gem_shmem_test_vmap
[12:32:57] [PASSED] drm_gem_shmem_test_get_sg_table
[12:32:57] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:32:57] [PASSED] drm_gem_shmem_test_madvise
[12:32:57] [PASSED] drm_gem_shmem_test_purge
[12:32:57] ================== [PASSED] drm_gem_shmem ==================
[12:32:57] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:32:57] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:32:57] [PASSED] Automatic
[12:32:57] [PASSED] Full
[12:32:57] [PASSED] Limited 16:235
[12:32:57] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:32:57] [PASSED] drm_test_check_disable_connector
[12:32:57] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:32:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:32:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:32:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:32:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:32:57] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:32:57] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:32:57] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:32:57] [PASSED] drm_test_check_output_bpc_dvi
[12:32:57] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:32:57] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:32:57] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:32:57] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:32:57] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:32:57] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:32:57] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:32:57] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:32:57] ============ drm_test_check_hdmi_color_format =============
[12:32:57] [PASSED] AUTO -> RGB
[12:32:57] [PASSED] YCBCR422 -> YUV422
[12:32:57] [PASSED] YCBCR420 -> YUV420
[12:32:57] [PASSED] YCBCR444 -> YUV444
[12:32:57] [PASSED] RGB -> RGB
[12:32:57] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:32:57] ======== drm_test_check_hdmi_color_format_420_only ========
[12:32:57] [PASSED] RGB should fail
[12:32:57] [PASSED] YUV444 should fail
[12:32:57] [PASSED] YUV422 should fail
[12:32:57] [PASSED] YUV420 should work
[12:32:57] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:32:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:32:57] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:32:57] [PASSED] drm_test_check_broadcast_rgb_value
[12:32:57] [PASSED] drm_test_check_bpc_8_value
[12:32:57] [PASSED] drm_test_check_bpc_10_value
[12:32:57] [PASSED] drm_test_check_bpc_12_value
[12:32:57] [PASSED] drm_test_check_format_value
[12:32:57] [PASSED] drm_test_check_tmds_char_value
[12:32:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:32:57] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:32:57] [PASSED] drm_test_check_mode_valid
[12:32:57] [PASSED] drm_test_check_mode_valid_reject
[12:32:57] [PASSED] drm_test_check_mode_valid_reject_rate
[12:32:57] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:32:57] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:32:57] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:32:57] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:32:57] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:32:57] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:32:57] [PASSED] drm_test_check_infoframes
[12:32:57] [PASSED] drm_test_check_reject_avi_infoframe
[12:32:57] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:32:57] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:32:57] [PASSED] drm_test_check_reject_audio_infoframe
[12:32:57] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:32:57] ================= drm_managed (2 subtests) =================
[12:32:57] [PASSED] drm_test_managed_release_action
[12:32:57] [PASSED] drm_test_managed_run_action
[12:32:57] =================== [PASSED] drm_managed ===================
[12:32:57] =================== drm_mm (6 subtests) ====================
[12:32:57] [PASSED] drm_test_mm_init
[12:32:57] [PASSED] drm_test_mm_debug
[12:32:57] [PASSED] drm_test_mm_align32
[12:32:57] [PASSED] drm_test_mm_align64
[12:32:57] [PASSED] drm_test_mm_lowest
[12:32:57] [PASSED] drm_test_mm_highest
[12:32:57] ===================== [PASSED] drm_mm ======================
[12:32:57] ============= drm_modes_analog_tv (5 subtests) =============
[12:32:57] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:32:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:32:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:32:57] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:32:57] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:32:57] =============== [PASSED] drm_modes_analog_tv ===============
[12:32:57] ============== drm_panic_helper (3 subtests) ===============
[12:32:57] ============= drm_test_panic_screen_user_map ==============
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:32:57] ========= [PASSED] drm_test_panic_screen_user_map ==========
[12:32:57] ============= drm_test_panic_screen_user_page =============
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:32:57] ========= [PASSED] drm_test_panic_screen_user_page =========
[12:32:57] ========== drm_test_panic_screen_user_set_pixel ===========
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:32:57] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:32:57] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:32:57] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:32:58] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:32:58] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:32:58] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:32:58] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[12:32:58] ================ [PASSED] drm_panic_helper =================
[12:32:58] ============== drm_plane_helper (2 subtests) ===============
[12:32:58] =============== drm_test_check_plane_state ================
[12:32:58] [PASSED] clipping_simple
[12:32:58] [PASSED] clipping_rotate_reflect
[12:32:58] [PASSED] positioning_simple
[12:32:58] [PASSED] upscaling
[12:32:58] [PASSED] downscaling
[12:32:58] [PASSED] rounding1
[12:32:58] [PASSED] rounding2
[12:32:58] [PASSED] rounding3
[12:32:58] [PASSED] rounding4
[12:32:58] =========== [PASSED] drm_test_check_plane_state ============
[12:32:58] =========== drm_test_check_invalid_plane_state ============
[12:32:58] [PASSED] positioning_invalid
[12:32:58] [PASSED] upscaling_invalid
[12:32:58] [PASSED] downscaling_invalid
[12:32:58] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:32:58] ================ [PASSED] drm_plane_helper =================
[12:32:58] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:32:58] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:32:58] [PASSED] None
[12:32:58] [PASSED] PAL
[12:32:58] [PASSED] NTSC
[12:32:58] [PASSED] Both, NTSC Default
[12:32:58] [PASSED] Both, PAL Default
[12:32:58] [PASSED] Both, NTSC Default, with PAL on command-line
[12:32:58] [PASSED] Both, PAL Default, with NTSC on command-line
[12:32:58] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:32:58] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:32:58] ================== drm_rect (9 subtests) ===================
[12:32:58] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:32:58] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:32:58] [PASSED] drm_test_rect_clip_scaled_clipped
[12:32:58] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:32:58] ================= drm_test_rect_intersect =================
[12:32:58] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:32:58] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:32:58] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:32:58] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:32:58] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:32:58] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:32:58] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:32:58] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:32:58] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:32:58] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:32:58] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:32:58] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:32:58] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:32:58] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:32:58] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:32:58] ============= [PASSED] drm_test_rect_intersect =============
[12:32:58] ================ drm_test_rect_calc_hscale ================
[12:32:58] [PASSED] normal use
[12:32:58] [PASSED] out of max range
[12:32:58] [PASSED] out of min range
[12:32:58] [PASSED] zero dst
[12:32:58] [PASSED] negative src
[12:32:58] [PASSED] negative dst
[12:32:58] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:32:58] ================ drm_test_rect_calc_vscale ================
[12:32:58] [PASSED] normal use
[12:32:58] [PASSED] out of max range
[12:32:58] [PASSED] out of min range
[12:32:58] [PASSED] zero dst
[12:32:58] [PASSED] negative src
[12:32:58] [PASSED] negative dst
[12:32:58] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:32:58] ================== drm_test_rect_rotate ===================
[12:32:58] [PASSED] reflect-x
[12:32:58] [PASSED] reflect-y
[12:32:58] [PASSED] rotate-0
[12:32:58] [PASSED] rotate-90
[12:32:58] [PASSED] rotate-180
[12:32:58] [PASSED] rotate-270
[12:32:58] ============== [PASSED] drm_test_rect_rotate ===============
[12:32:58] ================ drm_test_rect_rotate_inv =================
[12:32:58] [PASSED] reflect-x
[12:32:58] [PASSED] reflect-y
[12:32:58] [PASSED] rotate-0
[12:32:58] [PASSED] rotate-90
[12:32:58] [PASSED] rotate-180
[12:32:58] [PASSED] rotate-270
[12:32:58] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:32:58] ==================== [PASSED] drm_rect =====================
[12:32:58] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:32:58] ============ drm_test_sysfb_build_fourcc_list =============
[12:32:58] [PASSED] no native formats
[12:32:58] [PASSED] XRGB8888 as native format
[12:32:58] [PASSED] remove duplicates
[12:32:58] [PASSED] convert alpha formats
[12:32:58] [PASSED] random formats
[12:32:58] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:32:58] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:32:58] ================== drm_fixp (2 subtests) ===================
[12:32:58] [PASSED] drm_test_int2fixp
[12:32:58] [PASSED] drm_test_sm2fixp
[12:32:58] ==================== [PASSED] drm_fixp =====================
[12:32:58] ============================================================
[12:32:58] Testing complete. Ran 667 tests: passed: 667
[12:32:58] Elapsed time: 27.590s total, 1.867s configuring, 25.307s building, 0.406s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:32:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:33:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:33:10] Starting KUnit Kernel (1/1)...
[12:33:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:33:10] ================= ttm_device (5 subtests) ==================
[12:33:10] [PASSED] ttm_device_init_basic
[12:33:10] [PASSED] ttm_device_init_multiple
[12:33:10] [PASSED] ttm_device_fini_basic
[12:33:10] [PASSED] ttm_device_init_no_vma_man
[12:33:10] ================== ttm_device_init_pools ==================
[12:33:10] [PASSED] No DMA allocations, no DMA32 required
[12:33:10] [PASSED] DMA allocations, DMA32 required
[12:33:10] [PASSED] No DMA allocations, DMA32 required
[12:33:10] [PASSED] DMA allocations, no DMA32 required
[12:33:10] ============== [PASSED] ttm_device_init_pools ==============
[12:33:10] =================== [PASSED] ttm_device ====================
[12:33:10] ================== ttm_pool (8 subtests) ===================
[12:33:10] ================== ttm_pool_alloc_basic ===================
[12:33:10] [PASSED] One page
[12:33:10] [PASSED] More than one page
[12:33:10] [PASSED] Above the allocation limit
[12:33:10] [PASSED] One page, with coherent DMA mappings enabled
[12:33:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:33:10] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:33:10] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:33:10] [PASSED] One page
[12:33:10] [PASSED] More than one page
[12:33:10] [PASSED] Above the allocation limit
[12:33:10] [PASSED] One page, with coherent DMA mappings enabled
[12:33:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:33:10] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:33:10] [PASSED] ttm_pool_alloc_order_caching_match
[12:33:10] [PASSED] ttm_pool_alloc_caching_mismatch
[12:33:10] [PASSED] ttm_pool_alloc_order_mismatch
[12:33:10] [PASSED] ttm_pool_free_dma_alloc
[12:33:10] [PASSED] ttm_pool_free_no_dma_alloc
[12:33:10] [PASSED] ttm_pool_fini_basic
[12:33:10] ==================== [PASSED] ttm_pool =====================
[12:33:10] ================ ttm_resource (8 subtests) =================
[12:33:10] ================= ttm_resource_init_basic =================
[12:33:10] [PASSED] Init resource in TTM_PL_SYSTEM
[12:33:10] [PASSED] Init resource in TTM_PL_VRAM
[12:33:10] [PASSED] Init resource in a private placement
[12:33:10] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:33:10] ============= [PASSED] ttm_resource_init_basic =============
[12:33:10] [PASSED] ttm_resource_init_pinned
[12:33:10] [PASSED] ttm_resource_fini_basic
[12:33:10] [PASSED] ttm_resource_manager_init_basic
[12:33:10] [PASSED] ttm_resource_manager_usage_basic
[12:33:10] [PASSED] ttm_resource_manager_set_used_basic
[12:33:10] [PASSED] ttm_sys_man_alloc_basic
[12:33:10] [PASSED] ttm_sys_man_free_basic
[12:33:10] ================== [PASSED] ttm_resource ===================
[12:33:10] =================== ttm_tt (15 subtests) ===================
[12:33:10] ==================== ttm_tt_init_basic ====================
[12:33:10] [PASSED] Page-aligned size
[12:33:10] [PASSED] Extra pages requested
[12:33:10] ================ [PASSED] ttm_tt_init_basic ================
[12:33:10] [PASSED] ttm_tt_init_misaligned
[12:33:10] [PASSED] ttm_tt_fini_basic
[12:33:10] [PASSED] ttm_tt_fini_sg
[12:33:10] [PASSED] ttm_tt_fini_shmem
[12:33:10] [PASSED] ttm_tt_create_basic
[12:33:10] [PASSED] ttm_tt_create_invalid_bo_type
[12:33:10] [PASSED] ttm_tt_create_ttm_exists
[12:33:10] [PASSED] ttm_tt_create_failed
[12:33:10] [PASSED] ttm_tt_destroy_basic
[12:33:10] [PASSED] ttm_tt_populate_null_ttm
[12:33:10] [PASSED] ttm_tt_populate_populated_ttm
[12:33:10] [PASSED] ttm_tt_unpopulate_basic
[12:33:10] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:33:10] [PASSED] ttm_tt_swapin_basic
[12:33:10] ===================== [PASSED] ttm_tt ======================
[12:33:10] =================== ttm_bo (14 subtests) ===================
[12:33:10] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:33:10] [PASSED] Cannot be interrupted and sleeps
[12:33:10] [PASSED] Cannot be interrupted, locks straight away
[12:33:10] [PASSED] Can be interrupted, sleeps
[12:33:10] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:33:10] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:33:10] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:33:10] [PASSED] ttm_bo_reserve_double_resv
[12:33:10] [PASSED] ttm_bo_reserve_interrupted
[12:33:10] [PASSED] ttm_bo_reserve_deadlock
[12:33:10] [PASSED] ttm_bo_unreserve_basic
[12:33:10] [PASSED] ttm_bo_unreserve_pinned
[12:33:10] [PASSED] ttm_bo_unreserve_bulk
[12:33:10] [PASSED] ttm_bo_fini_basic
[12:33:10] [PASSED] ttm_bo_fini_shared_resv
[12:33:10] [PASSED] ttm_bo_pin_basic
[12:33:10] [PASSED] ttm_bo_pin_unpin_resource
[12:33:10] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:33:10] ===================== [PASSED] ttm_bo ======================
[12:33:10] ============== ttm_bo_validate (22 subtests) ===============
[12:33:10] ============== ttm_bo_init_reserved_sys_man ===============
[12:33:10] [PASSED] Buffer object for userspace
[12:33:10] [PASSED] Kernel buffer object
[12:33:10] [PASSED] Shared buffer object
[12:33:10] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:33:10] ============== ttm_bo_init_reserved_mock_man ==============
[12:33:10] [PASSED] Buffer object for userspace
[12:33:10] [PASSED] Kernel buffer object
[12:33:10] [PASSED] Shared buffer object
[12:33:10] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:33:10] [PASSED] ttm_bo_init_reserved_resv
[12:33:10] ================== ttm_bo_validate_basic ==================
[12:33:10] [PASSED] Buffer object for userspace
[12:33:10] [PASSED] Kernel buffer object
[12:33:10] [PASSED] Shared buffer object
[12:33:10] ============== [PASSED] ttm_bo_validate_basic ==============
[12:33:10] [PASSED] ttm_bo_validate_invalid_placement
[12:33:10] ============= ttm_bo_validate_same_placement ==============
[12:33:10] [PASSED] System manager
[12:33:10] [PASSED] VRAM manager
[12:33:10] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:33:10] [PASSED] ttm_bo_validate_failed_alloc
[12:33:10] [PASSED] ttm_bo_validate_pinned
[12:33:10] [PASSED] ttm_bo_validate_busy_placement
[12:33:10] ================ ttm_bo_validate_multihop =================
[12:33:10] [PASSED] Buffer object for userspace
[12:33:10] [PASSED] Kernel buffer object
[12:33:10] [PASSED] Shared buffer object
[12:33:10] ============ [PASSED] ttm_bo_validate_multihop =============
[12:33:10] ========== ttm_bo_validate_no_placement_signaled ==========
[12:33:10] [PASSED] Buffer object in system domain, no page vector
[12:33:10] [PASSED] Buffer object in system domain with an existing page vector
[12:33:10] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:33:10] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:33:10] [PASSED] Buffer object for userspace
[12:33:10] [PASSED] Kernel buffer object
[12:33:10] [PASSED] Shared buffer object
[12:33:10] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:33:10] [PASSED] ttm_bo_validate_move_fence_signaled
[12:33:10] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:33:10] [PASSED] Waits for GPU
[12:33:10] [PASSED] Tries to lock straight away
[12:33:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:33:10] [PASSED] ttm_bo_validate_swapout
[12:33:10] [PASSED] ttm_bo_validate_happy_evict
[12:33:10] [PASSED] ttm_bo_validate_all_pinned_evict
[12:33:10] [PASSED] ttm_bo_validate_allowed_only_evict
[12:33:10] [PASSED] ttm_bo_validate_deleted_evict
[12:33:10] [PASSED] ttm_bo_validate_busy_domain_evict
[12:33:10] [PASSED] ttm_bo_validate_evict_gutting
[12:33:10] [PASSED] ttm_bo_validate_recrusive_evict
[12:33:10] ================= [PASSED] ttm_bo_validate =================
[12:33:10] ============================================================
[12:33:10] Testing complete. Ran 102 tests: passed: 102
[12:33:10] Elapsed time: 12.331s total, 1.872s configuring, 10.243s building, 0.171s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[12:33:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:33:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:33:21] Starting KUnit Kernel (1/1)...
[12:33:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:33:21] =============== dma-buf-fence (12 subtests) ================
[12:33:21] [PASSED] test_sanitycheck
[12:33:21] [PASSED] test_signaling
[12:33:21] [PASSED] test_add_callback
[12:33:21] [PASSED] test_late_add_callback
[12:33:21] [PASSED] test_rm_callback
[12:33:21] [PASSED] test_late_rm_callback
[12:33:21] [PASSED] test_status
[12:33:21] [PASSED] test_error
[12:33:21] [PASSED] test_wait
[12:33:21] [PASSED] test_wait_timeout
[12:33:21] [PASSED] test_stub
[12:33:21] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[12:33:21] ================== [PASSED] dma-buf-fence ==================
[12:33:21] ============ dma-buf-fence-chain (11 subtests) =============
[12:33:21] [PASSED] test_sanitycheck
[12:33:21] [PASSED] test_find_seqno
[12:33:21] [PASSED] test_find_signaled
[12:33:21] [PASSED] test_find_out_of_order
[12:33:26] [PASSED] test_find_gap
[12:33:26] [PASSED] test_find_race
[12:33:26] [PASSED] test_signal_forward
[12:33:26] [PASSED] test_signal_backward
[12:33:26] [PASSED] test_wait_forward
[12:33:26] [PASSED] test_wait_backward
[12:33:26] [PASSED] test_wait_random
[12:33:26] =============== [PASSED] dma-buf-fence-chain ===============
[12:33:26] ============ dma-buf-fence-unwrap (11 subtests) ============
[12:33:26] [PASSED] test_sanitycheck
[12:33:26] [PASSED] test_unwrap_array
[12:33:26] [PASSED] test_unwrap_chain
[12:33:26] [PASSED] test_unwrap_chain_array
[12:33:26] [PASSED] test_unwrap_merge
[12:33:26] [PASSED] test_unwrap_merge_duplicate
[12:33:26] [PASSED] test_unwrap_merge_seqno
[12:33:26] [PASSED] test_unwrap_merge_order
[12:33:26] [PASSED] test_unwrap_merge_complex
[12:33:26] [PASSED] test_unwrap_merge_complex_seqno
[12:33:26] [PASSED] test_dedup_empty
[12:33:26] ============== [PASSED] dma-buf-fence-unwrap ===============
[12:33:26] ================ dma-buf-resv (5 subtests) =================
[12:33:26] [PASSED] test_sanitycheck
[12:33:26] ===================== test_signaling ======================
[12:33:26] [PASSED] kernel
[12:33:26] [PASSED] write
[12:33:26] [PASSED] read
[12:33:26] [PASSED] bookkeep
[12:33:26] ================= [PASSED] test_signaling ==================
[12:33:26] ====================== test_for_each ======================
[12:33:26] [PASSED] kernel
[12:33:26] [PASSED] write
[12:33:26] [PASSED] read
[12:33:26] [PASSED] bookkeep
[12:33:26] ================== [PASSED] test_for_each ==================
[12:33:26] ================= test_for_each_unlocked ==================
[12:33:26] [PASSED] kernel
[12:33:26] [PASSED] write
[12:33:26] [PASSED] read
[12:33:26] [PASSED] bookkeep
[12:33:26] ============= [PASSED] test_for_each_unlocked ==============
[12:33:26] ===================== test_get_fences =====================
[12:33:26] [PASSED] kernel
[12:33:26] [PASSED] write
[12:33:26] [PASSED] read
[12:33:26] [PASSED] bookkeep
[12:33:26] ================= [PASSED] test_get_fences =================
[12:33:26] ================== [PASSED] dma-buf-resv ===================
[12:33:26] ============================================================
[12:33:26] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[12:33:26] Elapsed time: 15.894s total, 1.868s configuring, 8.654s building, 5.338s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.BAT: success for Interruptible bb wait + related bits
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
` (6 preceding siblings ...)
2026-10-30 12:33 ` ✓ CI.KUnit: success for Interruptible bb wait + related bits Patchwork
@ 2026-10-30 13:16 ` Patchwork
7 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-10-30 13:16 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2616 bytes --]
== Series Details ==
Series: Interruptible bb wait + related bits
URL : https://patchwork.freedesktop.org/series/177249/
State : success
== Summary ==
CI Bug Log - changes from xe-6033-a8997640de2e96daca6ba2a01ed65a7bb48d3807_BAT -> xe-pw-177249v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 15)
------------------------------
Additional (1): bat-bmg-vm
Known issues
------------
Here are the changes found in xe-pw-177249v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_exec_multi_queue@many-queues-userptr-invalidate:
- bat-bmg-vm: NOTRUN -> [SKIP][1] ([Intel XE#8364]) +13 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177249v1/bat-bmg-vm/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-vm: NOTRUN -> [SKIP][2] ([Intel XE#2229])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177249v1/bat-bmg-vm/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-vm: NOTRUN -> [SKIP][3] ([Intel XE#1420] / [Intel XE#7590])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177249v1/bat-bmg-vm/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-vm: NOTRUN -> [SKIP][4] ([Intel XE#2245] / [Intel XE#7590])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177249v1/bat-bmg-vm/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-vm: NOTRUN -> [SKIP][5] ([Intel XE#2236] / [Intel XE#7590])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177249v1/bat-bmg-vm/igt@xe_pat@pat-index-xelpg.html
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-6033-a8997640de2e96daca6ba2a01ed65a7bb48d3807 -> xe-pw-177249v1
IGT_9171: 9171
xe-6033-a8997640de2e96daca6ba2a01ed65a7bb48d3807: a8997640de2e96daca6ba2a01ed65a7bb48d3807
xe-pw-177249v1: 177249v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-177249v1/index.html
[-- Attachment #2: Type: text/html, Size: 3416 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears
2026-10-30 11:49 ` [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears Matthew Auld
@ 2026-10-30 15:20 ` Thomas Hellström
0 siblings, 0 replies; 15+ messages in thread
From: Thomas Hellström @ 2026-10-30 15:20 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matthew Brost
On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> xe_migrate_clear() currently clamps every clear pass to 8M. On
> platforms
> with Xe2 blitter instructions and no separate CCS copy emission, VRAM
> clears use the identity map without dynamic PTE updates and execute
> on
> the dedicated migration engine, so clamping each pass to 8M splits
> a 1G+ clear into 100+ jobs. 1G VRAM pages look quite normal in real
> workloads like llama.py with even a small model.
>
> It looks like the 8M limit comes from wanting a ~1ms preemption
> granularity, and dates back to i915. But consider:
>
> 1. Xe has kernel reserved BCS engine just for migrations on newer hw,
> so no need to duke it out with userspace jobs. Further, we now
> also
> dropped the GPU VM_BIND path, so there is now only a single
> migration
> queue, so the ~1ms preemption granularity is maybe not a big deal
> anymore.
>
> 2. It does not take ~1ms to clear 8M (single MEM_SET) of VRAM through
> the identity map. Currently we just lump everything in the same
> bucket, even though we have VRAM clearing with identity, VRAM
> clearing with PTE emit, and then copying between VRAM and system
> memory, which will have different characteristics and performance.
> Applying the same 8M limit everywhere seems overly cautious.
>
> With that be more optimistic and bump the fast path VRAM clearing
> through identity map to 128M per single MEM_SET instruction. This
> still
> only takes up to around < ~2ms, or < ~1ms if boosted. For very large
> clears, this massively lowers the number of GPU jobs, reducing
> pressure
> on the bb pool and as a bonus gives slightly lower CPU/GPU overhead.
>
> Assisted-by: LLM
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> b/drivers/gpu/drm/xe/xe_migrate.c
> index 70408fa0a606..1a216fb12d2b 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -246,6 +246,7 @@ struct xe_migrate {
>
> #define MAX_PREEMPTDISABLE_TRANSFER SZ_8M /* Around 1ms. */
> #define MAX_CCS_LIMITED_TRANSFER SZ_4M /* XE_PAGE_SIZE *
> (FIELD_MAX(XE2_CCS_SIZE_MASK) + 1) */
> +#define MAX_IDENTITY_CLEAR_TRANSFER SZ_128M
> #define NUM_PT_SLOTS 48
> #define LEVEL0_PAGE_TABLE_ENCODE_SIZE SZ_2M
> #define MAX_NUM_PTE 512
> @@ -1964,6 +1965,11 @@ struct dma_fence *xe_migrate_clear(struct
> xe_migrate *m,
> u32 avail_pts = max_mem_transfer_per_pass(xe) /
> LEVEL0_PAGE_TABLE_ENCODE_SIZE;
>
> clear_L0 = xe_migrate_res_sizes(m, &src_it);
> + if (clear_vram && !xe_migrate_needs_ccs_emit(xe) &&
> + gt->info.has_xe2_blt_instructions &&
> + xe_migrate_allow_identity(clear_L0, &src_it))
> + clear_L0 = min_t(u64,
> MAX_IDENTITY_CLEAR_TRANSFER,
> + src_it.size);
>
> /* Calculate final sizes and batch size.. */
> pte_flags = clear_vram ? PTE_UPDATE_FLAG_IS_VRAM :
> 0;
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] drm/xe/bb: drop per-batch prefetch padding
2026-10-30 11:49 ` [PATCH 2/6] drm/xe/bb: drop per-batch prefetch padding Matthew Auld
@ 2026-10-30 15:21 ` Thomas Hellström
0 siblings, 0 replies; 15+ messages in thread
From: Thomas Hellström @ 2026-10-30 15:21 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matthew Brost
On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> xe_bb_new() currently appends bb_prefetch() (512B or 1K) to every
> batch suballocation, inflating a 36B identity-mapped clear batch to
> ~1K and also causing xe_sa_bo_flush_write() to copy up to 1K of
> unused
> padding to VRAM on every batch.
>
> However, both kernel_bb_pool and usm.bb_pool are initialised via
> xe_sa_bo_manager_init(), which already reserves a 4K guard region at
> the end of the backing BO to cover CS prefetch, and prefetching into
> adjacent suballocations within the mapped pool should be harmless.
> Drop
> bb_prefetch().
>
> This should reduce pressure on the bb pool.
>
> Assisted-by: LLM
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/xe_bb.c | 26 ++++++--------------------
> 1 file changed, 6 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
> index b896b6f6615c..b2603902c147 100644
> --- a/drivers/gpu/drm/xe/xe_bb.c
> +++ b/drivers/gpu/drm/xe/xe_bb.c
> @@ -14,20 +14,6 @@
> #include "xe_sched_job.h"
> #include "xe_vm_types.h"
>
> -static int bb_prefetch(struct xe_gt *gt)
> -{
> - struct xe_device *xe = gt_to_xe(gt);
> -
> - if (GRAPHICS_VERx100(xe) >= 1250 && xe_gt_is_main_type(gt))
> - /*
> - * RCS and CCS require 1K, although other engines
> would be
> - * okay with 512.
> - */
> - return SZ_1K;
> - else
> - return SZ_512;
> -}
> -
> struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
> {
> struct xe_tile *tile = gt_to_tile(gt);
> @@ -38,13 +24,13 @@ struct xe_bb *xe_bb_new(struct xe_gt *gt, u32
> dwords, bool usm)
> return ERR_PTR(-ENOMEM);
>
> /*
> - * We need to allocate space for the requested number of
> dwords,
> - * one additional MI_BATCH_BUFFER_END dword, and additional
> buffer
> - * space to accommodate the platform-specific hardware
> prefetch
> - * requirements.
> + * We need to allocate space for the requested number of
> dwords and
> + * one additional MI_BATCH_BUFFER_END dword. Hardware CS
> prefetch
> + * at the end of the pool BO is covered by the SZ_4K guard
> region
> + * reserved by xe_sa_bo_manager_init().
> */
> bb->bo = xe_sa_bo_new(!usm ? tile->mem.kernel_bb_pool : gt-
> >usm.bb_pool,
> - 4 * (dwords + 1) + bb_prefetch(gt));
> + 4 * (dwords + 1));
> if (IS_ERR(bb->bo)) {
> err = PTR_ERR(bb->bo);
> goto err;
> @@ -129,7 +115,7 @@ __xe_bb_create_job(struct xe_exec_queue *q,
> struct xe_bb *bb, u64 *addr)
> if (bb->len == 0 || bb->cs[bb->len - 1] !=
> MI_BATCH_BUFFER_END)
> bb->cs[bb->len++] = MI_BATCH_BUFFER_END;
>
> - xe_gt_assert(q->gt, bb->len * 4 + bb_prefetch(q->gt) <=
> size);
> + xe_gt_assert(q->gt, bb->len * 4 <= size);
>
> xe_sa_bo_flush_write(bb->bo);
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 3/6] drm/xe/sa: remove unused shadow BO and two-step bb helpers
2026-10-30 11:49 ` [PATCH 3/6] drm/xe/sa: remove unused shadow BO and two-step bb helpers Matthew Auld
@ 2026-10-30 15:23 ` Thomas Hellström
0 siblings, 0 replies; 15+ messages in thread
From: Thomas Hellström @ 2026-10-30 15:23 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matthew Brost
On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> Since commit 1460eae74fbb ("drm/xe/vf: Use drm mm instead of drm sa
> for
> CCS read/write"), the two-step bb/sa allocation helpers and SA shadow
> BO
> support have no callers. Remove the dead code along with the unused
> flags argument of __xe_sa_bo_manager_init().
>
> Assisted-by: LLM
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Was there drm suballocator code introduced as well that is now dead?
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/xe_bb.c | 62 -----------------------
> drivers/gpu/drm/xe/xe_bb.h | 3 --
> drivers/gpu/drm/xe/xe_guc_buf.c | 2 +-
> drivers/gpu/drm/xe/xe_sa.c | 103 +----------------------------
> ----------
> drivers/gpu/drm/xe/xe_sa.h | 22 +--------
> drivers/gpu/drm/xe/xe_sa_types.h | 3 --
> 6 files changed, 4 insertions(+), 191 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
> index b2603902c147..771e50e7c4e3 100644
> --- a/drivers/gpu/drm/xe/xe_bb.c
> +++ b/drivers/gpu/drm/xe/xe_bb.c
> @@ -45,68 +45,6 @@ struct xe_bb *xe_bb_new(struct xe_gt *gt, u32
> dwords, bool usm)
> return ERR_PTR(err);
> }
>
> -/**
> - * xe_bb_alloc() - Allocate a new batch buffer structure
> - * @gt: the &xe_gt
> - *
> - * Allocates and initializes a new xe_bb structure with an
> associated
> - * uninitialized suballoc object.
> - *
> - * Returns: Batch buffer structure or an ERR_PTR(-ENOMEM).
> - */
> -struct xe_bb *xe_bb_alloc(struct xe_gt *gt)
> -{
> - struct xe_bb *bb = kmalloc_obj(*bb);
> - int err;
> -
> - if (!bb)
> - return ERR_PTR(-ENOMEM);
> -
> - bb->bo = xe_sa_bo_alloc(GFP_KERNEL);
> - if (IS_ERR(bb->bo)) {
> - err = PTR_ERR(bb->bo);
> - goto err;
> - }
> -
> - return bb;
> -
> -err:
> - kfree(bb);
> - return ERR_PTR(err);
> -}
> -
> -/**
> - * xe_bb_init() - Initialize a batch buffer with memory from a sub-
> allocator pool
> - * @bb: Batch buffer structure to initialize
> - * @bb_pool: Suballoc memory pool to allocate from
> - * @dwords: Number of dwords to be allocated
> - *
> - * Initializes the batch buffer by allocating memory from the
> specified
> - * suballoc pool.
> - *
> - * Return: 0 on success, negative error code on failure.
> - */
> -int xe_bb_init(struct xe_bb *bb, struct xe_sa_manager *bb_pool, u32
> dwords)
> -{
> - int err;
> -
> - /*
> - * We need to allocate space for the requested number of
> dwords &
> - * one additional MI_BATCH_BUFFER_END dword. Since the whole
> SA
> - * is submitted to HW, we need to make sure that the last
> instruction
> - * is not over written when the last chunk of SA is
> allocated for BB.
> - * So, this extra DW acts as a guard here.
> - */
> - err = xe_sa_bo_init(bb_pool, bb->bo, 4 * (dwords + 1));
> - if (err)
> - return err;
> -
> - bb->cs = xe_sa_bo_cpu_addr(bb->bo);
> - bb->len = 0;
> -
> - return 0;
> -}
> -
> static struct xe_sched_job *
> __xe_bb_create_job(struct xe_exec_queue *q, struct xe_bb *bb, u64
> *addr)
> {
> diff --git a/drivers/gpu/drm/xe/xe_bb.h b/drivers/gpu/drm/xe/xe_bb.h
> index 231870b24c2f..b5cc65506696 100644
> --- a/drivers/gpu/drm/xe/xe_bb.h
> +++ b/drivers/gpu/drm/xe/xe_bb.h
> @@ -12,12 +12,9 @@ struct dma_fence;
>
> struct xe_gt;
> struct xe_exec_queue;
> -struct xe_sa_manager;
> struct xe_sched_job;
>
> struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm);
> -struct xe_bb *xe_bb_alloc(struct xe_gt *gt);
> -int xe_bb_init(struct xe_bb *bb, struct xe_sa_manager *bb_pool, u32
> dwords);
> struct xe_sched_job *xe_bb_create_job(struct xe_exec_queue *q,
> struct xe_bb *bb);
> struct xe_sched_job *xe_bb_create_migration_job(struct xe_exec_queue
> *q,
> diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c
> b/drivers/gpu/drm/xe/xe_guc_buf.c
> index 11f77decd8d1..7a8efb62df60 100644
> --- a/drivers/gpu/drm/xe/xe_guc_buf.c
> +++ b/drivers/gpu/drm/xe/xe_guc_buf.c
> @@ -29,7 +29,7 @@ static int guc_buf_cache_init(struct
> xe_guc_buf_cache *cache, u32 size)
> struct xe_gt *gt = cache_to_gt(cache);
> struct xe_sa_manager *sam;
>
> - sam = __xe_sa_bo_manager_init(gt_to_tile(gt), size, 0,
> sizeof(u32), 0);
> + sam = __xe_sa_bo_manager_init(gt_to_tile(gt), size, 0,
> sizeof(u32));
> if (IS_ERR(sam))
> return PTR_ERR(sam);
> cache->sam = sam;
> diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c
> index f32045f40b7a..b356d4327c97 100644
> --- a/drivers/gpu/drm/xe/xe_sa.c
> +++ b/drivers/gpu/drm/xe/xe_sa.c
> @@ -29,7 +29,6 @@ static void xe_sa_bo_manager_fini(struct drm_device
> *drm, void *arg)
> kvfree(sa_manager->cpu_ptr);
>
> sa_manager->bo = NULL;
> - sa_manager->shadow = NULL;
> }
>
> /**
> @@ -38,14 +37,12 @@ static void xe_sa_bo_manager_fini(struct
> drm_device *drm, void *arg)
> * @size: number of bytes to allocate
> * @guard: number of bytes to exclude from suballocations
> * @align: alignment for each suballocated chunk
> - * @flags: flags for suballocator
> *
> * Prepares the suballocation manager for suballocations.
> *
> * Return: a pointer to the &xe_sa_manager or an ERR_PTR on failure.
> */
> -struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile,
> u32 size,
> - u32 guard, u32 align,
> u32 flags)
> +struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile,
> u32 size, u32 guard, u32 align)
> {
> struct xe_device *xe = tile_to_xe(tile);
> struct xe_sa_manager *sa_manager;
> @@ -82,32 +79,6 @@ struct xe_sa_manager
> *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
> memset(sa_manager->cpu_ptr, 0, bo->ttm.base.size);
> }
>
> - if (flags & XE_SA_BO_MANAGER_FLAG_SHADOW) {
> - struct xe_bo *shadow;
> -
> - ret = drmm_mutex_init(&xe->drm, &sa_manager-
> >swap_guard);
> - if (ret)
> - return ERR_PTR(ret);
> -
> - if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {
> - fs_reclaim_acquire(GFP_KERNEL);
> - might_lock(&sa_manager->swap_guard);
> - fs_reclaim_release(GFP_KERNEL);
> - }
> -
> - shadow = xe_managed_bo_create_pin_map(xe, tile,
> size,
> -
> XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> -
> XE_BO_FLAG_GGTT |
> -
> XE_BO_FLAG_GGTT_INVALIDATE |
> -
> XE_BO_FLAG_PINNED_NORESTORE);
> - if (IS_ERR(shadow)) {
> - drm_err(&xe->drm, "Failed to prepare %uKiB
> BO for SA manager (%pe)\n",
> - size / SZ_1K, shadow);
> - return ERR_CAST(shadow);
> - }
> - sa_manager->shadow = shadow;
> - }
> -
> drm_suballoc_manager_init(&sa_manager->base, managed_size,
> align);
> ret = drmm_add_action_or_reset(&xe->drm,
> xe_sa_bo_manager_fini,
> sa_manager);
> @@ -117,48 +88,6 @@ struct xe_sa_manager
> *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
> return sa_manager;
> }
>
> -/**
> - * xe_sa_bo_swap_shadow() - Swap the SA BO with shadow BO.
> - * @sa_manager: the XE sub allocator manager
> - *
> - * Swaps the sub-allocator primary buffer object with shadow buffer
> object.
> - *
> - * Return: None.
> - */
> -void xe_sa_bo_swap_shadow(struct xe_sa_manager *sa_manager)
> -{
> - struct xe_device *xe = tile_to_xe(sa_manager->bo->tile);
> -
> - xe_assert(xe, sa_manager->shadow);
> - lockdep_assert_held(&sa_manager->swap_guard);
> -
> - swap(sa_manager->bo, sa_manager->shadow);
> - if (!sa_manager->bo->vmap.is_iomem)
> - sa_manager->cpu_ptr = sa_manager->bo->vmap.vaddr;
> -}
> -
> -/**
> - * xe_sa_bo_sync_shadow() - Sync the SA Shadow BO with primary BO.
> - * @sa_bo: the sub-allocator buffer object.
> - *
> - * Synchronize sub-allocator shadow buffer object with primary
> buffer object.
> - *
> - * Return: None.
> - */
> -void xe_sa_bo_sync_shadow(struct drm_suballoc *sa_bo)
> -{
> - struct xe_sa_manager *sa_manager = to_xe_sa_manager(sa_bo-
> >manager);
> - struct xe_device *xe = tile_to_xe(sa_manager->bo->tile);
> -
> - xe_assert(xe, sa_manager->shadow);
> - lockdep_assert_held(&sa_manager->swap_guard);
> -
> - xe_map_memcpy_to(xe, &sa_manager->shadow->vmap,
> - drm_suballoc_soffset(sa_bo),
> - xe_sa_bo_cpu_addr(sa_bo),
> - drm_suballoc_size(sa_bo));
> -}
> -
> /**
> * __xe_sa_bo_new() - Make a suballocation but use custom gfp flags.
> * @sa_manager: the &xe_sa_manager
> @@ -181,36 +110,6 @@ struct drm_suballoc *__xe_sa_bo_new(struct
> xe_sa_manager *sa_manager, u32 size,
> return drm_suballoc_new(&sa_manager->base, size, gfp, true,
> 0);
> }
>
> -/**
> - * xe_sa_bo_alloc() - Allocate uninitialized suballoc object.
> - * @gfp: gfp flags used for memory allocation.
> - *
> - * Allocate memory for an uninitialized suballoc object. Intended
> usage is
> - * allocate memory for suballoc object outside of a reclaim tainted
> context
> - * and then be initialized at a later time in a reclaim tainted
> context.
> - *
> - * Return: a new uninitialized suballoc object, or an ERR_PTR(-
> ENOMEM).
> - */
> -struct drm_suballoc *xe_sa_bo_alloc(gfp_t gfp)
> -{
> - return drm_suballoc_alloc(gfp);
> -}
> -
> -/**
> - * xe_sa_bo_init() - Initialize a suballocation.
> - * @sa_manager: pointer to the sa_manager
> - * @sa: The struct drm_suballoc.
> - * @size: number of bytes we want to suballocate.
> - *
> - * Try to make a suballocation on a pre-allocated suballoc object of
> size @size.
> - *
> - * Return: zero on success, errno on failure.
> - */
> -int xe_sa_bo_init(struct xe_sa_manager *sa_manager, struct
> drm_suballoc *sa, size_t size)
> -{
> - return drm_suballoc_insert(&sa_manager->base, sa, size,
> true, 0);
> -}
> -
> /**
> * xe_sa_bo_flush_write() - Copy the data from the sub-allocation to
> the GPU memory.
> * @sa_bo: the &drm_suballoc to flush
> diff --git a/drivers/gpu/drm/xe/xe_sa.h b/drivers/gpu/drm/xe/xe_sa.h
> index 50218b0d1404..1be744350836 100644
> --- a/drivers/gpu/drm/xe/xe_sa.h
> +++ b/drivers/gpu/drm/xe/xe_sa.h
> @@ -14,14 +14,12 @@
> struct dma_fence;
> struct xe_tile;
>
> -#define XE_SA_BO_MANAGER_FLAG_SHADOW BIT(0)
> -struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile,
> u32 size,
> - u32 guard, u32 align,
> u32 flags);
> +struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile,
> u32 size, u32 guard, u32 align);
> struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager
> *sa_manager, u32 size, gfp_t gfp);
>
> static inline struct xe_sa_manager *xe_sa_bo_manager_init(struct
> xe_tile *tile, u32 size, u32 align)
> {
> - return __xe_sa_bo_manager_init(tile, size, SZ_4K, align, 0);
> + return __xe_sa_bo_manager_init(tile, size, SZ_4K, align);
> }
>
> /**
> @@ -38,8 +36,6 @@ static inline struct drm_suballoc
> *xe_sa_bo_new(struct xe_sa_manager *sa_manager
> return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL);
> }
>
> -struct drm_suballoc *xe_sa_bo_alloc(gfp_t gfp);
> -int xe_sa_bo_init(struct xe_sa_manager *sa_manager, struct
> drm_suballoc *sa, size_t size);
> void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo);
> void xe_sa_bo_sync_read(struct drm_suballoc *sa_bo);
> void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence
> *fence);
> @@ -73,18 +69,4 @@ static inline void *xe_sa_bo_cpu_addr(struct
> drm_suballoc *sa)
> drm_suballoc_soffset(sa);
> }
>
> -void xe_sa_bo_swap_shadow(struct xe_sa_manager *sa_manager);
> -void xe_sa_bo_sync_shadow(struct drm_suballoc *sa_bo);
> -
> -/**
> - * xe_sa_bo_swap_guard() - Retrieve the SA BO swap guard within sub-
> allocator.
> - * @sa_manager: the &xe_sa_manager
> - *
> - * Return: Sub alloctor swap guard mutex.
> - */
> -static inline struct mutex *xe_sa_bo_swap_guard(struct xe_sa_manager
> *sa_manager)
> -{
> - return &sa_manager->swap_guard;
> -}
> -
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_sa_types.h
> b/drivers/gpu/drm/xe/xe_sa_types.h
> index 1085c9c37d6b..cb7238799dcb 100644
> --- a/drivers/gpu/drm/xe/xe_sa_types.h
> +++ b/drivers/gpu/drm/xe/xe_sa_types.h
> @@ -12,9 +12,6 @@ struct xe_bo;
> struct xe_sa_manager {
> struct drm_suballoc_manager base;
> struct xe_bo *bo;
> - struct xe_bo *shadow;
> - /** @swap_guard: Timeline guard updating @bo and @shadow */
> - struct mutex swap_guard;
> void *cpu_ptr;
> bool is_iomem;
> };
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/6] drm/xe/sa: allow callers to specify interruptible suballocator waits
2026-10-30 11:49 ` [PATCH 4/6] drm/xe/sa: allow callers to specify interruptible suballocator waits Matthew Auld
@ 2026-10-30 15:25 ` Thomas Hellström
0 siblings, 0 replies; 15+ messages in thread
From: Thomas Hellström @ 2026-10-30 15:25 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matthew Brost
On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> __xe_sa_bo_new() currently hardcodes intr=true when calling
> drm_suballoc_new(), making every suballocator wait interruptible even
> when the caller cannot tolerate -ERESTARTSYS.
>
> Plumb a bool intr parameter through __xe_sa_bo_new(), xe_sa_bo_new(),
> and __xe_bb_new(), while defaulting xe_bb_new() to false for
> kernel-internal callers.
>
> Assisted-by: LLM
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/xe_bb.c | 4 ++--
> drivers/gpu/drm/xe/xe_bb.h | 9 ++++++++-
> drivers/gpu/drm/xe/xe_guc_buf.c | 4 ++--
> drivers/gpu/drm/xe/xe_page_reclaim.c | 2 +-
> drivers/gpu/drm/xe/xe_sa.c | 6 ++++--
> drivers/gpu/drm/xe/xe_sa.h | 9 ++++++---
> 6 files changed, 23 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
> index 771e50e7c4e3..7f71233b1036 100644
> --- a/drivers/gpu/drm/xe/xe_bb.c
> +++ b/drivers/gpu/drm/xe/xe_bb.c
> @@ -14,7 +14,7 @@
> #include "xe_sched_job.h"
> #include "xe_vm_types.h"
>
> -struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm)
> +struct xe_bb *__xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm,
> bool intr)
> {
> struct xe_tile *tile = gt_to_tile(gt);
> struct xe_bb *bb = kmalloc_obj(*bb);
> @@ -30,7 +30,7 @@ struct xe_bb *xe_bb_new(struct xe_gt *gt, u32
> dwords, bool usm)
> * reserved by xe_sa_bo_manager_init().
> */
> bb->bo = xe_sa_bo_new(!usm ? tile->mem.kernel_bb_pool : gt-
> >usm.bb_pool,
> - 4 * (dwords + 1));
> + 4 * (dwords + 1), intr);
> if (IS_ERR(bb->bo)) {
> err = PTR_ERR(bb->bo);
> goto err;
> diff --git a/drivers/gpu/drm/xe/xe_bb.h b/drivers/gpu/drm/xe/xe_bb.h
> index b5cc65506696..6f685176d4e8 100644
> --- a/drivers/gpu/drm/xe/xe_bb.h
> +++ b/drivers/gpu/drm/xe/xe_bb.h
> @@ -6,6 +6,8 @@
> #ifndef _XE_BB_H_
> #define _XE_BB_H_
>
> +#include <linux/types.h>
> +
> #include "xe_bb_types.h"
>
> struct dma_fence;
> @@ -14,7 +16,12 @@ struct xe_gt;
> struct xe_exec_queue;
> struct xe_sched_job;
>
> -struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm);
> +struct xe_bb *__xe_bb_new(struct xe_gt *gt, u32 dwords, bool usm,
> bool intr);
> +
> +static inline struct xe_bb *xe_bb_new(struct xe_gt *gt, u32 dwords,
> bool usm)
> +{
> + return __xe_bb_new(gt, dwords, usm, false);
> +}
> struct xe_sched_job *xe_bb_create_job(struct xe_exec_queue *q,
> struct xe_bb *bb);
> struct xe_sched_job *xe_bb_create_migration_job(struct xe_exec_queue
> *q,
> diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c
> b/drivers/gpu/drm/xe/xe_guc_buf.c
> index 7a8efb62df60..ec0b64a1d4c1 100644
> --- a/drivers/gpu/drm/xe/xe_guc_buf.c
> +++ b/drivers/gpu/drm/xe/xe_guc_buf.c
> @@ -95,7 +95,7 @@ struct xe_guc_buf xe_guc_buf_reserve(struct
> xe_guc_buf_cache *cache, u32 dwords)
> struct drm_suballoc *sa;
>
> if (cache->sam)
> - sa = __xe_sa_bo_new(cache->sam, dwords *
> sizeof(u32), GFP_ATOMIC);
> + sa = __xe_sa_bo_new(cache->sam, dwords *
> sizeof(u32), GFP_ATOMIC, false);
> else
> sa = ERR_PTR(-EOPNOTSUPP);
>
> @@ -117,7 +117,7 @@ struct xe_guc_buf xe_guc_buf_from_data(struct
> xe_guc_buf_cache *cache,
> {
> struct drm_suballoc *sa;
>
> - sa = __xe_sa_bo_new(cache->sam, size, GFP_ATOMIC);
> + sa = __xe_sa_bo_new(cache->sam, size, GFP_ATOMIC, false);
> if (!IS_ERR(sa))
> memcpy(xe_sa_bo_cpu_addr(sa), data, size);
>
> diff --git a/drivers/gpu/drm/xe/xe_page_reclaim.c
> b/drivers/gpu/drm/xe/xe_page_reclaim.c
> index da1ed99cd3f8..921f30ffb4cb 100644
> --- a/drivers/gpu/drm/xe/xe_page_reclaim.c
> +++ b/drivers/gpu/drm/xe/xe_page_reclaim.c
> @@ -76,7 +76,7 @@ struct drm_suballoc
> *xe_page_reclaim_create_prl_bo(struct xe_tlb_inval *tlb_inva
>
> /* Maximum size of PRL is 1 4K-page */
> prl_sa = __xe_sa_bo_new(tile->mem.reclaim_pool,
> - prl_size, GFP_ATOMIC);
> + prl_size, GFP_ATOMIC, false);
> if (IS_ERR(prl_sa))
> return prl_sa;
>
> diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c
> index b356d4327c97..d9da4276b5dd 100644
> --- a/drivers/gpu/drm/xe/xe_sa.c
> +++ b/drivers/gpu/drm/xe/xe_sa.c
> @@ -93,12 +93,14 @@ struct xe_sa_manager
> *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u3
> * @sa_manager: the &xe_sa_manager
> * @size: number of bytes we want to suballocate
> * @gfp: gfp flags used for memory allocation. Typically GFP_KERNEL.
> + * @intr: whether to wait interruptibly if space is not immediately
> available
> *
> * Try to make a suballocation of size @size.
> *
> * Return: a &drm_suballoc, or an ERR_PTR.
> */
> -struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager
> *sa_manager, u32 size, gfp_t gfp)
> +struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager
> *sa_manager, u32 size,
> + gfp_t gfp, bool intr)
> {
> /*
> * BB to large, return -ENOBUFS indicating user should split
> @@ -107,7 +109,7 @@ struct drm_suballoc *__xe_sa_bo_new(struct
> xe_sa_manager *sa_manager, u32 size,
> if (size > sa_manager->base.size)
> return ERR_PTR(-ENOBUFS);
>
> - return drm_suballoc_new(&sa_manager->base, size, gfp, true,
> 0);
> + return drm_suballoc_new(&sa_manager->base, size, gfp, intr,
> 0);
> }
>
> /**
> diff --git a/drivers/gpu/drm/xe/xe_sa.h b/drivers/gpu/drm/xe/xe_sa.h
> index 1be744350836..bf81be165ea0 100644
> --- a/drivers/gpu/drm/xe/xe_sa.h
> +++ b/drivers/gpu/drm/xe/xe_sa.h
> @@ -15,7 +15,8 @@ struct dma_fence;
> struct xe_tile;
>
> struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile,
> u32 size, u32 guard, u32 align);
> -struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager
> *sa_manager, u32 size, gfp_t gfp);
> +struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager
> *sa_manager, u32 size,
> + gfp_t gfp, bool intr);
>
> static inline struct xe_sa_manager *xe_sa_bo_manager_init(struct
> xe_tile *tile, u32 size, u32 align)
> {
> @@ -26,14 +27,16 @@ static inline struct xe_sa_manager
> *xe_sa_bo_manager_init(struct xe_tile *tile,
> * xe_sa_bo_new() - Make a suballocation.
> * @sa_manager: the &xe_sa_manager
> * @size: number of bytes we want to suballocate
> + * @intr: whether to wait interruptibly if space is not immediately
> available
> *
> * Try to make a suballocation of size @size.
> *
> * Return: a &drm_suballoc, or an ERR_PTR.
> */
> -static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager
> *sa_manager, u32 size)
> +static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager
> *sa_manager,
> + u32 size, bool intr)
> {
> - return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL);
> + return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL, intr);
> }
>
> void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo);
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 5/6] drm/xe/migrate: plumb interruptible wait flag to clear and copy
2026-10-30 11:49 ` [PATCH 5/6] drm/xe/migrate: plumb interruptible wait flag to clear and copy Matthew Auld
@ 2026-10-30 15:28 ` Thomas Hellström
0 siblings, 0 replies; 15+ messages in thread
From: Thomas Hellström @ 2026-10-30 15:28 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matthew Brost
On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> Plumb a bool intr parameter into xe_migrate_clear() and
> xe_migrate_copy() and pass it to __xe_bb_new(), forwarding
> ctx->interruptible from xe_bo_move() and false from non-interruptible
> kernel callers so suballocator waits respect the caller's context.
>
> Assisted-by: LLM
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Should this and the previous one have a -fixes?
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/tests/xe_bo.c | 2 +-
> drivers/gpu/drm/xe/tests/xe_migrate.c | 12 ++++++------
> drivers/gpu/drm/xe/xe_bo.c | 9 +++++----
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 3 ++-
> drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++-------
> drivers/gpu/drm/xe/xe_migrate.h | 6 ++++--
> drivers/gpu/drm/xe/xe_vram.c | 2 +-
> 7 files changed, 31 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c
> b/drivers/gpu/drm/xe/tests/xe_bo.c
> index 6a17e13d58cf..22a2e8f8143a 100644
> --- a/drivers/gpu/drm/xe/tests/xe_bo.c
> +++ b/drivers/gpu/drm/xe/tests/xe_bo.c
> @@ -270,7 +270,7 @@ static int ccs_test_migrate(struct xe_tile *tile,
> struct xe_bo *bo,
> /* Optionally clear bo *and* CCS data in VRAM. */
> if (clear) {
> fence = xe_migrate_clear(tile->migrate, bo, bo-
> >ttm.resource,
> -
> XE_MIGRATE_CLEAR_FLAG_FULL);
> + XE_MIGRATE_CLEAR_FLAG_FULL,
> false);
> if (IS_ERR(fence)) {
> KUNIT_FAIL(test, "Failed to submit bo
> clear.\n");
> return PTR_ERR(fence);
> diff --git a/drivers/gpu/drm/xe/tests/xe_migrate.c
> b/drivers/gpu/drm/xe/tests/xe_migrate.c
> index a9ef8f2dcebb..162532412426 100644
> --- a/drivers/gpu/drm/xe/tests/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/tests/xe_migrate.c
> @@ -112,7 +112,7 @@ static void test_copy(struct xe_migrate *m,
> struct xe_bo *bo,
>
> xe_map_memset(xe, &remote->vmap, 0, 0xd0,
> xe_bo_size(remote));
> fence = xe_migrate_clear(m, remote, remote->ttm.resource,
> - XE_MIGRATE_CLEAR_FLAG_FULL);
> + XE_MIGRATE_CLEAR_FLAG_FULL, false);
> if (!sanity_fence_failed(xe, fence, big ? "Clearing remote
> big bo" :
> "Clearing remote small bo", test))
> {
> retval = xe_map_rd(xe, &remote->vmap, 0, u64);
> @@ -130,7 +130,7 @@ static void test_copy(struct xe_migrate *m,
> struct xe_bo *bo,
>
> expected = 0xc0c0c0c0c0c0c0c0;
> fence = xe_migrate_copy(m, remote, bo, remote->ttm.resource,
> - bo->ttm.resource, false);
> + bo->ttm.resource, false, false);
> if (!sanity_fence_failed(xe, fence, big ? "Copying big bo
> remote -> vram" :
> "Copying small bo remote -> vram",
> test)) {
> retval = xe_map_rd(xe, &bo->vmap, 0, u64);
> @@ -147,7 +147,7 @@ static void test_copy(struct xe_migrate *m,
> struct xe_bo *bo,
> xe_map_memset(xe, &bo->vmap, 0, 0xc0, xe_bo_size(bo));
>
> fence = xe_migrate_copy(m, bo, remote, bo->ttm.resource,
> - remote->ttm.resource, false);
> + remote->ttm.resource, false, false);
> if (!sanity_fence_failed(xe, fence, big ? "Copying big bo
> vram -> remote" :
> "Copying small bo vram -> remote",
> test)) {
> retval = xe_map_rd(xe, &remote->vmap, 0, u64);
> @@ -287,7 +287,7 @@ static void xe_migrate_sanity_test(struct
> xe_migrate *m, struct kunit *test,
> xe_map_memset(xe, &tiny->vmap, 0, 0x22, xe_bo_size(tiny));
> expected = 0;
> fence = xe_migrate_clear(m, tiny, tiny->ttm.resource,
> - XE_MIGRATE_CLEAR_FLAG_FULL);
> + XE_MIGRATE_CLEAR_FLAG_FULL, false);
> if (sanity_fence_failed(xe, fence, "Clearing small bo",
> test))
> goto out;
>
> @@ -309,7 +309,7 @@ static void xe_migrate_sanity_test(struct
> xe_migrate *m, struct kunit *test,
> xe_map_memset(xe, &big->vmap, 0, 0x11, xe_bo_size(big));
> expected = 0;
> fence = xe_migrate_clear(m, big, big->ttm.resource,
> - XE_MIGRATE_CLEAR_FLAG_FULL);
> + XE_MIGRATE_CLEAR_FLAG_FULL, false);
> if (sanity_fence_failed(xe, fence, "Clearing big bo", test))
> goto out;
>
> @@ -611,7 +611,7 @@ static void test_clear(struct xe_device *xe,
> struct xe_tile *tile,
> kunit_info(test, "Clear vram buffer object\n");
> expected = 0x0000000000000000;
> fence = xe_migrate_clear(tile->migrate, vram_bo, vram_bo-
> >ttm.resource,
> - XE_MIGRATE_CLEAR_FLAG_FULL);
> + XE_MIGRATE_CLEAR_FLAG_FULL, false);
> if (sanity_fence_failed(xe, fence, "Clear vram_bo", test))
> return;
> dma_fence_put(fence);
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 42a6aa1a2e4a..e01143c0ccd7 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1298,10 +1298,11 @@ static int xe_bo_move(struct
> ttm_buffer_object *ttm_bo, bool evict,
> else if (handle_system_ccs)
> flags |= XE_MIGRATE_CLEAR_FLAG_CCS_DATA;
>
> - fence = xe_migrate_clear(migrate, bo, new_mem,
> flags);
> + fence = xe_migrate_clear(migrate, bo, new_mem,
> flags,
> + ctx->interruptible);
> } else {
> fence = xe_migrate_copy(migrate, bo, bo, old_mem,
> new_mem,
> - handle_system_ccs);
> + handle_system_ccs, ctx-
> >interruptible);
> }
> if (IS_ERR(fence)) {
> ret = PTR_ERR(fence);
> @@ -1594,7 +1595,7 @@ static int xe_bo_evict_pinned_copy(struct xe_bo
> *bo, struct xe_bo *backup)
> goto out_backup;
>
> fence = xe_migrate_copy(migrate, bo, backup, bo-
> >ttm.resource,
> - backup->ttm.resource,
> false);
> + backup->ttm.resource, false,
> false);
> if (IS_ERR(fence)) {
> ret = PTR_ERR(fence);
> goto out_backup;
> @@ -1744,7 +1745,7 @@ int xe_bo_restore_pinned(struct xe_bo *bo)
>
> fence = xe_migrate_copy(migrate, backup, bo,
> backup->ttm.resource, bo-
> >ttm.resource,
> - false);
> + false, ctx.interruptible);
> if (IS_ERR(fence)) {
> ret = PTR_ERR(fence);
> goto out_unlock_bo;
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index 0a47458e5bf2..c410a8e86cd9 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -3019,7 +3019,8 @@ static int pf_sanitize_lmem(struct xe_tile
> *tile, struct xe_bo *bo, long timeout
> return 0;
>
> xe_bo_lock(bo, false);
> - fence = xe_migrate_clear(m, bo, bo->ttm.resource,
> XE_MIGRATE_CLEAR_FLAG_FULL);
> + fence = xe_migrate_clear(m, bo, bo->ttm.resource,
> + XE_MIGRATE_CLEAR_FLAG_FULL, false);
> if (IS_ERR(fence)) {
> err = PTR_ERR(fence);
> } else if (!fence) {
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> b/drivers/gpu/drm/xe/xe_migrate.c
> index 1a216fb12d2b..dd326bcd12b1 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1213,7 +1213,8 @@ static struct dma_fence
> *__xe_migrate_copy(struct xe_migrate *m,
> struct ttm_resource *src,
> struct ttm_resource *dst,
> bool copy_only_ccs,
> - bool is_vram_resolve)
> + bool is_vram_resolve,
> + bool intr)
> {
> struct xe_gt *gt = m->tile->primary_gt;
> struct xe_device *xe = gt_to_xe(gt);
> @@ -1315,7 +1316,7 @@ static struct dma_fence
> *__xe_migrate_copy(struct xe_migrate *m,
> batch_size += ((copy_only_ccs) ? 0 :
> emit_copy_cmd_len(xe)) +
> ((needs_ccs_emit ? EMIT_COPY_CCS_DW : 0));
>
> - bb = xe_bb_new(gt, batch_size, usm);
> + bb = __xe_bb_new(gt, batch_size, usm, intr);
> if (IS_ERR(bb)) {
> err = PTR_ERR(bb);
> goto err_sync;
> @@ -1409,6 +1410,7 @@ static struct dma_fence
> *__xe_migrate_copy(struct xe_migrate *m,
> * @src: The source TTM resource.
> * @dst: The dst TTM resource.
> * @copy_only_ccs: If true copy only CCS metadata
> + * @intr: Whether to perform any wait interruptibly
> *
> * Copies the contents of @src to @dst: On flat CCS devices,
> * the CCS metadata is copied as well if needed, or if not present,
> @@ -1423,9 +1425,10 @@ struct dma_fence *xe_migrate_copy(struct
> xe_migrate *m,
> struct xe_bo *dst_bo,
> struct ttm_resource *src,
> struct ttm_resource *dst,
> - bool copy_only_ccs)
> + bool copy_only_ccs,
> + bool intr)
> {
> - return __xe_migrate_copy(m, src_bo, dst_bo, src, dst,
> copy_only_ccs, false);
> + return __xe_migrate_copy(m, src_bo, dst_bo, src, dst,
> copy_only_ccs, false, intr);
> }
>
> /**
> @@ -1443,7 +1446,7 @@ struct dma_fence *xe_migrate_resolve(struct
> xe_migrate *m,
> struct xe_bo *bo,
> struct ttm_resource *res)
> {
> - return __xe_migrate_copy(m, bo, bo, res, res, false, true);
> + return __xe_migrate_copy(m, bo, bo, res, res, false, true,
> true);
> }
>
> /**
> @@ -1913,6 +1916,7 @@ static void emit_clear(struct xe_gt *gt, struct
> xe_bb *bb, u64 src_ofs,
> * @bo: The buffer object @dst is currently bound to.
> * @dst: The dst TTM resource to be cleared.
> * @clear_flags: flags to specify which data to clear: CCS, BO, or
> both.
> + * @intr: Whether to perform any wait interruptibly.
> *
> * Clear the contents of @dst to zero when
> XE_MIGRATE_CLEAR_FLAG_BO_DATA is set.
> * On flat CCS devices, the CCS metadata is cleared to zero with
> XE_MIGRATE_CLEAR_FLAG_CCS_DATA.
> @@ -1926,7 +1930,8 @@ static void emit_clear(struct xe_gt *gt, struct
> xe_bb *bb, u64 src_ofs,
> struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
> struct xe_bo *bo,
> struct ttm_resource *dst,
> - u32 clear_flags)
> + u32 clear_flags,
> + bool intr)
> {
> bool clear_vram = mem_type_is_vram(dst->mem_type);
> bool clear_bo_data = XE_MIGRATE_CLEAR_FLAG_BO_DATA &
> clear_flags;
> @@ -1987,7 +1992,7 @@ struct dma_fence *xe_migrate_clear(struct
> xe_migrate *m,
> if (WARN_ON_ONCE(!clear_L0))
> break;
>
> - bb = xe_bb_new(gt, batch_size, usm);
> + bb = __xe_bb_new(gt, batch_size, usm, intr);
> if (IS_ERR(bb)) {
> err = PTR_ERR(bb);
> goto err_sync;
> diff --git a/drivers/gpu/drm/xe/xe_migrate.h
> b/drivers/gpu/drm/xe/xe_migrate.h
> index 2e8be10fdb71..30fb236ea520 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.h
> +++ b/drivers/gpu/drm/xe/xe_migrate.h
> @@ -54,7 +54,8 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate
> *m,
> struct xe_bo *dst_bo,
> struct ttm_resource *src,
> struct ttm_resource *dst,
> - bool copy_only_ccs);
> + bool copy_only_ccs,
> + bool intr);
>
> struct dma_fence *xe_migrate_resolve(struct xe_migrate *m,
> struct xe_bo *bo,
> @@ -85,7 +86,8 @@ int xe_migrate_access_memory(struct xe_migrate *m,
> struct xe_bo *bo,
> struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
> struct xe_bo *bo,
> struct ttm_resource *dst,
> - u32 clear_flags);
> + u32 clear_flags,
> + bool intr);
>
> struct xe_vm *xe_migrate_get_vm(struct xe_migrate *m);
>
> diff --git a/drivers/gpu/drm/xe/xe_vram.c
> b/drivers/gpu/drm/xe/xe_vram.c
> index 1c02889ba29b..946970236208 100644
> --- a/drivers/gpu/drm/xe/xe_vram.c
> +++ b/drivers/gpu/drm/xe/xe_vram.c
> @@ -526,7 +526,7 @@ int xe_vram_memtest(struct xe_device *xe)
> xe_bo_lock(last_page_bo, false);
> fence = xe_migrate_clear(tile->migrate,
> last_page_bo,
> last_page_bo->ttm.resource,
> -
> XE_MIGRATE_CLEAR_FLAG_BO_DATA);
> +
> XE_MIGRATE_CLEAR_FLAG_BO_DATA, false);
> xe_bo_unlock(last_page_bo);
>
> if (!IS_ERR(fence)) {
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 6/6] drm/xe/migrate: avoid interruptible waits once passes are in flight
2026-10-30 11:49 ` [PATCH 6/6] drm/xe/migrate: avoid interruptible waits once passes are in flight Matthew Auld
@ 2026-10-30 15:32 ` Thomas Hellström
0 siblings, 0 replies; 15+ messages in thread
From: Thomas Hellström @ 2026-10-30 15:32 UTC (permalink / raw)
To: Matthew Auld, intel-xe; +Cc: Matthew Brost
On Fri, 2026-10-30 at 11:49 +0000, Matthew Auld wrote:
> Once at least one pass has been submitted in xe_migrate_clear() or
> __xe_migrate_copy() (fence != NULL), aborting a later pass with
> -ERESTARTSYS when the bb pool is full still has to wait
> uninterruptibly
> in err_sync for all in-flight passes to complete, only to discard
> that
> work and restart the entire transfer from scratch.
>
> Only wait interruptibly on the first pass (!fence && intr).
>
> Assisted-by: LLM
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9644
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> b/drivers/gpu/drm/xe/xe_migrate.c
> index dd326bcd12b1..881ff933c736 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1316,7 +1316,7 @@ static struct dma_fence
> *__xe_migrate_copy(struct xe_migrate *m,
> batch_size += ((copy_only_ccs) ? 0 :
> emit_copy_cmd_len(xe)) +
> ((needs_ccs_emit ? EMIT_COPY_CCS_DW : 0));
>
> - bb = __xe_bb_new(gt, batch_size, usm, intr);
> + bb = __xe_bb_new(gt, batch_size, usm, !fence &&
> intr);
> if (IS_ERR(bb)) {
> err = PTR_ERR(bb);
> goto err_sync;
> @@ -1992,7 +1992,7 @@ struct dma_fence *xe_migrate_clear(struct
> xe_migrate *m,
> if (WARN_ON_ONCE(!clear_L0))
> break;
>
> - bb = __xe_bb_new(gt, batch_size, usm, intr);
> + bb = __xe_bb_new(gt, batch_size, usm, !fence &&
> intr);
> if (IS_ERR(bb)) {
> err = PTR_ERR(bb);
> goto err_sync;
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2026-10-30 15:33 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-30 11:49 [PATCH 0/6] Interruptible bb wait + related bits Matthew Auld
2026-10-30 11:49 ` [PATCH 1/6] drm/xe/migrate: allow larger chunk sizes for identity VRAM clears Matthew Auld
2026-10-30 15:20 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 2/6] drm/xe/bb: drop per-batch prefetch padding Matthew Auld
2026-10-30 15:21 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 3/6] drm/xe/sa: remove unused shadow BO and two-step bb helpers Matthew Auld
2026-10-30 15:23 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 4/6] drm/xe/sa: allow callers to specify interruptible suballocator waits Matthew Auld
2026-10-30 15:25 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 5/6] drm/xe/migrate: plumb interruptible wait flag to clear and copy Matthew Auld
2026-10-30 15:28 ` Thomas Hellström
2026-10-30 11:49 ` [PATCH 6/6] drm/xe/migrate: avoid interruptible waits once passes are in flight Matthew Auld
2026-10-30 15:32 ` Thomas Hellström
2026-10-30 12:33 ` ✓ CI.KUnit: success for Interruptible bb wait + related bits Patchwork
2026-10-30 13:16 ` ✓ Xe.CI.BAT: " Patchwork
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