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From: "Chen, Zide" <zide.chen@intel.com>
To: Jim Mattson <jmattson@google.com>
Cc: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	kvm@vger.kernel.org, Andi Kleen <ak@linux.intel.com>,
	Stephane Eranian <eranian@google.com>,
	linux-kernel@vger.kernel.org, Mingwei Zhang <mizhang@google.com>,
	Das Sandipan <Sandipan.Das@amd.com>,
	Shukla Manali <Manali.Shukla@amd.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>,
	Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH v2 06/16] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu
Date: Wed, 28 Oct 2026 12:04:35 -0500	[thread overview]
Message-ID: <dbe6599b-2eb0-474d-b4ce-370b0adc4b28@intel.com> (raw)
In-Reply-To: <CALMp9eQ2D2BjX8ZNqRuNp9h46Rw-_7pJD=50JAXbNHf5KEVj2A@mail.gmail.com>



On 10/28/2026 9:49 AM, Jim Mattson wrote:
> On Thu, Aug 27, 2026 at 3:48 PM Zide Chen <zide.chen@intel.com> wrote:
>>
>> From: Dapeng Mi <dapeng1.mi@linux.intel.com>
>>
>> This is a preparatory step toward fully bitmap-based PMU capability
>> handling. Later patches switch KVM's view of host PMU capabilities from
>> counter counts to counter bitmaps.
>>
>> Populate and use pmc_exists directly when walking guest-visible PMCs,
>> instead of relying on pmu->nr_arch_{gp,fixed}_counters as intermediate
>> state.
>>
>> Iterate counters via the newly added pmc_exists based helpers, and
>> remove the now-redundant nr_arch_{gp,fixed}_counters fields from struct
>> kvm_pmu.
>>
>> Note: {vmx,svm}_recalc_pmu_msr_intercepts() may leave stale intercepts
>> on GP MSRs after CPUID narrowing. This corner case is resolved by the
>> following patch: "KVM: x86/pmu: Switch to bitmask-based KVM PMU
>> capabilities".
> 
> Are you saying that you are deliberately breaking bisection?!? Shame on you!

Yeah, I feel bad about this... the other solution could be to
temporarily use for_each_clear_bit().

-       for ( ; i < kvm_pmu_cap.num_counters_gp; i++) {
+       for_each_clear_bit(i, &gp_mask, kvm_pmu_cap.num_counters_gp) {
                vmx_set_intercept_for_msr(vcpu, MSR_IA32_PERFCTR0 + i,
                                          MSR_TYPE_RW, true);

And then remove for_each_clear_bit() in the coming patch when
kvm_pmu_cap.num_counters_gp is dropped:

-       for_each_clear_bit(i, &gp_mask, kvm_pmu_cap.num_counters_gp) {

+       host_only_gp_mask = kvm_host_pmu.cntr_mask64 & ~gp_mask;
+       for_each_set_bit(i, &host_only_gp_mask, INTEL_PMC_MAX_GENERIC) {

>> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
>> Co-developed-by: Zide Chen <zide.chen@intel.com>
>> Signed-off-by: Zide Chen <zide.chen@intel.com>
>> ---
>> v2:
>> - Fix AMD legacy PMU MSR intercept handling for guest PMU
>>   narrowing reconfiguration by adding for_each_clear_bit_from().
>> - Re-word the stale interception changelog part.
>> ---
> [ ... ]
>> -       for (i = 0; i < pmu->nr_arch_fixed_counters; i++)
>> +       kvm_for_each_fixed_counter(i, fixed_mask)
>>                 vmx_set_intercept_for_msr(vcpu, MSR_CORE_PERF_FIXED_CTR0 + i,
>>                                           MSR_TYPE_RW, intercept);
>>         for ( ; i < kvm_pmu_cap.num_counters_fixed; i++)
> 
> Doesn't this potentially leave stale intercepts on FC MSRs after CPUID
> narrowing as well?

Yes.

  reply	other threads:[~2026-10-28 17:04 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-27 22:37 [PATCH] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Zide Chen
2026-08-27 22:37 ` [PATCH v2 01/16] KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions Zide Chen
2026-08-27 22:57   ` sashiko-bot
2026-08-28 13:51     ` Chen, Zide
2026-09-01  2:07   ` Mi, Dapeng
2026-10-28 14:03   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 02/16] KVM: x86/pmu: Rename all_valid_pmc_idx to pmc_exists Zide Chen
2026-09-01  2:09   ` Mi, Dapeng
2026-10-28 14:04   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 03/16] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu Zide Chen
2026-09-01  2:17   ` Mi, Dapeng
2026-10-28 14:05   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 04/16] KVM: x86/pmu: Gate BUFFER_OVF reserved bit on guest DS Zide Chen
2026-09-01  2:30   ` Mi, Dapeng
2026-10-28 14:25   ` Jim Mattson
2026-10-28 19:05     ` Chen, Zide
2026-08-27 22:37 ` [PATCH v2 05/16] KVM: x86/pmu: Add PMC bitmap accessor helpers Zide Chen
2026-09-01  2:43   ` Mi, Dapeng
2026-10-28 14:32   ` Jim Mattson
2026-10-28 17:24     ` Chen, Zide
2026-08-27 22:37 ` [PATCH v2 06/16] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu Zide Chen
2026-09-01  3:07   ` Mi, Dapeng
2026-10-28 14:49   ` Jim Mattson
2026-10-28 17:04     ` Chen, Zide [this message]
2026-08-27 22:37 ` [PATCH v2 07/16] KVM: x86/pmu: Expose kvm_host_pmu to vendor modules Zide Chen
2026-09-01  3:08   ` Mi, Dapeng
2026-10-28 17:33   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 08/16] perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap Zide Chen
2026-10-28 17:39   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 09/16] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities Zide Chen
2026-09-01  3:32   ` Mi, Dapeng
2026-10-28 17:57   ` Jim Mattson
2026-10-28 20:56     ` Chen, Zide
2026-08-27 22:37 ` [PATCH v2 10/16] perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability Zide Chen
2026-10-28 18:01   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 11/16] KVM: x86/pmu: Emulate the GLOBAL_STATUS_SET and GLOBAL_INUSE MSRs Zide Chen
2026-08-27 23:05   ` sashiko-bot
2026-08-28 20:22     ` Chen, Zide
2026-09-01  6:45   ` Mi, Dapeng
2026-09-01 14:20     ` Chen, Zide
2026-09-02  0:44       ` Mi, Dapeng
2026-10-28 21:24   ` Jim Mattson
2026-10-29 17:45     ` Chen, Zide
2026-08-27 22:37 ` [PATCH v2 12/16] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap Zide Chen
2026-09-01  6:50   ` Mi, Dapeng
2026-10-28 21:29   ` Jim Mattson
2026-10-28 21:55     ` Chen, Zide
2026-08-27 22:37 ` [PATCH v2 13/16] KVM: x86/pmu: Factor out fixed counter control bit calculation Zide Chen
2026-09-01  6:57   ` Mi, Dapeng
2026-10-28 21:30   ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 14/16] KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is set Zide Chen
2026-09-01  8:01   ` Mi, Dapeng
2026-10-28 21:50   ` Jim Mattson
2026-10-28 23:05     ` Chen, Zide
2026-10-28 23:09       ` Jim Mattson
2026-08-27 22:37 ` [PATCH v2 15/16] KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts Zide Chen
2026-10-28 21:59   ` Jim Mattson
2026-10-28 22:10     ` Chen, Zide
2026-08-27 22:37 ` [PATCH v2 16/16] KVM: selftests: Support fixed counters bitmap in pmu_counters_test Zide Chen
2026-08-29  9:30 ` [PATCH] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Peter Zijlstra
2026-10-19 19:15 ` [PATCH v2] " Chen, Zide

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