Re: [PATCH v2 6/8] xen/riscv: introduce generic Xen page table handling

[Jan Beulich <jbeulich@suse.com>]

On 21.07.2024 11:02, Julien Grall wrote:
> Hi,
> 
> On 12/07/2024 17:22, Oleksii Kurochko wrote:
>> At least, between Arm and RISC-V most of the code related to Xen page
>> table handling are common.
>>
>> This GENERIC_PT code is based on Arm's arm/mmu/pt.c except some minor
>> changes such as introduction of the following functions:
>>    * get_root_page()
>>    * xen_pt_check_contig()
>>    * set_pte_table_bit()
>>    * sanity_arch_specific_pte_checks()
>>    * get_contig_bit()
>>    * set_pte_permissions()
>>    * flush_xen_tlb_range_va()
>> It was done because not every functions has the generic pte_flags and
>> it could be a different positions of the PTE bits in a PTE.
> While I am always in favor of trying to avoid code duplication, I am not 
> sure the page-tables are one that should be.
> 
> For instance, you don't have the concept of contiguous page in RISC-V (I 
> see you introduce dummy flags, but IMHO this is a bit of a hack). All 
> the code was also written in a way to avoid temporary conflict mappings. 
> This is to avoid using Break-Before-Make. But on newer hardware this 
> could be relaxed.
> 
> I am interested to know what the others thinks.

I share the concern; I was rather surprised to see the title, but - not
having had the time to look at the patch yet - was kind of guessing
(hoping) it wasn't really what the title said. Page table handling quite
likely wants to remain arch-specific.

Jan