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From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: Saif Abrar <saif.abrar@linux.ibm.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com,
	mst@redhat.com, marcel.apfelbaum@gmail.com, cohuck@redhat.com,
	pbonzini@redhat.com, thuth@redhat.com, lvivier@redhat.com,
	danielhb413@gmail.com, kowal@linux.ibm.com,
	chalapathi.v@linux.ibm.com, calebs@linux.ibm.com,
	milesg@linux.ibm.com, jishnuvw@linux.ibm.com,
	adityag@linux.ibm.com, amachhiw@linux.ibm.com
Subject: Re: [PATCH v5 0/9] pnv/phb5: Update PHB4 to the latest PHB5 spec
Date: Wed, 24 Jun 2026 10:17:09 +0530	[thread overview]
Message-ID: <e26ac28d-07fa-4564-a1cf-49bc81957424@linux.ibm.com> (raw)
In-Reply-To: <20260617095058.652789-1-saif.abrar@linux.ibm.com>



On 17/06/26 3:20 pm, Saif Abrar wrote:
> Hello,
> This patchset resolves the review comments for v4:
> https://lore.kernel.org/qemu-devel/20260305060923.3753402-1-saif.abrar@linux.vnet.ibm.com/
> 
> Thanks to all the reviewers for their efforts.
> 
> Major updates include the following:
> - Rename to phb5.
> - New file for common definitions used in tests/qtest/pnv-* files.
> - Initializing PnvPHB4Class members within class_init method.
> - Updated IODA3 PCT table max size to 128, each with 2 entries.
> - Multiple general cleanups.
> 
> Tested with 'make check-qtest' , 'make check-functional-ppc64' and 'make check'.

Thanks Saif for addressing the review comments from reviews on v4.
I see you have also included Rb (Reviewed-by) tags from folks who gave
review comments on v4, but (at least me) didn't give Rb explicitly after
seeing the review comments addressed. We should add Rb only once the
reviewer explicitly provides it.
Also, could you please rebase this patchset on top of below PHB 4/5
refactoring patch from Jishnu:
https://lore.kernel.org/qemu-devel/20260608093430.2729688-1-jishnuvw@linux.ibm.com/

While I do not have any additional major review comments, I will let
other reviewers provide any additional feedback or Rb as appropriate.

regards,
Harsh
> 
> Regards.
> 
> Saif Abrar (9):
>    qtest/phb5: Add testbench for PHB
>    pnv/phb5: Add reset logic to PHB5
>    pnv/phb5: Implement sticky reset logic in PHB5
>    pnv/phb5: Implement read-only and write-only bits of registers
>    pnv/phb5: Implement write-clear and return 1's on unimplemented reg
>      read
>    pnv/phb5: Set link-active status in HPSTAT and LMR registers
>    pnv/phb5: Set link speed and width in the DLP training control
>      register
>    pnv/phb5: Implement IODA PCT table
>    pnv/phb5: Mask off LSI Source-ID based on number of interrupts
> 
>   hw/pci-host/pnv_phb.c               |   1 +
>   hw/pci-host/pnv_phb4.c              | 581 +++++++++++++++++++++++++---
>   include/hw/pci-host/pnv_phb4.h      |  16 +-
>   include/hw/pci-host/pnv_phb4_regs.h |  66 +++-
>   tests/qtest/meson.build             |   1 +
>   tests/qtest/pnv-host-i2c-test.c     |  13 +-
>   tests/qtest/pnv-phb-test.c          | 235 +++++++++++
>   tests/qtest/pnv-qtest-common.h      |  24 ++
>   tests/qtest/pnv-xive2-common.h      |   7 +-
>   9 files changed, 868 insertions(+), 76 deletions(-)
>   create mode 100644 tests/qtest/pnv-phb-test.c
>   create mode 100644 tests/qtest/pnv-qtest-common.h
> 



  parent reply	other threads:[~2026-06-24  4:47 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-17  9:50 [PATCH v5 0/9] pnv/phb5: Update PHB4 to the latest PHB5 spec Saif Abrar
2026-06-17  9:50 ` [PATCH v5 1/9] qtest/phb5: Add testbench for PHB Saif Abrar
2026-06-23 18:24   ` Caleb Schlossin
2026-06-25 17:02   ` Aditya Gupta
2026-06-17  9:50 ` [PATCH v5 2/9] pnv/phb5: Add reset logic to PHB5 Saif Abrar
2026-06-23 18:24   ` Caleb Schlossin
2026-06-17  9:50 ` [PATCH v5 3/9] pnv/phb5: Implement sticky reset logic in PHB5 Saif Abrar
2026-06-23 18:42   ` Caleb Schlossin
2026-06-17  9:50 ` [PATCH v5 4/9] pnv/phb5: Implement read-only and write-only bits of registers Saif Abrar
2026-06-23 18:52   ` Caleb Schlossin
2026-06-17  9:50 ` [PATCH v5 5/9] pnv/phb5: Implement write-clear and return 1's on unimplemented reg read Saif Abrar
2026-06-23 18:53   ` Caleb Schlossin
2026-06-17  9:50 ` [PATCH v5 6/9] pnv/phb5: Set link-active status in HPSTAT and LMR registers Saif Abrar
2026-06-23 20:43   ` Caleb Schlossin
2026-06-17  9:50 ` [PATCH v5 7/9] pnv/phb5: Set link speed and width in the DLP training control register Saif Abrar
2026-06-23 20:43   ` Caleb Schlossin
2026-06-17  9:50 ` [PATCH v5 8/9] pnv/phb5: Implement IODA PCT table Saif Abrar
2026-06-23 20:44   ` Caleb Schlossin
2026-06-29 11:08   ` Aditya Gupta
2026-06-17  9:50 ` [PATCH v5 9/9] pnv/phb5: Mask off LSI Source-ID based on number of interrupts Saif Abrar
2026-06-23 20:44   ` Caleb Schlossin
2026-06-24  4:47 ` Harsh Prateek Bora [this message]
2026-06-25  8:02 ` [PATCH v5 0/9] pnv/phb5: Update PHB4 to the latest PHB5 spec Aditya Gupta
2026-06-30 10:22 ` Saif Abrar
2026-06-30 13:39   ` Michael S. Tsirkin
2026-06-30 14:47   ` Cédric Le Goater

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