* Re: [PATCH v5] staging: iio: light: Adding driver for ISL29018 ALS
From: Greg KH @ 2010-10-07 21:41 UTC (permalink / raw)
To: rklein
Cc: jic23, joe, achew, olof, linux-i2c, linux-kernel, linux-iio,
ldewangan
In-Reply-To: <1286480883-25589-1-git-send-email-rklein@nvidia.com>
On Thu, Oct 07, 2010 at 12:48:03PM -0700, rklein@nvidia.com wrote:
> From: Rhyland Klein <rklein@nvidia.com>
>
> adding support for the ISL 29018 ambient light and proximity sensor.
>
> Addressed comments from reviews by Jonathan Cameron and Joe Perches
> * Removed some excess dbg prints that only printed function name
> * Renamed some properties to make them more descriptive
> * Added a property to list available adc resolutions
> * Defined arrays for resolutions/ranges as static const
> * Change loops initialization to memset for extensibility.
> * used sizeof() instead of ARRAY_SIZE() to be safer
> * Added a property to list available adc ranges
>
> Signed-off-by: Rhyland Klein <rklein@nvidia.com>
> Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Too bad no one actually compiled this driver:
CC [M] drivers/staging/iio/light/isl29018.o
drivers/staging/iio/light/isl29018.c:420:8: error: ‘show_prox_infrared_suppression’ undeclared here (not in a function)
drivers/staging/iio/light/isl29018.c:433:1: error: ‘iio_dev_attr_range_available’ undeclared here (not in a function)
drivers/staging/iio/light/isl29018.c:435:1: error: ‘iio_dev_attr_adc_resolution_available’ undeclared here (not in a function)
drivers/staging/iio/light/isl29018.c: In function ‘isl29018_chip_init’:
drivers/staging/iio/light/isl29018.c:451:6: warning: unused variable ‘i’
drivers/staging/iio/light/isl29018.c: At top level:
drivers/staging/iio/light/isl29018.c:350:16: warning: ‘show_prox_infrared_supression’ defined but not used
drivers/staging/iio/light/isl29018.c:416:1: warning: ‘iio_const_attr_range_available’ defined but not used
drivers/staging/iio/light/isl29018.c:417:1: warning: ‘iio_const_attr_adc_resolution_available’ defined but not used
make[2]: *** [drivers/staging/iio/light/isl29018.o] Error 1
make[1]: *** [drivers/staging/iio/light] Error 2
make: *** [_module_drivers/staging/iio] Error 2
Please fix this up before resending it.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH] ACPI: Read TSC upon resume
From: Rafael J. Wysocki @ 2010-10-07 21:44 UTC (permalink / raw)
To: Greg KH
Cc: Sameer Nanda, lenb, stefan.bader, brad.figg, apw, linux-acpi,
linux-kernel
In-Reply-To: <20101007181536.GA24811@suse.de>
On Thursday, October 07, 2010, Greg KH wrote:
> On Thu, Oct 07, 2010 at 11:05:21AM -0700, Sameer Nanda wrote:
> > On Thu, Oct 7, 2010 at 10:46 AM, Greg KH <gregkh@suse.de> wrote:
> > > On Thu, Oct 07, 2010 at 10:43:34AM -0700, Sameer Nanda wrote:
> > >> On Wed, Oct 6, 2010 at 7:19 PM, Greg KH <gregkh@suse.de> wrote:
> > >> > And are you always going to be printing this out? Why do we want to
> > >> > know this every time?
> > >> >
> > >>
> > >> Yes, every time. This helps track variance in BIOS resume times within a
> > >> single boot.
> > >
> > > Is that really something that users can do something about?
> >
> > Aside from complaining to the BIOS vendors, no :)
>
> Then I would not recommend adding this patch, as it is irrelevant for
> 99.9999% of all Linux users.
It may be somewhat useful, but the rdtscll() call seems to be x86-specific, in
which case it shouldn't be used at this place.
Thanks,
Rafael
^ permalink raw reply
* Re: [PATCH] ACPI: Read TSC upon resume
From: Rafael J. Wysocki @ 2010-10-07 21:43 UTC (permalink / raw)
To: Sameer Nanda
Cc: Greg KH, lenb, stefan.bader, brad.figg, apw, linux-acpi,
linux-kernel
In-Reply-To: <AANLkTimD5Vrjp8tB6crdaOdS-=LYV+JZL0tCLLcruFGu@mail.gmail.com>
On Thursday, October 07, 2010, Sameer Nanda wrote:
> On Thu, Oct 7, 2010 at 12:59 PM, Rafael J. Wysocki <rjw@sisk.pl> wrote:
> > On Thursday, October 07, 2010, Sameer Nanda wrote:
> >> (resending as plain text, sorry if you got dupe messages)
> >>
> >> On Wed, Oct 6, 2010 at 7:19 PM, Greg KH <gregkh@suse.de> wrote:
> >> > On Wed, Oct 06, 2010 at 04:15:19PM -0700, Sameer Nanda wrote:
> >> >> Read the TSC upon resuming and print it out. This is useful
> >> >> in helping figure out amount of time spent in the BIOS when
> >> >> resuming from suspend.
> >> >>
> >> >> Change-Id: I1d6a32bd62421becddecd152d561763e5f3e1101
> >> >
> >> > What is this tag for? I don't think it matches anything the kernel
> >> > community wants, do you?
> >>
> >> Yeah, its not needed. Let me resubmit the patch without this tag.
> >>
> >> >
> >> > And are you always going to be printing this out? Why do we want to
> >> > know this every time?
> >>
> >> Yes, every time. This helps track variance in BIOS resume times
> >> within a single boot.
> >>
> >> >
> >> >> Signed-off-by: Sameer Nanda <snanda@chromium.org>
> >> >> ---
> >> >> drivers/acpi/sleep.c | 4 ++++
> >> >> 1 files changed, 4 insertions(+), 0 deletions(-)
> >> >>
> >> >> diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
> >> >> index c0fed2e..f0588fa 100644
> >> >> --- a/drivers/acpi/sleep.c
> >> >> +++ b/drivers/acpi/sleep.c
> >> >> @@ -214,6 +214,7 @@ static int acpi_suspend_enter(suspend_state_t pm_state)
> >> >> acpi_status status = AE_OK;
> >> >> unsigned long flags = 0;
> >> >> u32 acpi_state = acpi_target_sleep_state;
> >> >> + u64 tsc;
> >> >>
> >> >> ACPI_FLUSH_CPU_CACHE();
> >> >>
> >> >> @@ -235,6 +236,9 @@ static int acpi_suspend_enter(suspend_state_t pm_state)
> >> >>
> >> >> case ACPI_STATE_S3:
> >> >> do_suspend_lowlevel();
> >> >> + rdtscll(tsc);
> >> >> + printk(KERN_INFO "TSC at resume: %llu\n",
> >> >> + (unsigned long long)tsc);
> >> >
> >> > How long does this take, will it slow down resume?
> >>
> >> The impact is ~10us (as measured on an Intel Atom N455 @ 1.66Ghz).
> >> Given that resume time is currently of the order of 1sec, its in the
> >> noise range.
> >
> > Do I think correctly that it assumes the TSC will be updated in the sleep state?
>
> No, it actually banks on TSC not being updated while the system is in S3 state.
> Theory here being that upon resuming from S3, the CPU gets reset and so TSC
> starts counting up from 0. Therefore, reading the TSC value in the kernel upon
> resuming gives the number of cycles spent in the BIOS in resume path.
Ah that. OK, that's more clear now.
Thanks,
Rafael
^ permalink raw reply
* Re: [PATCH] dell-laptop: Add hwswitch_only module parameter
From: Mario Limonciello @ 2010-10-07 21:45 UTC (permalink / raw)
To: Matthew Garrett
Cc: Dmitry Torokhov, Keng-Yu Lin, len.brown, alan-jenkins,
platform-driver-x86, linux-kernel
In-Reply-To: <20101007214212.GA2010@srcf.ucam.org>
Matthew:
On Thu, Oct 7, 2010 at 16:42, Matthew Garrett <mjg59@srcf.ucam.org> wrote:
> On Thu, Oct 07, 2010 at 04:41:12PM -0500, Mario Limonciello wrote:
>
>> All Dell laptops are /supposed/ to adhere to the specification in
>> question. Unfortunately, not all machines are tested with Linux
>> during their development and on the OS they ship with that
>> functionality isn't always used in that specific way for rfkill.
>
> I don't understand this. You know which code is broken - surely you're
> able to determine which products shipped with BIOSes derived from the
> broken code?
>
> --
> Matthew Garrett | mjg59@srcf.ucam.org
>
Not all product's BIOS are developed in-house. The ones that are, yes
it quite possible to identify. Matter of fact, this issue tends to
not exist on the in-house developed BIOS codebase.
--
Mario Limonciello
superm1@gmail.com
^ permalink raw reply
* Re: [PATCH 1/2] ASoC: Add CS4271 codec support
From: Timur Tabi @ 2010-10-07 21:46 UTC (permalink / raw)
To: Ryan Mallon
Cc: alsa-devel@alsa-project.org, Mark Brown, linux-arm-kernel,
Liam Girdwood
In-Reply-To: <4CAD16A5.1090501@bluewatersys.com>
Ryan Mallon wrote:
> + * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
> + * theoretically possible sample rates to be enabled. Call it again with a
> + * proper value set one the external clock is set (most probably you would do
> + * that from a machine's driver 'hw_param' hook.
If you're going to copy/paste parts of my driver verbatim into yours, you should
put something like this in the comments:
Based on the CS4270 driver by Timur Tabi <timur@freescale.com>
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* [PATCH 1/2] ASoC: Add CS4271 codec support
From: Timur Tabi @ 2010-10-07 21:46 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4CAD16A5.1090501@bluewatersys.com>
Ryan Mallon wrote:
> + * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
> + * theoretically possible sample rates to be enabled. Call it again with a
> + * proper value set one the external clock is set (most probably you would do
> + * that from a machine's driver 'hw_param' hook.
If you're going to copy/paste parts of my driver verbatim into yours, you should
put something like this in the comments:
Based on the CS4270 driver by Timur Tabi <timur@freescale.com>
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH] dell-laptop: Add hwswitch_only module parameter
From: Dmitry Torokhov @ 2010-10-07 21:46 UTC (permalink / raw)
To: Matthew Garrett
Cc: Mario Limonciello, Keng-Yu Lin, len.brown, alan-jenkins,
platform-driver-x86, linux-kernel
In-Reply-To: <20101007213754.GA1896@srcf.ucam.org>
On Thu, Oct 07, 2010 at 10:37:54PM +0100, Matthew Garrett wrote:
> On Thu, Oct 07, 2010 at 02:30:28PM -0700, Dmitry Torokhov wrote:
>
> > We have this strategy for bunch of input stuff (force release, keymap)
> > and I think it works better than dding more and more DMI quirks into
> > kernel itself.
>
> It's limited to Dell hardware, so I think keeping a static list in the
> Dell laptop driver is reasonable. All we need is a list of hardware, and
> I'd really hope that Dell know which BIOS versions contain this code!
>
Unfortunately this kind of crap tends to flow from one BIOS version to
another.. How many DMI entries do we know about so far? Did Dell issue
firmware updates correcting the issue so new boxes will not exhibit the
problem?
--
Dmitry
^ permalink raw reply
* [Bug 30188] X server crashes with a SIGBUS on Evergreen
From: bugzilla-daemon @ 2010-10-07 21:47 UTC (permalink / raw)
To: dri-devel
In-Reply-To: <bug-30188-502@http.bugs.freedesktop.org/>
https://bugs.freedesktop.org/show_bug.cgi?id=30188
--- Comment #23 from Maggioni Marcello <hayarms@gmail.com> 2010-10-07 14:47:22 PDT ---
Hei, I tried the drm-radeon-testing kernel and now Okular works, but X still
crashes with a segfault when going fullscreen with virtualbox.
Someone is having this problem? Do you think is related to this bug?
--
Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are the assignee for the bug.
^ permalink raw reply
* Re: [PATCH] serial: DCC(JTAG) serial and console emulation support
From: Daniel Walker @ 2010-10-07 21:47 UTC (permalink / raw)
To: Greg KH
Cc: Alan Cox, linux-kernel, Hyok S. Choi, Tony Lindgren,
Jeff Ohlstein, Ben Dooks, Alan Cox, Kukjin Kim, Mike Frysinger,
Feng Tang, Tobias Klauser, Jason Wessel, Philippe Langlais
In-Reply-To: <20101007211513.GB26660@suse.de>
On Thu, 2010-10-07 at 14:15 -0700, Greg KH wrote:
> On Thu, Oct 07, 2010 at 01:51:18PM -0700, Daniel Walker wrote:
> > Your making too many assumptions .. You might be able to modify the
> > kernel, and not the userspace. So you couldn't tweak the device
> > creation .. It's much easier in the server world ..
>
> You're saying it's easier to replace an embedded kernel than a userspace
> file on an embedded system? Heh, that's funny.
I'm saying it _can_ happen that it's easier to replace the kernel.. I'm
not saying it's always the case. We're talking about debugging
situations in an embedded environment which don't always follow a normal
path.
> > > We've said no over a period of about ten years to a lot of attempts to
> > > just borrow the ttyS0 range. If we'd said yes it would have been a
> > > complete mess by now.
> > >
> > > So the answer is no.
> >
> > Nothing can be unilateral, there's always room for exceptions. You
> > should say something more like "it's possible, but unlikely".
>
> Hm, how about this, as the TTY and serial driver[1] maintainer, I will
> not accept this kind of patch at all.
>
> Is that final enough for you?
So you don't like it, that's fair enough .. <thinks>I wonder what other
maintainers I can send this too</thinks> ;)
Can you be more specific about your objections .. The discussion over
the ttyS* thing is still happening. I'm waiting for Hyok to give a good
reason for why he wrote that part of it. I can imagine good reasons for
why that part would exist, which is what I'm discussing with Alan and
Mike.
Daniel
--
Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* kgdb errors with serial console
From: Elvis Dowson @ 2010-10-07 21:47 UTC (permalink / raw)
To: Linux Kernel Mailing List, Linux OMAP Mailing List; +Cc: Jason Wessel
Hi,
I'm getting the following errors when attempting to use kgdb with the serial console. Any idea how I can resolve this issue?
The correct serial parameters when I use kermit with the target board is
set flow-control off
set carrier-watch none
set speed 115200
and it connects correctly.
I'm not sure if the gdb configuration commands for the serial port are sufficient, and if there is a parameter that I am missing here. The host is connected to the target using an FTDI USB to serial converter, so it appears as /dev/ttyUSB0 on the host and as ttyS2 on the target.
# su
# cd /tool/patches/android-rowboat-froyo-2.2-patchwork/kernel
# arm-angstrom-linux-gnueabi-gdb
(gdb) file vmlinux
Reading symbols from /tool/patches/android-rowboat-froyo-2.2-patchwork/kernel/vmlinux...done.
(gdb) set remotebaud 115200
(gdb) set remoteflow 0
(gdb) set debug remote 1
(gdb) set debug serial 1
(gdb) target remote /dev/ttyUSB0
Remote debugging using /dev/ttyUSB0
Sending packet: $qSupported#37...[
r +]Ack
[$][q][S][u][p][p][o][r][t][e][d][#][3][7]Packet received: qSupported
Packet qSupported (supported-packets) is supported
warning: unrecognized item "qSupported" in "qSupported" response
Sending packet: $Hg0#df...[+]Ack
[$][H][g][0][#][d][f]Packet received: Hg0
Sending packet: $?#3f...[+]Ack
[$][?][#][3][f]Packet received: ?
Sending packet: $Hc-1#09...[+]Ack
[$][H][c][-][1][#][0][9]Packet received: Hc-1
Sending packet: $qC#b4...[+]Ack
[$][q][C][#][b][4]Packet received: qC
Sending packet: $qAttached#8f...[+]Ack
[$][q][A][t][t][a][c][h][e][d][#][8][f]Packet received: qAttached
Packet qAttached (query-attached) is supported
Sending packet: $qOffsets#4b...[+]Ack
[$][q][O][f][f][s][\r][\r][\n][e][t][s][#][4][b]Bad checksum, sentsum=0x4b, csum=0x6f, buf=qOffs\r\r\nets
[-][<Timeout: 2 seconds>]Timed out.
[-][<Timeout: 2 seconds>]Timed out.
Ignoring packet error, continuing...
Malformed response to offset query, qOffs
ets
(gdb)
Best regards,
Elvis Dowson
^ permalink raw reply
* ext4 support on pvgrub
From: M A Young @ 2010-10-07 21:48 UTC (permalink / raw)
To: xen-devel
I have this working on Fedora. It turned out to be very easy to add this
as I simply took the grub-ext4-support.patch from the Fedora grub package
and put it in xen-4.0.1/stubdom/grub.patches/ . Using pvgrub (without a
vif on the virtual machine as I was having problems if I did give it a
network interface) I could read and boot from ext4 partition with this
patch but not without it.
Is this a good way to add this feature to xen more generally?
Michael Young
^ permalink raw reply
* Re: [PATCH 01/10] V4L/DVB: cx231xx: remove a printk warning at -avcore and at -417
From: Mauro Carvalho Chehab @ 2010-10-07 21:48 UTC (permalink / raw)
To: dheitmueller
Cc: Srinivasa.Deevi, Palash.Bandyopadhyay, Linux Media Mailing List
In-Reply-To: <20100928154653.785c1f3f@pedra>
Em 28-09-2010 15:46, Mauro Carvalho Chehab escreveu:
> drivers/media/video/cx231xx/cx231xx-avcore.c:1608: warning: format ‘%d’ expects type ‘int’, but argument 3 has type ‘long unsigned int’
> drivers/media/video/cx231xx/cx231xx-417.c:1047: warning: format ‘%d’ expects type ‘int’, but argument 3 has type ‘size_t’
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
OK, I just updated my tree with the patches that Mkrufky acked.
It basically contains the same patches from my previous post, plus
the patches that Palash sent, and Devin/Mkrufky patches from polaris4
tree, rebased over the top of kernel v2.6.36-rc7 (this makes easier
for me to test and to merge).
The patches are at:
http://git.linuxtv.org/mchehab/cx231xx.git
Sri already sent his ack for the first series of the patches.
The tree contains two extra patches:
1) a cx231xx large CodingStyle fix patch:
http://git.linuxtv.org/mchehab/cx231xx.git?a=commit;h=eacd1a7749ae45d1f2f5782c013b863ff480746d
It basically solves the issues that checkpatch.pl complained on this series of patches;
2) a cx231xx-417 gcc warning fix:
http://git.linuxtv.org/mchehab/cx231xx.git?a=commit;h=ca3a6a8c2a4819702e93b9612c4a6d90474ea9b5
Devin,
Would it be ok for you if I merge them on my main tree? They're needed for one
board I'm working with (a Pixelview SBTVD Hybrid - that supports both analog
and full-seg ISDB-T).
Thanks,
Mauro.
^ permalink raw reply
* [U-Boot] [PATCH V5 0/2] ARMV7: Add support for the Versatile Express Quad Cortex A9 platform
From: matt.waddel at linaro.org @ 2010-10-07 21:48 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1280373167-20890-2-git-send-email-matt.waddel@linaro.org>
From: Matt Waddel <matt.waddel@linaro.org>
Adds support for the ARM quad-core Cortex-A9 processor.
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
The 2nd patch fixes a bug in the "set baudrate xxx" functionality and
fixes some of the code problems like CamelCase and IO accessors.
---
Version 2 -
Removed unneeded multi-core low_level setup code.
Version 3 -
Patch 1)
1) Fixups from Wolfgang's code review:
- Remove CamelCase variable definitions, keep lists sorted, tab indents
only, remove trailing empty lines, remove unneeded configuration options,
use I/O accessors, added while(1) loop in reset command
2) Simplified board_init declarations
3) Added CONFIG_INITRD_TAG declaration
4) Removed unneeded assembly directives from Makefile
Patch 2)
1) Replaced IO_WRITE and IO_READ calls in serial_pl01x.c with calls to
readl() and writel(). Fixed commenting and CamelCase problems.
Version 4 -
1) Refactored to work with the "next" branch
2) Fixed a bug in the 2nd flash bank definition
Version 5 -
1) Refactored to apply to the tip of git tree.
2) Improved the environment settings and added the run command option
Matt Waddel (2):
ARMV7: Versatile Express Coretile CortexA9x4 support
ARMV7: Fixed baudrate setting in pl01x driver
MAINTAINERS | 4 +
MAKEALL | 1 +
arch/arm/include/asm/arch-armv7/sysctrl.h | 70 +++++++++
arch/arm/include/asm/arch-armv7/systimer.h | 50 +++++++
arch/arm/include/asm/arch-armv7/wdt.h | 55 +++++++
board/armltd/vexpress/Makefile | 49 ++++++
board/armltd/vexpress/ca9x4_ct_vxp.c | 220 ++++++++++++++++++++++++++++
board/armltd/vexpress/config.mk | 23 +++
board/armltd/vexpress/u-boot.lds | 65 ++++++++
boards.cfg | 1 +
drivers/serial/serial_pl01x.c | 93 +++++-------
include/configs/ca9x4_ct_vxp.h | 196 +++++++++++++++++++++++++
12 files changed, 772 insertions(+), 55 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
create mode 100644 board/armltd/vexpress/Makefile
create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
create mode 100644 board/armltd/vexpress/config.mk
create mode 100644 board/armltd/vexpress/u-boot.lds
create mode 100644 include/configs/ca9x4_ct_vxp.h
^ permalink raw reply
* [U-Boot] [PATCH V5 1/2] ARMV7: Versatile Express Coretile CortexA9x4 support
From: matt.waddel at linaro.org @ 2010-10-07 21:48 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1280373167-20890-2-git-send-email-matt.waddel@linaro.org>
From: Matt Waddel <matt.waddel@linaro.org>
Adds support for the ARM quad-core Cortex-A9 processor
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
---
MAINTAINERS | 4 +
MAKEALL | 1 +
arch/arm/include/asm/arch-armv7/sysctrl.h | 70 +++++++++
arch/arm/include/asm/arch-armv7/systimer.h | 50 +++++++
arch/arm/include/asm/arch-armv7/wdt.h | 55 +++++++
board/armltd/vexpress/Makefile | 49 ++++++
board/armltd/vexpress/ca9x4_ct_vxp.c | 220 ++++++++++++++++++++++++++++
board/armltd/vexpress/config.mk | 23 +++
board/armltd/vexpress/u-boot.lds | 65 ++++++++
boards.cfg | 1 +
include/configs/ca9x4_ct_vxp.h | 196 +++++++++++++++++++++++++
11 files changed, 734 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-armv7/sysctrl.h
create mode 100644 arch/arm/include/asm/arch-armv7/systimer.h
create mode 100644 arch/arm/include/asm/arch-armv7/wdt.h
create mode 100644 board/armltd/vexpress/Makefile
create mode 100644 board/armltd/vexpress/ca9x4_ct_vxp.c
create mode 100644 board/armltd/vexpress/config.mk
create mode 100644 board/armltd/vexpress/u-boot.lds
create mode 100644 include/configs/ca9x4_ct_vxp.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 5e3a3fa..71dcd5b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -802,6 +802,10 @@ Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
SFFSDR ARM926EJS
+Matt Waddel <matt.waddel@linaro.org>
+
+ ca9x4_ct_vxp ARM ARMV7 (Quad Core)
+
Prafulla Wadaskar <prafulla@marvell.com>
mv88f6281gtw_ge ARM926EJS (Kirkwood SoC)
diff --git a/MAKEALL b/MAKEALL
index 1b506d6..abceccd 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -489,6 +489,7 @@ LIST_ARM11=" \
#########################################################################
LIST_ARMV7=" \
am3517_evm \
+ ca9x4_ct_vxp \
devkit8000 \
mx51evk \
omap3_beagle \
diff --git a/arch/arm/include/asm/arch-armv7/sysctrl.h b/arch/arm/include/asm/arch-armv7/sysctrl.h
new file mode 100644
index 0000000..4e45167
--- /dev/null
+++ b/arch/arm/include/asm/arch-armv7/sysctrl.h
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2010 Linaro
+ * Matt Waddel, <matt.waddel@linaro.org>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _SYSCTRL_H_
+#define _SYSCTRL_H_
+
+/* System controller (SP810) register definitions */
+#define SP810_TIMER0_ENSEL (1 << 15)
+#define SP810_TIMER1_ENSEL (1 << 17)
+#define SP810_TIMER2_ENSEL (1 << 19)
+#define SP810_TIMER3_ENSEL (1 << 21)
+
+struct sysctrl {
+ u32 scctrl; /* 0x000 */
+ u32 scsysstat;
+ u32 scimctrl;
+ u32 scimstat;
+ u32 scxtalctrl;
+ u32 scpllctrl;
+ u32 scpllfctrl;
+ u32 scperctrl0;
+ u32 scperctrl1;
+ u32 scperen;
+ u32 scperdis;
+ u32 scperclken;
+ u32 scperstat;
+ u32 res1[0x006];
+ u32 scflashctrl; /* 0x04c */
+ u32 res2[0x3a4];
+ u32 scsysid0; /* 0xee0 */
+ u32 scsysid1;
+ u32 scsysid2;
+ u32 scsysid3;
+ u32 scitcr;
+ u32 scitir0;
+ u32 scitir1;
+ u32 scitor;
+ u32 sccntctrl;
+ u32 sccntdata;
+ u32 sccntstep;
+ u32 res3[0x32];
+ u32 scperiphid0; /* 0xfe0 */
+ u32 scperiphid1;
+ u32 scperiphid2;
+ u32 scperiphid3;
+ u32 scpcellid0;
+ u32 scpcellid1;
+ u32 scpcellid2;
+ u32 scpcellid3;
+};
+#endif /* _SYSCTRL_H_ */
diff --git a/arch/arm/include/asm/arch-armv7/systimer.h b/arch/arm/include/asm/arch-armv7/systimer.h
new file mode 100644
index 0000000..e745e37
--- /dev/null
+++ b/arch/arm/include/asm/arch-armv7/systimer.h
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2010 Linaro
+ * Matt Waddel, <matt.waddel@linaro.org>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _SYSTIMER_H_
+#define _SYSTIMER_H_
+
+/* AMBA timer register base address */
+#define SYSTIMER_BASE 0x10011000
+
+#define SYSHZ_CLOCK 1000000 /* Timers -> 1Mhz */
+#define SYSTIMER_RELOAD 0xFFFFFFFF
+#define SYSTIMER_EN (1 << 7)
+#define SYSTIMER_32BIT (1 << 1)
+
+struct systimer {
+ u32 timer0load; /* 0x00 */
+ u32 timer0value;
+ u32 timer0control;
+ u32 timer0intclr;
+ u32 timer0ris;
+ u32 timer0mis;
+ u32 timer0bgload;
+ u32 timer1load; /* 0x20 */
+ u32 timer1value;
+ u32 timer1control;
+ u32 timer1intclr;
+ u32 timer1ris;
+ u32 timer1mis;
+ u32 timer1bgload;
+};
+#endif /* _SYSTIMER_H_ */
diff --git a/arch/arm/include/asm/arch-armv7/wdt.h b/arch/arm/include/asm/arch-armv7/wdt.h
new file mode 100644
index 0000000..ee74c38
--- /dev/null
+++ b/arch/arm/include/asm/arch-armv7/wdt.h
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2010
+ * Matt Waddel, <matt.waddel@linaro.org>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _WDT_H_
+#define _WDT_H_
+
+/* Watchdog timer (SP805) register base address */
+#define WDT_BASE 0x100E5000
+
+#define WDT_EN 0x2
+#define WDT_RESET_LOAD 0x0
+
+struct wdt {
+ u32 wdogload; /* 0x000 */
+ u32 wdogvalue;
+ u32 wdogcontrol;
+ u32 wdogintclr;
+ u32 wdogris;
+ u32 wdogmis;
+ u32 res1[0x2F9];
+ u32 wdoglock; /* 0xC00 */
+ u32 res2[0xBE];
+ u32 wdogitcr; /* 0xF00 */
+ u32 wdogitop;
+ u32 res3[0x35];
+ u32 wdogperiphid0; /* 0xFE0 */
+ u32 wdogperiphid1;
+ u32 wdogperiphid2;
+ u32 wdogperiphid3;
+ u32 wdogpcellid0;
+ u32 wdogpcellid1;
+ u32 wdogpcellid2;
+ u32 wdogpcellid3;
+};
+
+#endif /* _WDT_H_ */
diff --git a/board/armltd/vexpress/Makefile b/board/armltd/vexpress/Makefile
new file mode 100644
index 0000000..ee5c0d8
--- /dev/null
+++ b/board/armltd/vexpress/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := ca9x4_ct_vxp.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/ca9x4_ct_vxp.c
new file mode 100644
index 0000000..cd334d4
--- /dev/null
+++ b/board/armltd/vexpress/ca9x4_ct_vxp.c
@@ -0,0 +1,220 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * (C) Copyright 2004
+ * ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <netdev.h>
+#include <asm/io.h>
+#include <asm/arch/systimer.h>
+#include <asm/arch/sysctrl.h>
+#include <asm/arch/wdt.h>
+
+static ulong timestamp;
+static ulong lastdec;
+
+static struct wdt *wdt_base = (struct wdt *)WDT_BASE;
+static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
+static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
+
+static void flash__init(void);
+static void vexpress_timer_init(void);
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+void show_boot_progress(int progress)
+{
+ printf("Boot reached stage %d\n", progress);
+}
+#endif
+
+static inline void delay(ulong loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+ gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
+ gd->flags = 0;
+
+ icache_enable();
+ flash__init();
+ vexpress_timer_init();
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
+
+static void flash__init(void)
+{
+ /* Setup the sytem control register to allow writing to flash */
+ writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
+ &sysctrl_base->scflashctrl);
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = get_ram_size(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Start timer:
+ * Setup a 32 bit timer, running at 1KHz
+ * Versatile Express Motherboard provides 1 MHz timer
+ */
+static void vexpress_timer_init(void)
+{
+ /*
+ * Set clock frequency in system controller:
+ * VEXPRESS_REFCLK is 32KHz
+ * VEXPRESS_TIMCLK is 1MHz
+ */
+ writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
+ SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
+ readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
+
+ /*
+ * Set Timer0 to be:
+ * Enabled, free running, no interrupt, 32-bit, wrapping
+ */
+ writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
+ writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
+ writel(SYSTIMER_EN | SYSTIMER_32BIT | \
+ readl(&systimer_base->timer0control), \
+ &systimer_base->timer0control);
+
+ reset_timer_masked();
+}
+
+/* Use the ARM Watchdog System to cause reset */
+void reset_cpu(ulong addr)
+{
+ writeb(WDT_EN, &wdt_base->wdogcontrol);
+ writel(WDT_RESET_LOAD, &wdt_base->wdogload);
+ while (1)
+ ;
+}
+
+/*
+ * Delay x useconds AND perserve advance timstamp value
+ * assumes timer is ticking at 1 msec
+ */
+void udelay(ulong usec)
+{
+ ulong tmo, tmp;
+
+ tmo = usec / 1000;
+ tmp = get_timer(0); /* get current timestamp */
+
+ /*
+ * If setting this forward will roll time stamp then
+ * reset "advancing" timestamp to 0 and set lastdec value
+ * otherwise set the advancing stamp to the wake up time
+ */
+ if ((tmo + tmp + 1) < tmp)
+ reset_timer_masked();
+ else
+ tmo += tmp;
+
+ while (get_timer_masked() < tmo)
+ ; /* loop till wakeup event */
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void reset_timer_masked(void)
+{
+ lastdec = readl(&systimer_base->timer0value) / 1000;
+ timestamp = 0;
+}
+
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer_masked(void)
+{
+ ulong now = readl(&systimer_base->timer0value) / 1000;
+
+ if (lastdec >= now) { /* normal mode (non roll) */
+ timestamp += lastdec - now;
+ } else { /* count down timer overflowed */
+ /*
+ * nts = ts + ld - now
+ * ts = old stamp, ld = time before passing through - 1
+ * now = amount of time after passing though - 1
+ * nts = new "advancing time stamp"
+ */
+ timestamp += lastdec + SYSTIMER_RELOAD - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+void lowlevel_init(void)
+{
+}
+
+ulong get_board_rev(void){
+ return readl((u32 *)SYS_ID);
+}
diff --git a/board/armltd/vexpress/config.mk b/board/armltd/vexpress/config.mk
new file mode 100644
index 0000000..2d797d7
--- /dev/null
+++ b/board/armltd/vexpress/config.mk
@@ -0,0 +1,23 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# Linux-Kernel is expected to be at 0x60008000
+#
+TEXT_BASE = 0x60800000
+LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds
diff --git a/board/armltd/vexpress/u-boot.lds b/board/armltd/vexpress/u-boot.lds
new file mode 100644
index 0000000..2ab4a21
--- /dev/null
+++ b/board/armltd/vexpress/u-boot.lds
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata))) }
+
+ . = ALIGN(4);
+ .data : { *(.data)
+ __datarel_start = .;
+ *(.data.rel)
+ __datarelrolocal_start = .;
+ *(.data.rel.ro.local)
+ __datarellocal_start = .;
+ *(.data.rel.local)
+ __datarelro_start = .;
+ *(.data.rel.ro)
+ }
+
+ __got_start = .;
+ . = ALIGN(4);
+ .got : { *(.got) }
+ __got_end = .;
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/boards.cfg b/boards.cfg
index 9909685..c4a410d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -253,6 +253,7 @@ imx27lite arm arm926ejs imx27lite logicpd mx27
magnesium arm arm926ejs imx27lite logicpd mx27
omap5912osk arm arm926ejs - ti omap
edminiv2 arm arm926ejs - LaCie orion5x
+ca9x4_ct_vxp arm armv7 vexpress armltd
omap3_overo arm armv7 overo - omap3
omap3_pandora arm armv7 pandora - omap3
omap3_zoom1 arm armv7 zoom1 logicpd omap3
diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h
new file mode 100644
index 0000000..5547d55
--- /dev/null
+++ b/include/configs/ca9x4_ct_vxp.h
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2010 Linaro
+ * Matt Waddel, <matt.waddel@linaro.org>
+ *
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* Board info register */
+#define SYS_ID 0x10000000
+#define CONFIG_REVISION_TAG 1
+
+/* High Level Configuration Options */
+#define CONFIG_ARMV7 1
+
+#define CONFIG_SYS_MEMTEST_START 0x60000000
+#define CONFIG_SYS_MEMTEST_END 0x20000000
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_L2_OFF 1
+#define CONFIG_INITRD_TAG 1
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+#define SCTL_BASE 0x10001000
+#define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
+
+/* SMSC9115 Ethernet from SMSC9118 family */
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X_32_BIT 1
+#define CONFIG_SMC911X_BASE 0x4E000000
+
+/* PL011 Serial Configuration */
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_CLOCK 24000000
+#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
+ (void *)CONFIG_SYS_SERIAL1}
+#define CONFIG_CONS_INDEX 0
+
+#define CONFIG_BAUDRATE 38400
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_SYS_SERIAL0 0x10009000
+#define CONFIG_SYS_SERIAL1 0x1000A000
+
+/* Command line configuration */
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_RUN
+
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION 1
+#define CONFIG_MMC 1
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Miscellaneous configurable options */
+#undef CONFIG_SYS_CLKS_IN_HZ
+#define CONFIG_SYS_LOAD_ADDR 0x60008000 /* load address */
+#define LINUX_BOOT_PARAM_ADDR 0x60000200
+#define CONFIG_BOOTDELAY 2
+
+/* Stack sizes are set up in start.S using the settings below */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
+#endif
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 2
+#define PHYS_SDRAM_1 0x60000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
+#define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */
+
+/* additions for new relocation code */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_END 0x1000
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
+ CONFIG_SYS_INIT_RAM_END - \
+ CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
+
+/* Basic environment settings */
+#define CONFIG_BOOTCOMMAND "run bootflash;"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "loadaddr=0x80008000\0" \
+ "initrd=0x61000000\0" \
+ "kerneladdr=0x44100000\0" \
+ "initrdaddr=0x44800000\0" \
+ "maxinitrd=0x1800000\0" \
+ "console=ttyAMA0,38400n8\0" \
+ "dram=1024M\0" \
+ "root=/dev/sda1 rw\0" \
+ "mtd=armflash:1M at 0x800000(uboot),7M at 0x1000000(kernel)," \
+ "24M at 0x2000000(initrd)\0" \
+ "flashargs=setenv bootargs root=${root} console=${console} " \
+ "mem=${dram} mtdparts=${mtd} mmci.fmax=190000 " \
+ "devtmpfs.mount=0 vmalloc=256M\0" \
+ "bootflash=run flashargs; " \
+ "cp ${initrdaddr} ${initrd} ${maxinitrd}; " \
+ "bootm ${kerneladdr} ${initrd}\0"
+
+/* FLASH and environment organization */
+#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
+#define CONFIG_SYS_FLASH_CFI 1
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_SIZE 0x04000000
+#define CONFIG_SYS_MAX_FLASH_BANKS 2
+#define CONFIG_SYS_FLASH_BASE0 0x40000000
+#define CONFIG_SYS_FLASH_BASE1 0x44000000
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0
+
+/* Timeout values in ticks */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
+#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
+
+/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
+#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
+#define FLASH_MAX_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
+
+/* Room required on the stack for the environment data */
+#define CONFIG_ENV_SIZE FLASH_MAX_SECTOR_SIZE
+
+/*
+ * Amount of flash used for environment:
+ * We don't know which end has the small erase blocks so we use the penultimate
+ * sector location for the environment
+ */
+#define CONFIG_ENV_SECT_SIZE FLASH_MAX_SECTOR_SIZE
+#define CONFIG_ENV_OVERWRITE 1
+
+/* Store environment@top of flash */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - \
+ (2 * CONFIG_ENV_SECT_SIZE))
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE1 + \
+ CONFIG_ENV_OFFSET)
+#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \
+ CONFIG_SYS_FLASH_BASE1 }
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PROMPT "VExpress# "
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
+#define CONFIG_CMD_SOURCE
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_SYS_MAXARGS 16 /* max command args */
+
+#endif
--
1.7.1
^ permalink raw reply related
* [U-Boot] [PATCH V5 2/2] ARMV7: Fixed baudrate setting in pl01x driver
From: matt.waddel at linaro.org @ 2010-10-07 21:48 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1280373167-20890-2-git-send-email-matt.waddel@linaro.org>
From: Matt Waddel <matt.waddel@linaro.org>
The pl01x serial driver was lacking the code to switch baudrates from the
command line. Fixed by simply saving the new baudrate and calling
serial_init() again. Also fixed CamelCase variables, I/O accessors and
comment style.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
---
drivers/serial/serial_pl01x.c | 93 +++++++++++++++++------------------------
1 files changed, 38 insertions(+), 55 deletions(-)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index c645cef..c0ae947 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -29,25 +29,23 @@
#include <common.h>
#include <watchdog.h>
-
+#include <asm/io.h>
#include "serial_pl01x.h"
-#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
-#define IO_READ(addr) (*(volatile unsigned int *)(addr))
-
/*
* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
* Integrator CP has two UARTs, use the first one, at 38400-8-N-1
* Versatile PB has four UARTs.
*/
#define CONSOLE_PORT CONFIG_CONS_INDEX
-#define baudRate CONFIG_BAUDRATE
static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
static void pl01x_putc (int portnum, char c);
static int pl01x_getc (int portnum);
static int pl01x_tstc (int portnum);
+unsigned int baudrate = CONFIG_BAUDRATE;
+DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_PL010_SERIAL
@@ -55,16 +53,11 @@ int serial_init (void)
{
unsigned int divisor;
- /*
- ** First, disable everything.
- */
- IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
+ /* First, disable everything */
+ writel(0x0, port[CONSOLE_PORT] + UART_PL010_CR);
- /*
- ** Set baud rate
- **
- */
- switch (baudRate) {
+ /* Set baud rate */
+ switch (baudrate) {
case 9600:
divisor = UART_PL010_BAUD_9600;
break;
@@ -89,20 +82,15 @@ int serial_init (void)
divisor = UART_PL010_BAUD_38400;
}
- IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
- ((divisor & 0xf00) >> 8));
- IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
+ writel(((divisor & 0xf00) >> 8), port[CONSOLE_PORT] + UART_PL010_LCRM);
+ writel((divisor & 0xff), port[CONSOLE_PORT] + UART_PL010_LCRL);
- /*
- ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
- */
- IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
- (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
+ /* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+ writel((UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN),
+ port[CONSOLE_PORT] + UART_PL010_LCRH);
- /*
- ** Finally, enable the UART
- */
- IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
+ /* Finally, enable the UART */
+ writel((UART_PL010_CR_UARTEN), port[CONSOLE_PORT] + UART_PL010_CR);
return 0;
}
@@ -118,38 +106,31 @@ int serial_init (void)
unsigned int remainder;
unsigned int fraction;
- /*
- ** First, disable everything.
- */
- IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
+ /* First, disable everything */
+ writel(0x0, port[CONSOLE_PORT] + UART_PL011_CR);
/*
- ** Set baud rate
- **
- ** IBRD = UART_CLK / (16 * BAUD_RATE)
- ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
+ * Set baud rate
+ *
+ * IBRD = UART_CLK / (16 * BAUD_RATE)
+ * FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
*/
- temp = 16 * baudRate;
+ temp = 16 * baudrate;
divider = CONFIG_PL011_CLOCK / temp;
remainder = CONFIG_PL011_CLOCK % temp;
- temp = (8 * remainder) / baudRate;
+ temp = (8 * remainder) / baudrate;
fraction = (temp >> 1) + (temp & 1);
- IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
- IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
+ writel(divider, port[CONSOLE_PORT] + UART_PL011_IBRD);
+ writel(fraction, port[CONSOLE_PORT] + UART_PL011_FBRD);
- /*
- ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
- */
- IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
- (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+ /* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+ writel((UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN),
+ port[CONSOLE_PORT] + UART_PL011_LCRH);
- /*
- ** Finally, enable the UART
- */
- IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
- (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
- UART_PL011_CR_RXE));
+ /* Finally, enable the UART */
+ writel((UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE),
+ port[CONSOLE_PORT] + UART_PL011_CR);
return 0;
}
@@ -183,16 +164,18 @@ int serial_tstc (void)
void serial_setbrg (void)
{
+ baudrate = gd->baudrate;
+ serial_init();
}
static void pl01x_putc (int portnum, char c)
{
/* Wait until there is space in the FIFO */
- while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
+ while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
WATCHDOG_RESET();
/* Send the character */
- IO_WRITE (port[portnum] + UART_PL01x_DR, c);
+ writel(c, port[portnum] + UART_PL01x_DR);
}
static int pl01x_getc (int portnum)
@@ -200,15 +183,15 @@ static int pl01x_getc (int portnum)
unsigned int data;
/* Wait until there is data in the FIFO */
- while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
+ while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
WATCHDOG_RESET();
- data = IO_READ (port[portnum] + UART_PL01x_DR);
+ data = readl(port[portnum] + UART_PL01x_DR);
/* Check for an error flag */
if (data & 0xFFFFFF00) {
/* Clear the error */
- IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
+ writel(0xFFFFFFFF, port[portnum] + UART_PL01x_ECR);
return -1;
}
@@ -218,6 +201,6 @@ static int pl01x_getc (int portnum)
static int pl01x_tstc (int portnum)
{
WATCHDOG_RESET();
- return !(IO_READ (port[portnum] + UART_PL01x_FR) &
+ return !(readl(port[portnum] + UART_PL01x_FR) &
UART_PL01x_FR_RXFE);
}
--
1.7.1
^ permalink raw reply related
* Re: [PATCH v4] compat: backport netlink changes used in the nl80211 cleanup
From: Luis R. Rodriguez @ 2010-10-07 21:48 UTC (permalink / raw)
To: Felix Fietkau; +Cc: linux-wireless
In-Reply-To: <4CAE25F6.2010707@openwrt.org>
On Thu, Oct 7, 2010 at 12:56 PM, Felix Fietkau <nbd@openwrt.org> wrote:
> Signed-off-by: Felix Fietkau <nbd@openwrt.org>
applied, thanks!!!
Luis
^ permalink raw reply
* Re: [PATCH] eglibc-package.bbclass: fix missing RPROVIDES for virtual-locale-*
From: Khem Raj @ 2010-10-07 21:48 UTC (permalink / raw)
To: openembedded-devel
In-Reply-To: <1286480697-28494-1-git-send-email-Martin.Jansa@gmail.com>
On Thu, Oct 7, 2010 at 12:44 PM, Martin Jansa <martin.jansa@gmail.com> wrote:
> Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
seems fine
Acked-by: Khem Raj <raj.khem@gmail.com>
> ---
> recipes/eglibc/eglibc-package.bbclass | 4 +++-
> recipes/eglibc/eglibc.inc | 2 +-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/recipes/eglibc/eglibc-package.bbclass b/recipes/eglibc/eglibc-package.bbclass
> index 5871be0..dbca1ab 100644
> --- a/recipes/eglibc/eglibc-package.bbclass
> +++ b/recipes/eglibc/eglibc-package.bbclass
> @@ -351,7 +351,9 @@ python package_do_split_gconvs () {
> else:
> glibc_name = name
> bb.data.setVar('RDEPENDS_%s' % pkgname, legitimize_package_name('eglibc-binary-localedata-%s' % glibc_name), d)
> - bb.data.setVar('RPROVIDES_%s' % pkgname, 'glibc-binary-localedata-%s' % glibc_name, d)
> + rprovides = bb.data.getVar("RPROVIDES_%s" % pkgname, d, 1)
> + rprovides += ' glibc-binary-localedata-%s' % glibc_name
> + bb.data.setVar('RPROVIDES_%s' % pkgname, rprovides, d)
>
> def output_locale_binary(name, pkgname, locale, encoding):
> # This is a hack till linux-libc-headers gets patched for the missing arm syscalls and all arm device kernels as well
> diff --git a/recipes/eglibc/eglibc.inc b/recipes/eglibc/eglibc.inc
> index a68f343..754a12b 100644
> --- a/recipes/eglibc/eglibc.inc
> +++ b/recipes/eglibc/eglibc.inc
> @@ -3,7 +3,7 @@ HOMEPAGE = "http://www.eglibc.org/home"
> SECTION = "libs"
> PRIORITY = "required"
> LICENSE = "LGPL"
> -INC_PR = "r14"
> +INC_PR = "r15"
> # nptl needs unwind support in gcc, which can't be built without glibc.
> DEPENDS = "virtual/${TARGET_PREFIX}gcc-intermediate linux-libc-headers"
> #this leads to circular deps, so lets not add it yet
> --
> 1.7.3.1
>
>
> _______________________________________________
> Openembedded-devel mailing list
> Openembedded-devel@lists.openembedded.org
> http://lists.linuxtogo.org/cgi-bin/mailman/listinfo/openembedded-devel
>
^ permalink raw reply
* Re: [Qemu-devel] [PATCH] ceph/rbd block driver for qemu-kvm (v4)
From: Yehuda Sadeh Weinraub @ 2010-10-07 21:49 UTC (permalink / raw)
To: Anthony Liguori
Cc: Kevin Wolf, kvm, qemu-devel, ceph-devel, Christian Brunner
In-Reply-To: <4CAE35C5.2010809@codemonkey.ws>
On Thu, Oct 7, 2010 at 2:04 PM, Anthony Liguori <anthony@codemonkey.ws> wrote:
> On 10/07/2010 03:47 PM, Yehuda Sadeh Weinraub wrote:
>>>
>>> How is that possible? Are the callbacks delivered in the context of a
>>> different thread? If so, don't you need locking?
>>>
>>
>> Not sure I'm completely following you. The callbacks are delivered in
>> the context of a different thread, but won't run concurrently.
>
> Concurrently to what? How do you prevent them from running concurrently
> with qemu?
There are two types of callbacks. The first is for rados aio
completions, and the second one is the one added later for the fd glue
layer.
The first callback, called by librados whenever aio completes, runs in
the context of a single librados thread:
+static void rbd_finish_aiocb(rados_completion_t c, RADOSCB *rcb)
+{
+ RBDAIOCB *acb = rcb->acb;
rcb is per a single aio. Was created before and will be destroyed
here, whereas acb is shared between a few aios, however, it was
generated before the first aio was created.
+ int64_t r;
+ uint64_t buf = 1;
+ int i;
+
+ acb->aiocnt--;
acb->aiocnt has been set before initiating all the aios, so it's ok to
touch it now. Same goes to all acb fields.
+ r = rados_aio_get_return_value(c);
+ rados_aio_release(c);
+ if (acb->write) {
+ if (r < 0) {
+ acb->ret = r;
+ acb->error = 1;
+ } else if (!acb->error) {
+ acb->ret += rcb->segsize;
+ }
+ } else {
+ if (r == -ENOENT) {
+ memset(rcb->buf, 0, rcb->segsize);
+ if (!acb->error) {
+ acb->ret += rcb->segsize;
+ }
+ } else if (r < 0) {
+ acb->ret = r;
+ acb->error = 1;
+ } else if (r < rcb->segsize) {
+ memset(rcb->buf + r, 0, rcb->segsize - r);
+ if (!acb->error) {
+ acb->ret += rcb->segsize;
+ }
+ } else if (!acb->error) {
+ acb->ret += r;
+ }
+ }
+ if (write(acb->s->efd, &buf, sizeof(buf)) < 0)
This will wake up the io_read()
+ error_report("failed writing to acb->s->efd\n");
+ qemu_free(rcb);
+ i = 0;
+ if (!acb->aiocnt && acb->bh) {
+ qemu_bh_schedule(acb->bh);
This is the only qemu related call in here, seems safe to call it.
+ }
+}
The scheduled bh function will be called only after all aios that
relate to this specific aio set are done, so the following seems ok,
as there's no more acb references.
+static void rbd_aio_bh_cb(void *opaque)
+{
+ RBDAIOCB *acb = opaque;
+ uint64_t buf = 1;
+
+ if (!acb->write) {
+ qemu_iovec_from_buffer(acb->qiov, acb->bounce, acb->qiov->size);
+ }
+ qemu_vfree(acb->bounce);
+ acb->common.cb(acb->common.opaque, (acb->ret > 0 ? 0 : acb->ret));
+ qemu_bh_delete(acb->bh);
+ acb->bh = NULL;
+
+ if (write(acb->s->efd, &buf, sizeof(buf)) < 0)
+ error_report("failed writing to acb->s->efd\n");
+ qemu_aio_release(acb);
+}
Now, the second ones are the io_read(), in which we have our glue fd.
We send uint64 per each completed io
+static void rbd_aio_completion_cb(void *opaque)
+{
+ BDRVRBDState *s = opaque;
+
+ uint64_t val;
+ ssize_t ret;
+
+ do {
+ if ((ret = read(s->efd, &val, sizeof(val))) > 0) {
+ s->qemu_aio_count -= val;
There is an issue here with s->qemu_aio_count which needs to be
protected by a mutex. Other than that, it just reads from s->efd.
+ }
+ } while (ret < 0 && errno == EINTR);
+
+ return;
+}
+
+static int rbd_aio_flush_cb(void *opaque)
+{
+ BDRVRBDState *s = opaque;
+
+ return (s->qemu_aio_count > 0);
Same here as with the previous one, needs a mutex around s->qemu_aio_count.
+}
>
> If you saw lock ups, I bet that's what it was from.
>
As I explained before, before introducing the fd glue layer, the lack
of fd associated with our block device caused that there was no way
for qemu to check whether all aios were flushed or not, which didn't
work well when doing migration/savevm.
Thanks,
Yehuda
--
To unsubscribe from this list: send the line "unsubscribe ceph-devel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [Qemu-devel] [PATCH] ceph/rbd block driver for qemu-kvm (v4)
From: Yehuda Sadeh Weinraub @ 2010-10-07 21:49 UTC (permalink / raw)
To: Anthony Liguori
Cc: Kevin Wolf, ceph-devel, qemu-devel, kvm, Christian Brunner
In-Reply-To: <4CAE35C5.2010809@codemonkey.ws>
On Thu, Oct 7, 2010 at 2:04 PM, Anthony Liguori <anthony@codemonkey.ws> wrote:
> On 10/07/2010 03:47 PM, Yehuda Sadeh Weinraub wrote:
>>>
>>> How is that possible? Are the callbacks delivered in the context of a
>>> different thread? If so, don't you need locking?
>>>
>>
>> Not sure I'm completely following you. The callbacks are delivered in
>> the context of a different thread, but won't run concurrently.
>
> Concurrently to what? How do you prevent them from running concurrently
> with qemu?
There are two types of callbacks. The first is for rados aio
completions, and the second one is the one added later for the fd glue
layer.
The first callback, called by librados whenever aio completes, runs in
the context of a single librados thread:
+static void rbd_finish_aiocb(rados_completion_t c, RADOSCB *rcb)
+{
+ RBDAIOCB *acb = rcb->acb;
rcb is per a single aio. Was created before and will be destroyed
here, whereas acb is shared between a few aios, however, it was
generated before the first aio was created.
+ int64_t r;
+ uint64_t buf = 1;
+ int i;
+
+ acb->aiocnt--;
acb->aiocnt has been set before initiating all the aios, so it's ok to
touch it now. Same goes to all acb fields.
+ r = rados_aio_get_return_value(c);
+ rados_aio_release(c);
+ if (acb->write) {
+ if (r < 0) {
+ acb->ret = r;
+ acb->error = 1;
+ } else if (!acb->error) {
+ acb->ret += rcb->segsize;
+ }
+ } else {
+ if (r == -ENOENT) {
+ memset(rcb->buf, 0, rcb->segsize);
+ if (!acb->error) {
+ acb->ret += rcb->segsize;
+ }
+ } else if (r < 0) {
+ acb->ret = r;
+ acb->error = 1;
+ } else if (r < rcb->segsize) {
+ memset(rcb->buf + r, 0, rcb->segsize - r);
+ if (!acb->error) {
+ acb->ret += rcb->segsize;
+ }
+ } else if (!acb->error) {
+ acb->ret += r;
+ }
+ }
+ if (write(acb->s->efd, &buf, sizeof(buf)) < 0)
This will wake up the io_read()
+ error_report("failed writing to acb->s->efd\n");
+ qemu_free(rcb);
+ i = 0;
+ if (!acb->aiocnt && acb->bh) {
+ qemu_bh_schedule(acb->bh);
This is the only qemu related call in here, seems safe to call it.
+ }
+}
The scheduled bh function will be called only after all aios that
relate to this specific aio set are done, so the following seems ok,
as there's no more acb references.
+static void rbd_aio_bh_cb(void *opaque)
+{
+ RBDAIOCB *acb = opaque;
+ uint64_t buf = 1;
+
+ if (!acb->write) {
+ qemu_iovec_from_buffer(acb->qiov, acb->bounce, acb->qiov->size);
+ }
+ qemu_vfree(acb->bounce);
+ acb->common.cb(acb->common.opaque, (acb->ret > 0 ? 0 : acb->ret));
+ qemu_bh_delete(acb->bh);
+ acb->bh = NULL;
+
+ if (write(acb->s->efd, &buf, sizeof(buf)) < 0)
+ error_report("failed writing to acb->s->efd\n");
+ qemu_aio_release(acb);
+}
Now, the second ones are the io_read(), in which we have our glue fd.
We send uint64 per each completed io
+static void rbd_aio_completion_cb(void *opaque)
+{
+ BDRVRBDState *s = opaque;
+
+ uint64_t val;
+ ssize_t ret;
+
+ do {
+ if ((ret = read(s->efd, &val, sizeof(val))) > 0) {
+ s->qemu_aio_count -= val;
There is an issue here with s->qemu_aio_count which needs to be
protected by a mutex. Other than that, it just reads from s->efd.
+ }
+ } while (ret < 0 && errno == EINTR);
+
+ return;
+}
+
+static int rbd_aio_flush_cb(void *opaque)
+{
+ BDRVRBDState *s = opaque;
+
+ return (s->qemu_aio_count > 0);
Same here as with the previous one, needs a mutex around s->qemu_aio_count.
+}
>
> If you saw lock ups, I bet that's what it was from.
>
As I explained before, before introducing the fd glue layer, the lack
of fd associated with our block device caused that there was no way
for qemu to check whether all aios were flushed or not, which didn't
work well when doing migration/savevm.
Thanks,
Yehuda
^ permalink raw reply
* Re: [PATCH] dell-laptop: Add hwswitch_only module parameter
From: Matthew Garrett @ 2010-10-07 21:49 UTC (permalink / raw)
To: Mario Limonciello
Cc: Dmitry Torokhov, Keng-Yu Lin, len.brown, alan-jenkins,
platform-driver-x86, linux-kernel
In-Reply-To: <AANLkTimh649Lhj-sBYzViq_G-2Bva0U-TPCMGfSdK=QE@mail.gmail.com>
On Thu, Oct 07, 2010 at 04:45:22PM -0500, Mario Limonciello wrote:
> Matthew:
>
> On Thu, Oct 7, 2010 at 16:42, Matthew Garrett <mjg59@srcf.ucam.org> wrote:
> > I don't understand this. You know which code is broken - surely you're
> > able to determine which products shipped with BIOSes derived from the
> > broken code?
>
> Not all product's BIOS are developed in-house. The ones that are, yes
> it quite possible to identify. Matter of fact, this issue tends to
> not exist on the in-house developed BIOS codebase.
Ok, so let's approach this differently. What is it that results in this
issue not affecting Windows?
--
Matthew Garrett | mjg59@srcf.ucam.org
^ permalink raw reply
* Re: [PATCH] dell-laptop: Add hwswitch_only module parameter
From: Mario Limonciello @ 2010-10-07 21:49 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: Matthew Garrett, Keng-Yu Lin, len.brown, alan-jenkins,
platform-driver-x86, linux-kernel
In-Reply-To: <20101007214628.GB18628@core.coreip.homeip.net>
Hi Dmitry:
On Thu, Oct 7, 2010 at 16:46, Dmitry Torokhov <dmitry.torokhov@gmail.com> wrote:
> On Thu, Oct 07, 2010 at 10:37:54PM +0100, Matthew Garrett wrote:
>> On Thu, Oct 07, 2010 at 02:30:28PM -0700, Dmitry Torokhov wrote:
>>
>> > We have this strategy for bunch of input stuff (force release, keymap)
>> > and I think it works better than dding more and more DMI quirks into
>> > kernel itself.
>>
>> It's limited to Dell hardware, so I think keeping a static list in the
>> Dell laptop driver is reasonable. All we need is a list of hardware, and
>> I'd really hope that Dell know which BIOS versions contain this code!
>>
>
> Unfortunately this kind of crap tends to flow from one BIOS version to
> another.. How many DMI entries do we know about so far? Did Dell issue
> firmware updates correcting the issue so new boxes will not exhibit the
> problem?
>
> --
> Dmitry
>
I've seen this on 2 machines thus far. One of them is still under
development and this was caught in time to be fixed properly in the
firmware (thanks to the patch above). The other will not be receiving
a firmware update to resolve it.
There are likely others out there, but I've not encountered them yet.
--
Mario Limonciello
superm1@gmail.com
^ permalink raw reply
* Re: [PATCH 2/2] compat: rename member in struct mmc_host.
From: Luis R. Rodriguez @ 2010-10-07 21:49 UTC (permalink / raw)
To: Hauke Mehrtens; +Cc: linux-wireless, mcgrof
In-Reply-To: <1286486544-18975-2-git-send-email-hauke@hauke-m.de>
On Thu, Oct 7, 2010 at 2:22 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote:
>
> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Applied the two patches, thanks!
Luis
^ permalink raw reply
* Re: [PATCH] dell-laptop: Add hwswitch_only module parameter
From: Matthew Garrett @ 2010-10-07 21:50 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: Mario Limonciello, Keng-Yu Lin, len.brown, alan-jenkins,
platform-driver-x86, linux-kernel
In-Reply-To: <20101007214628.GB18628@core.coreip.homeip.net>
On Thu, Oct 07, 2010 at 02:46:28PM -0700, Dmitry Torokhov wrote:
> On Thu, Oct 07, 2010 at 10:37:54PM +0100, Matthew Garrett wrote:
> > Dell laptop driver is reasonable. All we need is a list of hardware, and
> > I'd really hope that Dell know which BIOS versions contain this code!
> >
>
> Unfortunately this kind of crap tends to flow from one BIOS version to
> another.. How many DMI entries do we know about so far? Did Dell issue
> firmware updates correcting the issue so new boxes will not exhibit the
> problem?
Pushing this out to userspace doesn't help. If it's sufficiently
prevelant that it's impossible to have a comprehensive list, then a
module option makes it too easy for people to just post the fix on a
forum somewhere and never actually get it upstream.
--
Matthew Garrett | mjg59@srcf.ucam.org
^ permalink raw reply
* Re: [PATCH] serial: DCC(JTAG) serial and console emulation support
From: Daniel Walker @ 2010-10-07 21:50 UTC (permalink / raw)
To: Mike Frysinger
Cc: linux-kernel, Hyok S. Choi, Tony Lindgren, Jeff Ohlstein,
Greg Kroah-Hartman, Ben Dooks, Alan Cox, Kukjin Kim, Feng Tang,
Tobias Klauser, Jason Wessel, Philippe Langlais
In-Reply-To: <AANLkTimPrvj=NkJ0eN5kAmRTNof1N2nfo4U-THRnqikF@mail.gmail.com>
On Thu, 2010-10-07 at 17:32 -0400, Mike Frysinger wrote:
> > Ideally you would want this driver to work in any situation .. If it's
> > setup to use ttyS0 for debugging, even if it doesn't exist, then this
> > driver would be able to stand in for that interface.
>
> i dont think that's the case. "any situation" is way too vague and
> invites mounds of crap to be included in the kernel which really
> should be in userspace. ive never had a problem with my embedded work
> using ttyBF# or ttyBFJC# or ttySS# for the Blackfin serial devices,
> nor have i heard customers complain that the file absolutely must be
> named "ttyS#". ive found that simply informing them "to use ttyBF#"
> has always been sufficient.
> -mike
It's kind of a "your milage may vary" situation .. From my perspective
it doesn't hurt anything to have an exception for this, considering what
it is used for.
Daniel
--
Sent by a consultant of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
^ permalink raw reply
* Re: [PATCH 3/3] compat-wireless: backport kfifo for rt2x00
From: Luis R. Rodriguez @ 2010-10-07 21:51 UTC (permalink / raw)
To: Hauke Mehrtens; +Cc: linux-wireless, mcgrof
In-Reply-To: <1286486469-18904-3-git-send-email-hauke@hauke-m.de>
On Thu, Oct 7, 2010 at 2:21 PM, Hauke Mehrtens <hauke@hauke-m.de> wrote:
> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Applied all 3 thanks!!!
Luis
^ permalink raw reply
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