* [GIT PULL] arm: mediatek: dts changes for v4.10
From: Matthias Brugger @ 2016-11-14 18:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi Arnd and Olof,
although late, please pull the following changes.
Thanks,
Matthias
---
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
https://github.com/mbgg/linux-mediatek.git tags/v4.9-next-dts
for you to fetch changes up to 28d6e3647bd7c869bfc251f9a7e283d78cef5fc5:
arm: dts: mt2701: Use real clock for UARTs (2016-11-11 15:25:09 +0100)
----------------------------------------------------------------
- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
----------------------------------------------------------------
Erin Lo (1):
arm: dts: mt2701: Use real clock for UARTs
James Liao (1):
arm: dts: mt2701: Add clock controller device nodes
Matthias Brugger (1):
arm64: dts: mt8173: Fix auxadc node
Shunli Wang (1):
soc: mediatek: Add MT2701 power dt-bindings
.../devicetree/bindings/soc/mediatek/scpsys.txt | 13 +++---
arch/arm/boot/dts/mt2701.dtsi | 50
+++++++++++++++++++---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 3 ++
include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++
4 files changed, 83 insertions(+), 10 deletions(-)
create mode 100644 include/dt-bindings/power/mt2701-power.h
^ permalink raw reply
* [GIT PULL] arm: mediatek: dts changes for v4.10
From: Matthias Brugger @ 2016-11-14 18:36 UTC (permalink / raw)
To: arm-DgEjT+Ai2ygdnm+yROfE0A
Cc: James Liao, Erin Lo, moderated list:ARM/Mediatek SoC support,
Shunli Wang,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi Arnd and Olof,
although late, please pull the following changes.
Thanks,
Matthias
---
The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
are available in the git repository at:
https://github.com/mbgg/linux-mediatek.git tags/v4.9-next-dts
for you to fetch changes up to 28d6e3647bd7c869bfc251f9a7e283d78cef5fc5:
arm: dts: mt2701: Use real clock for UARTs (2016-11-11 15:25:09 +0100)
----------------------------------------------------------------
- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
----------------------------------------------------------------
Erin Lo (1):
arm: dts: mt2701: Use real clock for UARTs
James Liao (1):
arm: dts: mt2701: Add clock controller device nodes
Matthias Brugger (1):
arm64: dts: mt8173: Fix auxadc node
Shunli Wang (1):
soc: mediatek: Add MT2701 power dt-bindings
.../devicetree/bindings/soc/mediatek/scpsys.txt | 13 +++---
arch/arm/boot/dts/mt2701.dtsi | 50
+++++++++++++++++++---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 3 ++
include/dt-bindings/power/mt2701-power.h | 27 ++++++++++++
4 files changed, 83 insertions(+), 10 deletions(-)
create mode 100644 include/dt-bindings/power/mt2701-power.h
^ permalink raw reply
* Re: [PATCH 0/4] x86: enable User-Mode Instruction Prevention
From: Harald Arnesen @ 2016-11-14 18:36 UTC (permalink / raw)
To: One Thousand Gnomes, Ricardo Neri
Cc: Andy Lutomirski, Peter Zijlstra, Ingo Molnar, Thomas Gleixner,
H. Peter Anvin, linux-kernel@vger.kernel.org, X86 ML,
linux-doc@vger.kernel.org, Andy Lutomirski, Andrew Morton,
Borislav Petkov, Brian Gerst, Chen Yucong, Chris Metcalf,
Dave Hansen, Fenghua Yu, Huang Rui, Jiri Slaby, Jonathan Corbet,
Michael S . Tsirkin, Paul Gortmaker, Ravi V . Shankar,
Vlastimil Babka, Shuah Khan, linux-msdos
In-Reply-To: <20161114105911.62a6821c@lxorguk.ukuu.org.uk>
Den 14/11/2016 11:59, skrev One Thousand Gnomes:
> Is anyone actually still using DOSemu these days or are people all
> using DOSbox ?
>
> Alan
One thing lacking from DOSbox is TCP/IP networking.
--
Hilsen Harald
^ permalink raw reply
* security roadmap
From: Sage Weil @ 2016-11-14 18:36 UTC (permalink / raw)
To: ceph-devel
Now seems like a good time to review our security roadmap.
I've updated the trello board[1] to have a separate security list and
moved the relevant cards there. They include:
- resurrect coverity ci at scan.coverity.com. This stopped sending out
useful emails a while ago and the cron job has probably died; I'll try
to get it going again.
- coverity backlog: there is a big backlog of issues in coverity that
should be addressed. Many of them are low priority (e.g., exceptions
not caught in test code), but those issues obscure the real problems.
- hybrid kerberos/cephx auth mode: We've discussed this recently during
CDM, notes here:
http://pad.ceph.com/p/kerberos
- on the wire encryption: this is currently blocked by the msgr2 wire
protocol revamp.
- librbd: client-side encryption. The idea is to provide a key to librbd
so that it encrypts all data before it is sent to rados. This has to
happen in librbd and not qemu in order to support cloning of
encrypted images.
- ceph-disk: revamp boostrap process. This just came up on ceph-devel
today. I think moving the bootstrap code into the monitor will simplify
issues like this and be easier to maintain/use going forward...
- rgw: encryption. This is work in progress to implement the S3
encryption APIs.
Are there items we're missing that should go on this list?
Perhaps we should dedicate some time during the next CDM to go over the
security roadmap as a whole and any specific issues that are not well
defined.
Thanks!
sage
^ permalink raw reply
* Re: [PATCH 0/4] x86: enable User-Mode Instruction Prevention
From: Harald Arnesen @ 2016-11-14 18:36 UTC (permalink / raw)
To: One Thousand Gnomes, Ricardo Neri
Cc: Andy Lutomirski, Peter Zijlstra, Ingo Molnar, Thomas Gleixner,
H. Peter Anvin, linux-kernel@vger.kernel.org, X86 ML,
linux-doc@vger.kernel.org, Andy Lutomirski, Andrew Morton,
Borislav Petkov, Brian Gerst, Chen Yucong, Chris Metcalf,
Dave Hansen, Fenghua Yu, Huang Rui, Jiri Slaby, Jonathan Corbet,
Michael S . Tsirkin, P
In-Reply-To: <20161114105911.62a6821c@lxorguk.ukuu.org.uk>
Den 14/11/2016 11:59, skrev One Thousand Gnomes:
> Is anyone actually still using DOSemu these days or are people all
> using DOSbox ?
>
> Alan
One thing lacking from DOSbox is TCP/IP networking.
--
Hilsen Harald
^ permalink raw reply
* Re: [PATCH] [v2] net: phy: phy drivers should not set SUPPORTED_[Asym_]Pause
From: Florian Fainelli @ 2016-11-14 18:35 UTC (permalink / raw)
To: Timur Tabi, David Miller, jon.mason, netdev, Andrew Lunn
In-Reply-To: <1478821561-26498-1-git-send-email-timur@codeaurora.org>
On 11/10/2016 03:46 PM, Timur Tabi wrote:
> Instead of having individual PHY drivers set the SUPPORTED_Pause and
> SUPPORTED_Asym_Pause flags, phylib itself should set those flags.
> During autonegotiation, the PHYs will determine whether to enable
> pause frame support.
>
> Pause frames are a feature that is supported by the MAC. It is the MAC
> that generates the frames and that processes them. The PHY can only be
> configured to allow them to pass through.
>
> So the new process is:
>
> 1) Phylib sets the SUPPORTED_Pause and SUPPORTED_AsymPause bits in
> phydev->supported. This indicates that the PHY supports pause frames.
>
> 2) The MAC driver checks phydev->supported before it calls phy_start().
> If (SUPPORTED_Pause | SUPPORTED_AsymPause) is set, then the MAC driver
> sets those bits in phydev->advertising, if it wants to enable pause
> frame support.
>
> 3) When the link state changes, the MAC driver checks phydev->pause and
> phydev->asym_pause, If the bits are set, then it enables the corresponding
> features in the MAC. The algorithm is:
>
> if (phydev->pause)
> The MAC should be programmed to receive and honor
> pause frames it receives, i.e. enable receive flow control.
>
> if (phydev->pause != phydev->asym_pause)
> The MAC should be programmed to transmit pause
> frames when needed, i.e. enable transmit flow control.
>
> Signed-off-by: Timur Tabi <timur@codeaurora.org>
> ---
> diff --git a/drivers/net/phy/bcm63xx.c b/drivers/net/phy/bcm63xx.c
> index e741bf6..5e9922e 100644
> --- a/drivers/net/phy/bcm63xx.c
> +++ b/drivers/net/phy/bcm63xx.c
> @@ -48,8 +48,7 @@ static int bcm63xx_config_init(struct phy_device *phydev)
> .phy_id = 0x00406000,
> .phy_id_mask = 0xfffffc00,
> .name = "Broadcom BCM63XX (1)",
> - /* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
> - .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
> + .features = PHY_BASIC_FEATURES,
Humm that's actually a pretty important piece of information here that
we are going to lose if we unconditionally move the setting of the
SUPPORTED_Pause/Asym_Pause settings into the core. I don't have the HW
in a state where I could try a mainline kernel, but I suspect that the
following could happen though:
- we would try to set the SUPPORTED_AsymPause bit, and it would not be
taken into account, since the bit is RO
- the auto-negotiation results should still show up as symmetric pause
being supported only
- the driver would properly react to that
NB: this also applies to drivers/net/phy/ste10Xp.c.
So maybe, for theses drivers specifically, what we can do, is preserve
the entry as-is, to convey that only symmetric Pause frames can be
advertised, and have the logic in PHYLIB do something like this
(pseudo-code):
if (!(drv->features & (SUPPORTED_Pause | SUPPORTED_AsymPause))
phydev->supported |= SUPPORTED_Pause | SUPPORTED_AsymPause;
else if ((drv->features & (SUPPORTED_Pause) && (!(drv->features &
(SUPPORTED_AsymPause)))
phydev->supported |= SUPPORTED_Pause;
(there may be more efficient ways to do this of course).
--
Florian
^ permalink raw reply
* Re: [PATCH 0/2] sd: Fix a deadlock between event checking and device removal
From: Bart Van Assche @ 2016-11-14 18:35 UTC (permalink / raw)
To: James Bottomley, Martin K. Petersen
Cc: Mike Snitzer, Hannes Reinecke, linux-scsi@vger.kernel.org
In-Reply-To: <1479016028.17624.16.camel@linux.vnet.ibm.com>
On 11/12/2016 09:47 PM, James Bottomley wrote:
> On Fri, 2016-11-11 at 16:38 -0800, Bart Van Assche wrote:
>> Hello James and Martin,
>>
>> This short patch series fixes a deadlock that I ran into for the
>> first time several months ago but for which I had not yet had the
>> time to post a fix. As usual, feedback is appreciated.
>
> First question would be why do we need to push highly dm specific
> knowledge into block, like REQ_FAIL_IF_NO_PATH. Can't we just use
> REQ_FAILFAST_X for this?
>
> Also, I don't quite understand how you've configured multipath
> underneath SCSI. I thought dm-mp always went on top?
Hello James,
dm-multipath was running on top of SCSI in my setup which means that at
least the patch description is wrong. Since it was some time ago that I
ran into this deadlock, I will check first whether I can still reproduce it.
Bart.
^ permalink raw reply
* [PATCH 00/11] Update Broadcom PDC Mailbox Driver
From: Rob Rice @ 2016-11-14 18:25 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
Patch 1 addresses a checkpatch error
Patches 2 and 3 fix bugs when removing the PDC driver
Patches 4 - 10 are performance improvements
Patch 11 removes unnecessary void* casts
Rob Rice (9):
mailbox: bcm-pdc: Use octal permissions rather than symbolic
mailbox: bcm-pdc: Convert from interrupts to poll for tx done
mailbox: bcm-pdc: streamline rx code
mailbox: bcm-pdc: Try to improve branch prediction
mailbox: bcm-pdc: Convert from threaded IRQ to tasklet
mailbox: bcm-pdc: Don't use iowrite32 to write DMA descriptors
mailbox: bcm-pdc: Performance improvements
mailbox: bcm-pdc: Simplify interrupt handler logic
mailbox: bcm-pdc: Remove unnecessary void* casts
Steve Lin (2):
mailbox: bcm-pdc: Changes so mbox client can be removed / re-inserted
mailbox: bcm-pdc: PDC driver leaves debugfs files after removal
drivers/mailbox/bcm-pdc-mailbox.c | 548 ++++++++++++++++++++++----------------
1 file changed, 324 insertions(+), 224 deletions(-)
--
2.1.0
^ permalink raw reply
* Re: [Qemu-devel] [PATCH for-2.8] migration: Fix return code of ram_save_iterate()
From: Juan Quintela @ 2016-11-14 18:34 UTC (permalink / raw)
To: Thomas Huth; +Cc: Amit Shah, qemu-devel, Dr. David Alan Gilbert, David Gibson
In-Reply-To: <1478265017-5700-1-git-send-email-thuth@redhat.com>
Thomas Huth <thuth@redhat.com> wrote:
> qemu_savevm_state_iterate() expects the iterators to return 1
> when they are done, and 0 if there is still something left to do.
> However, ram_save_iterate() does not obey this rule and returns
> the number of saved pages instead. This causes a fatal hang with
> ppc64 guests when you run QEMU like this (also works with TCG):
>
> qemu-img create -f qcow2 /tmp/test.qcow2 1M
> qemu-system-ppc64 -nographic -nodefaults -m 256 \
> -hda /tmp/test.qcow2 -serial mon:stdio
>
> ... then switch to the monitor by pressing CTRL-a c and try to
> save a snapshot with "savevm test1" for example.
>
> After the first iteration, ram_save_iterate() always returns 0 here,
> so that qemu_savevm_state_iterate() hangs in an endless loop and you
> can only "kill -9" the QEMU process.
> Fix it by using proper return values in ram_save_iterate().
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Applied.
I don't know how we broked this so much.
Thanks, Juan.
^ permalink raw reply
* [PATCH 11/11] mailbox: bcm-pdc: Remove unnecessary void* casts
From: Rob Rice @ 2016-11-14 18:26 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
Remove unnecessary void* casts in register writes. Fix two other
minor formatting issues.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Reviewed-by: Jon Mason <jon.mason@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 41 +++++++++++++++++++--------------------
1 file changed, 20 insertions(+), 21 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index c1ec17c..2aeb034 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -468,7 +468,7 @@ static ssize_t pdc_debugfs_read(struct file *filp, char __user *ubuf,
out_offset += snprintf(buf + out_offset, out_count - out_offset,
"Num frags in rx ring............%u\n",
NRXDACTIVE(pdcs->rxin, pdcs->last_rx_curr,
- pdcs->nrxpost));
+ pdcs->nrxpost));
if (out_offset > out_count)
out_offset = out_count;
@@ -683,7 +683,7 @@ pdc_receive(struct pdc_state *pdcs)
/* read last_rx_curr from register once */
pdcs->last_rx_curr =
- (ioread32((void *)&pdcs->rxregs_64->status0) &
+ (ioread32(&pdcs->rxregs_64->status0) &
CRYPTO_D64_RS0_CD_MASK) / RING_ENTRY_SIZE;
do {
@@ -793,8 +793,8 @@ static int pdc_tx_list_final(struct pdc_state *pdcs)
* before chip starts to process new request
*/
wmb();
- iowrite32(pdcs->rxout << 4, (void *)&pdcs->rxregs_64->ptr);
- iowrite32(pdcs->txout << 4, (void *)&pdcs->txregs_64->ptr);
+ iowrite32(pdcs->rxout << 4, &pdcs->rxregs_64->ptr);
+ iowrite32(pdcs->txout << 4, &pdcs->txregs_64->ptr);
pdcs->pdc_requests++;
return PDC_SUCCESS;
@@ -1034,47 +1034,46 @@ static int pdc_ring_init(struct pdc_state *pdcs, int ringset)
/* But first disable DMA and set curptr to 0 for both TX & RX */
iowrite32(PDC_TX_CTL, &dma_reg->dmaxmt.control);
iowrite32((PDC_RX_CTL + (pdcs->rx_status_len << 1)),
- (void *)&dma_reg->dmarcv.control);
- iowrite32(0, (void *)&dma_reg->dmaxmt.ptr);
- iowrite32(0, (void *)&dma_reg->dmarcv.ptr);
+ &dma_reg->dmarcv.control);
+ iowrite32(0, &dma_reg->dmaxmt.ptr);
+ iowrite32(0, &dma_reg->dmarcv.ptr);
/* Set base DMA addresses */
iowrite32(lower_32_bits(pdcs->tx_ring_alloc.dmabase),
- (void *)&dma_reg->dmaxmt.addrlow);
+ &dma_reg->dmaxmt.addrlow);
iowrite32(upper_32_bits(pdcs->tx_ring_alloc.dmabase),
- (void *)&dma_reg->dmaxmt.addrhigh);
+ &dma_reg->dmaxmt.addrhigh);
iowrite32(lower_32_bits(pdcs->rx_ring_alloc.dmabase),
- (void *)&dma_reg->dmarcv.addrlow);
+ &dma_reg->dmarcv.addrlow);
iowrite32(upper_32_bits(pdcs->rx_ring_alloc.dmabase),
- (void *)&dma_reg->dmarcv.addrhigh);
+ &dma_reg->dmarcv.addrhigh);
/* Re-enable DMA */
iowrite32(PDC_TX_CTL | PDC_TX_ENABLE, &dma_reg->dmaxmt.control);
iowrite32((PDC_RX_CTL | PDC_RX_ENABLE | (pdcs->rx_status_len << 1)),
- (void *)&dma_reg->dmarcv.control);
+ &dma_reg->dmarcv.control);
/* Initialize descriptors */
for (i = 0; i < PDC_RING_ENTRIES; i++) {
/* Every tx descriptor can be used for start of frame. */
if (i != pdcs->ntxpost) {
iowrite32(D64_CTRL1_SOF | D64_CTRL1_EOF,
- (void *)&pdcs->txd_64[i].ctrl1);
+ &pdcs->txd_64[i].ctrl1);
} else {
/* Last descriptor in ringset. Set End of Table. */
iowrite32(D64_CTRL1_SOF | D64_CTRL1_EOF |
- D64_CTRL1_EOT,
- (void *)&pdcs->txd_64[i].ctrl1);
+ D64_CTRL1_EOT, &pdcs->txd_64[i].ctrl1);
}
/* Every rx descriptor can be used for start of frame */
if (i != pdcs->nrxpost) {
iowrite32(D64_CTRL1_SOF,
- (void *)&pdcs->rxd_64[i].ctrl1);
+ &pdcs->rxd_64[i].ctrl1);
} else {
/* Last descriptor in ringset. Set End of Table. */
iowrite32(D64_CTRL1_SOF | D64_CTRL1_EOT,
- (void *)&pdcs->rxd_64[i].ctrl1);
+ &pdcs->rxd_64[i].ctrl1);
}
}
return PDC_SUCCESS;
@@ -1300,10 +1299,10 @@ void pdc_hw_init(struct pdc_state *pdcs)
/* initialize data structures */
pdcs->regs = (struct pdc_regs *)pdcs->pdc_reg_vbase;
pdcs->txregs_64 = (struct dma64_regs *)
- (void *)(((u8 *)pdcs->pdc_reg_vbase) +
+ (((u8 *)pdcs->pdc_reg_vbase) +
PDC_TXREGS_OFFSET + (sizeof(struct dma64) * ringset));
pdcs->rxregs_64 = (struct dma64_regs *)
- (void *)(((u8 *)pdcs->pdc_reg_vbase) +
+ (((u8 *)pdcs->pdc_reg_vbase) +
PDC_RXREGS_OFFSET + (sizeof(struct dma64) * ringset));
pdcs->ntxd = PDC_RING_ENTRIES;
@@ -1318,7 +1317,7 @@ void pdc_hw_init(struct pdc_state *pdcs)
iowrite32(PDC_TX_CTL, &dma_reg->dmaxmt.control);
iowrite32(PDC_RX_CTL + (pdcs->rx_status_len << 1),
- (void *)&dma_reg->dmarcv.control);
+ &dma_reg->dmarcv.control);
/* Reset current index pointers after making sure DMA is disabled */
iowrite32(0, &dma_reg->dmaxmt.ptr);
@@ -1567,7 +1566,7 @@ static int pdc_probe(struct platform_device *pdev)
pdc_hw_init(pdcs);
/* Init tasklet for deferred DMA rx processing */
- tasklet_init(&pdcs->rx_tasklet, pdc_tasklet_cb, (unsigned long) pdcs);
+ tasklet_init(&pdcs->rx_tasklet, pdc_tasklet_cb, (unsigned long)pdcs);
err = pdc_interrupts_init(pdcs);
if (err)
--
2.1.0
^ permalink raw reply related
* Re: [PATCH 00/35] second batch of missing lustre 2.8 patches
From: James Simmons @ 2016-11-14 18:27 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: devel, Andreas Dilger, Oleg Drokin, Linux Kernel Mailing List,
Lustre Development List
In-Reply-To: <20161114151650.GA12605@kroah.com>
> On Thu, Nov 10, 2016 at 12:30:30PM -0500, James Simmons wrote:
> > More fixes missing from the upstream client. Also a nice cleanup
> > with the removal of cl_req which is no longer needed. More cleanup
> > for lustre_idl.h which is a uapi header. Like the last batch these
> > patches are independent of order.
>
> I didn't apply a few of these (string parsing stuff, and build
> breakages.)
>
> What's the plan for getting this out of staging? I feel like you all
> are still adding new features along with these "cleanups". Normally
> that's fine, but I really really want to get this out of staging as it's
> been there for way too long. When is that going to happen?
First I should address why the push to bring it into sync with our
prouction code base. One was to make it attractive to our user base.
In my other email I explained that. Second the feed back here has been
so valuable. We are at the point where bugs we haven't found are being
reported here and addressed. Also your input has made the Lustre
developers to reflect on what we have done. In a way leaving staging will
be sad since that will stop :-( Lastly I really didn't want to cleanup
the lustre client and then when it left staging do this massive dump
of changes without people like Julia, Dan and you looking at it. I just
felt that wouldn't of been right.
We are super close to reaching a very important mile stone of reaching
lustre 2.8.0 level of suppport. At this point we can stop at our lustre
2.8.0 release for the sync since currently most the lustre users out their
are staying at that version. Secondly the major of patches landed to our
soon to be release 2.9 version was for the patches missing from the
staging tree.
So before we consider moving out of staging some gaps need to be filled.
The zero day system has found bugs on platforms we don't have access too.
We really need to hook into that system. Also Julia Lawall Coccinelle
work has been really wonderful. Intel does have a mirror of your tree and
have started the integration of the test harness. For my work I have
using a local private test harness setup. This Intel one is planned for
public consumption. What is done here with Coccinelle and zero day needs
to be intergrated. So this is what needs to be done from our side.
Now for what is required to leave the staging tree. Honestly I can think
of many many many things that need to be done. The question becomes what
has to be done before leaving staging verses what can be completed after
leaving staging. We have the normal style issues and checkpatch issues
which is not much anymore. Then their is the uapi header cleanup. What
else beyond that?
^ permalink raw reply
* [PATCH 08/11] mailbox: bcm-pdc: Don't use iowrite32 to write DMA descriptors
From: Rob Rice @ 2016-11-14 18:26 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
In PDC driver, it is not necessary to use iowrite32()
when writing DMA descriptors to the transmit and receive rings.
The ring memory is in host memory. So convert to normal
assignment statements.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 23 +++++++++++------------
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index 16e5440..e7dc1a2 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -528,17 +528,17 @@ pdc_build_rxd(struct pdc_state *pdcs, dma_addr_t dma_addr,
u32 buf_len, u32 flags)
{
struct device *dev = &pdcs->pdev->dev;
+ struct dma64dd *rxd = &pdcs->rxd_64[pdcs->rxout];
dev_dbg(dev,
"Writing rx descriptor for PDC %u at index %u with length %u. flags %#x\n",
pdcs->pdc_idx, pdcs->rxout, buf_len, flags);
- iowrite32(lower_32_bits(dma_addr),
- (void *)&pdcs->rxd_64[pdcs->rxout].addrlow);
- iowrite32(upper_32_bits(dma_addr),
- (void *)&pdcs->rxd_64[pdcs->rxout].addrhigh);
- iowrite32(flags, (void *)&pdcs->rxd_64[pdcs->rxout].ctrl1);
- iowrite32(buf_len, (void *)&pdcs->rxd_64[pdcs->rxout].ctrl2);
+ rxd->addrlow = cpu_to_le32(lower_32_bits(dma_addr));
+ rxd->addrhigh = cpu_to_le32(upper_32_bits(dma_addr));
+ rxd->ctrl1 = cpu_to_le32(flags);
+ rxd->ctrl2 = cpu_to_le32(buf_len);
+
/* bump ring index and return */
pdcs->rxout = NEXTRXD(pdcs->rxout, pdcs->nrxpost);
}
@@ -556,17 +556,16 @@ pdc_build_txd(struct pdc_state *pdcs, dma_addr_t dma_addr, u32 buf_len,
u32 flags)
{
struct device *dev = &pdcs->pdev->dev;
+ struct dma64dd *txd = &pdcs->txd_64[pdcs->txout];
dev_dbg(dev,
"Writing tx descriptor for PDC %u at index %u with length %u, flags %#x\n",
pdcs->pdc_idx, pdcs->txout, buf_len, flags);
- iowrite32(lower_32_bits(dma_addr),
- (void *)&pdcs->txd_64[pdcs->txout].addrlow);
- iowrite32(upper_32_bits(dma_addr),
- (void *)&pdcs->txd_64[pdcs->txout].addrhigh);
- iowrite32(flags, (void *)&pdcs->txd_64[pdcs->txout].ctrl1);
- iowrite32(buf_len, (void *)&pdcs->txd_64[pdcs->txout].ctrl2);
+ txd->addrlow = cpu_to_le32(lower_32_bits(dma_addr));
+ txd->addrhigh = cpu_to_le32(upper_32_bits(dma_addr));
+ txd->ctrl1 = cpu_to_le32(flags);
+ txd->ctrl2 = cpu_to_le32(buf_len);
/* bump ring index and return */
pdcs->txout = NEXTTXD(pdcs->txout, pdcs->ntxpost);
--
2.1.0
^ permalink raw reply related
* [PATCH 10/11] mailbox: bcm-pdc: Simplify interrupt handler logic
From: Rob Rice @ 2016-11-14 18:26 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
Earlier versions of the PDC driver registered for both
transmit and receive interrupts. The hard IRQ handler had to
communicate to the soft handler which interrupt(s) had occurred.
The PDC driver no longer registers for tx interrupts. So there is
no reason to save the intstatus. So remove the intstatus member
of the PDC state.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 38 +++++++++++++-------------------------
1 file changed, 13 insertions(+), 25 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index 8c2aa7c..c1ec17c 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -298,14 +298,6 @@ struct pdc_state {
unsigned int pdc_irq;
- /*
- * Last interrupt status read from PDC device. Saved in interrupt
- * handler so the handler can clear the interrupt in the device,
- * and the interrupt thread called later can know which interrupt
- * bits are active.
- */
- unsigned long intstatus;
-
/* tasklet for deferred processing after DMA rx interrupt */
struct tasklet_struct rx_tasklet;
@@ -955,32 +947,30 @@ static irqreturn_t pdc_irq_handler(int irq, void *data)
struct pdc_state *pdcs = dev_get_drvdata(dev);
u32 intstatus = ioread32(pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
- if (likely(intstatus & PDC_RCVINTEN_0))
- set_bit(PDC_RCVINT_0, &pdcs->intstatus);
-
- /* Clear interrupt flags in device */
- iowrite32(intstatus, pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
+ if (unlikely(intstatus == 0))
+ return IRQ_NONE;
/* Disable interrupts until soft handler runs */
iowrite32(0, pdcs->pdc_reg_vbase + PDC_INTMASK_OFFSET);
+ /* Clear interrupt flags in device */
+ iowrite32(intstatus, pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
+
/* Wakeup IRQ thread */
- if (likely(pdcs && (irq == pdcs->pdc_irq) &&
- (intstatus & PDC_INTMASK))) {
- tasklet_schedule(&pdcs->rx_tasklet);
- return IRQ_HANDLED;
- }
- return IRQ_NONE;
+ tasklet_schedule(&pdcs->rx_tasklet);
+ return IRQ_HANDLED;
}
+/**
+ * pdc_tasklet_cb() - Tasklet callback that runs the deferred processing after
+ * a DMA receive interrupt. Reenables the receive interrupt.
+ * @data: PDC state structure
+ */
static void pdc_tasklet_cb(unsigned long data)
{
struct pdc_state *pdcs = (struct pdc_state *)data;
- bool rx_int;
- rx_int = test_and_clear_bit(PDC_RCVINT_0, &pdcs->intstatus);
- if (likely(pdcs && rx_int))
- pdc_receive(pdcs);
+ pdc_receive(pdcs);
/* reenable interrupts */
iowrite32(PDC_INTMASK, pdcs->pdc_reg_vbase + PDC_INTMASK_OFFSET);
@@ -1405,8 +1395,6 @@ static int pdc_interrupts_init(struct pdc_state *pdcs)
struct device_node *dn = pdev->dev.of_node;
int err;
- pdcs->intstatus = 0;
-
/* interrupt configuration */
iowrite32(PDC_INTMASK, pdcs->pdc_reg_vbase + PDC_INTMASK_OFFSET);
iowrite32(PDC_LAZY_INT, pdcs->pdc_reg_vbase + PDC_RCVLAZY0_OFFSET);
--
2.1.0
^ permalink raw reply related
* [PATCH 07/11] mailbox: bcm-pdc: Convert from threaded IRQ to tasklet
From: Rob Rice @ 2016-11-14 18:26 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
Previously used threaded IRQs in the PDC driver to defer
processing the rx DMA ring after getting an rx done interrupt.
Instead, use a tasklet at normal priority for deferred processing.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 57 +++++++++++++++++----------------------
1 file changed, 25 insertions(+), 32 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index 7ed3f02..16e5440 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -285,6 +285,9 @@ struct pdc_state {
*/
unsigned long intstatus;
+ /* tasklet for deferred processing after DMA rx interrupt */
+ struct tasklet_struct rx_tasklet;
+
/* Number of bytes of receive status prior to each rx frame */
u32 rx_status_len;
/* Whether a BCM header is prepended to each frame */
@@ -931,7 +934,7 @@ static int pdc_rx_list_sg_add(struct pdc_state *pdcs, struct scatterlist *sg)
/**
* pdc_irq_handler() - Interrupt handler called in interrupt context.
* @irq: Interrupt number that has fired
- * @cookie: PDC state for DMA engine that generated the interrupt
+ * @data: device struct for DMA engine that generated the interrupt
*
* We have to clear the device interrupt status flags here. So cache the
* status for later use in the thread function. Other than that, just return
@@ -940,9 +943,10 @@ static int pdc_rx_list_sg_add(struct pdc_state *pdcs, struct scatterlist *sg)
* Return: IRQ_WAKE_THREAD if interrupt is ours
* IRQ_NONE otherwise
*/
-static irqreturn_t pdc_irq_handler(int irq, void *cookie)
+static irqreturn_t pdc_irq_handler(int irq, void *data)
{
- struct pdc_state *pdcs = cookie;
+ struct device *dev = (struct device *)data;
+ struct pdc_state *pdcs = dev_get_drvdata(dev);
u32 intstatus = ioread32(pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
if (likely(intstatus & PDC_RCVINTEN_0))
@@ -952,39 +956,22 @@ static irqreturn_t pdc_irq_handler(int irq, void *cookie)
iowrite32(intstatus, pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
/* Wakeup IRQ thread */
- if (likely(pdcs && (irq == pdcs->pdc_irq) && (intstatus & PDC_INTMASK)))
- return IRQ_WAKE_THREAD;
-
+ if (likely(pdcs && (irq == pdcs->pdc_irq) &&
+ (intstatus & PDC_INTMASK))) {
+ tasklet_schedule(&pdcs->rx_tasklet);
+ return IRQ_HANDLED;
+ }
return IRQ_NONE;
}
-/**
- * pdc_irq_thread() - Function invoked on deferred thread when data is available
- * to receive.
- * @irq: Interrupt number
- * @cookie: PDC state for PDC that generated the interrupt
- *
- * On DMA rx complete, process as many SPU response messages as are available
- * and send each to the mailbox client.
- *
- * Return: IRQ_HANDLED if we recognized and handled the interrupt
- * IRQ_NONE otherwise
- */
-static irqreturn_t pdc_irq_thread(int irq, void *cookie)
+static void pdc_tasklet_cb(unsigned long data)
{
- struct pdc_state *pdcs = cookie;
+ struct pdc_state *pdcs = (struct pdc_state *)data;
bool rx_int;
rx_int = test_and_clear_bit(PDC_RCVINT_0, &pdcs->intstatus);
- if (likely(pdcs && rx_int)) {
- dev_dbg(&pdcs->pdev->dev,
- "%s() got irq %d with rx_int %s",
- __func__, irq, rx_int ? "set" : "clear");
-
+ if (likely(pdcs && rx_int))
pdc_receive(pdcs);
- return IRQ_HANDLED;
- }
- return IRQ_NONE;
}
/**
@@ -1416,11 +1403,11 @@ static int pdc_interrupts_init(struct pdc_state *pdcs)
pdcs->pdc_irq = irq_of_parse_and_map(dn, 0);
dev_dbg(dev, "pdc device %s irq %u for pdcs %p",
dev_name(dev), pdcs->pdc_irq, pdcs);
- err = devm_request_threaded_irq(dev, pdcs->pdc_irq,
- pdc_irq_handler,
- pdc_irq_thread, 0, dev_name(dev), pdcs);
+
+ err = devm_request_irq(dev, pdcs->pdc_irq, pdc_irq_handler, 0,
+ dev_name(dev), dev);
if (err) {
- dev_err(dev, "threaded tx IRQ %u request failed with err %d\n",
+ dev_err(dev, "IRQ %u request failed with err %d\n",
pdcs->pdc_irq, err);
return err;
}
@@ -1579,6 +1566,9 @@ static int pdc_probe(struct platform_device *pdev)
pdc_hw_init(pdcs);
+ /* Init tasklet for deferred DMA rx processing */
+ tasklet_init(&pdcs->rx_tasklet, pdc_tasklet_cb, (unsigned long) pdcs);
+
err = pdc_interrupts_init(pdcs);
if (err)
goto cleanup_buf_pool;
@@ -1595,6 +1585,7 @@ static int pdc_probe(struct platform_device *pdev)
return PDC_SUCCESS;
cleanup_buf_pool:
+ tasklet_kill(&pdcs->rx_tasklet);
dma_pool_destroy(pdcs->rx_buf_pool);
cleanup_ring_pool:
@@ -1610,6 +1601,8 @@ static int pdc_remove(struct platform_device *pdev)
pdc_free_debugfs();
+ tasklet_kill(&pdcs->rx_tasklet);
+
pdc_hw_disable(pdcs);
mbox_controller_unregister(&pdcs->mbc);
--
2.1.0
^ permalink raw reply related
* [PATCH 04/11] mailbox: bcm-pdc: Convert from interrupts to poll for tx done
From: Rob Rice @ 2016-11-14 18:25 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
The PDC driver is a mailbox controller. A mailbox controller
can report that a mailbox message has been "transmitted" either when
a tx interrupt fires or by having the mailbox framework poll. This
commit converts the PDC driver to the poll method. We found that the
tx interrupt happens when the descriptors are read by the SPU hw. Thus,
the interrupt method does not allow more than one tx message in the PDC
tx DMA ring at a time. To keep the SPU hw busy, we would like to keep
the tx ring full under heavy load.
With the poll method, the PDC driver responds that the previous message
has been transmitted if the tx ring has space for another message.
SPU request messages take a variable number of descriptors. If 15
descriptors are available, there is a good chance another message will
fit. Also increased the ring size from 128 to 512 descriptors.
With this change, I found the PDC driver hangs on its spinlock under
heavy load. The PDC spinlock is not required; so I removed it. Calls
to pdc_send_data() are already synchronized because of the channel
spinlock in the mailbox framework. Other references to ring indexes
should not require locking because they only written on either the
tx or rx side.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 207 ++++++++++++++++++++++++++------------
1 file changed, 145 insertions(+), 62 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index c9434a7..fa3f484 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -60,7 +60,13 @@
#define RING_ENTRY_SIZE sizeof(struct dma64dd)
/* # entries in PDC dma ring */
-#define PDC_RING_ENTRIES 128
+#define PDC_RING_ENTRIES 512
+/*
+ * Minimum number of ring descriptor entries that must be free to tell mailbox
+ * framework that it can submit another request
+ */
+#define PDC_RING_SPACE_MIN 15
+
#define PDC_RING_SIZE (PDC_RING_ENTRIES * RING_ENTRY_SIZE)
/* Rings are 8k aligned */
#define RING_ALIGN_ORDER 13
@@ -93,11 +99,9 @@
* Interrupt mask and status definitions. Enable interrupts for tx and rx on
* ring 0
*/
-#define PDC_XMTINT_0 (24 + PDC_RINGSET)
#define PDC_RCVINT_0 (16 + PDC_RINGSET)
-#define PDC_XMTINTEN_0 BIT(PDC_XMTINT_0)
#define PDC_RCVINTEN_0 BIT(PDC_RCVINT_0)
-#define PDC_INTMASK (PDC_XMTINTEN_0 | PDC_RCVINTEN_0)
+#define PDC_INTMASK (PDC_RCVINTEN_0)
#define PDC_LAZY_FRAMECOUNT 1
#define PDC_LAZY_TIMEOUT 10000
#define PDC_LAZY_INT (PDC_LAZY_TIMEOUT | (PDC_LAZY_FRAMECOUNT << 24))
@@ -258,9 +262,6 @@ struct pdc_ring_alloc {
/* PDC state structure */
struct pdc_state {
- /* synchronize access to this PDC state structure */
- spinlock_t pdc_lock;
-
/* Index of the PDC whose state is in this structure instance */
u8 pdc_idx;
@@ -401,11 +402,14 @@ struct pdc_state {
struct dentry *debugfs_stats; /* debug FS stats file for this PDC */
/* counters */
- u32 pdc_requests; /* number of request messages submitted */
- u32 pdc_replies; /* number of reply messages received */
- u32 txnobuf; /* count of tx ring full */
- u32 rxnobuf; /* count of rx ring full */
- u32 rx_oflow; /* count of rx overflows */
+ u32 pdc_requests; /* number of request messages submitted */
+ u32 pdc_replies; /* number of reply messages received */
+ u32 last_tx_not_done; /* too few tx descriptors to indicate done */
+ u32 tx_ring_full; /* unable to accept msg because tx ring full */
+ u32 rx_ring_full; /* unable to accept msg because rx ring full */
+ u32 txnobuf; /* unable to create tx descriptor */
+ u32 rxnobuf; /* unable to create rx descriptor */
+ u32 rx_oflow; /* count of rx overflows */
};
/* Global variables */
@@ -438,20 +442,33 @@ static ssize_t pdc_debugfs_read(struct file *filp, char __user *ubuf,
out_offset += snprintf(buf + out_offset, out_count - out_offset,
"SPU %u stats:\n", pdcs->pdc_idx);
out_offset += snprintf(buf + out_offset, out_count - out_offset,
- "PDC requests............%u\n",
+ "PDC requests....................%u\n",
pdcs->pdc_requests);
out_offset += snprintf(buf + out_offset, out_count - out_offset,
- "PDC responses...........%u\n",
+ "PDC responses...................%u\n",
pdcs->pdc_replies);
out_offset += snprintf(buf + out_offset, out_count - out_offset,
- "Tx err ring full........%u\n",
+ "Tx not done.....................%u\n",
+ pdcs->last_tx_not_done);
+ out_offset += snprintf(buf + out_offset, out_count - out_offset,
+ "Tx ring full....................%u\n",
+ pdcs->tx_ring_full);
+ out_offset += snprintf(buf + out_offset, out_count - out_offset,
+ "Rx ring full....................%u\n",
+ pdcs->rx_ring_full);
+ out_offset += snprintf(buf + out_offset, out_count - out_offset,
+ "Tx desc write fail. Ring full...%u\n",
pdcs->txnobuf);
out_offset += snprintf(buf + out_offset, out_count - out_offset,
- "Rx err ring full........%u\n",
+ "Rx desc write fail. Ring full...%u\n",
pdcs->rxnobuf);
out_offset += snprintf(buf + out_offset, out_count - out_offset,
- "Receive overflow........%u\n",
+ "Receive overflow................%u\n",
pdcs->rx_oflow);
+ out_offset += snprintf(buf + out_offset, out_count - out_offset,
+ "Num frags in rx ring............%u\n",
+ NRXDACTIVE(pdcs->rxin, pdcs->last_rx_curr,
+ pdcs->nrxpost));
if (out_offset > out_count)
out_offset = out_count;
@@ -582,8 +599,6 @@ pdc_receive(struct pdc_state *pdcs, struct brcm_message *mssg)
u32 rx_idx; /* ring index of start of receive frame */
dma_addr_t resp_hdr_daddr;
- spin_lock(&pdcs->pdc_lock);
-
/*
* return if a complete response message is not yet ready.
* rxin_numd[rxin] is the number of fragments in the next msg
@@ -600,7 +615,6 @@ pdc_receive(struct pdc_state *pdcs, struct brcm_message *mssg)
if ((frags_rdy == 0) ||
(frags_rdy < pdcs->rxin_numd[pdcs->rxin])) {
/* No response ready */
- spin_unlock(&pdcs->pdc_lock);
return -EAGAIN;
}
/* can't read descriptors/data until write index is read */
@@ -630,8 +644,6 @@ pdc_receive(struct pdc_state *pdcs, struct brcm_message *mssg)
for (i = 0; i < num_frags; i++)
pdcs->rxin = NEXTRXD(pdcs->rxin, pdcs->nrxpost);
- spin_unlock(&pdcs->pdc_lock);
-
dev_dbg(dev, "PDC %u reclaimed %d rx descriptors",
pdcs->pdc_idx, num_frags);
@@ -920,8 +932,6 @@ static irqreturn_t pdc_irq_handler(int irq, void *cookie)
struct pdc_state *pdcs = cookie;
u32 intstatus = ioread32(pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
- if (intstatus & PDC_XMTINTEN_0)
- set_bit(PDC_XMTINT_0, &pdcs->intstatus);
if (intstatus & PDC_RCVINTEN_0)
set_bit(PDC_RCVINT_0, &pdcs->intstatus);
@@ -953,45 +963,35 @@ static irqreturn_t pdc_irq_thread(int irq, void *cookie)
struct pdc_state *pdcs = cookie;
struct mbox_controller *mbc;
struct mbox_chan *chan;
- bool tx_int;
bool rx_int;
int rx_status;
struct brcm_message mssg;
- tx_int = test_and_clear_bit(PDC_XMTINT_0, &pdcs->intstatus);
rx_int = test_and_clear_bit(PDC_RCVINT_0, &pdcs->intstatus);
- if (pdcs && (tx_int || rx_int)) {
+ if (pdcs && rx_int) {
dev_dbg(&pdcs->pdev->dev,
- "%s() got irq %d with tx_int %s, rx_int %s",
- __func__, irq,
- tx_int ? "set" : "clear", rx_int ? "set" : "clear");
+ "%s() got irq %d with rx_int %s",
+ __func__, irq, rx_int ? "set" : "clear");
mbc = &pdcs->mbc;
chan = &mbc->chans[0];
- if (tx_int) {
- dev_dbg(&pdcs->pdev->dev, "%s(): tx done", __func__);
- /* only one frame in flight at a time */
- mbox_chan_txdone(chan, PDC_SUCCESS);
- }
- if (rx_int) {
- while (1) {
- /* Could be many frames ready */
- memset(&mssg, 0, sizeof(mssg));
- mssg.type = BRCM_MESSAGE_SPU;
- rx_status = pdc_receive(pdcs, &mssg);
- if (rx_status >= 0) {
- dev_dbg(&pdcs->pdev->dev,
- "%s(): invoking client rx cb",
- __func__);
- mbox_chan_received_data(chan, &mssg);
- } else {
- dev_dbg(&pdcs->pdev->dev,
- "%s(): no SPU response available",
- __func__);
- break;
- }
+ while (1) {
+ /* Could be many frames ready */
+ memset(&mssg, 0, sizeof(mssg));
+ mssg.type = BRCM_MESSAGE_SPU;
+ rx_status = pdc_receive(pdcs, &mssg);
+ if (rx_status >= 0) {
+ dev_dbg(&pdcs->pdev->dev,
+ "%s(): invoking client rx cb",
+ __func__);
+ mbox_chan_received_data(chan, &mssg);
+ } else {
+ dev_dbg(&pdcs->pdev->dev,
+ "%s(): no SPU response available",
+ __func__);
+ break;
}
}
return IRQ_HANDLED;
@@ -1036,9 +1036,6 @@ static int pdc_ring_init(struct pdc_state *pdcs, int ringset)
dev_dbg(dev, " - base DMA addr of rx ring %pad", &rx.dmabase);
dev_dbg(dev, " - base virtual addr of rx ring %p", rx.vbase);
- /* lock after ring allocation to avoid scheduling while atomic */
- spin_lock(&pdcs->pdc_lock);
-
memcpy(&pdcs->tx_ring_alloc, &tx, sizeof(tx));
memcpy(&pdcs->rx_ring_alloc, &rx, sizeof(rx));
@@ -1103,7 +1100,6 @@ static int pdc_ring_init(struct pdc_state *pdcs, int ringset)
(void *)&pdcs->rxd_64[i].ctrl1);
}
}
- spin_unlock(&pdcs->pdc_lock);
return PDC_SUCCESS;
fail_dealloc:
@@ -1128,6 +1124,80 @@ static void pdc_ring_free(struct pdc_state *pdcs)
}
/**
+ * pdc_desc_count() - Count the number of DMA descriptors that will be required
+ * for a given scatterlist. Account for the max length of a DMA buffer.
+ * @sg: Scatterlist to be DMA'd
+ * Return: Number of descriptors required
+ */
+static u32 pdc_desc_count(struct scatterlist *sg)
+{
+ u32 cnt = 0;
+
+ while (sg) {
+ cnt += ((sg->length / PDC_DMA_BUF_MAX) + 1);
+ sg = sg_next(sg);
+ }
+ return cnt;
+}
+
+/**
+ * pdc_rings_full() - Check whether the tx ring has room for tx_cnt descriptors
+ * and the rx ring has room for rx_cnt descriptors.
+ * @pdcs: PDC state
+ * @tx_cnt: The number of descriptors required in the tx ring
+ * @rx_cnt: The number of descriptors required i the rx ring
+ *
+ * Return: true if one of the rings does not have enough space
+ * false if sufficient space is available in both rings
+ */
+static bool pdc_rings_full(struct pdc_state *pdcs, int tx_cnt, int rx_cnt)
+{
+ u32 rx_avail;
+ u32 tx_avail;
+ bool full = false;
+
+ /* Check if the tx and rx rings are likely to have enough space */
+ rx_avail = pdcs->nrxpost - NRXDACTIVE(pdcs->rxin, pdcs->rxout,
+ pdcs->nrxpost);
+ if (unlikely(rx_cnt > rx_avail)) {
+ pdcs->rx_ring_full++;
+ full = true;
+ }
+
+ if (likely(!full)) {
+ tx_avail = pdcs->ntxpost - NTXDACTIVE(pdcs->txin, pdcs->txout,
+ pdcs->ntxpost);
+ if (unlikely(tx_cnt > tx_avail)) {
+ pdcs->tx_ring_full++;
+ full = true;
+ }
+ }
+ return full;
+}
+
+/**
+ * pdc_last_tx_done() - If both the tx and rx rings have at least
+ * PDC_RING_SPACE_MIN descriptors available, then indicate that the mailbox
+ * framework can submit another message.
+ * @chan: mailbox channel to check
+ * Return: true if PDC can accept another message on this channel
+ */
+static bool pdc_last_tx_done(struct mbox_chan *chan)
+{
+ struct pdc_state *pdcs = chan->con_priv;
+ bool ret;
+
+ if (unlikely(pdc_rings_full(pdcs, PDC_RING_SPACE_MIN,
+ PDC_RING_SPACE_MIN))) {
+ pdcs->last_tx_not_done++;
+ ret = false;
+ } else {
+ ret = true;
+ }
+ return ret;
+}
+
+/**
* pdc_send_data() - mailbox send_data function
* @chan: The mailbox channel on which the data is sent. The channel
* corresponds to a DMA ringset.
@@ -1158,6 +1228,8 @@ static int pdc_send_data(struct mbox_chan *chan, void *data)
int src_nent;
int dst_nent;
int nent;
+ u32 tx_desc_req;
+ u32 rx_desc_req;
if (mssg->type != BRCM_MESSAGE_SPU)
return -ENOTSUPP;
@@ -1180,7 +1252,19 @@ static int pdc_send_data(struct mbox_chan *chan, void *data)
}
}
- spin_lock(&pdcs->pdc_lock);
+ /*
+ * Check if the tx and rx rings have enough space. Do this prior to
+ * writing any tx or rx descriptors. Need to ensure that we do not write
+ * a partial set of descriptors, or write just rx descriptors but
+ * corresponding tx descriptors don't fit. Note that we want this check
+ * and the entire sequence of descriptor to happen without another
+ * thread getting in. The channel spin lock in the mailbox framework
+ * ensures this.
+ */
+ tx_desc_req = pdc_desc_count(mssg->spu.src);
+ rx_desc_req = pdc_desc_count(mssg->spu.dst);
+ if (pdc_rings_full(pdcs, tx_desc_req, rx_desc_req + 1))
+ return -ENOSPC;
/* Create rx descriptors to SPU catch response */
err = pdc_rx_list_init(pdcs, mssg->spu.dst, mssg->ctx);
@@ -1190,8 +1274,6 @@ static int pdc_send_data(struct mbox_chan *chan, void *data)
err |= pdc_tx_list_sg_add(pdcs, mssg->spu.src);
err |= pdc_tx_list_final(pdcs); /* initiate transfer */
- spin_unlock(&pdcs->pdc_lock);
-
if (err)
dev_err(&pdcs->pdev->dev,
"%s failed with error %d", __func__, err);
@@ -1359,6 +1441,7 @@ static int pdc_interrupts_init(struct pdc_state *pdcs)
static const struct mbox_chan_ops pdc_mbox_chan_ops = {
.send_data = pdc_send_data,
+ .last_tx_done = pdc_last_tx_done,
.startup = pdc_startup,
.shutdown = pdc_shutdown
};
@@ -1391,8 +1474,9 @@ static int pdc_mb_init(struct pdc_state *pdcs)
if (!mbc->chans)
return -ENOMEM;
- mbc->txdone_irq = true;
- mbc->txdone_poll = false;
+ mbc->txdone_irq = false;
+ mbc->txdone_poll = true;
+ mbc->txpoll_period = 1;
for (chan_index = 0; chan_index < mbc->num_chans; chan_index++)
mbc->chans[chan_index].con_priv = pdcs;
@@ -1462,7 +1546,6 @@ static int pdc_probe(struct platform_device *pdev)
goto cleanup;
}
- spin_lock_init(&pdcs->pdc_lock);
pdcs->pdev = pdev;
platform_set_drvdata(pdev, pdcs);
pdcs->pdc_idx = pdcg.num_spu;
--
2.1.0
^ permalink raw reply related
* Re: [PATCH v3] ip6_output: ensure flow saddr actually belongs to device
From: Hannes Frederic Sowa @ 2016-11-14 18:33 UTC (permalink / raw)
To: David Ahern, Jason A. Donenfeld, Netdev, WireGuard mailing list,
LKML, YOSHIFUJI Hideaki
In-Reply-To: <0214eaf8-70c6-5a37-cddd-faa1c4268871@cumulusnetworks.com>
On Mon, Nov 14, 2016, at 18:48, David Ahern wrote:
> On 11/14/16 10:33 AM, Hannes Frederic Sowa wrote:
> >>>>> I just also quickly read up on the history (sorry was travelling last
> >>>>> week) and wonder if you ever saw a user space facing bug or if this is
> >>>>> basically some difference you saw while writing out of tree code?
> >>>>
> >>>> I checked the userspace API this morning. bind and cmsg for example check that the address is valid with calls to ipv6_chk_addr.
> >>>
> >>> Hmm, so it fixes no real bug.
> >>>
> >>> Because of translations of flowi6_oif we actually can't do a correct
> >>> check of source address for cases like the one I outlined above? Hmm,
> >>> maybe we should simply depend on user space checks.
> >>
> >> I believe Jason's case is forwarding path and the ipv6_stub->ipv6_dst_lookup API.
> >
> > It is not a kernel API, because we don't support something like that for
> > external kernel modules. We basically exported ipv6_dst_lookup to allow
> > some IPv4 code to do ipv6 stunts when the IPv6 module is loaded. ;)
>
> ???
>
> ipv6_stub is exported for modules (EXPORT_SYMBOL_GPL(ipv6_stub)).
>
> ipv6_stub->ipv6_dst_lookup is used by several modules -- geneve, tipc,
> vxlan, mpls -- for IPv6 lookups, not IPv4 code do IPv6 stunts.
>
> So how do you say that is not an exported kernel API?
Sorry, yes, I noticed I wrote it in a confusing way.
I meant to say, we don't require the IPv6 "API" to behave in a similar
way like the IPv4 one. We do this function pointer trick to allow
_in-kernel_ tree modules to use the function dynamically, even the
kernel ipv6 module would be available but is not loaded but don't
guarante any "API like IPv4" to outside tree modules.
I tried to make the point, that it is still something internal to the
kernel if compared to out-of-tree function users. And that different
behavior by itself doesn't count as a bug.
We could as well require the users of this function to check for the
source address before or require to check the source address after the
ipv6_dst_lookup call.
vxlan currently seems wrong and would impacted by this patch in a better
way, so I am all in for such a change, but I think we need to check if
we are also correct scope-wise and not just match for the address on its
own.
Thanks,
Hannes
^ permalink raw reply
* [U-Boot] [PATCH] drivers: SPI: sunxi SPL: fix warning
From: Siarhei Siamashka @ 2016-11-14 18:32 UTC (permalink / raw)
To: u-boot
In-Reply-To: <1478134692-496-1-git-send-email-andre.przywara@arm.com>
On Thu, 3 Nov 2016 00:58:12 +0000
Andre Przywara <andre.przywara@arm.com> wrote:
> Somehow an int returning function without a return statement sneaked
> in. Fix it.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> drivers/mtd/spi/sunxi_spi_spl.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c
> index 67c7edd..7502314 100644
> --- a/drivers/mtd/spi/sunxi_spi_spl.c
> +++ b/drivers/mtd/spi/sunxi_spi_spl.c
> @@ -158,9 +158,10 @@ static void spi0_disable_clock(void)
> (1 << AHB_RESET_SPI0_SHIFT));
> }
>
> -static int spi0_init(void)
> +static void spi0_init(void)
> {
> unsigned int pin_function = SUNXI_GPC_SPI0;
> +
> if (IS_ENABLED(CONFIG_MACH_SUN50I))
> pin_function = SUN50I_GPC_SPI0;
>
Thanks for spotting and fixing this compilation warning.
This was a last minute change. Originally there was also a check for
the pins state and the function returned an error code in the case if
the pins are already configured for NAND. But I removed this code
before sending the patch.
The idea is that probing the SPI flash may be useful in the future even
if booting from some other media. We may store some board-specific
configuration in the on-board SPI flash (for example, the DRAM and
CPU speed grade information). But this functionality definitely belongs
to a separate patch and can be always contributed later. There is also
the SPL size concern and we don't want to unnecessarily increase the
code size.
--
Best regards,
Siarhei Siamashka
^ permalink raw reply
* [PATCH 01/11] mailbox: bcm-pdc: Use octal permissions rather than symbolic
From: Rob Rice @ 2016-11-14 18:25 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
When creating the debugfs files for the PDC driver, use
octal file permissions rather than symbolic file permissions.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index c19dd82..a9c804f 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -480,7 +480,8 @@ static void pdc_setup_debugfs(struct pdc_state *pdcs)
if (!debugfs_dir)
debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
- pdcs->debugfs_stats = debugfs_create_file(spu_stats_name, S_IRUSR,
+ /* S_IRUSR == 0400 */
+ pdcs->debugfs_stats = debugfs_create_file(spu_stats_name, 0400,
debugfs_dir, pdcs,
&pdc_debugfs_stats);
}
--
2.1.0
^ permalink raw reply related
* [PATCH 06/11] mailbox: bcm-pdc: Try to improve branch prediction
From: Rob Rice @ 2016-11-14 18:26 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
Use likely/unlikely directives to improve branch prediction.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index 2195760..7ed3f02 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -834,7 +834,7 @@ static int pdc_rx_list_init(struct pdc_state *pdcs, struct scatterlist *dst_sg,
/* allocate a buffer for the dma rx status */
vaddr = dma_pool_zalloc(pdcs->rx_buf_pool, GFP_ATOMIC, &daddr);
- if (!vaddr)
+ if (unlikely(!vaddr))
return -ENOMEM;
/*
@@ -945,14 +945,14 @@ static irqreturn_t pdc_irq_handler(int irq, void *cookie)
struct pdc_state *pdcs = cookie;
u32 intstatus = ioread32(pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
- if (intstatus & PDC_RCVINTEN_0)
+ if (likely(intstatus & PDC_RCVINTEN_0))
set_bit(PDC_RCVINT_0, &pdcs->intstatus);
/* Clear interrupt flags in device */
iowrite32(intstatus, pdcs->pdc_reg_vbase + PDC_INTSTATUS_OFFSET);
/* Wakeup IRQ thread */
- if (pdcs && (irq == pdcs->pdc_irq) && (intstatus & PDC_INTMASK))
+ if (likely(pdcs && (irq == pdcs->pdc_irq) && (intstatus & PDC_INTMASK)))
return IRQ_WAKE_THREAD;
return IRQ_NONE;
@@ -976,7 +976,7 @@ static irqreturn_t pdc_irq_thread(int irq, void *cookie)
bool rx_int;
rx_int = test_and_clear_bit(PDC_RCVINT_0, &pdcs->intstatus);
- if (pdcs && rx_int) {
+ if (likely(pdcs && rx_int)) {
dev_dbg(&pdcs->pdev->dev,
"%s() got irq %d with rx_int %s",
__func__, irq, rx_int ? "set" : "clear");
@@ -1007,14 +1007,14 @@ static int pdc_ring_init(struct pdc_state *pdcs, int ringset)
/* Allocate tx ring */
tx.vbase = dma_pool_zalloc(pdcs->ring_pool, GFP_KERNEL, &tx.dmabase);
- if (!tx.vbase) {
+ if (unlikely(!tx.vbase)) {
err = -ENOMEM;
goto done;
}
/* Allocate rx ring */
rx.vbase = dma_pool_zalloc(pdcs->ring_pool, GFP_KERNEL, &rx.dmabase);
- if (!rx.vbase) {
+ if (unlikely(!rx.vbase)) {
err = -ENOMEM;
goto fail_dealloc;
}
@@ -1219,21 +1219,21 @@ static int pdc_send_data(struct mbox_chan *chan, void *data)
u32 tx_desc_req;
u32 rx_desc_req;
- if (mssg->type != BRCM_MESSAGE_SPU)
+ if (unlikely(mssg->type != BRCM_MESSAGE_SPU))
return -ENOTSUPP;
src_nent = sg_nents(mssg->spu.src);
- if (src_nent) {
+ if (likely(src_nent)) {
nent = dma_map_sg(dev, mssg->spu.src, src_nent, DMA_TO_DEVICE);
- if (nent == 0)
+ if (unlikely(nent == 0))
return -EIO;
}
dst_nent = sg_nents(mssg->spu.dst);
- if (dst_nent) {
+ if (likely(dst_nent)) {
nent = dma_map_sg(dev, mssg->spu.dst, dst_nent,
DMA_FROM_DEVICE);
- if (nent == 0) {
+ if (unlikely(nent == 0)) {
dma_unmap_sg(dev, mssg->spu.src, src_nent,
DMA_TO_DEVICE);
return -EIO;
@@ -1251,7 +1251,7 @@ static int pdc_send_data(struct mbox_chan *chan, void *data)
*/
tx_desc_req = pdc_desc_count(mssg->spu.src);
rx_desc_req = pdc_desc_count(mssg->spu.dst);
- if (pdc_rings_full(pdcs, tx_desc_req, rx_desc_req + 1))
+ if (unlikely(pdc_rings_full(pdcs, tx_desc_req, rx_desc_req + 1)))
return -ENOSPC;
/* Create rx descriptors to SPU catch response */
@@ -1262,7 +1262,7 @@ static int pdc_send_data(struct mbox_chan *chan, void *data)
err |= pdc_tx_list_sg_add(pdcs, mssg->spu.src);
err |= pdc_tx_list_final(pdcs); /* initiate transfer */
- if (err)
+ if (unlikely(err))
dev_err(&pdcs->pdev->dev,
"%s failed with error %d", __func__, err);
--
2.1.0
^ permalink raw reply related
* Re: [PATCH 1/9] drm/i915: Remove some duplicated plane swapping logic
From: Ville Syrjälä @ 2016-11-14 18:32 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
In-Reply-To: <20161108152314.GD11395@nuc-i3427.alporthouse.com>
On Tue, Nov 08, 2016 at 03:23:14PM +0000, Chris Wilson wrote:
> On Tue, Nov 08, 2016 at 04:47:11PM +0200, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > On pre-gen4 we connect plane A to pipe B and vice versa to get an FBC
> > capable plane feeding the LVDS port by default. We have the logic for
> > the plane swapping duplicated in many places. Let's remove a bit of the
> > duplication by having the crtc look up the thing from the primary plane.
>
> And intel_crtc->plane is just a left over to be removed when we go full
> atomic.
>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Pushed this one to dinq. Thanks for the review.
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply
* [PATCH 03/11] mailbox: bcm-pdc: PDC driver leaves debugfs files after removal
From: Rob Rice @ 2016-11-14 18:25 UTC (permalink / raw)
To: Jassi Brar; +Cc: bcm-kernel-feedback-list, linux-kernel, Steve Lin, Rob Rice
In-Reply-To: <1479147965-29662-1-git-send-email-rob.rice@broadcom.com>
From: Steve Lin <steven.lin1@broadcom.com>
Minor fix to ensure that debugfs stats pseudo-files are
removed when driver module is unloaded. Previously, the call to
debugfs_remove_recursive() was never being called since the
directory was not empty, and a seg fault would occur if another
process tried to access these leftover files.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
---
drivers/mailbox/bcm-pdc-mailbox.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mailbox/bcm-pdc-mailbox.c b/drivers/mailbox/bcm-pdc-mailbox.c
index 3b4ebbe..c9434a7 100644
--- a/drivers/mailbox/bcm-pdc-mailbox.c
+++ b/drivers/mailbox/bcm-pdc-mailbox.c
@@ -492,10 +492,8 @@ static void pdc_setup_debugfs(struct pdc_state *pdcs)
static void pdc_free_debugfs(void)
{
- if (debugfs_dir && simple_empty(debugfs_dir)) {
- debugfs_remove_recursive(debugfs_dir);
- debugfs_dir = NULL;
- }
+ debugfs_remove_recursive(debugfs_dir);
+ debugfs_dir = NULL;
}
/**
--
2.1.0
^ permalink raw reply related
* Re: [patch] HID: wacom: Don't clear bits unintentionally
From: Jason Gerecke @ 2016-11-14 18:31 UTC (permalink / raw)
To: Dan Carpenter, Jiri Kosina
Cc: Benjamin Tissoires, Henrik Rydberg, linux-input, linux-kernel,
kernel-janitors
In-Reply-To: <20161110192539.GA32533@mwanda>
On 11/10/2016 11:25 AM, Dan Carpenter wrote:
> This is trying to clear the lower 32 bits but the type is wrong so it
> clears everything.
>
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
>
Reviewed-by: Jason Gerecke <jason.gerecke@wacom.com>
Jason
---
Now instead of four in the eights place /
you’ve got three, ‘Cause you added one /
(That is to say, eight) to the two, /
But you can’t take seven from three, /
So you look at the sixty-fours....
> diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
> index 0723ba8..1cf4608 100644
> --- a/drivers/hid/wacom_wac.c
> +++ b/drivers/hid/wacom_wac.c
> @@ -1765,7 +1765,7 @@ static int wacom_wac_pen_event(struct hid_device *hdev, struct hid_field *field,
> wacom_wac->hid_data.tipswitch |= value;
> return 0;
> case HID_DG_TOOLSERIALNUMBER:
> - wacom_wac->serial[0] = (wacom_wac->serial[0] & ~0xFFFFFFFF);
> + wacom_wac->serial[0] = (wacom_wac->serial[0] & ~0xFFFFFFFFULL);
> wacom_wac->serial[0] |= value;
> return 0;
> case WACOM_HID_WD_SENSE:
> --
^ permalink raw reply
* Re: [patch] HID: wacom: Don't clear bits unintentionally
From: Jason Gerecke @ 2016-11-14 18:31 UTC (permalink / raw)
To: Dan Carpenter, Jiri Kosina
Cc: Benjamin Tissoires, Henrik Rydberg, linux-input, linux-kernel,
kernel-janitors
In-Reply-To: <20161110192539.GA32533@mwanda>
On 11/10/2016 11:25 AM, Dan Carpenter wrote:
> This is trying to clear the lower 32 bits but the type is wrong so it
> clears everything.
>
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
>
Reviewed-by: Jason Gerecke <jason.gerecke@wacom.com>
Jason
---
Now instead of four in the eights place /
you’ve got three, ‘Cause you added one /
(That is to say, eight) to the two, /
But you can’t take seven from three, /
So you look at the sixty-fours....
> diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
> index 0723ba8..1cf4608 100644
> --- a/drivers/hid/wacom_wac.c
> +++ b/drivers/hid/wacom_wac.c
> @@ -1765,7 +1765,7 @@ static int wacom_wac_pen_event(struct hid_device *hdev, struct hid_field *field,
> wacom_wac->hid_data.tipswitch |= value;
> return 0;
> case HID_DG_TOOLSERIALNUMBER:
> - wacom_wac->serial[0] = (wacom_wac->serial[0] & ~0xFFFFFFFF);
> + wacom_wac->serial[0] = (wacom_wac->serial[0] & ~0xFFFFFFFFULL);
> wacom_wac->serial[0] |= value;
> return 0;
> case WACOM_HID_WD_SENSE:
> --
--
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^ permalink raw reply
* Re: ✗ Fi.CI.BAT: warning for drm/i915: A few DP stragglers
From: Ville Syrjälä @ 2016-11-14 18:31 UTC (permalink / raw)
To: intel-gfx
In-Reply-To: <20161114182242.GD31595@intel.com>
On Mon, Nov 14, 2016 at 08:22:42PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 14, 2016 at 06:16:49PM -0000, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm/i915: A few DP stragglers
> > URL : https://patchwork.freedesktop.org/series/15299/
> > State : warning
> >
> > == Summary ==
> >
> > Series 15299v1 drm/i915: A few DP stragglers
> > https://patchwork.freedesktop.org/api/1.0/series/15299/revisions/1/mbox/
> >
> > Test kms_pipe_crc_basic:
> > Subgroup nonblocking-crc-pipe-b:
> > pass -> DMESG-WARN (fi-snb-2520m)
>
> [ 468.452200] [drm:drm_edid_block_valid] *ERROR* EDID checksum is invalid, remainder is 44
>
> https://bugs.freedesktop.org/show_bug.cgi?id=98625
And series pushed to dinq. Thanks for the review.
>
> >
> > fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15
> > fi-bsw-n3050 total:244 pass:204 dwarn:0 dfail:0 fail:0 skip:40
> > fi-bxt-t5700 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
> > fi-byt-j1900 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
> > fi-byt-n2820 total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
> > fi-hsw-4770 total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
> > fi-hsw-4770r total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
> > fi-ilk-650 total:244 pass:191 dwarn:0 dfail:0 fail:0 skip:53
> > fi-ivb-3520m total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
> > fi-ivb-3770 total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
> > fi-kbl-7200u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
> > fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
> > fi-skl-6700hq total:244 pass:223 dwarn:0 dfail:0 fail:0 skip:21
> > fi-skl-6700k total:244 pass:222 dwarn:1 dfail:0 fail:0 skip:21
> > fi-snb-2520m total:244 pass:211 dwarn:1 dfail:0 fail:0 skip:32
> > fi-snb-2600 total:244 pass:211 dwarn:0 dfail:0 fail:0 skip:33
> >
> > 8670f0f0d91190e0d090ee910c73ed83c37cfef5 drm-intel-nightly: 2016y-11m-14d-16h-10m-52s UTC integration manifest
> > 1c9d66a drm/i915: Simplify DP port limited color range bit platform checks
> > 73f4bd0 drm/i915: Kill dp_encoder_is_mst
> >
> > == Logs ==
> >
> > For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2987/
>
> --
> Ville Syrjälä
> Intel OTC
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply
* [PATCH v2] cpufreq: intel_pstate: Use cpu load based algorithm for PM_MOBILE
From: Srinivas Pandruvada @ 2016-11-14 18:31 UTC (permalink / raw)
To: rjw; +Cc: linux-pm, rdunlap, sfr, arnd, linux-kernel, Srinivas Pandruvada
Use get_target_pstate_use_cpu_load() to calculate target P-State for
devices, which uses preferred power management profile as PM_MOBILE
in ACPI FADT.
This may help in resolving some thermal issues caused by low sustained
cpu bound workloads. The current algorithm tend to over provision in this
case as it doesn't look at the CPU busyness.
Also included the fix from Arnd Bergmann <arnd@arndb.de> to solve compile
issue, when CONFIG_ACPI is not defined.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
v2:
Include fix from Arnd Bergmann for fixing compile issue
drivers/cpufreq/intel_pstate.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index eb76073..9be0720 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -1828,6 +1828,19 @@ static void __init copy_pid_params(struct pstate_adjust_policy *policy)
pid_params.setpoint = policy->setpoint;
}
+#ifdef CONFIG_ACPI
+static void intel_pstate_use_acpi_profile(void)
+{
+ if (acpi_gbl_FADT.preferred_profile == PM_MOBILE)
+ pstate_funcs.get_target_pstate =
+ get_target_pstate_use_cpu_load;
+}
+#else
+static void intel_pstate_use_acpi_profile(void)
+{
+}
+#endif
+
static void __init copy_cpu_funcs(struct pstate_funcs *funcs)
{
pstate_funcs.get_max = funcs->get_max;
@@ -1839,6 +1852,7 @@ static void __init copy_cpu_funcs(struct pstate_funcs *funcs)
pstate_funcs.get_vid = funcs->get_vid;
pstate_funcs.get_target_pstate = funcs->get_target_pstate;
+ intel_pstate_use_acpi_profile();
}
#ifdef CONFIG_ACPI
--
2.7.4
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