* [PATCH 0/4] Add support for different DMIC configurations
@ 2020-04-21 20:25 Mateusz Gorski
2020-04-21 20:25 ` [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration Mateusz Gorski
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Mateusz Gorski @ 2020-04-21 20:25 UTC (permalink / raw)
To: alsa-devel; +Cc: cezary.rojewski, Mateusz Gorski, tiwai
Set of patches to enable DMIC capture on different hardware
configurations.
Information about supported DMIC configuration is read from NHLT and
correct pipeline configuration is selected automatically.
Also, adding additional option for topology binary name which is
based on used machine driver.
Mateusz Gorski (4):
ASoC: Intel: Skylake: Change the order of machine device and platform
registration
ASoC: Intel: Skylake: Add alternative topology binary name
ASoC: Intel: Multiple I/O PCM format support for pipe
ASoC: Intel: Skylake: Automatic DMIC format configuration according to
information from NHLT
include/uapi/sound/skl-tplg-interface.h | 2 +
sound/soc/intel/skylake/skl-topology.c | 189 +++++++++++++++++++++++-
sound/soc/intel/skylake/skl-topology.h | 1 +
sound/soc/intel/skylake/skl.c | 10 +-
4 files changed, 192 insertions(+), 10 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration
2020-04-21 20:25 [PATCH 0/4] Add support for different DMIC configurations Mateusz Gorski
@ 2020-04-21 20:25 ` Mateusz Gorski
2020-04-21 20:49 ` Pierre-Louis Bossart
2020-04-21 20:25 ` [PATCH 2/4] ASoC: Intel: Skylake: Add alternative topology binary name Mateusz Gorski
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Mateusz Gorski @ 2020-04-21 20:25 UTC (permalink / raw)
To: alsa-devel; +Cc: cezary.rojewski, Mateusz Gorski, tiwai
Swap the order of machine device and platform device registration.
This change ensures that even if the codec enumeration falls late - during
the driver module or topology reload - i2s_dev field is always ready to
be used.
Follow-up patch uses data from this field to create alternative topology
name based on used machine device.
Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
---
sound/soc/intel/skylake/skl.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c
index 63182bfd7941..8473eb13ea65 100644
--- a/sound/soc/intel/skylake/skl.c
+++ b/sound/soc/intel/skylake/skl.c
@@ -819,16 +819,16 @@ static void skl_probe_work(struct work_struct *work)
/* create codec instances */
skl_codec_create(bus);
- /* register platform dai and controls */
- err = skl_platform_register(bus->dev);
+ err = skl_machine_device_register(skl);
if (err < 0) {
- dev_err(bus->dev, "platform register failed: %d\n", err);
+ dev_err(bus->dev, "machine register failed: %d\n", err);
goto out_err;
}
- err = skl_machine_device_register(skl);
+ /* register platform dai and controls */
+ err = skl_platform_register(bus->dev);
if (err < 0) {
- dev_err(bus->dev, "machine register failed: %d\n", err);
+ dev_err(bus->dev, "platform register failed: %d\n", err);
goto out_err;
}
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/4] ASoC: Intel: Skylake: Add alternative topology binary name
2020-04-21 20:25 [PATCH 0/4] Add support for different DMIC configurations Mateusz Gorski
2020-04-21 20:25 ` [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration Mateusz Gorski
@ 2020-04-21 20:25 ` Mateusz Gorski
2020-04-21 20:25 ` [PATCH 3/4] ASoC: Intel: Multiple I/O PCM format support for pipe Mateusz Gorski
2020-04-21 20:25 ` [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT Mateusz Gorski
3 siblings, 0 replies; 9+ messages in thread
From: Mateusz Gorski @ 2020-04-21 20:25 UTC (permalink / raw)
To: alsa-devel; +Cc: cezary.rojewski, Mateusz Gorski, tiwai
Add alternative topology binary file name based on used machine driver
and fallback to use this name after failed attempt to load topology file
with name based on NHLT.
This change addresses multiple issues with current mechanism, for
example - there are devices without NHLT table, and that currently
results in tplg_name being empty.
Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
---
sound/soc/intel/skylake/skl-topology.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c
index 69cd7a81bf2a..344b06df0e15 100644
--- a/sound/soc/intel/skylake/skl-topology.c
+++ b/sound/soc/intel/skylake/skl-topology.c
@@ -3565,8 +3565,20 @@ int skl_tplg_init(struct snd_soc_component *component, struct hdac_bus *bus)
ret = request_firmware(&fw, skl->tplg_name, bus->dev);
if (ret < 0) {
- dev_info(bus->dev, "tplg fw %s load failed with %d, falling back to dfw_sst.bin",
- skl->tplg_name, ret);
+ char alt_tplg_name[64];
+
+ snprintf(alt_tplg_name, sizeof(alt_tplg_name), "%s-tplg.bin",
+ skl->i2s_dev->name);
+ dev_info(bus->dev, "tplg fw %s load failed with %d, trying alternative tplg name %s",
+ skl->tplg_name, ret, alt_tplg_name);
+
+ ret = request_firmware(&fw, alt_tplg_name, bus->dev);
+ if (!ret)
+ goto component_load;
+
+ dev_info(bus->dev, "tplg %s failed with %d, falling back to dfw_sst.bin",
+ alt_tplg_name, ret);
+
ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
if (ret < 0) {
dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
@@ -3575,6 +3587,9 @@ int skl_tplg_init(struct snd_soc_component *component, struct hdac_bus *bus)
}
}
+component_load:
+
+
/*
* The complete tplg for SKL is loaded as index 0, we don't use
* any other index
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] ASoC: Intel: Multiple I/O PCM format support for pipe
2020-04-21 20:25 [PATCH 0/4] Add support for different DMIC configurations Mateusz Gorski
2020-04-21 20:25 ` [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration Mateusz Gorski
2020-04-21 20:25 ` [PATCH 2/4] ASoC: Intel: Skylake: Add alternative topology binary name Mateusz Gorski
@ 2020-04-21 20:25 ` Mateusz Gorski
2020-04-21 20:25 ` [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT Mateusz Gorski
3 siblings, 0 replies; 9+ messages in thread
From: Mateusz Gorski @ 2020-04-21 20:25 UTC (permalink / raw)
To: alsa-devel; +Cc: cezary.rojewski, Pavan K, tiwai, Mateusz Gorski, S
For pipes supporting multiple input/output formats, kcontrol is
created and selection of pipe input and output configuration
is done based on control set.
If more than one configuration is supported, then this patch
allows user to select configuration of choice
using amixer settings.
Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
Signed-off-by: S, Pavan K <pavan.k.s@intel.com>
---
include/uapi/sound/skl-tplg-interface.h | 1 +
sound/soc/intel/skylake/skl-topology.c | 110 ++++++++++++++++++++++++
sound/soc/intel/skylake/skl-topology.h | 1 +
3 files changed, 112 insertions(+)
diff --git a/include/uapi/sound/skl-tplg-interface.h b/include/uapi/sound/skl-tplg-interface.h
index 9eee32f5e407..f2711186c81f 100644
--- a/include/uapi/sound/skl-tplg-interface.h
+++ b/include/uapi/sound/skl-tplg-interface.h
@@ -18,6 +18,7 @@
*/
#define SKL_CONTROL_TYPE_BYTE_TLV 0x100
#define SKL_CONTROL_TYPE_MIC_SELECT 0x102
+#define SKL_CONTROL_TYPE_MULTI_IO_SELECT 0x103
#define HDA_SST_CFG_MAX 900 /* size of copier cfg*/
#define MAX_IN_QUEUE 8
diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c
index 344b06df0e15..40033b623420 100644
--- a/sound/soc/intel/skylake/skl-topology.c
+++ b/sound/soc/intel/skylake/skl-topology.c
@@ -578,6 +578,38 @@ static int skl_tplg_unload_pipe_modules(struct skl_dev *skl,
return ret;
}
+static bool skl_tplg_is_multi_fmt(struct skl_dev *skl, struct skl_pipe *pipe)
+{
+ int i;
+ struct skl_pipe_fmt *cur_fmt;
+ struct skl_pipe_fmt *next_fmt;
+
+ if (pipe->nr_cfgs <= 1)
+ return false;
+
+ if (pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
+ return true;
+
+ for (i = 0; i < pipe->nr_cfgs - 1; i++) {
+ if (pipe->direction == SNDRV_PCM_STREAM_PLAYBACK) {
+ cur_fmt = &pipe->configs[i].out_fmt;
+ next_fmt = &pipe->configs[i+1].out_fmt;
+ } else {
+ cur_fmt = &pipe->configs[i].in_fmt;
+ next_fmt = &pipe->configs[i+1].in_fmt;
+ }
+
+ if (!CHECK_HW_PARAMS(cur_fmt->channels, cur_fmt->freq,
+ cur_fmt->bps,
+ next_fmt->channels,
+ next_fmt->freq,
+ next_fmt->bps))
+ return true;
+ }
+
+ return false;
+}
+
/*
* Here, we select pipe format based on the pipe type and pipe
* direction to determine the current config index for the pipeline.
@@ -600,6 +632,14 @@ skl_tplg_get_pipe_config(struct skl_dev *skl, struct skl_module_cfg *mconfig)
return 0;
}
+ if (skl_tplg_is_multi_fmt(skl, pipe)) {
+ pipe->cur_config_idx = pipe->pipe_config_idx;
+ pipe->memory_pages = pconfig->mem_pages;
+ dev_dbg(skl->dev, "found pipe config idx:%d\n",
+ pipe->cur_config_idx);
+ return 0;
+ }
+
if (pipe->conn_type == SKL_PIPE_CONN_TYPE_NONE) {
dev_dbg(skl->dev, "No conn_type detected, take 0th config\n");
pipe->cur_config_idx = 0;
@@ -1314,6 +1354,71 @@ static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
return 0;
}
+static int skl_tplg_multi_config_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component =
+ snd_soc_kcontrol_component(kcontrol);
+ struct hdac_bus *bus = snd_soc_component_get_drvdata(component);
+ struct skl_dev *skl = bus_to_skl(bus);
+ struct skl_pipeline *ppl;
+ struct skl_pipe *pipe = NULL;
+ u32 *pipe_id;
+ struct soc_enum *ec = (struct soc_enum *)kcontrol->private_value;
+
+ if (!ec)
+ return -EINVAL;
+
+ pipe_id = ec->dobj.private;
+
+ list_for_each_entry(ppl, &skl->ppl_list, node) {
+ if (ppl->pipe->ppl_id == *pipe_id) {
+ pipe = ppl->pipe;
+ break;
+ }
+ }
+ if (!pipe)
+ return -EIO;
+
+ ucontrol->value.enumerated.item[0] = pipe->pipe_config_idx;
+
+ return 0;
+}
+
+static int skl_tplg_multi_config_set(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_component *component =
+ snd_soc_kcontrol_component(kcontrol);
+ struct hdac_bus *bus = snd_soc_component_get_drvdata(component);
+ struct skl_dev *skl = bus_to_skl(bus);
+ struct skl_pipeline *ppl;
+ struct skl_pipe *pipe = NULL;
+ struct soc_enum *ec = (struct soc_enum *)kcontrol->private_value;
+ u32 *pipe_id;
+
+ if (!ec)
+ return -EINVAL;
+
+ if (ucontrol->value.enumerated.item[0] > ec->items)
+ return -EINVAL;
+
+ pipe_id = ec->dobj.private;
+
+ list_for_each_entry(ppl, &skl->ppl_list, node) {
+ if (ppl->pipe->ppl_id == *pipe_id) {
+ pipe = ppl->pipe;
+ break;
+ }
+ }
+ if (!pipe)
+ return -EIO;
+
+ pipe->pipe_config_idx = ucontrol->value.enumerated.item[0];
+
+ return 0;
+}
+
static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
unsigned int __user *data, unsigned int size)
{
@@ -1853,6 +1958,11 @@ static const struct snd_soc_tplg_kcontrol_ops skl_tplg_kcontrol_ops[] = {
.get = skl_tplg_mic_control_get,
.put = skl_tplg_mic_control_set,
},
+ {
+ .id = SKL_CONTROL_TYPE_MULTI_IO_SELECT,
+ .get = skl_tplg_multi_config_get,
+ .put = skl_tplg_multi_config_set,
+ },
};
static int skl_tplg_fill_pipe_cfg(struct device *dev,
diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h
index e967800dbb62..06576147cc29 100644
--- a/sound/soc/intel/skylake/skl-topology.h
+++ b/sound/soc/intel/skylake/skl-topology.h
@@ -306,6 +306,7 @@ struct skl_pipe {
struct skl_path_config configs[SKL_MAX_PATH_CONFIGS];
struct list_head w_list;
bool passthru;
+ u32 pipe_config_idx;
};
enum skl_module_state {
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT
2020-04-21 20:25 [PATCH 0/4] Add support for different DMIC configurations Mateusz Gorski
` (2 preceding siblings ...)
2020-04-21 20:25 ` [PATCH 3/4] ASoC: Intel: Multiple I/O PCM format support for pipe Mateusz Gorski
@ 2020-04-21 20:25 ` Mateusz Gorski
2020-04-21 20:55 ` Pierre-Louis Bossart
3 siblings, 1 reply; 9+ messages in thread
From: Mateusz Gorski @ 2020-04-21 20:25 UTC (permalink / raw)
To: alsa-devel; +Cc: cezary.rojewski, Mateusz Gorski, tiwai
Automatically choose DMIC pipeline format configuration depending on
information included in NHLT.
Change the access rights of appropriate kcontrols to read-only in order
to prevent user interference.
Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
---
include/uapi/sound/skl-tplg-interface.h | 1 +
sound/soc/intel/skylake/skl-topology.c | 60 +++++++++++++++++++++++--
2 files changed, 58 insertions(+), 3 deletions(-)
diff --git a/include/uapi/sound/skl-tplg-interface.h b/include/uapi/sound/skl-tplg-interface.h
index f2711186c81f..a93c0decfdd5 100644
--- a/include/uapi/sound/skl-tplg-interface.h
+++ b/include/uapi/sound/skl-tplg-interface.h
@@ -19,6 +19,7 @@
#define SKL_CONTROL_TYPE_BYTE_TLV 0x100
#define SKL_CONTROL_TYPE_MIC_SELECT 0x102
#define SKL_CONTROL_TYPE_MULTI_IO_SELECT 0x103
+#define SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC 0x104
#define HDA_SST_CFG_MAX 900 /* size of copier cfg*/
#define MAX_IN_QUEUE 8
diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c
index 40033b623420..6b16d7c897ee 100644
--- a/sound/soc/intel/skylake/skl-topology.c
+++ b/sound/soc/intel/skylake/skl-topology.c
@@ -14,6 +14,7 @@
#include <linux/uuid.h>
#include <sound/intel-nhlt.h>
#include <sound/soc.h>
+#include <sound/soc-acpi.h>
#include <sound/soc-topology.h>
#include <uapi/sound/snd_sst_tokens.h>
#include <uapi/sound/skl-tplg-interface.h>
@@ -1419,6 +1420,18 @@ static int skl_tplg_multi_config_set(struct snd_kcontrol *kcontrol,
return 0;
}
+static int skl_tplg_multi_config_get_dmic(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return skl_tplg_multi_config_get(kcontrol, ucontrol);
+}
+
+static int skl_tplg_multi_config_set_dmic(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ return skl_tplg_multi_config_set(kcontrol, ucontrol);
+}
+
static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
unsigned int __user *data, unsigned int size)
{
@@ -1963,6 +1976,11 @@ static const struct snd_soc_tplg_kcontrol_ops skl_tplg_kcontrol_ops[] = {
.get = skl_tplg_multi_config_get,
.put = skl_tplg_multi_config_set,
},
+ {
+ .id = SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC,
+ .get = skl_tplg_multi_config_get_dmic,
+ .put = skl_tplg_multi_config_set_dmic,
+ }
};
static int skl_tplg_fill_pipe_cfg(struct device *dev,
@@ -3123,12 +3141,15 @@ static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
case SND_SOC_TPLG_CTL_ENUM:
tplg_ec = container_of(hdr,
struct snd_soc_tplg_enum_control, hdr);
- if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READWRITE) {
+ if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READ) {
se = (struct soc_enum *)kctl->private_value;
if (tplg_ec->priv.size)
- return skl_init_enum_data(bus->dev, se,
- tplg_ec);
+ skl_init_enum_data(bus->dev, se, tplg_ec);
}
+
+ if (hdr->ops.get == SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC)
+ kctl->access = SNDRV_CTL_ELEM_ACCESS_READ;
+
break;
default:
@@ -3598,6 +3619,38 @@ static int skl_manifest_load(struct snd_soc_component *cmpnt, int index,
return 0;
}
+static void skl_tplg_complete(struct snd_soc_component *component)
+{
+ struct snd_soc_dobj *dobj;
+ struct snd_soc_acpi_mach *mach =
+ dev_get_platdata(component->card->dev);
+ int i;
+
+ list_for_each_entry(dobj, &component->dobj_list, list) {
+ struct snd_kcontrol *kcontrol = dobj->control.kcontrol;
+ struct soc_enum *se =
+ (struct soc_enum *)kcontrol->private_value;
+ char **texts = dobj->control.dtexts;
+ char chan_text[4];
+
+ if (dobj->type != SND_SOC_DOBJ_ENUM ||
+ dobj->control.kcontrol->put !=
+ skl_tplg_multi_config_set_dmic)
+ continue;
+ sprintf(chan_text, "c%d", mach->mach_params.dmic_num);
+
+ for (i = 0; i < se->items; i++) {
+ struct snd_ctl_elem_value val;
+
+ if (strstr(texts[i], chan_text)) {
+ val.value.enumerated.item[0] = i;
+ kcontrol->put(kcontrol, &val);
+ }
+ }
+ }
+}
+
+
static struct snd_soc_tplg_ops skl_tplg_ops = {
.widget_load = skl_tplg_widget_load,
.control_load = skl_tplg_control_load,
@@ -3607,6 +3660,7 @@ static struct snd_soc_tplg_ops skl_tplg_ops = {
.io_ops_count = ARRAY_SIZE(skl_tplg_kcontrol_ops),
.manifest = skl_manifest_load,
.dai_load = skl_dai_load,
+ .complete = skl_tplg_complete,
};
/*
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration
2020-04-21 20:25 ` [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration Mateusz Gorski
@ 2020-04-21 20:49 ` Pierre-Louis Bossart
2020-04-22 12:03 ` Gorski, Mateusz
0 siblings, 1 reply; 9+ messages in thread
From: Pierre-Louis Bossart @ 2020-04-21 20:49 UTC (permalink / raw)
To: Mateusz Gorski, alsa-devel; +Cc: cezary.rojewski, tiwai
On 4/21/20 3:25 PM, Mateusz Gorski wrote:
> Swap the order of machine device and platform device registration.
> This change ensures that even if the codec enumeration falls late - during
> the driver module or topology reload - i2s_dev field is always ready to
> be used.
Are you sure?
The platform device will register the DAIs that are used by the machine
driver, don't you have a risk of missing dependencies during the card
registration with this change?
Put differently, why do this now when the existing code has been
'working' for a number of years without needing such a change?
> Follow-up patch uses data from this field to create alternative topology
> name based on used machine device.
>
> Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
> ---
> sound/soc/intel/skylake/skl.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c
> index 63182bfd7941..8473eb13ea65 100644
> --- a/sound/soc/intel/skylake/skl.c
> +++ b/sound/soc/intel/skylake/skl.c
> @@ -819,16 +819,16 @@ static void skl_probe_work(struct work_struct *work)
> /* create codec instances */
> skl_codec_create(bus);
>
> - /* register platform dai and controls */
> - err = skl_platform_register(bus->dev);
> + err = skl_machine_device_register(skl);
> if (err < 0) {
> - dev_err(bus->dev, "platform register failed: %d\n", err);
> + dev_err(bus->dev, "machine register failed: %d\n", err);
> goto out_err;
> }
>
> - err = skl_machine_device_register(skl);
> + /* register platform dai and controls */
> + err = skl_platform_register(bus->dev);
> if (err < 0) {
> - dev_err(bus->dev, "machine register failed: %d\n", err);
> + dev_err(bus->dev, "platform register failed: %d\n", err);
> goto out_err;
> }
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT
2020-04-21 20:25 ` [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT Mateusz Gorski
@ 2020-04-21 20:55 ` Pierre-Louis Bossart
2020-04-22 12:04 ` Gorski, Mateusz
0 siblings, 1 reply; 9+ messages in thread
From: Pierre-Louis Bossart @ 2020-04-21 20:55 UTC (permalink / raw)
To: Mateusz Gorski, alsa-devel; +Cc: cezary.rojewski, tiwai
> @@ -3123,12 +3141,15 @@ static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
> case SND_SOC_TPLG_CTL_ENUM:
> tplg_ec = container_of(hdr,
> struct snd_soc_tplg_enum_control, hdr);
> - if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READWRITE) {
> + if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READ) {
> se = (struct soc_enum *)kctl->private_value;
> if (tplg_ec->priv.size)
> - return skl_init_enum_data(bus->dev, se,
> - tplg_ec);
> + skl_init_enum_data(bus->dev, se, tplg_ec);
> }
> +
> + if (hdr->ops.get == SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC)
> + kctl->access = SNDRV_CTL_ELEM_ACCESS_READ;
> +
Is it intentional that you first test the kctrl->access as READ only,
and then later set it to READ only for DMICs? The sequence looks rather odd?
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration
2020-04-21 20:49 ` Pierre-Louis Bossart
@ 2020-04-22 12:03 ` Gorski, Mateusz
0 siblings, 0 replies; 9+ messages in thread
From: Gorski, Mateusz @ 2020-04-22 12:03 UTC (permalink / raw)
To: Pierre-Louis Bossart, alsa-devel; +Cc: cezary.rojewski, tiwai
> Swap the order of machine device and platform device registration.
>> This change ensures that even if the codec enumeration falls late -
>> during
>> the driver module or topology reload - i2s_dev field is always ready to
>> be used.
>
> Are you sure?
>
> The platform device will register the DAIs that are used by the
> machine driver, don't you have a risk of missing dependencies during
> the card registration with this change?
>
> Put differently, why do this now when the existing code has been
> 'working' for a number of years without needing such a change?
>
This change was tested on multiple platforms (including production
laptops) and did not show any issues.
Anyway, in patchset v2 the alt_tplg_name creation mechanism was slightly
changed and this patch was removed.
Thanks for your input,
Mateusz
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT
2020-04-21 20:55 ` Pierre-Louis Bossart
@ 2020-04-22 12:04 ` Gorski, Mateusz
0 siblings, 0 replies; 9+ messages in thread
From: Gorski, Mateusz @ 2020-04-22 12:04 UTC (permalink / raw)
To: Pierre-Louis Bossart, alsa-devel; +Cc: cezary.rojewski, tiwai
>> @@ -3123,12 +3141,15 @@ static int skl_tplg_control_load(struct
>> snd_soc_component *cmpnt,
>> case SND_SOC_TPLG_CTL_ENUM:
>> tplg_ec = container_of(hdr,
>> struct snd_soc_tplg_enum_control, hdr);
>> - if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READWRITE) {
>> + if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READ) {
>> se = (struct soc_enum *)kctl->private_value;
>> if (tplg_ec->priv.size)
>> - return skl_init_enum_data(bus->dev, se,
>> - tplg_ec);
>> + skl_init_enum_data(bus->dev, se, tplg_ec);
>> }
>> +
>> + if (hdr->ops.get == SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC)
>> + kctl->access = SNDRV_CTL_ELEM_ACCESS_READ;
>> +
>
> Is it intentional that you first test the kctrl->access as READ only,
> and then later set it to READ only for DMICs? The sequence looks
> rather odd?
This basiccally checks if given control has READ access right, it will
pass for both READ and READWRITE (since READWRITE = READ|WRITE).
And when the control has READWRITE access we change it to READ-only, to
prevent interference from user.
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-04-22 12:05 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-04-21 20:25 [PATCH 0/4] Add support for different DMIC configurations Mateusz Gorski
2020-04-21 20:25 ` [PATCH 1/4] ASoC: Intel: Skylake: Change the order of machine device and platform registration Mateusz Gorski
2020-04-21 20:49 ` Pierre-Louis Bossart
2020-04-22 12:03 ` Gorski, Mateusz
2020-04-21 20:25 ` [PATCH 2/4] ASoC: Intel: Skylake: Add alternative topology binary name Mateusz Gorski
2020-04-21 20:25 ` [PATCH 3/4] ASoC: Intel: Multiple I/O PCM format support for pipe Mateusz Gorski
2020-04-21 20:25 ` [PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT Mateusz Gorski
2020-04-21 20:55 ` Pierre-Louis Bossart
2020-04-22 12:04 ` Gorski, Mateusz
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