[PATCH 00/23] Analog connector support in DC (v2)

[PATCH 00/23] Analog connector support in DC (v2)

[Timur Kristóf]

This series adds support for analog connectors to DC for DCE6-10.
There are two reasons to add this support:

1. GPUs that already use DC by default and have analog connectors.
Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
and their analog part doesn't work with DC. This functionality
regressed when switching from the amdgpu legacy display code to DC.

2. GPUs that don't use amdgpu by default yet.
Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default
yet, and missing analog connector support in DC is cited as one
of the main reasons why not.

Before starting this work, I asked Harry and Alex about how best
to do it and we agreed that we'd like to use the VBIOS to set up
the DAC. So I used the amdgpu legacy display code as a reference.
The first few commits add some minor changes to DC to prepare for
supporting analog stream and link encoders, then analog link
detection is added along with polling, and finally DAC load
detection support, which is useful for old displays and adapters.

With this analog support added to DC, we could already fully switch
CIK discrete GPUs to use DC and switch them to the amdgpu driver
by default. This series switches Bonaire to DC by default, we
can do the switch to amdgpu in a later series.

For SI dGPUs, there are other pending patches to make DC work
well, afterwards we could switch to DC by default, but missing
VCE1 support is the blocker from using amdgpu by default.

For GFX7 APUs, further work is needed before enabling DC by
default, specifically with regards to the TRAVIS and NUTMEG
external encoders which are not supported by DC at all.

Changes in v2 of the series:
Fixed regression on RDNA2 and newer APUs.
Fixed flickering caused by polling analog connectors.
Fixed crash on Kaveri.
Fixed bug when HPD was high without a connected display.
Reduced code churn by reusing same link encoder.
Addressed other feedback from the review of v1.

Timur Kristóf (23):
  drm/amd/display: Determine DVI-I connector type (v2)
  drm/amd/display: Add analog bit to edid_caps (v2)
  drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
  drm/amd/display: Hook up DAC to bios_parser_encoder_control
  drm/amd/display: Add SelectCRTC_Source to BIOS parser
  drm/amd/display: Get maximum pixel clock from VBIOS
  drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
  drm/amd/display: Don't try to enable/disable HPD when unavailable
  drm/amd/display: Determine early if a link has supported encoders (v2)
  drm/amd/display: Add concept of analog encoders (v2)
  drm/amd/display: Implement DCE analog stream encoders
  drm/amd/display: Implement DCE analog link encoders (v2)
  drm/amd/display: Support DAC in dce110_hwseq
  drm/amd/display: Add analog link detection (v2)
  drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
  drm/amd/display: Poll analog connectors (v2)
  drm/amd/display: Add DCE BIOS_SCRATCH_0 register
  drm/amd/display: Make get_support_mask_for_device_id reusable
  drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
  drm/amd/display: Use DAC load detection on analog connectors (v2)
  drm/amd/display: Add common modes to analog displays without EDID
  drm/amd/display: Don't add freesync modes to analog displays (v2)
  drm/amdgpu: Use DC by default for Bonaire

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
 .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
 .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
 .../drm/amd/display/dc/bios/command_table.h   |   6 +
 .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
 .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
 .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
 .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
 .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
 .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
 .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
 .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
 .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
 drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
 .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
 .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
 .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
 .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
 .../dc/resource/dce100/dce100_resource.c      |  31 +-
 .../dc/resource/dce110/dce110_resource.c      |   2 +
 .../dc/resource/dce112/dce112_resource.c      |   2 +
 .../dc/resource/dce120/dce120_resource.c      |   1 +
 .../dc/resource/dce60/dce60_resource.c        |  29 +-
 .../dc/resource/dce80/dce80_resource.c        |  26 +-
 .../amd/display/include/bios_parser_types.h   |  11 +-
 .../display/include/grph_object_ctrl_defs.h   |   1 +
 .../drm/amd/display/include/grph_object_id.h  |   7 +
 .../drm/amd/display/include/signal_types.h    |  12 +
 35 files changed, 1117 insertions(+), 86 deletions(-)

-- 
2.51.0

[PATCH 01/23] drm/amd/display: Determine DVI-I connector type (v2)

[Timur Kristóf]

DC determines the DRM connector type based on the
signal type, which becomes problematic when a connector may
support different signal types, such as DVI-I.
With this patch, it is now determined according to the actual
connector type for DVI-D and DVI-I connectors.

Also set the HPD (hotplug detection) flag for DVI-I connectors
to prevent regressing their digital functionality, which has
been already working.

A subsequent commit will also implement polling for DVI-I.

v2:
Only use connector type for DVI to prevent regressions
for other signal types.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 20ab9fd1b82a..4a9109818672 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8133,7 +8133,7 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
 	return 0;
 }
 
-static int to_drm_connector_type(enum signal_type st)
+static int to_drm_connector_type(enum signal_type st, uint32_t connector_id)
 {
 	switch (st) {
 	case SIGNAL_TYPE_HDMI_TYPE_A:
@@ -8149,6 +8149,10 @@ static int to_drm_connector_type(enum signal_type st)
 		return DRM_MODE_CONNECTOR_DisplayPort;
 	case SIGNAL_TYPE_DVI_DUAL_LINK:
 	case SIGNAL_TYPE_DVI_SINGLE_LINK:
+		if (connector_id == CONNECTOR_ID_SINGLE_LINK_DVII ||
+			connector_id == CONNECTOR_ID_DUAL_LINK_DVII)
+			return DRM_MODE_CONNECTOR_DVII;
+
 		return DRM_MODE_CONNECTOR_DVID;
 	case SIGNAL_TYPE_VIRTUAL:
 		return DRM_MODE_CONNECTOR_VIRTUAL;
@@ -8538,6 +8542,7 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
 			link->link_enc->features.dp_ycbcr420_supported ? true : false;
 		break;
 	case DRM_MODE_CONNECTOR_DVID:
+	case DRM_MODE_CONNECTOR_DVII:
 		aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
 		break;
 	default:
@@ -8741,7 +8746,7 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,
 		goto out_free;
 	}
 
-	connector_type = to_drm_connector_type(link->connector_signal);
+	connector_type = to_drm_connector_type(link->connector_signal, link->link_id.id);
 
 	res = drm_connector_init_with_ddc(
 			dm->ddev,
-- 
2.51.0

[PATCH 02/23] drm/amd/display: Add analog bit to edid_caps (v2)

[Timur Kristóf]

The new analog bit will be used with DVI-I connectors.

DVI-I connectors can connect to both digital and analog monitors
and this bit will help distinguish between those.

v2:
Sanitize analog bit based on connector type.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 1 +
 drivers/gpu/drm/amd/display/dc/dc_types.h                 | 5 +++++
 drivers/gpu/drm/amd/display/dc/link/link_detection.c      | 2 ++
 drivers/gpu/drm/amd/display/include/grph_object_id.h      | 7 +++++++
 4 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index fe100e4c9801..a14076878b89 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -130,6 +130,7 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
 	edid_caps->serial_number = edid_buf->serial;
 	edid_caps->manufacture_week = edid_buf->mfg_week;
 	edid_caps->manufacture_year = edid_buf->mfg_year;
+	edid_caps->analog = !(edid_buf->input & DRM_EDID_INPUT_DIGITAL);
 
 	drm_edid_get_monitor_name(edid_buf,
 				  edid_caps->display_name,
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index b5aa03a3e39c..d948cdb98ea8 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -185,6 +185,10 @@ struct dc_panel_patch {
 	unsigned int wait_after_dpcd_poweroff_ms;
 };
 
+/**
+ * struct dc_edid_caps - Capabilities read from EDID.
+ * @analog: Whether the monitor is analog. Used by DVI-I handling.
+ */
 struct dc_edid_caps {
 	/* sink identification */
 	uint16_t manufacturer_id;
@@ -212,6 +216,7 @@ struct dc_edid_caps {
 	bool edid_hdmi;
 	bool hdr_supported;
 	bool rr_capable;
+	bool analog;
 
 	struct dc_panel_patch panel_patch;
 };
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
index 85303167a553..2ab8ee7f42c1 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_detection.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
@@ -1103,6 +1103,8 @@ static bool detect_link_and_local_sink(struct dc_link *link,
 			break;
 		}
 
+		sink->edid_caps.analog &= dc_connector_supports_analog(link->link_id.id);
+
 		// Check if edid is the same
 		if ((prev_sink) &&
 		    (edid_status == EDID_THE_SAME || edid_status == EDID_OK))
diff --git a/drivers/gpu/drm/amd/display/include/grph_object_id.h b/drivers/gpu/drm/amd/display/include/grph_object_id.h
index 54e33062b3c0..1386fa124e85 100644
--- a/drivers/gpu/drm/amd/display/include/grph_object_id.h
+++ b/drivers/gpu/drm/amd/display/include/grph_object_id.h
@@ -310,4 +310,11 @@ static inline bool dal_graphics_object_id_equal(
 	}
 	return false;
 }
+
+static inline bool dc_connector_supports_analog(const enum connector_id conn)
+{
+	return conn == CONNECTOR_ID_VGA ||
+		conn == CONNECTOR_ID_SINGLE_LINK_DVII ||
+		conn == CONNECTOR_ID_DUAL_LINK_DVII;
+}
 #endif
-- 
2.51.0

[PATCH 03/23] drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)

[Timur Kristóf]

We are going to support analog encoders as well, not just digital,
so we need to make space for them in various arrays.

v2: Fix typo.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../drm/amd/display/dc/core/dc_link_enc_cfg.c |  4 ++--
 .../gpu/drm/amd/display/dc/inc/core_types.h   |  8 +++----
 .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 24 +++++++++++++++++++
 3 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
index a180f68f711c..deb23d20bca6 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
@@ -522,10 +522,10 @@ struct link_encoder *link_enc_cfg_get_link_enc_used_by_link(
 struct link_encoder *link_enc_cfg_get_next_avail_link_enc(struct dc *dc)
 {
 	struct link_encoder *link_enc = NULL;
-	enum engine_id encs_assigned[MAX_DIG_LINK_ENCODERS];
+	enum engine_id encs_assigned[MAX_LINK_ENCODERS];
 	int i;
 
-	for (i = 0; i < MAX_DIG_LINK_ENCODERS; i++)
+	for (i = 0; i < MAX_LINK_ENCODERS; i++)
 		encs_assigned[i] = ENGINE_ID_UNKNOWN;
 
 	/* Add assigned encoders to list. */
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index d11893f8c916..6992c11584c2 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -274,7 +274,7 @@ struct resource_pool {
 	/* An array for accessing the link encoder objects that have been created.
 	 * Index in array corresponds to engine ID - viz. 0: ENGINE_ID_DIGA
 	 */
-	struct link_encoder *link_encoders[MAX_DIG_LINK_ENCODERS];
+	struct link_encoder *link_encoders[MAX_LINK_ENCODERS];
 	/* Number of DIG link encoder objects created - i.e. number of valid
 	 * entries in link_encoders array.
 	 */
@@ -514,7 +514,7 @@ struct pipe_ctx {
 struct link_enc_cfg_context {
 	enum link_enc_cfg_mode mode;
 	struct link_enc_assignment link_enc_assignments[MAX_PIPES];
-	enum engine_id link_enc_avail[MAX_DIG_LINK_ENCODERS];
+	enum engine_id link_enc_avail[MAX_LINK_ENCODERS];
 	struct link_enc_assignment transient_assignments[MAX_PIPES];
 };
 
@@ -526,8 +526,8 @@ struct resource_context {
 	uint8_t dp_clock_source_ref_count;
 	bool is_dsc_acquired[MAX_PIPES];
 	struct link_enc_cfg_context link_enc_cfg_ctx;
-	unsigned int dio_link_enc_to_link_idx[MAX_DIG_LINK_ENCODERS];
-	int dio_link_enc_ref_cnts[MAX_DIG_LINK_ENCODERS];
+	unsigned int dio_link_enc_to_link_idx[MAX_LINK_ENCODERS];
+	int dio_link_enc_ref_cnts[MAX_LINK_ENCODERS];
 	bool is_hpo_dp_stream_enc_acquired[MAX_HPO_DP2_ENCODERS];
 	unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS];
 	int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS];
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
index 41c76ba9ba56..7c6b20ea906e 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
@@ -45,7 +45,31 @@
 #define MAX_PIPES 6
 #define MAX_PHANTOM_PIPES (MAX_PIPES / 2)
 #define MAX_LINKS (MAX_PIPES * 2 +2)
+
+/**
+ * define MAX_DIG_LINK_ENCODERS - maximum number of digital encoders
+ *
+ * Digital encoders are ENGINE_ID_DIGA...G, there are at most 7,
+ * although not every GPU may have that many.
+ */
 #define MAX_DIG_LINK_ENCODERS 7
+
+/**
+ * define MAX_DAC_LINK_ENCODERS - maximum number of analog link encoders
+ *
+ * Analog encoders are ENGINE_ID_DACA/B, there are at most 2,
+ * although not every GPU may have that many. Modern GPUs typically
+ * don't have analog encoders.
+ */
+#define MAX_DAC_LINK_ENCODERS 2
+
+/**
+ * define MAX_LINK_ENCODERS - maximum number link encoders in total
+ *
+ * This includes both analog and digital encoders.
+ */
+#define MAX_LINK_ENCODERS (MAX_DIG_LINK_ENCODERS + MAX_DAC_LINK_ENCODERS)
+
 #define MAX_DWB_PIPES	1
 #define MAX_HPO_DP2_ENCODERS	4
 #define MAX_HPO_DP2_LINK_ENCODERS	4
-- 
2.51.0

[PATCH 04/23] drm/amd/display: Hook up DAC to bios_parser_encoder_control

[Timur Kristóf]

Enable the codebase to use encoder_control()
when the encoder engine is one of the DACs.

The BIOS parser already supports calling the DAC1EncoderControl
function from the VBIOS, but it was not exposed anywhere.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/dc/bios/bios_parser.c    | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index 154fd2c18e88..318be0bb5549 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -742,6 +742,22 @@ static enum bp_result bios_parser_encoder_control(
 {
 	struct bios_parser *bp = BP_FROM_DCB(dcb);
 
+	if (cntl->engine_id == ENGINE_ID_DACA) {
+		if (!bp->cmd_tbl.dac1_encoder_control)
+			return BP_RESULT_FAILURE;
+
+		return bp->cmd_tbl.dac1_encoder_control(
+			bp, cntl->action == ENCODER_CONTROL_ENABLE,
+			cntl->pixel_clock, ATOM_DAC1_PS2);
+	} else if (cntl->engine_id == ENGINE_ID_DACB) {
+		if (!bp->cmd_tbl.dac2_encoder_control)
+			return BP_RESULT_FAILURE;
+
+		return bp->cmd_tbl.dac2_encoder_control(
+			bp, cntl->action == ENCODER_CONTROL_ENABLE,
+			cntl->pixel_clock, ATOM_DAC1_PS2);
+	}
+
 	if (!bp->cmd_tbl.dig_encoder_control)
 		return BP_RESULT_FAILURE;
 
-- 
2.51.0

[PATCH 05/23] drm/amd/display: Add SelectCRTC_Source to BIOS parser

[Timur Kristóf]

The SelectCRTC_Source command will be used to change which CRTC
should be connected to which encoder.

For reference, see the legacy display code:
amdgpu_atombios_encoder_set_crtc_source

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/dc/bios/bios_parser.c |  14 ++
 .../drm/amd/display/dc/bios/command_table.c   | 194 ++++++++++++++++++
 .../drm/amd/display/dc/bios/command_table.h   |   3 +
 .../gpu/drm/amd/display/dc/dc_bios_types.h    |   3 +
 .../amd/display/include/bios_parser_types.h   |   6 +-
 5 files changed, 215 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index 318be0bb5549..c7875edea321 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -736,6 +736,18 @@ static enum bp_result bios_parser_transmitter_control(
 	return bp->cmd_tbl.transmitter_control(bp, cntl);
 }
 
+static enum bp_result bios_parser_select_crtc_source(
+	struct dc_bios *dcb,
+	struct bp_crtc_source_select *bp_params)
+{
+	struct bios_parser *bp = BP_FROM_DCB(dcb);
+
+	if (!bp->cmd_tbl.select_crtc_source)
+		return BP_RESULT_FAILURE;
+
+	return bp->cmd_tbl.select_crtc_source(bp, bp_params);
+}
+
 static enum bp_result bios_parser_encoder_control(
 	struct dc_bios *dcb,
 	struct bp_encoder_control *cntl)
@@ -2845,6 +2857,8 @@ static const struct dc_vbios_funcs vbios_funcs = {
 	.is_device_id_supported = bios_parser_is_device_id_supported,
 
 	/* COMMANDS */
+	.select_crtc_source = bios_parser_select_crtc_source,
+
 	.encoder_control = bios_parser_encoder_control,
 
 	.transmitter_control = bios_parser_transmitter_control,
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c
index 58e88778da7f..dbd84477ceb7 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c
@@ -52,6 +52,7 @@ static void init_transmitter_control(struct bios_parser *bp);
 static void init_set_pixel_clock(struct bios_parser *bp);
 static void init_enable_spread_spectrum_on_ppll(struct bios_parser *bp);
 static void init_adjust_display_pll(struct bios_parser *bp);
+static void init_select_crtc_source(struct bios_parser *bp);
 static void init_dac_encoder_control(struct bios_parser *bp);
 static void init_dac_output_control(struct bios_parser *bp);
 static void init_set_crtc_timing(struct bios_parser *bp);
@@ -69,6 +70,7 @@ void dal_bios_parser_init_cmd_tbl(struct bios_parser *bp)
 	init_set_pixel_clock(bp);
 	init_enable_spread_spectrum_on_ppll(bp);
 	init_adjust_display_pll(bp);
+	init_select_crtc_source(bp);
 	init_dac_encoder_control(bp);
 	init_dac_output_control(bp);
 	init_set_crtc_timing(bp);
@@ -1609,6 +1611,198 @@ static enum bp_result adjust_display_pll_v3(
 	return result;
 }
 
+/*******************************************************************************
+ ********************************************************************************
+ **
+ **                  SELECT CRTC SOURCE
+ **
+ ********************************************************************************
+ *******************************************************************************/
+
+static enum bp_result select_crtc_source_v1(
+	struct bios_parser *bp,
+	struct bp_crtc_source_select *bp_params);
+static enum bp_result select_crtc_source_v2(
+	struct bios_parser *bp,
+	struct bp_crtc_source_select *bp_params);
+static enum bp_result select_crtc_source_v3(
+	struct bios_parser *bp,
+	struct bp_crtc_source_select *bp_params);
+
+static void init_select_crtc_source(struct bios_parser *bp)
+{
+	switch (BIOS_CMD_TABLE_PARA_REVISION(SelectCRTC_Source)) {
+	case 1:
+		bp->cmd_tbl.select_crtc_source = select_crtc_source_v1;
+		break;
+	case 2:
+		bp->cmd_tbl.select_crtc_source = select_crtc_source_v2;
+		break;
+	case 3:
+		bp->cmd_tbl.select_crtc_source = select_crtc_source_v3;
+		break;
+	default:
+		bp->cmd_tbl.select_crtc_source = NULL;
+		break;
+	}
+}
+
+static enum bp_result select_crtc_source_v1(
+	struct bios_parser *bp,
+	struct bp_crtc_source_select *bp_params)
+{
+	enum bp_result result = BP_RESULT_FAILURE;
+	SELECT_CRTC_SOURCE_PS_ALLOCATION params;
+
+	if (!bp->cmd_helper->controller_id_to_atom(bp_params->controller_id, &params.ucCRTC))
+		return BP_RESULT_BADINPUT;
+
+	switch (bp_params->engine_id) {
+	case ENGINE_ID_DACA:
+		params.ucDevice = ATOM_DEVICE_CRT1_INDEX;
+		break;
+	case ENGINE_ID_DACB:
+		params.ucDevice = ATOM_DEVICE_CRT2_INDEX;
+		break;
+	default:
+		return BP_RESULT_BADINPUT;
+	}
+
+	if (EXEC_BIOS_CMD_TABLE(SelectCRTC_Source, params))
+		result = BP_RESULT_OK;
+
+	return result;
+}
+
+static bool select_crtc_source_v2_encoder_id(
+	enum engine_id engine_id, uint8_t *out_encoder_id)
+{
+	uint8_t encoder_id = 0;
+
+	switch (engine_id) {
+	case ENGINE_ID_DIGA:
+		encoder_id = ASIC_INT_DIG1_ENCODER_ID;
+		break;
+	case ENGINE_ID_DIGB:
+		encoder_id = ASIC_INT_DIG2_ENCODER_ID;
+		break;
+	case ENGINE_ID_DIGC:
+		encoder_id = ASIC_INT_DIG3_ENCODER_ID;
+		break;
+	case ENGINE_ID_DIGD:
+		encoder_id = ASIC_INT_DIG4_ENCODER_ID;
+		break;
+	case ENGINE_ID_DIGE:
+		encoder_id = ASIC_INT_DIG5_ENCODER_ID;
+		break;
+	case ENGINE_ID_DIGF:
+		encoder_id = ASIC_INT_DIG6_ENCODER_ID;
+		break;
+	case ENGINE_ID_DIGG:
+		encoder_id = ASIC_INT_DIG7_ENCODER_ID;
+		break;
+	case ENGINE_ID_DACA:
+		encoder_id = ASIC_INT_DAC1_ENCODER_ID;
+		break;
+	case ENGINE_ID_DACB:
+		encoder_id = ASIC_INT_DAC2_ENCODER_ID;
+		break;
+	default:
+		return false;
+	}
+
+	*out_encoder_id = encoder_id;
+	return true;
+}
+
+static bool select_crtc_source_v2_encoder_mode(
+	enum signal_type signal_type, uint8_t *out_encoder_mode)
+{
+	uint8_t encoder_mode = 0;
+
+	switch (signal_type) {
+	case SIGNAL_TYPE_DVI_SINGLE_LINK:
+	case SIGNAL_TYPE_DVI_DUAL_LINK:
+		encoder_mode = ATOM_ENCODER_MODE_DVI;
+		break;
+	case SIGNAL_TYPE_HDMI_TYPE_A:
+		encoder_mode = ATOM_ENCODER_MODE_HDMI;
+		break;
+	case SIGNAL_TYPE_LVDS:
+		encoder_mode = ATOM_ENCODER_MODE_LVDS;
+		break;
+	case SIGNAL_TYPE_RGB:
+		encoder_mode = ATOM_ENCODER_MODE_CRT;
+		break;
+	case SIGNAL_TYPE_DISPLAY_PORT:
+		encoder_mode = ATOM_ENCODER_MODE_DP;
+		break;
+	case SIGNAL_TYPE_DISPLAY_PORT_MST:
+		encoder_mode = ATOM_ENCODER_MODE_DP_MST;
+		break;
+	case SIGNAL_TYPE_EDP:
+		encoder_mode = ATOM_ENCODER_MODE_DP;
+		break;
+	default:
+		return false;
+	}
+
+	*out_encoder_mode = encoder_mode;
+	return true;
+}
+
+static enum bp_result select_crtc_source_v2(
+	struct bios_parser *bp,
+	struct bp_crtc_source_select *bp_params)
+{
+	enum bp_result result = BP_RESULT_FAILURE;
+	SELECT_CRTC_SOURCE_PARAMETERS_V3 params;
+
+	if (!bp->cmd_helper->controller_id_to_atom(bp_params->controller_id, &params.ucCRTC))
+		return BP_RESULT_BADINPUT;
+
+	if (!select_crtc_source_v2_encoder_id(
+		bp_params->engine_id,
+		&params.ucEncoderID))
+		return BP_RESULT_BADINPUT;
+	if (!select_crtc_source_v2_encoder_mode(
+		bp_params->sink_signal,
+		&params.ucEncodeMode))
+		return BP_RESULT_BADINPUT;
+
+	if (EXEC_BIOS_CMD_TABLE(SelectCRTC_Source, params))
+		result = BP_RESULT_OK;
+
+	return result;
+}
+
+static enum bp_result select_crtc_source_v3(
+	struct bios_parser *bp,
+	struct bp_crtc_source_select *bp_params)
+{
+	enum bp_result result = BP_RESULT_FAILURE;
+	SELECT_CRTC_SOURCE_PARAMETERS_V3 params;
+
+	if (!bp->cmd_helper->controller_id_to_atom(bp_params->controller_id, &params.ucCRTC))
+		return BP_RESULT_BADINPUT;
+
+	if (!select_crtc_source_v2_encoder_id(
+		bp_params->engine_id,
+		&params.ucEncoderID))
+		return BP_RESULT_BADINPUT;
+	if (!select_crtc_source_v2_encoder_mode(
+		bp_params->sink_signal,
+		&params.ucEncodeMode))
+		return BP_RESULT_BADINPUT;
+
+	params.ucDstBpc = bp_params->bit_depth;
+
+	if (EXEC_BIOS_CMD_TABLE(SelectCRTC_Source, params))
+		result = BP_RESULT_OK;
+
+	return result;
+}
+
 /*******************************************************************************
  ********************************************************************************
  **
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.h b/drivers/gpu/drm/amd/display/dc/bios/command_table.h
index ad533775e724..8b04b903e93d 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table.h
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.h
@@ -52,6 +52,9 @@ struct cmd_tbl {
 	enum bp_result (*adjust_display_pll)(
 		struct bios_parser *bp,
 		struct bp_adjust_pixel_clock_parameters *bp_params);
+	enum bp_result (*select_crtc_source)(
+		struct bios_parser *bp,
+		struct bp_crtc_source_select *bp_params);
 	enum bp_result (*dac1_encoder_control)(
 		struct bios_parser *bp,
 		bool enable,
diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 5fa5e2b63fb7..545ce1e15eae 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -91,6 +91,9 @@ struct dc_vbios_funcs {
 		struct device_id id);
 	/* COMMANDS */
 
+	enum bp_result (*select_crtc_source)(
+		struct dc_bios *bios,
+		struct bp_crtc_source_select *bp_params);
 	enum bp_result (*encoder_control)(
 		struct dc_bios *bios,
 		struct bp_encoder_control *cntl);
diff --git a/drivers/gpu/drm/amd/display/include/bios_parser_types.h b/drivers/gpu/drm/amd/display/include/bios_parser_types.h
index 812377d9e48f..d9e58a6a0d36 100644
--- a/drivers/gpu/drm/amd/display/include/bios_parser_types.h
+++ b/drivers/gpu/drm/amd/display/include/bios_parser_types.h
@@ -135,12 +135,8 @@ struct bp_external_encoder_control {
 struct bp_crtc_source_select {
 	enum engine_id engine_id;
 	enum controller_id controller_id;
-	/* from GPU Tx aka asic_signal */
-	enum signal_type signal;
-	/* sink_signal may differ from asicSignal if Translator encoder */
 	enum signal_type sink_signal;
-	enum display_output_bit_depth display_output_bit_depth;
-	bool enable_dp_audio;
+	uint8_t bit_depth;
 };
 
 struct bp_transmitter_control {
-- 
2.51.0

[PATCH 06/23] drm/amd/display: Get maximum pixel clock from VBIOS

[Timur Kristóf]

We will use this for validating the pixel clock when
an analog monitor is connected to VGA or DVI-I connectors.

For reference, see the legacy display code:
amdgpu_connector_vga_mode_valid

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c           | 2 ++
 drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index c7875edea321..33d0ec38ded7 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -441,6 +441,7 @@ static enum bp_result get_firmware_info_v1_4(
 		le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;
 	info->pll_info.max_output_pxl_clk_pll_frequency =
 		le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;
+	info->max_pixel_clock = le16_to_cpu(firmware_info->usMaxPixelClock) * 10;
 
 	if (firmware_info->usFirmwareCapability.sbfAccess.MemoryClockSS_Support)
 		/* Since there is no information on the SS, report conservative
@@ -497,6 +498,7 @@ static enum bp_result get_firmware_info_v2_1(
 	info->external_clock_source_frequency_for_dp =
 		le16_to_cpu(firmwareInfo->usUniphyDPModeExtClkFreq) * 10;
 	info->min_allowed_bl_level = firmwareInfo->ucMinAllowedBL_Level;
+	info->max_pixel_clock = le16_to_cpu(firmwareInfo->usMaxPixelClock) * 10;
 
 	/* There should be only one entry in the SS info table for Memory Clock
 	 */
diff --git a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
index cc467031651d..38a77fa9b4af 100644
--- a/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
+++ b/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
@@ -169,6 +169,7 @@ struct dc_firmware_info {
 		uint32_t engine_clk_ss_percentage;
 	} feature;
 
+	uint32_t max_pixel_clock; /* in KHz */
 	uint32_t default_display_engine_pll_frequency; /* in KHz */
 	uint32_t external_clock_source_frequency_for_dp; /* in KHz */
 	uint32_t smu_gpu_pll_output_freq; /* in KHz */
-- 
2.51.0

[PATCH 07/23] drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)

[Timur Kristóf]

Analog video signals on VGA or DVI-A (analog part of DVI-I)
don't support audio, so avoid calling any audio related
functions on analog signals.

Stereo sync was not set up for analog signals in the legacy
display code either, so there is no loss of functionality if
we omit it from DC for now.

Also add a dc_is_rgb_signal similar to other dc_is_*_signal.

v2:
Added comment to clarify what we mean by RGB in this context.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c |  3 ++-
 drivers/gpu/drm/amd/display/dc/link/link_dpms.c      |  6 ++++--
 drivers/gpu/drm/amd/display/include/signal_types.h   | 12 ++++++++++++
 3 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c b/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
index 892907991f91..80344cbd1f99 100644
--- a/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
+++ b/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
@@ -115,7 +115,8 @@ void setup_dio_stream_attribute(struct pipe_ctx *pipe_ctx)
 	struct dc_stream_state *stream = pipe_ctx->stream;
 	struct dc_link *link = stream->link;
 
-	if (!dc_is_virtual_signal(stream->signal))
+	if (!dc_is_virtual_signal(stream->signal) &&
+		!dc_is_rgb_signal(stream->signal))
 		stream_encoder->funcs->setup_stereo_sync(
 				stream_encoder,
 				pipe_ctx->stream_res.tg->inst,
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index 83419e1a9036..c92d46c25f8c 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2369,7 +2369,8 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)
 			set_avmute(pipe_ctx, true);
 	}
 
-	dc->hwss.disable_audio_stream(pipe_ctx);
+	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
+		dc->hwss.disable_audio_stream(pipe_ctx);
 
 	update_psp_stream_config(pipe_ctx, true);
 	dc->hwss.blank_stream(pipe_ctx);
@@ -2654,7 +2655,8 @@ void link_set_dpms_on(
 		enable_stream_features(pipe_ctx);
 	update_psp_stream_config(pipe_ctx, false);
 
-	dc->hwss.enable_audio_stream(pipe_ctx);
+	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
+		dc->hwss.enable_audio_stream(pipe_ctx);
 
 	if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {
 		set_avmute(pipe_ctx, false);
diff --git a/drivers/gpu/drm/amd/display/include/signal_types.h b/drivers/gpu/drm/amd/display/include/signal_types.h
index a10d6b988aab..3a2c2d2fb629 100644
--- a/drivers/gpu/drm/amd/display/include/signal_types.h
+++ b/drivers/gpu/drm/amd/display/include/signal_types.h
@@ -118,6 +118,18 @@ static inline bool dc_is_dvi_signal(enum signal_type signal)
 	}
 }
 
+/**
+ * dc_is_rgb_signal() - Whether the signal is analog RGB.
+ *
+ * Returns whether the given signal type is an analog RGB signal
+ * that is used with a DAC on VGA or DVI-I connectors.
+ * Not to be confused with other uses of "RGB", such as RGB color space.
+ */
+static inline bool dc_is_rgb_signal(enum signal_type signal)
+{
+	return (signal == SIGNAL_TYPE_RGB);
+}
+
 static inline bool dc_is_tmds_signal(enum signal_type signal)
 {
 	switch (signal) {
-- 
2.51.0

[PATCH 08/23] drm/amd/display: Don't try to enable/disable HPD when unavailable

[Timur Kristóf]

VGA connectors don't have HPD (hotplug detection), so don't
touch any HPD related registers for VGA.

Determine whether hotplug detection is available by checking that
the interrupt source is invalid.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index f263e1a4537e..cb4bb67289a4 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -759,6 +759,7 @@ static ssize_t dp_phy_test_pattern_debugfs_write(struct file *f, const char __us
 	int max_param_num = 11;
 	enum dp_test_pattern test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
 	bool disable_hpd = false;
+	bool supports_hpd = link->irq_source_hpd != DC_IRQ_SOURCE_INVALID;
 	bool valid_test_pattern = false;
 	uint8_t param_nums = 0;
 	/* init with default 80bit custom pattern */
@@ -850,7 +851,7 @@ static ssize_t dp_phy_test_pattern_debugfs_write(struct file *f, const char __us
 	 * because it might have been disabled after a test pattern was set.
 	 * AUX depends on HPD * sequence dependent, do not move!
 	 */
-	if (!disable_hpd)
+	if (supports_hpd && !disable_hpd)
 		dc_link_enable_hpd(link);
 
 	prefer_link_settings.lane_count = link->verified_link_cap.lane_count;
@@ -888,7 +889,7 @@ static ssize_t dp_phy_test_pattern_debugfs_write(struct file *f, const char __us
 	 * Need disable interrupt to avoid SW driver disable DP output. This is
 	 * done after the test pattern is set.
 	 */
-	if (valid_test_pattern && disable_hpd)
+	if (valid_test_pattern && supports_hpd && disable_hpd)
 		dc_link_disable_hpd(link);
 
 	kfree(wr_buf);
-- 
2.51.0

[PATCH 09/23] drm/amd/display: Determine early if a link has supported encoders (v2)

[Timur Kristóf]

Avoid initializing DDC, HPD, etc. when we know that the link is
not going to be constructed because it has no supported encoders.

This is mainly useful for old GPUs which may have encoders such
as TRAVIS and NUTMEG that are not yet supported by DC.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../drm/amd/display/dc/link/link_factory.c    | 23 +++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
index 31a73867cd4c..dd636a994bd6 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
@@ -451,6 +451,14 @@ static enum channel_id get_ddc_line(struct dc_link *link)
 	return channel;
 }
 
+static bool transmitter_supported(const enum transmitter transmitter)
+{
+	return transmitter != TRANSMITTER_UNKNOWN &&
+		transmitter != TRANSMITTER_NUTMEG_CRT &&
+		transmitter != TRANSMITTER_TRAVIS_CRT &&
+		transmitter != TRANSMITTER_TRAVIS_LCD;
+}
+
 static bool construct_phy(struct dc_link *link,
 			      const struct link_init_data *init_params)
 {
@@ -482,6 +490,17 @@ static bool construct_phy(struct dc_link *link,
 	link->link_id =
 		bios->funcs->get_connector_id(bios, init_params->connector_index);
 
+	/* Determine early if the link has any supported encoders,
+	 * so that we avoid initializing DDC and HPD, etc.
+	 */
+	bp_funcs->get_src_obj(bios, link->link_id, 0, &enc_init_data.encoder);
+	enc_init_data.transmitter = translate_encoder_to_transmitter(enc_init_data.encoder);
+
+	if (!transmitter_supported(enc_init_data.transmitter)) {
+		DC_LOG_WARNING("link_id %d has unsupported encoder\n", link->link_id.id);
+		return false;
+	}
+
 	link->ep_type = DISPLAY_ENDPOINT_PHY;
 
 	DC_LOG_DC("BIOS object table - link_id: %d", link->link_id.id);
@@ -611,16 +630,12 @@ static bool construct_phy(struct dc_link *link,
 		dal_ddc_get_line(get_ddc_pin(link->ddc));
 
 	enc_init_data.ctx = dc_ctx;
-	bp_funcs->get_src_obj(dc_ctx->dc_bios, link->link_id, 0,
-			      &enc_init_data.encoder);
 	enc_init_data.connector = link->link_id;
 	enc_init_data.channel = get_ddc_line(link);
 	enc_init_data.hpd_source = get_hpd_line(link);
 
 	link->hpd_src = enc_init_data.hpd_source;
 
-	enc_init_data.transmitter =
-		translate_encoder_to_transmitter(enc_init_data.encoder);
 	link->link_enc =
 		link->dc->res_pool->funcs->link_enc_create(dc_ctx, &enc_init_data);
 
-- 
2.51.0

[PATCH 10/23] drm/amd/display: Add concept of analog encoders (v2)

[Timur Kristóf]

Add a num_analog_stream_encoders field to indicate how many
analog stream encoders are present. When analog stream encoders
are present, create them.

Additionally, add an analog_engine field to link encoders and
search for supported analog encoders in the BIOS for each link.
When connecting an RGB signal, search for analog stream encoders.

The actual DCE analog link and stream encoder is going to be
added in a subsequent commit.

v2:
Add check to see if an analog engine is really supported.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/dc/core/dc_resource.c |  8 +++++
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |  2 ++
 drivers/gpu/drm/amd/display/dc/inc/resource.h |  1 +
 .../drm/amd/display/dc/link/link_factory.c    | 36 ++++++++++++++++++-
 .../dc/resource/dce100/dce100_resource.c      |  7 ++--
 5 files changed, 51 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index bc5dedf5f60c..92eed44064f3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -446,6 +446,14 @@ bool resource_construct(
 				DC_ERR("DC: failed to create stream_encoder!\n");
 			pool->stream_enc_count++;
 		}
+
+		for (i = 0; i < caps->num_analog_stream_encoder; i++) {
+			pool->stream_enc[caps->num_stream_encoder + i] =
+				create_funcs->create_stream_encoder(ENGINE_ID_DACA + i, ctx);
+			if (pool->stream_enc[caps->num_stream_encoder + i] == NULL)
+				DC_ERR("DC: failed to create analog stream_encoder %d!\n", i);
+			pool->stream_enc_count++;
+		}
 	}
 
 	pool->hpo_dp_stream_enc_count = 0;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
index 08c16ba52a51..df512920a9fa 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
@@ -47,6 +47,7 @@ struct encoder_init_data {
 	enum hpd_source_id hpd_source;
 	/* TODO: in DAL2, here was pointer to EventManagerInterface */
 	struct graphics_object_id encoder;
+	enum engine_id analog_engine;
 	struct dc_context *ctx;
 	enum transmitter transmitter;
 };
@@ -83,6 +84,7 @@ struct link_encoder {
 	struct graphics_object_id connector;
 	uint32_t output_signals;
 	enum engine_id preferred_engine;
+	enum engine_id analog_engine;
 	struct encoder_feature_support features;
 	enum transmitter transmitter;
 	enum hpd_source_id hpd_source;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index 4e26a16a8743..79746d931471 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -49,6 +49,7 @@ struct resource_caps {
 	int num_video_plane;
 	int num_audio;
 	int num_stream_encoder;
+	int num_analog_stream_encoder;
 	int num_pll;
 	int num_dwb;
 	int num_ddc;
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
index dd636a994bd6..4dbe88d17a11 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
@@ -451,6 +451,32 @@ static enum channel_id get_ddc_line(struct dc_link *link)
 	return channel;
 }
 
+static enum engine_id find_analog_engine(struct dc_link *link)
+{
+	struct dc_bios *bp = link->ctx->dc_bios;
+	struct graphics_object_id encoder = {0};
+	enum bp_result bp_result = BP_RESULT_OK;
+	int i;
+
+	for (i = 0; i < 3; i++) {
+		bp_result = bp->funcs->get_src_obj(bp, link->link_id, i, &encoder);
+
+		if (bp_result != BP_RESULT_OK)
+			return ENGINE_ID_UNKNOWN;
+
+		switch (encoder.id) {
+		case ENCODER_ID_INTERNAL_DAC1:
+		case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
+			return ENGINE_ID_DACA;
+		case ENCODER_ID_INTERNAL_DAC2:
+		case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
+			return ENGINE_ID_DACB;
+		}
+	}
+
+	return ENGINE_ID_UNKNOWN;
+}
+
 static bool transmitter_supported(const enum transmitter transmitter)
 {
 	return transmitter != TRANSMITTER_UNKNOWN &&
@@ -459,6 +485,12 @@ static bool transmitter_supported(const enum transmitter transmitter)
 		transmitter != TRANSMITTER_TRAVIS_LCD;
 }
 
+static bool analog_engine_supported(const enum engine_id engine_id)
+{
+	return engine_id == ENGINE_ID_DACA ||
+		engine_id == ENGINE_ID_DACB;
+}
+
 static bool construct_phy(struct dc_link *link,
 			      const struct link_init_data *init_params)
 {
@@ -495,8 +527,10 @@ static bool construct_phy(struct dc_link *link,
 	 */
 	bp_funcs->get_src_obj(bios, link->link_id, 0, &enc_init_data.encoder);
 	enc_init_data.transmitter = translate_encoder_to_transmitter(enc_init_data.encoder);
+	enc_init_data.analog_engine = find_analog_engine(link);
 
-	if (!transmitter_supported(enc_init_data.transmitter)) {
+	if (!transmitter_supported(enc_init_data.transmitter) &&
+		!analog_engine_supported(enc_init_data.analog_engine)) {
 		DC_LOG_WARNING("link_id %d has unsupported encoder\n", link->link_id.id);
 		return false;
 	}
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
index c4b4dc3ad8c9..fa3e5ab8ebb8 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
@@ -952,6 +952,10 @@ struct stream_encoder *dce100_find_first_free_match_stream_enc_for_link(
 	int i;
 	int j = -1;
 	struct dc_link *link = stream->link;
+	enum engine_id preferred_engine = link->link_enc->preferred_engine;
+
+	if (dc_is_rgb_signal(stream->signal))
+		preferred_engine = link->link_enc->analog_engine;
 
 	for (i = 0; i < pool->stream_enc_count; i++) {
 		if (!res_ctx->is_stream_enc_acquired[i] &&
@@ -960,8 +964,7 @@ struct stream_encoder *dce100_find_first_free_match_stream_enc_for_link(
 			 * in daisy chain use case
 			 */
 			j = i;
-			if (pool->stream_enc[i]->id ==
-					link->link_enc->preferred_engine)
+			if (pool->stream_enc[i]->id == preferred_engine)
 				return pool->stream_enc[i];
 		}
 	}
-- 
2.51.0

[PATCH 11/23] drm/amd/display: Implement DCE analog stream encoders

[Timur Kristóf]

Add analog stream encoders for DCE which will be used when
connecting an analog display through VGA or DVI-I.

Considering that all stream encoder functions currently deal
with digital streams, there is nothing for an analog stream
encoder to do, making them basically a no-op.
That being said, we still need some kind of stream encoder to
represent an analog stream, and it is beneficial to split them
from digital stream encoders in the code to make sure they
don't accidentally write any DIG* registers.

On supported chips there is currently up to 1 analog encoder,
which is DACA. There are references to DACB in some code such
as VBIOS commands and register files but it seems to be
not present on DCE 6 and newer.

Set num_analog_stream_encoder = 1 so that we can support
the analog connectors on DCE 6-10, for now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../drm/amd/display/dc/dce/dce_stream_encoder.c    | 14 ++++++++++++++
 .../drm/amd/display/dc/dce/dce_stream_encoder.h    |  5 +++++
 .../display/dc/resource/dce100/dce100_resource.c   |  6 ++++++
 .../amd/display/dc/resource/dce60/dce60_resource.c |  8 ++++++++
 .../amd/display/dc/resource/dce80/dce80_resource.c |  8 ++++++++
 5 files changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index 1130d7619b26..f8996ee2856b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -1567,3 +1567,17 @@ void dce110_stream_encoder_construct(
 	enc110->se_shift = se_shift;
 	enc110->se_mask = se_mask;
 }
+
+static const struct stream_encoder_funcs dce110_an_str_enc_funcs = {0};
+
+void dce110_analog_stream_encoder_construct(
+	struct dce110_stream_encoder *enc110,
+	struct dc_context *ctx,
+	struct dc_bios *bp,
+	enum engine_id eng_id)
+{
+	enc110->base.funcs = &dce110_an_str_enc_funcs;
+	enc110->base.ctx = ctx;
+	enc110->base.id = eng_id;
+	enc110->base.bp = bp;
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h
index cc5020a8e1e1..068de1392121 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h
@@ -708,6 +708,11 @@ void dce110_stream_encoder_construct(
 	const struct dce_stream_encoder_shift *se_shift,
 	const struct dce_stream_encoder_mask *se_mask);
 
+void dce110_analog_stream_encoder_construct(
+	struct dce110_stream_encoder *enc110,
+	struct dc_context *ctx,
+	struct dc_bios *bp,
+	enum engine_id eng_id);
 
 void dce110_se_audio_mute_control(
 	struct stream_encoder *enc, bool mute);
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
index fa3e5ab8ebb8..54803fb7da67 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
@@ -375,6 +375,7 @@ static const struct bios_registers bios_regs = {
 static const struct resource_caps res_cap = {
 	.num_timing_generator = 6,
 	.num_audio = 6,
+	.num_analog_stream_encoder = 1,
 	.num_stream_encoder = 6,
 	.num_pll = 3,
 	.num_ddc = 6,
@@ -484,6 +485,11 @@ static struct stream_encoder *dce100_stream_encoder_create(
 	if (!enc110)
 		return NULL;
 
+	if (eng_id == ENGINE_ID_DACA || eng_id == ENGINE_ID_DACB) {
+		dce110_analog_stream_encoder_construct(enc110, ctx, ctx->dc_bios, eng_id);
+		return &enc110->base;
+	}
+
 	dce110_stream_encoder_construct(enc110, ctx, ctx->dc_bios, eng_id,
 					&stream_enc_regs[eng_id], &se_shift, &se_mask);
 	return &enc110->base;
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
index 53c67ebe779f..8862365d3082 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
@@ -373,6 +373,7 @@ static const struct bios_registers bios_regs = {
 static const struct resource_caps res_cap = {
 		.num_timing_generator = 6,
 		.num_audio = 6,
+		.num_analog_stream_encoder = 1,
 		.num_stream_encoder = 6,
 		.num_pll = 3,
 		.num_ddc = 6,
@@ -382,6 +383,7 @@ static const struct resource_caps res_cap_61 = {
 		.num_timing_generator = 4,
 		.num_audio = 6,
 		.num_stream_encoder = 6,
+		.num_analog_stream_encoder = 1,
 		.num_pll = 3,
 		.num_ddc = 6,
 };
@@ -389,6 +391,7 @@ static const struct resource_caps res_cap_61 = {
 static const struct resource_caps res_cap_64 = {
 		.num_timing_generator = 2,
 		.num_audio = 2,
+		.num_analog_stream_encoder = 1,
 		.num_stream_encoder = 2,
 		.num_pll = 3,
 		.num_ddc = 2,
@@ -599,6 +602,11 @@ static struct stream_encoder *dce60_stream_encoder_create(
 	if (!enc110)
 		return NULL;
 
+	if (eng_id == ENGINE_ID_DACA || eng_id == ENGINE_ID_DACB) {
+		dce110_analog_stream_encoder_construct(enc110, ctx, ctx->dc_bios, eng_id);
+		return &enc110->base;
+	}
+
 	dce110_stream_encoder_construct(enc110, ctx, ctx->dc_bios, eng_id,
 					&stream_enc_regs[eng_id],
 					&se_shift, &se_mask);
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
index 5b7769745202..7091e69cbe98 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
@@ -375,6 +375,7 @@ static const struct bios_registers bios_regs = {
 static const struct resource_caps res_cap = {
 		.num_timing_generator = 6,
 		.num_audio = 6,
+		.num_analog_stream_encoder = 1,
 		.num_stream_encoder = 6,
 		.num_pll = 3,
 		.num_ddc = 6,
@@ -383,6 +384,7 @@ static const struct resource_caps res_cap = {
 static const struct resource_caps res_cap_81 = {
 		.num_timing_generator = 4,
 		.num_audio = 7,
+		.num_analog_stream_encoder = 1,
 		.num_stream_encoder = 7,
 		.num_pll = 3,
 		.num_ddc = 6,
@@ -391,6 +393,7 @@ static const struct resource_caps res_cap_81 = {
 static const struct resource_caps res_cap_83 = {
 		.num_timing_generator = 2,
 		.num_audio = 6,
+		.num_analog_stream_encoder = 1,
 		.num_stream_encoder = 6,
 		.num_pll = 2,
 		.num_ddc = 2,
@@ -605,6 +608,11 @@ static struct stream_encoder *dce80_stream_encoder_create(
 	if (!enc110)
 		return NULL;
 
+	if (eng_id == ENGINE_ID_DACA || eng_id == ENGINE_ID_DACB) {
+		dce110_analog_stream_encoder_construct(enc110, ctx, ctx->dc_bios, eng_id);
+		return &enc110->base;
+	}
+
 	dce110_stream_encoder_construct(enc110, ctx, ctx->dc_bios, eng_id,
 					&stream_enc_regs[eng_id],
 					&se_shift, &se_mask);
-- 
2.51.0

[PATCH 12/23] drm/amd/display: Implement DCE analog link encoders (v2)

[Timur Kristóf]

We support two kinds of analog connections:

1. DVI-I, which allows both digital and analog signals:
The DC code base only allows 1 encoder per connector, and the
preferred engine type is still going to be digital. So, for DVI-I
to work, we need to make sure the pre-existing link encoder can
also work with analog signals.

1. VGA, which only supports analog signals:
For VGA, we need to create a link encoder that only works with the
DAC without perturbing any digital transmitter functionality.
Since dce110_link_encoder already supports analog DVI-I,
just reuse that code for VGA as well.

v2:
Reduce code churn by reusing same link encoder for VGA and DVI-I.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../drm/amd/display/dc/dce/dce_link_encoder.c | 85 +++++++++++++++++++
 .../drm/amd/display/dc/dce/dce_link_encoder.h | 16 ++--
 .../dc/resource/dce100/dce100_resource.c      | 16 +++-
 .../dc/resource/dce60/dce60_resource.c        | 19 ++++-
 .../dc/resource/dce80/dce80_resource.c        | 16 +++-
 5 files changed, 141 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index 0c50fe266c8a..87dbb8d7ed27 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -302,6 +302,10 @@ static void setup_panel_mode(
 	if (ctx->dc->caps.psp_setup_panel_mode)
 		return;
 
+	/* The code below is only applicable to encoders with a digital transmitter. */
+	if (enc110->base.transmitter == TRANSMITTER_UNKNOWN)
+		return;
+
 	ASSERT(REG(DP_DPHY_INTERNAL_CTRL));
 	value = REG_READ(DP_DPHY_INTERNAL_CTRL);
 
@@ -804,6 +808,33 @@ bool dce110_link_encoder_validate_dp_output(
 	return true;
 }
 
+static bool dce110_link_encoder_validate_rgb_output(
+	const struct dce110_link_encoder *enc110,
+	const struct dc_crtc_timing *crtc_timing)
+{
+	/* When the VBIOS doesn't specify any limits, use 400 MHz.
+	 * The value comes from amdgpu_atombios_get_clock_info.
+	 */
+	uint32_t max_pixel_clock_khz = 400000;
+
+	if (enc110->base.ctx->dc_bios->fw_info_valid &&
+	    enc110->base.ctx->dc_bios->fw_info.max_pixel_clock) {
+		max_pixel_clock_khz =
+			enc110->base.ctx->dc_bios->fw_info.max_pixel_clock;
+	}
+
+	if (crtc_timing->pix_clk_100hz > max_pixel_clock_khz * 10)
+		return false;
+
+	if (crtc_timing->display_color_depth != COLOR_DEPTH_888)
+		return false;
+
+	if (crtc_timing->pixel_encoding != PIXEL_ENCODING_RGB)
+		return false;
+
+	return true;
+}
+
 void dce110_link_encoder_construct(
 	struct dce110_link_encoder *enc110,
 	const struct encoder_init_data *init_data,
@@ -824,6 +855,7 @@ void dce110_link_encoder_construct(
 	enc110->base.connector = init_data->connector;
 
 	enc110->base.preferred_engine = ENGINE_ID_UNKNOWN;
+	enc110->base.analog_engine = init_data->analog_engine;
 
 	enc110->base.features = *enc_features;
 
@@ -847,6 +879,11 @@ void dce110_link_encoder_construct(
 		SIGNAL_TYPE_EDP |
 		SIGNAL_TYPE_HDMI_TYPE_A;
 
+	if ((enc110->base.connector.id == CONNECTOR_ID_DUAL_LINK_DVII ||
+	     enc110->base.connector.id == CONNECTOR_ID_SINGLE_LINK_DVII) &&
+		enc110->base.analog_engine != ENGINE_ID_UNKNOWN)
+		enc110->base.output_signals |= SIGNAL_TYPE_RGB;
+
 	/* For DCE 8.0 and 8.1, by design, UNIPHY is hardwired to DIG_BE.
 	 * SW always assign DIG_FE 1:1 mapped to DIG_FE for non-MST UNIPHY.
 	 * SW assign DIG_FE to non-MST UNIPHY first and MST last. So prefer
@@ -885,6 +922,13 @@ void dce110_link_encoder_construct(
 		enc110->base.preferred_engine = ENGINE_ID_DIGG;
 	break;
 	default:
+		if (init_data->analog_engine != ENGINE_ID_UNKNOWN) {
+			/* The connector is analog-only, ie. VGA */
+			enc110->base.preferred_engine = init_data->analog_engine;
+			enc110->base.output_signals = SIGNAL_TYPE_RGB;
+			enc110->base.transmitter = TRANSMITTER_UNKNOWN;
+			break;
+		}
 		ASSERT_CRITICAL(false);
 		enc110->base.preferred_engine = ENGINE_ID_UNKNOWN;
 	}
@@ -939,6 +983,10 @@ bool dce110_link_encoder_validate_output_with_stream(
 		is_valid = dce110_link_encoder_validate_dp_output(
 					enc110, &stream->timing);
 	break;
+	case SIGNAL_TYPE_RGB:
+		is_valid = dce110_link_encoder_validate_rgb_output(
+					enc110, &stream->timing);
+	break;
 	case SIGNAL_TYPE_EDP:
 	case SIGNAL_TYPE_LVDS:
 		is_valid = stream->timing.pixel_encoding == PIXEL_ENCODING_RGB;
@@ -969,6 +1017,10 @@ void dce110_link_encoder_hw_init(
 	cntl.coherent = false;
 	cntl.hpd_sel = enc110->base.hpd_source;
 
+	/* The code below is only applicable to encoders with a digital transmitter. */
+	if (enc110->base.transmitter == TRANSMITTER_UNKNOWN)
+		return;
+
 	if (enc110->base.connector.id == CONNECTOR_ID_EDP)
 		cntl.signal = SIGNAL_TYPE_EDP;
 
@@ -1034,6 +1086,8 @@ void dce110_link_encoder_setup(
 		/* DP MST */
 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 5);
 		break;
+	case SIGNAL_TYPE_RGB:
+		break;
 	default:
 		ASSERT_CRITICAL(false);
 		/* invalid mode ! */
@@ -1282,6 +1336,24 @@ void dce110_link_encoder_disable_output(
 	struct bp_transmitter_control cntl = { 0 };
 	enum bp_result result;
 
+	switch (enc->analog_engine) {
+	case ENGINE_ID_DACA:
+		REG_UPDATE(DAC_ENABLE, DAC_ENABLE, 0);
+		break;
+	case ENGINE_ID_DACB:
+		/* DACB doesn't seem to be present on DCE6+,
+		 * although there are references to it in the register file.
+		 */
+		DC_LOG_ERROR("%s DACB is unsupported\n", __func__);
+		break;
+	default:
+		break;
+	}
+
+	/* The code below only applies to connectors that support digital signals. */
+	if (enc->transmitter == TRANSMITTER_UNKNOWN)
+		return;
+
 	if (!dce110_is_dig_enabled(enc)) {
 		/* OF_SKIP_POWER_DOWN_INACTIVE_ENCODER */
 		return;
@@ -1726,6 +1798,7 @@ void dce60_link_encoder_construct(
 	enc110->base.connector = init_data->connector;
 
 	enc110->base.preferred_engine = ENGINE_ID_UNKNOWN;
+	enc110->base.analog_engine = init_data->analog_engine;
 
 	enc110->base.features = *enc_features;
 
@@ -1749,6 +1822,11 @@ void dce60_link_encoder_construct(
 		SIGNAL_TYPE_EDP |
 		SIGNAL_TYPE_HDMI_TYPE_A;
 
+	if ((enc110->base.connector.id == CONNECTOR_ID_DUAL_LINK_DVII ||
+	     enc110->base.connector.id == CONNECTOR_ID_SINGLE_LINK_DVII) &&
+		enc110->base.analog_engine != ENGINE_ID_UNKNOWN)
+		enc110->base.output_signals |= SIGNAL_TYPE_RGB;
+
 	/* For DCE 8.0 and 8.1, by design, UNIPHY is hardwired to DIG_BE.
 	 * SW always assign DIG_FE 1:1 mapped to DIG_FE for non-MST UNIPHY.
 	 * SW assign DIG_FE to non-MST UNIPHY first and MST last. So prefer
@@ -1787,6 +1865,13 @@ void dce60_link_encoder_construct(
 		enc110->base.preferred_engine = ENGINE_ID_DIGG;
 	break;
 	default:
+		if (init_data->analog_engine != ENGINE_ID_UNKNOWN) {
+			/* The connector is analog-only, ie. VGA */
+			enc110->base.preferred_engine = init_data->analog_engine;
+			enc110->base.output_signals = SIGNAL_TYPE_RGB;
+			enc110->base.transmitter = TRANSMITTER_UNKNOWN;
+			break;
+		}
 		ASSERT_CRITICAL(false);
 		enc110->base.preferred_engine = ENGINE_ID_UNKNOWN;
 	}
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
index 261c70e01e33..c58b69bc319b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
@@ -101,18 +101,21 @@
 	SRI(DP_SEC_CNTL, DP, id), \
 	SRI(DP_VID_STREAM_CNTL, DP, id), \
 	SRI(DP_DPHY_FAST_TRAINING, DP, id), \
-	SRI(DP_SEC_CNTL1, DP, id)
+	SRI(DP_SEC_CNTL1, DP, id), \
+	SR(DAC_ENABLE)
 #endif
 
 #define LE_DCE80_REG_LIST(id)\
 	SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \
-	LE_COMMON_REG_LIST_BASE(id)
+	LE_COMMON_REG_LIST_BASE(id), \
+	SR(DAC_ENABLE)
 
 #define LE_DCE100_REG_LIST(id)\
 	LE_COMMON_REG_LIST_BASE(id), \
 	SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \
 	SRI(DP_DPHY_INTERNAL_CTRL, DP, id), \
-	SR(DCI_MEM_PWR_STATUS)
+	SR(DCI_MEM_PWR_STATUS), \
+	SR(DAC_ENABLE)
 
 #define LE_DCE110_REG_LIST(id)\
 	LE_COMMON_REG_LIST_BASE(id), \
@@ -181,6 +184,9 @@ struct dce110_link_enc_registers {
 	uint32_t DP_DPHY_BS_SR_SWAP_CNTL;
 	uint32_t DP_DPHY_HBR2_PATTERN_CONTROL;
 	uint32_t DP_SEC_CNTL1;
+
+	/* DAC registers */
+	uint32_t DAC_ENABLE;
 };
 
 struct dce110_link_encoder {
@@ -215,10 +221,6 @@ bool dce110_link_encoder_validate_dvi_output(
 	enum signal_type signal,
 	const struct dc_crtc_timing *crtc_timing);
 
-bool dce110_link_encoder_validate_rgb_output(
-	const struct dce110_link_encoder *enc110,
-	const struct dc_crtc_timing *crtc_timing);
-
 bool dce110_link_encoder_validate_dp_output(
 	const struct dce110_link_encoder *enc110,
 	const struct dc_crtc_timing *crtc_timing);
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
index 54803fb7da67..075815e4041a 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
@@ -225,6 +225,7 @@ static const struct dce110_link_enc_registers link_enc_regs[] = {
 	link_regs(4),
 	link_regs(5),
 	link_regs(6),
+	{ .DAC_ENABLE = mmDAC_ENABLE },
 };
 
 #define stream_enc_regs(id)\
@@ -630,7 +631,20 @@ static struct link_encoder *dce100_link_encoder_create(
 		kzalloc(sizeof(struct dce110_link_encoder), GFP_KERNEL);
 	int link_regs_id;
 
-	if (!enc110 || enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs))
+	if (!enc110)
+		return NULL;
+
+	if (enc_init_data->connector.id == CONNECTOR_ID_VGA) {
+		dce110_link_encoder_construct(enc110,
+			enc_init_data,
+			&link_enc_feature,
+			&link_enc_regs[ENGINE_ID_DACA],
+			NULL,
+			NULL);
+		return &enc110->base;
+	}
+
+	if (enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs))
 		return NULL;
 
 	link_regs_id =
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
index 8862365d3082..5fa84c622282 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
@@ -240,7 +240,9 @@ static const struct dce110_link_enc_registers link_enc_regs[] = {
 	link_regs(2),
 	link_regs(3),
 	link_regs(4),
-	link_regs(5)
+	link_regs(5),
+	{0},
+	{ .DAC_ENABLE = mmDAC_ENABLE },
 };
 
 #define stream_enc_regs(id)\
@@ -726,7 +728,20 @@ static struct link_encoder *dce60_link_encoder_create(
 		kzalloc(sizeof(struct dce110_link_encoder), GFP_KERNEL);
 	int link_regs_id;
 
-	if (!enc110 || enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs))
+	if (!enc110)
+		return NULL;
+
+	if (enc_init_data->connector.id == CONNECTOR_ID_VGA) {
+		dce110_link_encoder_construct(enc110,
+			enc_init_data,
+			&link_enc_feature,
+			&link_enc_regs[ENGINE_ID_DACA],
+			NULL,
+			NULL);
+		return &enc110->base;
+	}
+
+	if (enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs))
 		return NULL;
 
 	link_regs_id =
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
index 7091e69cbe98..902209a17fe4 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
@@ -241,6 +241,7 @@ static const struct dce110_link_enc_registers link_enc_regs[] = {
 	link_regs(4),
 	link_regs(5),
 	link_regs(6),
+	{ .DAC_ENABLE = mmDAC_ENABLE },
 };
 
 #define stream_enc_regs(id)\
@@ -732,7 +733,20 @@ static struct link_encoder *dce80_link_encoder_create(
 		kzalloc(sizeof(struct dce110_link_encoder), GFP_KERNEL);
 	int link_regs_id;
 
-	if (!enc110 || enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs))
+	if (!enc110)
+		return NULL;
+
+	if (enc_init_data->connector.id == CONNECTOR_ID_VGA) {
+		dce110_link_encoder_construct(enc110,
+			enc_init_data,
+			&link_enc_feature,
+			&link_enc_regs[ENGINE_ID_DACA],
+			NULL,
+			NULL);
+		return &enc110->base;
+	}
+
+	if (enc_init_data->hpd_source >= ARRAY_SIZE(link_enc_hpd_regs))
 		return NULL;
 
 	link_regs_id =
-- 
2.51.0

[PATCH 13/23] drm/amd/display: Support DAC in dce110_hwseq

[Timur Kristóf]

The dce110_hwseq is used by all DCE hardware,
so add the DAC support here.

When enabling/disabling a stream for a RGB signal,
this will call the VBIOS to enable/disable the DAC.
Additionally, when applying the controller context,
call SelectCRTC_Source from VBIOS in order to
direct the CRTC output to the DAC.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 75 ++++++++++++++++++-
 1 file changed, 73 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index 24184b4eb352..975913375d05 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -659,6 +659,20 @@ void dce110_update_info_frame(struct pipe_ctx *pipe_ctx)
 	}
 }
 
+static void
+dce110_dac_encoder_control(struct pipe_ctx *pipe_ctx, bool enable)
+{
+	struct dc_link *link = pipe_ctx->stream->link;
+	struct dc_bios *bios = link->ctx->dc_bios;
+	struct bp_encoder_control encoder_control = {0};
+
+	encoder_control.action = enable ? ENCODER_CONTROL_ENABLE : ENCODER_CONTROL_DISABLE;
+	encoder_control.engine_id = link->link_enc->analog_engine;
+	encoder_control.pixel_clock = pipe_ctx->stream->timing.pix_clk_100hz / 10;
+
+	bios->funcs->encoder_control(bios, &encoder_control);
+}
+
 void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
 {
 	enum dc_lane_count lane_count =
@@ -689,6 +703,9 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
 		early_control = lane_count;
 
 	tg->funcs->set_early_control(tg, early_control);
+
+	if (dc_is_rgb_signal(pipe_ctx->stream->signal))
+		dce110_dac_encoder_control(pipe_ctx, true);
 }
 
 static enum bp_result link_transmitter_control(
@@ -1176,7 +1193,8 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
 		pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(
 			pipe_ctx->stream_res.stream_enc);
 
-	dc->hwss.disable_audio_stream(pipe_ctx);
+	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
+		dc->hwss.disable_audio_stream(pipe_ctx);
 
 	link_hwss->reset_stream_encoder(pipe_ctx);
 
@@ -1196,6 +1214,9 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
 		dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
 					       link_enc->transmitter - TRANSMITTER_UNIPHY_A);
 	}
+
+	if (dc_is_rgb_signal(pipe_ctx->stream->signal))
+		dce110_dac_encoder_control(pipe_ctx, false);
 }
 
 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
@@ -1581,6 +1602,51 @@ static enum dc_status dce110_enable_stream_timing(
 	return DC_OK;
 }
 
+static void
+dce110_select_crtc_source(struct pipe_ctx *pipe_ctx)
+{
+	struct dc_link *link = pipe_ctx->stream->link;
+	struct dc_bios *bios = link->ctx->dc_bios;
+	struct bp_crtc_source_select crtc_source_select = {0};
+	enum engine_id engine_id = link->link_enc->preferred_engine;
+	uint8_t bit_depth;
+
+	if (dc_is_rgb_signal(pipe_ctx->stream->signal))
+		engine_id = link->link_enc->analog_engine;
+
+	switch (pipe_ctx->stream->timing.display_color_depth) {
+	case COLOR_DEPTH_UNDEFINED:
+		bit_depth = 0;
+		break;
+	case COLOR_DEPTH_666:
+		bit_depth = 6;
+		break;
+	default:
+	case COLOR_DEPTH_888:
+		bit_depth = 8;
+		break;
+	case COLOR_DEPTH_101010:
+		bit_depth = 10;
+		break;
+	case COLOR_DEPTH_121212:
+		bit_depth = 12;
+		break;
+	case COLOR_DEPTH_141414:
+		bit_depth = 14;
+		break;
+	case COLOR_DEPTH_161616:
+		bit_depth = 16;
+		break;
+	}
+
+	crtc_source_select.controller_id = CONTROLLER_ID_D0 + pipe_ctx->stream_res.tg->inst;
+	crtc_source_select.bit_depth = bit_depth;
+	crtc_source_select.engine_id = engine_id;
+	crtc_source_select.sink_signal = pipe_ctx->stream->signal;
+
+	bios->funcs->select_crtc_source(bios, &crtc_source_select);
+}
+
 enum dc_status dce110_apply_single_controller_ctx_to_hw(
 		struct pipe_ctx *pipe_ctx,
 		struct dc_state *context,
@@ -1600,6 +1666,10 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
 		hws->funcs.disable_stream_gating(dc, pipe_ctx);
 	}
 
+	if (pipe_ctx->stream->signal == SIGNAL_TYPE_RGB) {
+		dce110_select_crtc_source(pipe_ctx);
+	}
+
 	if (pipe_ctx->stream_res.audio != NULL) {
 		struct audio_output audio_output = {0};
 
@@ -1679,7 +1749,8 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
 		pipe_ctx->stream_res.tg->funcs->set_static_screen_control(
 				pipe_ctx->stream_res.tg, event_triggers, 2);
 
-	if (!dc_is_virtual_signal(pipe_ctx->stream->signal))
+	if (!dc_is_virtual_signal(pipe_ctx->stream->signal) &&
+		!dc_is_rgb_signal(pipe_ctx->stream->signal))
 		pipe_ctx->stream_res.stream_enc->funcs->dig_connect_to_otg(
 			pipe_ctx->stream_res.stream_enc,
 			pipe_ctx->stream_res.tg->inst);
-- 
2.51.0

[PATCH 14/23] drm/amd/display: Add analog link detection (v2)

[Timur Kristóf]

Analog displays typically have a DDC connection which can be
used by the GPU to read EDID. This commit adds the capability
to probe analog displays using DDC, reading the EDID header and
deciding whether the analog link is connected based on the data
that was read.

Note that VGA has no HPD (hotplug detection), so we need to
to do analog link detection for VGA before checking HPD.

In case of DVI-I, while the connector supports HPD, not all
analog cables connect the HPD pins, so we can't rely on HPD
either.

For reference, see the legacy display code:
amdgpu_connector_vga_detect
amdgpu_display_ddc_probe

DAC load detection will be implemented in a separate commit.

v2:
Fix crash / black screen on newer GPUs during link detection.
Ignore HPD pin for analog connectors.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../amd/display/dc/link/hwss/link_hwss_dio.c  | 16 ++--
 .../drm/amd/display/dc/link/link_detection.c  | 86 ++++++++++++++++++-
 .../gpu/drm/amd/display/dc/link/link_dpms.c   |  3 +
 .../drm/amd/display/dc/link/link_factory.c    |  3 +
 4 files changed, 101 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c b/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
index 80344cbd1f99..befa67b2b2ae 100644
--- a/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
+++ b/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
@@ -58,8 +58,9 @@ void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx)
 		return;
 	}
 
-	link_enc->funcs->connect_dig_be_to_fe(link_enc,
-			pipe_ctx->stream_res.stream_enc->id, true);
+	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
+		link_enc->funcs->connect_dig_be_to_fe(link_enc,
+				pipe_ctx->stream_res.stream_enc->id, true);
 	if (dc_is_dp_signal(pipe_ctx->stream->signal))
 		pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(pipe_ctx->stream->link,
 				DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_BE);
@@ -98,10 +99,13 @@ void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx)
 	if (stream_enc->funcs->enable_stream)
 		stream_enc->funcs->enable_stream(stream_enc,
 				pipe_ctx->stream->signal, false);
-	link_enc->funcs->connect_dig_be_to_fe(
-			link_enc,
-			pipe_ctx->stream_res.stream_enc->id,
-			false);
+
+	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
+		link_enc->funcs->connect_dig_be_to_fe(
+				link_enc,
+				pipe_ctx->stream_res.stream_enc->id,
+				false);
+
 	if (dc_is_dp_signal(pipe_ctx->stream->signal))
 		pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(
 				pipe_ctx->stream->link,
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
index 2ab8ee7f42c1..2ad4862ad659 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_detection.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
@@ -858,6 +858,48 @@ static void verify_link_capability(struct dc_link *link, struct dc_sink *sink,
 		verify_link_capability_non_destructive(link);
 }
 
+/**
+ * link_detect_evaluate_edid_header() - Evaluate if an EDID header is acceptable.
+ *
+ * Evaluates an 8-byte EDID header to check if it's good enough
+ * for the purpose of determining whether a display is connected
+ * without reading the full EDID.
+ */
+static bool link_detect_evaluate_edid_header(uint8_t edid_header[8])
+{
+	int edid_header_score = 0;
+	int i;
+
+	for (i = 0; i < 8; ++i)
+		edid_header_score += edid_header[i] == ((i == 0 || i == 7) ? 0x00 : 0xff);
+
+	return edid_header_score >= 6;
+}
+
+/**
+ * link_detect_ddc_probe() - Probe the DDC to see if a display is connected.
+ *
+ * Detect whether a display is connected to DDC without reading full EDID.
+ * Reads only the EDID header (the first 8 bytes of EDID) from DDC and
+ * evaluates whether that matches.
+ */
+static bool link_detect_ddc_probe(struct dc_link *link)
+{
+	if (!link->ddc)
+		return false;
+
+	uint8_t edid_header[8] = {0};
+	bool ddc_probed = i2c_read(link->ddc, 0x50, edid_header, sizeof(edid_header));
+
+	if (!ddc_probed)
+		return false;
+
+	if (!link_detect_evaluate_edid_header(edid_header))
+		return false;
+
+	return true;
+}
+
 /*
  * detect_link_and_local_sink() - Detect if a sink is attached to a given link
  *
@@ -942,6 +984,12 @@ static bool detect_link_and_local_sink(struct dc_link *link,
 			break;
 		}
 
+		case SIGNAL_TYPE_RGB: {
+			sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
+			sink_caps.signal = SIGNAL_TYPE_RGB;
+			break;
+		}
+
 		case SIGNAL_TYPE_LVDS: {
 			sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
 			sink_caps.signal = SIGNAL_TYPE_LVDS;
@@ -1135,9 +1183,17 @@ static bool detect_link_and_local_sink(struct dc_link *link,
 				sink = prev_sink;
 				prev_sink = NULL;
 			}
-			query_hdcp_capability(sink->sink_signal, link);
+
+			if (!sink->edid_caps.analog)
+				query_hdcp_capability(sink->sink_signal, link);
 		}
 
+		/* DVI-I connector connected to analog display. */
+		if ((link->link_id.id == CONNECTOR_ID_DUAL_LINK_DVII ||
+		     link->link_id.id == CONNECTOR_ID_SINGLE_LINK_DVII) &&
+			sink->edid_caps.analog)
+			sink->sink_signal = SIGNAL_TYPE_RGB;
+
 		/* HDMI-DVI Dongle */
 		if (sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A &&
 		    !sink->edid_caps.edid_hdmi)
@@ -1234,6 +1290,23 @@ static bool detect_link_and_local_sink(struct dc_link *link,
 	return true;
 }
 
+/**
+ * link_detect_analog() - Determines if an analog sink is connected.
+ */
+static bool link_detect_analog(struct dc_link *link, enum dc_connection_type *type)
+{
+	/* Don't care about connectors that don't support an analog signal. */
+	ASSERT(dc_connector_supports_analog(link->link_id.id));
+
+	if (link_detect_ddc_probe(link)) {
+		*type = dc_connection_single;
+		return true;
+	}
+
+	*type = dc_connection_none;
+	return true;
+}
+
 /*
  * link_detect_connection_type() - Determine if there is a sink connected
  *
@@ -1250,6 +1323,17 @@ bool link_detect_connection_type(struct dc_link *link, enum dc_connection_type *
 		return true;
 	}
 
+	/* Ignore the HPD pin (if any) for analog connectors.
+	 * Instead rely on DDC.
+	 *
+	 * - VGA connectors don't have any HPD at all.
+	 * - Some DVI-A cables don't connect the HPD pin.
+	 * - Some DVI-A cables pull up the HPD pin.
+	 *   (So it's high even when no display is connected.)
+	 */
+	if (dc_connector_supports_analog(link->link_id.id))
+		return link_detect_analog(link, type);
+
 	if (link->connector_signal == SIGNAL_TYPE_EDP) {
 		/*in case it is not on*/
 		if (!link->dc->config.edp_no_power_sequencing)
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index c92d46c25f8c..6e16d8419fd9 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2256,6 +2256,9 @@ static enum dc_status enable_link(
 		enable_link_lvds(pipe_ctx);
 		status = DC_OK;
 		break;
+	case SIGNAL_TYPE_RGB:
+		status = DC_OK;
+		break;
 	case SIGNAL_TYPE_VIRTUAL:
 		status = enable_link_virtual(pipe_ctx);
 		break;
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
index 4dbe88d17a11..b6990088b8b7 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_factory.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_factory.c
@@ -583,6 +583,9 @@ static bool construct_phy(struct dc_link *link,
 	case CONNECTOR_ID_DUAL_LINK_DVII:
 		link->connector_signal = SIGNAL_TYPE_DVI_DUAL_LINK;
 		break;
+	case CONNECTOR_ID_VGA:
+		link->connector_signal = SIGNAL_TYPE_RGB;
+		break;
 	case CONNECTOR_ID_DISPLAY_PORT:
 	case CONNECTOR_ID_MXM:
 	case CONNECTOR_ID_USBC:
-- 
2.51.0

[PATCH 15/23] drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)

[Timur Kristóf]

Prepare for polling analog connectors.
Document the function better.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 ++++++++++---------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 4a9109818672..cdc6112e5875 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7123,29 +7123,32 @@ create_stream_for_sink(struct drm_connector *connector,
 	return stream;
 }
 
+/**
+ * amdgpu_dm_connector_detect() - Detect whether a DRM connector is connected to a display
+ *
+ * A connector is considered connected when it has a sink that is not NULL.
+ * For connectors that support HPD (hotplug detection), the connection is
+ * handled in the HPD interrupt.
+ *
+ * Notes:
+ * 1. This interface is NOT called in context of HPD irq.
+ * 2. This interface *is called* in context of user-mode ioctl. Which
+ *    makes it a bad place for *any* MST-related activity.
+ */
 static enum drm_connector_status
 amdgpu_dm_connector_detect(struct drm_connector *connector, bool force)
 {
-	bool connected;
 	struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 
-	/*
-	 * Notes:
-	 * 1. This interface is NOT called in context of HPD irq.
-	 * 2. This interface *is called* in context of user-mode ioctl. Which
-	 * makes it a bad place for *any* MST-related activity.
-	 */
-
-	if (aconnector->base.force == DRM_FORCE_UNSPECIFIED &&
-	    !aconnector->fake_enable)
-		connected = (aconnector->dc_sink != NULL);
-	else
-		connected = (aconnector->base.force == DRM_FORCE_ON ||
-				aconnector->base.force == DRM_FORCE_ON_DIGITAL);
-
 	update_subconnector_property(aconnector);
 
-	return (connected ? connector_status_connected :
+	if (aconnector->base.force == DRM_FORCE_ON ||
+		aconnector->base.force == DRM_FORCE_ON_DIGITAL)
+		return connector_status_connected;
+	else if (aconnector->base.force == DRM_FORCE_OFF)
+		return connector_status_disconnected;
+
+	return (aconnector->dc_sink ? connector_status_connected :
 			connector_status_disconnected);
 }
 
-- 
2.51.0

[PATCH 16/23] drm/amd/display: Poll analog connectors (v2)

[Timur Kristóf]

VGA connectors don't support any hotplug detection, so the kernel
needs to periodically poll them to see if a display is connected.

DVI-I connectors have hotplug detection for digital signals, and
some analog DVI cables pull up that pin to work with that.
However, in general not all DVI cables do this so we can't rely on
this feature, therefore we need to poll DVI-I connectors as well.

v2:
Call drm_kms_helper_poll_fini in amdgpu_dm_hpd_fini.
Disable/enable polling on suspend/resume.
Don't call full link detection when already connected.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 73 ++++++++++++++++++-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 20 +++++
 2 files changed, 91 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index cdc6112e5875..07cfd9cae0df 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3768,7 +3768,9 @@ void amdgpu_dm_update_connector_after_detect(
 	drm_dbg_kms(dev, "DCHPD: connector_id=%d: Old sink=%p New sink=%p\n",
 		    aconnector->connector_id, aconnector->dc_sink, sink);
 
-	guard(mutex)(&dev->mode_config.mutex);
+	/* When polling, DRM has already locked the mutex for us. */
+	if (!drm_kms_helper_is_poll_worker())
+		mutex_lock(&dev->mode_config.mutex);
 
 	/*
 	 * 1. Update status of the drm connector
@@ -3831,6 +3833,10 @@ void amdgpu_dm_update_connector_after_detect(
 	}
 
 	update_subconnector_property(aconnector);
+
+	/* When polling, the mutex will be unlocked for us by DRM. */
+	if (!drm_kms_helper_is_poll_worker())
+		mutex_unlock(&dev->mode_config.mutex);
 }
 
 static void handle_hpd_irq_helper(struct amdgpu_dm_connector *aconnector)
@@ -7123,12 +7129,63 @@ create_stream_for_sink(struct drm_connector *connector,
 	return stream;
 }
 
+/**
+ * amdgpu_dm_connector_poll() - Poll a connector to see if it's connected to a display
+ *
+ * Used for connectors that don't support HPD (hotplug detection)
+ * to periodically checked whether the connector is connected to a display.
+ */
+static enum drm_connector_status
+amdgpu_dm_connector_poll(struct amdgpu_dm_connector *aconnector, bool force)
+{
+	struct drm_connector *connector = &aconnector->base;
+	struct drm_device *dev = connector->dev;
+	struct amdgpu_device *adev = drm_to_adev(dev);
+	struct dc_link *link = aconnector->dc_link;
+	enum dc_connection_type conn_type = dc_connection_none;
+	enum drm_connector_status status = connector_status_disconnected;
+
+	mutex_lock(&aconnector->hpd_lock);
+
+	if (dc_link_detect_connection_type(aconnector->dc_link, &conn_type) &&
+	    conn_type != dc_connection_none) {
+		mutex_lock(&adev->dm.dc_lock);
+
+		/* Only call full link detection when a sink isn't created yet,
+		 * ie. just when the display is plugged in, otherwise we risk flickering.
+		 */
+		if (link->local_sink ||
+			dc_link_detect(link, DETECT_REASON_HPD))
+			status = connector_status_connected;
+
+		mutex_unlock(&adev->dm.dc_lock);
+	}
+
+	if (connector->status != status) {
+		if (status == connector_status_disconnected) {
+			if (link->local_sink)
+				dc_sink_release(link->local_sink);
+
+			link->local_sink = NULL;
+			link->dpcd_sink_count = 0;
+			link->type = dc_connection_none;
+		}
+
+		amdgpu_dm_update_connector_after_detect(aconnector);
+	}
+
+	mutex_unlock(&aconnector->hpd_lock);
+	return status;
+}
+
 /**
  * amdgpu_dm_connector_detect() - Detect whether a DRM connector is connected to a display
  *
  * A connector is considered connected when it has a sink that is not NULL.
  * For connectors that support HPD (hotplug detection), the connection is
  * handled in the HPD interrupt.
+ * For connectors that may not support HPD, such as analog connectors,
+ * DRM will call this function repeatedly to poll them.
  *
  * Notes:
  * 1. This interface is NOT called in context of HPD irq.
@@ -7148,6 +7205,14 @@ amdgpu_dm_connector_detect(struct drm_connector *connector, bool force)
 	else if (aconnector->base.force == DRM_FORCE_OFF)
 		return connector_status_disconnected;
 
+	/* Poll analog connectors and only when either
+	 * disconnected or connected to an analog display.
+	 */
+	if (drm_kms_helper_is_poll_worker() &&
+		dc_connector_supports_analog(aconnector->dc_link->link_id.id) &&
+		(!aconnector->dc_sink || aconnector->dc_sink->edid_caps.analog))
+		return amdgpu_dm_connector_poll(aconnector, force);
+
 	return (aconnector->dc_sink ? connector_status_connected :
 			connector_status_disconnected);
 }
@@ -8545,9 +8610,13 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm,
 			link->link_enc->features.dp_ycbcr420_supported ? true : false;
 		break;
 	case DRM_MODE_CONNECTOR_DVID:
-	case DRM_MODE_CONNECTOR_DVII:
 		aconnector->base.polled = DRM_CONNECTOR_POLL_HPD;
 		break;
+	case DRM_MODE_CONNECTOR_DVII:
+	case DRM_MODE_CONNECTOR_VGA:
+		aconnector->base.polled =
+			DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
+		break;
 	default:
 		break;
 	}
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
index a1c722112c22..61b0bf7b8269 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
@@ -476,6 +476,7 @@ void amdgpu_dm_irq_fini(struct amdgpu_device *adev)
 
 void amdgpu_dm_irq_suspend(struct amdgpu_device *adev)
 {
+	struct drm_device *dev = adev_to_drm(adev);
 	int src;
 	struct list_head *hnd_list_h;
 	struct list_head *hnd_list_l;
@@ -512,6 +513,9 @@ void amdgpu_dm_irq_suspend(struct amdgpu_device *adev)
 	}
 
 	DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags);
+
+	if (dev->mode_config.poll_enabled)
+		drm_kms_helper_poll_disable(dev);
 }
 
 void amdgpu_dm_irq_resume_early(struct amdgpu_device *adev)
@@ -537,6 +541,7 @@ void amdgpu_dm_irq_resume_early(struct amdgpu_device *adev)
 
 void amdgpu_dm_irq_resume_late(struct amdgpu_device *adev)
 {
+	struct drm_device *dev = adev_to_drm(adev);
 	int src;
 	struct list_head *hnd_list_h, *hnd_list_l;
 	unsigned long irq_table_flags;
@@ -557,6 +562,9 @@ void amdgpu_dm_irq_resume_late(struct amdgpu_device *adev)
 	}
 
 	DM_IRQ_TABLE_UNLOCK(adev, irq_table_flags);
+
+	if (dev->mode_config.poll_enabled)
+		drm_kms_helper_poll_enable(dev);
 }
 
 /*
@@ -893,6 +901,7 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev)
 	struct drm_connector_list_iter iter;
 	int irq_type;
 	int i;
+	bool use_polling = false;
 
 	/* First, clear all hpd and hpdrx interrupts */
 	for (i = DC_IRQ_SOURCE_HPD1; i <= DC_IRQ_SOURCE_HPD6RX; i++) {
@@ -906,6 +915,8 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev)
 		struct amdgpu_dm_connector *amdgpu_dm_connector;
 		const struct dc_link *dc_link;
 
+		use_polling |= connector->polled != DRM_CONNECTOR_POLL_HPD;
+
 		if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
 			continue;
 
@@ -947,6 +958,9 @@ void amdgpu_dm_hpd_init(struct amdgpu_device *adev)
 		}
 	}
 	drm_connector_list_iter_end(&iter);
+
+	if (use_polling)
+		drm_kms_helper_poll_init(dev);
 }
 
 /**
@@ -963,12 +977,15 @@ void amdgpu_dm_hpd_fini(struct amdgpu_device *adev)
 	struct drm_connector *connector;
 	struct drm_connector_list_iter iter;
 	int irq_type;
+	bool use_polling = false;
 
 	drm_connector_list_iter_begin(dev, &iter);
 	drm_for_each_connector_iter(connector, &iter) {
 		struct amdgpu_dm_connector *amdgpu_dm_connector;
 		const struct dc_link *dc_link;
 
+		use_polling |= connector->polled != DRM_CONNECTOR_POLL_HPD;
+
 		if (connector->connector_type == DRM_MODE_CONNECTOR_WRITEBACK)
 			continue;
 
@@ -997,4 +1014,7 @@ void amdgpu_dm_hpd_fini(struct amdgpu_device *adev)
 		}
 	}
 	drm_connector_list_iter_end(&iter);
+
+	if (dev->mode_config.poll_enabled)
+		drm_kms_helper_poll_fini(dev);
 }
-- 
2.51.0

[PATCH 17/23] drm/amd/display: Add DCE BIOS_SCRATCH_0 register

[Timur Kristóf]

The BIOS uses this register to write the results of the
DAC_LoadDetection command, so we'll need to read this
in order to make DAC load detection work.

As a reference, I used the mmBIOS_SCRATCH_0 definition from
the amdgpu legacy display code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/dc/dc_bios_types.h                  | 1 +
 .../gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c    | 2 ++
 .../gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c    | 2 ++
 .../gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c    | 2 ++
 .../gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c    | 1 +
 drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c  | 2 ++
 drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c  | 2 ++
 7 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 545ce1e15eae..50c8906b74c5 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -168,6 +168,7 @@ struct dc_vbios_funcs {
 };
 
 struct bios_registers {
+	uint32_t BIOS_SCRATCH_0;
 	uint32_t BIOS_SCRATCH_3;
 	uint32_t BIOS_SCRATCH_6;
 };
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
index 075815e4041a..891416e0423f 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c
@@ -78,6 +78,7 @@
 #endif
 
 #ifndef mmBIOS_SCRATCH_2
+	#define mmBIOS_SCRATCH_0 0x05C9
 	#define mmBIOS_SCRATCH_2 0x05CB
 	#define mmBIOS_SCRATCH_3 0x05CC
 	#define mmBIOS_SCRATCH_6 0x05CF
@@ -369,6 +370,7 @@ static const struct dce_abm_mask abm_mask = {
 #define DCFE_MEM_PWR_CTRL_REG_BASE 0x1b03
 
 static const struct bios_registers bios_regs = {
+	.BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
 	.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
 	.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
index cccde5a6f3cd..42b0068b1c05 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c
@@ -82,6 +82,7 @@
 #endif
 
 #ifndef mmBIOS_SCRATCH_2
+	#define mmBIOS_SCRATCH_0 0x05C9
 	#define mmBIOS_SCRATCH_2 0x05CB
 	#define mmBIOS_SCRATCH_3 0x05CC
 	#define mmBIOS_SCRATCH_6 0x05CF
@@ -377,6 +378,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+	.BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
 	.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
 	.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
index 869a8e515fc0..328d784ac4c8 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
@@ -76,6 +76,7 @@
 #endif
 
 #ifndef mmBIOS_SCRATCH_2
+	#define mmBIOS_SCRATCH_0 0x05C9
 	#define mmBIOS_SCRATCH_2 0x05CB
 	#define mmBIOS_SCRATCH_3 0x05CC
 	#define mmBIOS_SCRATCH_6 0x05CF
@@ -385,6 +386,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+	.BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
 	.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
 	.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
index 540e04ec1e2d..efc92381c98d 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
@@ -491,6 +491,7 @@ static struct dce_i2c_hw *dce120_i2c_hw_create(
 	return dce_i2c_hw;
 }
 static const struct bios_registers bios_regs = {
+	.BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0 + NBIO_BASE(mmBIOS_SCRATCH_0_BASE_IDX),
 	.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3 + NBIO_BASE(mmBIOS_SCRATCH_3_BASE_IDX),
 	.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6 + NBIO_BASE(mmBIOS_SCRATCH_6_BASE_IDX)
 };
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
index 5fa84c622282..1077c59cad39 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c
@@ -80,6 +80,7 @@
 
 
 #ifndef mmBIOS_SCRATCH_2
+	#define mmBIOS_SCRATCH_0 0x05C9
 	#define mmBIOS_SCRATCH_2 0x05CB
 	#define mmBIOS_SCRATCH_3 0x05CC
 	#define mmBIOS_SCRATCH_6 0x05CF
@@ -368,6 +369,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+	.BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
 	.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
 	.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
index 902209a17fe4..e10e70360d0a 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c
@@ -78,6 +78,7 @@
 
 
 #ifndef mmBIOS_SCRATCH_2
+	#define mmBIOS_SCRATCH_0 0x05C9
 	#define mmBIOS_SCRATCH_2 0x05CB
 	#define mmBIOS_SCRATCH_3 0x05CC
 	#define mmBIOS_SCRATCH_6 0x05CF
@@ -369,6 +370,7 @@ static const struct dce110_clk_src_mask cs_mask = {
 };
 
 static const struct bios_registers bios_regs = {
+	.BIOS_SCRATCH_0 = mmBIOS_SCRATCH_0,
 	.BIOS_SCRATCH_3 = mmBIOS_SCRATCH_3,
 	.BIOS_SCRATCH_6 = mmBIOS_SCRATCH_6
 };
-- 
2.51.0

[PATCH 18/23] drm/amd/display: Make get_support_mask_for_device_id reusable

[Timur Kristóf]

This will be reused by DAC load detection.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index 33d0ec38ded7..a126ca3a53fb 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -67,7 +67,9 @@ static ATOM_HPD_INT_RECORD *get_hpd_record(struct bios_parser *bp,
 	ATOM_OBJECT *object);
 static struct device_id device_type_from_device_id(uint16_t device_id);
 static uint32_t signal_to_ss_id(enum as_signal_type signal);
-static uint32_t get_support_mask_for_device_id(struct device_id device_id);
+static uint32_t get_support_mask_for_device_id(
+	enum dal_device_type device_type,
+	uint32_t enum_id);
 static ATOM_ENCODER_CAP_RECORD_V2 *get_encoder_cap_record(
 	struct bios_parser *bp,
 	ATOM_OBJECT *object);
@@ -888,7 +890,7 @@ static bool bios_parser_is_device_id_supported(
 {
 	struct bios_parser *bp = BP_FROM_DCB(dcb);
 
-	uint32_t mask = get_support_mask_for_device_id(id);
+	uint32_t mask = get_support_mask_for_device_id(id.device_type, id.enum_id);
 
 	return (le16_to_cpu(bp->object_info_tbl.v1_1->usDeviceSupport) & mask) != 0;
 }
@@ -2179,11 +2181,10 @@ static uint32_t signal_to_ss_id(enum as_signal_type signal)
 	return clk_id_ss;
 }
 
-static uint32_t get_support_mask_for_device_id(struct device_id device_id)
+static uint32_t get_support_mask_for_device_id(
+	enum dal_device_type device_type,
+	uint32_t enum_id)
 {
-	enum dal_device_type device_type = device_id.device_type;
-	uint32_t enum_id = device_id.enum_id;
-
 	switch (device_type) {
 	case DEVICE_TYPE_LCD:
 		switch (enum_id) {
-- 
2.51.0

[PATCH 19/23] drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)

[Timur Kristóf]

DAC_LoadDetection can be used to determine whether something
is connected to an analog connector by determining if there is
an analog load. This causes visible flickering on displays, so
we only resort to using this when the connected display doesn't
have an EDID.

For reference, see the legacy display code:
amdgpu_atombios_encoder_dac_load_detect

v2:
Only clear corresponding bit from BIOS_SCRATCH_0.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/dc/bios/bios_parser.c | 50 ++++++++++
 .../drm/amd/display/dc/bios/command_table.c   | 92 +++++++++++++++++++
 .../drm/amd/display/dc/bios/command_table.h   |  3 +
 .../gpu/drm/amd/display/dc/dc_bios_types.h    |  5 +
 .../amd/display/include/bios_parser_types.h   |  5 +
 5 files changed, 155 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index a126ca3a53fb..4120d6c4c5e4 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -780,6 +780,54 @@ static enum bp_result bios_parser_encoder_control(
 	return bp->cmd_tbl.dig_encoder_control(bp, cntl);
 }
 
+static enum bp_result bios_parser_dac_load_detection(
+	struct dc_bios *dcb,
+	enum engine_id engine_id,
+	enum dal_device_type device_type,
+	uint32_t enum_id)
+{
+	struct bios_parser *bp = BP_FROM_DCB(dcb);
+	struct dc_context *ctx = dcb->ctx;
+	struct bp_load_detection_parameters bp_params = {0};
+	enum bp_result bp_result;
+	uint32_t bios_0_scratch;
+	uint32_t device_id_mask = 0;
+
+	bp_params.engine_id = engine_id;
+	bp_params.device_id = get_support_mask_for_device_id(device_type, enum_id);
+
+	if (engine_id != ENGINE_ID_DACA &&
+	    engine_id != ENGINE_ID_DACB)
+		return BP_RESULT_UNSUPPORTED;
+
+	if (!bp->cmd_tbl.dac_load_detection)
+		return BP_RESULT_UNSUPPORTED;
+
+	if (bp_params.device_id == ATOM_DEVICE_CRT1_SUPPORT)
+		device_id_mask = ATOM_S0_CRT1_MASK;
+	else if (bp_params.device_id == ATOM_DEVICE_CRT1_SUPPORT)
+		device_id_mask = ATOM_S0_CRT2_MASK;
+	else
+		return BP_RESULT_UNSUPPORTED;
+
+	/* BIOS will write the detected devices to BIOS_SCRATCH_0, clear corresponding bit */
+	bios_0_scratch = dm_read_reg(ctx, bp->base.regs->BIOS_SCRATCH_0);
+	bios_0_scratch &= ~device_id_mask;
+	dm_write_reg(ctx, bp->base.regs->BIOS_SCRATCH_0, bios_0_scratch);
+
+	bp_result = bp->cmd_tbl.dac_load_detection(bp, &bp_params);
+
+	if (bp_result != BP_RESULT_OK)
+		return bp_result;
+
+	bios_0_scratch = dm_read_reg(ctx, bp->base.regs->BIOS_SCRATCH_0);
+
+	if (bios_0_scratch & device_id_mask)
+		return BP_RESULT_OK;
+
+	return BP_RESULT_FAILURE;
+}
+
 static enum bp_result bios_parser_adjust_pixel_clock(
 	struct dc_bios *dcb,
 	struct bp_adjust_pixel_clock_parameters *bp_params)
@@ -2864,6 +2912,8 @@ static const struct dc_vbios_funcs vbios_funcs = {
 
 	.encoder_control = bios_parser_encoder_control,
 
+	.dac_load_detection = bios_parser_dac_load_detection,
+
 	.transmitter_control = bios_parser_transmitter_control,
 
 	.enable_crtc = bios_parser_enable_crtc,
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c
index dbd84477ceb7..22457f417e65 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c
@@ -54,6 +54,7 @@ static void init_enable_spread_spectrum_on_ppll(struct bios_parser *bp);
 static void init_adjust_display_pll(struct bios_parser *bp);
 static void init_select_crtc_source(struct bios_parser *bp);
 static void init_dac_encoder_control(struct bios_parser *bp);
+static void init_dac_load_detection(struct bios_parser *bp);
 static void init_dac_output_control(struct bios_parser *bp);
 static void init_set_crtc_timing(struct bios_parser *bp);
 static void init_enable_crtc(struct bios_parser *bp);
@@ -72,6 +73,7 @@ void dal_bios_parser_init_cmd_tbl(struct bios_parser *bp)
 	init_adjust_display_pll(bp);
 	init_select_crtc_source(bp);
 	init_dac_encoder_control(bp);
+	init_dac_load_detection(bp);
 	init_dac_output_control(bp);
 	init_set_crtc_timing(bp);
 	init_enable_crtc(bp);
@@ -1902,6 +1904,96 @@ static enum bp_result dac2_encoder_control_v1(
 	return result;
 }
 
+/*******************************************************************************
+ ********************************************************************************
+ **
+ **                  DAC LOAD DETECTION
+ **
+ ********************************************************************************
+ *******************************************************************************/
+
+static enum bp_result dac_load_detection_v1(
+	struct bios_parser *bp,
+	struct bp_load_detection_parameters *bp_params);
+
+static enum bp_result dac_load_detection_v3(
+	struct bios_parser *bp,
+	struct bp_load_detection_parameters *bp_params);
+
+static void init_dac_load_detection(struct bios_parser *bp)
+{
+	switch (BIOS_CMD_TABLE_PARA_REVISION(DAC_LoadDetection)) {
+	case 1:
+	case 2:
+		bp->cmd_tbl.dac_load_detection = dac_load_detection_v1;
+		break;
+	case 3:
+	default:
+		bp->cmd_tbl.dac_load_detection = dac_load_detection_v3;
+		break;
+	}
+}
+
+static void dac_load_detect_prepare_params(
+	struct _DAC_LOAD_DETECTION_PS_ALLOCATION *params,
+	enum engine_id engine_id,
+	uint16_t device_id,
+	uint8_t misc)
+{
+	uint8_t dac_type = ENGINE_ID_DACA;
+
+	if (engine_id == ENGINE_ID_DACB)
+		dac_type = ATOM_DAC_B;
+
+	params->sDacload.usDeviceID = cpu_to_le16(device_id);
+	params->sDacload.ucDacType = dac_type;
+	params->sDacload.ucMisc = misc;
+}
+
+static enum bp_result dac_load_detection_v1(
+	struct bios_parser *bp,
+	struct bp_load_detection_parameters *bp_params)
+{
+	enum bp_result result = BP_RESULT_FAILURE;
+	DAC_LOAD_DETECTION_PS_ALLOCATION params;
+
+	dac_load_detect_prepare_params(
+		&params,
+		bp_params->engine_id,
+		bp_params->device_id,
+		0);
+
+	if (EXEC_BIOS_CMD_TABLE(DAC_LoadDetection, params))
+		result = BP_RESULT_OK;
+
+	return result;
+}
+
+static enum bp_result dac_load_detection_v3(
+	struct bios_parser *bp,
+	struct bp_load_detection_parameters *bp_params)
+{
+	enum bp_result result = BP_RESULT_FAILURE;
+	DAC_LOAD_DETECTION_PS_ALLOCATION params;
+
+	uint8_t misc = 0;
+
+	if (bp_params->device_id == ATOM_DEVICE_CV_SUPPORT ||
+	    bp_params->device_id == ATOM_DEVICE_TV1_SUPPORT)
+		misc = DAC_LOAD_MISC_YPrPb;
+
+	dac_load_detect_prepare_params(
+		&params,
+		bp_params->engine_id,
+		bp_params->device_id,
+		misc);
+
+	if (EXEC_BIOS_CMD_TABLE(DAC_LoadDetection, params))
+		result = BP_RESULT_OK;
+
+	return result;
+}
+
 /*******************************************************************************
  ********************************************************************************
  **
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.h b/drivers/gpu/drm/amd/display/dc/bios/command_table.h
index 8b04b903e93d..e89b1ba0048b 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table.h
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.h
@@ -71,6 +71,9 @@ struct cmd_tbl {
 	enum bp_result (*dac2_output_control)(
 		struct bios_parser *bp,
 		bool enable);
+	enum bp_result (*dac_load_detection)(
+		struct bios_parser *bp,
+		struct bp_load_detection_parameters *bp_params);
 	enum bp_result (*set_crtc_timing)(
 		struct bios_parser *bp,
 		struct bp_hw_crtc_timing_parameters *bp_params);
diff --git a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
index 50c8906b74c5..40d7a7d83c40 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_bios_types.h
@@ -97,6 +97,11 @@ struct dc_vbios_funcs {
 	enum bp_result (*encoder_control)(
 		struct dc_bios *bios,
 		struct bp_encoder_control *cntl);
+	enum bp_result (*dac_load_detection)(
+		struct dc_bios *bios,
+		enum engine_id engine_id,
+		enum dal_device_type device_type,
+		uint32_t enum_id);
 	enum bp_result (*transmitter_control)(
 		struct dc_bios *bios,
 		struct bp_transmitter_control *cntl);
diff --git a/drivers/gpu/drm/amd/display/include/bios_parser_types.h b/drivers/gpu/drm/amd/display/include/bios_parser_types.h
index d9e58a6a0d36..973b6bdbac63 100644
--- a/drivers/gpu/drm/amd/display/include/bios_parser_types.h
+++ b/drivers/gpu/drm/amd/display/include/bios_parser_types.h
@@ -162,6 +162,11 @@ struct bp_transmitter_control {
 	bool single_pll_mode;
 };
 
+struct bp_load_detection_parameters {
+	enum engine_id engine_id;
+	uint16_t device_id;
+};
+
 struct bp_hw_crtc_timing_parameters {
 	enum controller_id controller_id;
 	/* horizontal part */
-- 
2.51.0

[PATCH 20/23] drm/amd/display: Use DAC load detection on analog connectors (v2)

[Timur Kristóf]

This feature is useful for analog connections without EDID:
- Really old monitors with a VGA connector
- Cheap DVI/VGA adapters that don't connect DDC pins

When a connection is established through DAC load detection,
the driver is supposed to fill in the supported modes for the
display, which we already do in amdgpu_dm_connector_get_modes.

Also, because the load detection causes visible glitches, do not
attempt to poll the connector again after it was detected this
way. Note that it will still be polled after sleep/resume or
when force is enabled, which is okay.

v2:
Add dc_connection_dac_load connection type.
Properly release sink when no display is connected.
Don't print error when EDID isn't read from an analog display.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 +++
 drivers/gpu/drm/amd/display/dc/dc_types.h     |  3 +-
 .../drm/amd/display/dc/link/link_detection.c  | 61 ++++++++++++++++++-
 3 files changed, 72 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 07cfd9cae0df..09248ac2f37d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7145,6 +7145,16 @@ amdgpu_dm_connector_poll(struct amdgpu_dm_connector *aconnector, bool force)
 	enum dc_connection_type conn_type = dc_connection_none;
 	enum drm_connector_status status = connector_status_disconnected;
 
+	/* When we determined the connection using DAC load detection,
+	 * do NOT poll the connector do detect disconnect because
+	 * that would run DAC load detection again which can cause
+	 * visible visual glitches.
+	 *
+	 * Only allow to poll such a connector again when forcing.
+	 */
+	if (!force && link->local_sink && link->type == dc_connection_dac_load)
+		return connector->status;
+
 	mutex_lock(&aconnector->hpd_lock);
 
 	if (dc_link_detect_connection_type(aconnector->dc_link, &conn_type) &&
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index d948cdb98ea8..e0157a91a950 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -352,7 +352,8 @@ enum dc_connection_type {
 	dc_connection_none,
 	dc_connection_single,
 	dc_connection_mst_branch,
-	dc_connection_sst_branch
+	dc_connection_sst_branch,
+	dc_connection_dac_load
 };
 
 struct dc_csc_adjustments {
diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
index 2ad4862ad659..da54f696dafd 100644
--- a/drivers/gpu/drm/amd/display/dc/link/link_detection.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
@@ -900,6 +900,37 @@ static bool link_detect_ddc_probe(struct dc_link *link)
 	return true;
 }
 
+/**
+ * link_detect_dac_load_detect() - Performs DAC load detection.
+ *
+ * Load detection can be used to detect the presence of an
+ * analog display when we can't read DDC. This causes a visible
+ * visual glitch so it should be used sparingly.
+ */
+static bool link_detect_dac_load_detect(struct dc_link *link)
+{
+	struct dc_bios *bios = link->ctx->dc_bios;
+	struct link_encoder *link_enc = link->link_enc;
+	enum engine_id engine_id = link_enc->preferred_engine;
+	enum dal_device_type device_type = DEVICE_TYPE_CRT;
+	enum bp_result bp_result;
+	uint32_t enum_id;
+
+	switch (engine_id) {
+	case ENGINE_ID_DACB:
+		enum_id = 2;
+		break;
+	case ENGINE_ID_DACA:
+	default:
+		engine_id = ENGINE_ID_DACA;
+		enum_id = 1;
+		break;
+	}
+
+	bp_result = bios->funcs->dac_load_detection(bios, engine_id, device_type, enum_id);
+	return bp_result == BP_RESULT_OK;
+}
+
 /*
  * detect_link_and_local_sink() - Detect if a sink is attached to a given link
  *
@@ -1114,7 +1145,30 @@ static bool detect_link_and_local_sink(struct dc_link *link,
 			DC_LOG_ERROR("Partial EDID valid, abandon invalid blocks.\n");
 			break;
 		case EDID_NO_RESPONSE:
+			/* Analog connectors without EDID:
+			 * - old monitor that actually doesn't have EDID
+			 * - cheap DVI-A cable or adapter that doesn't connect DDC
+			 */
+			if (dc_connector_supports_analog(link->link_id.id)) {
+				/* If we didn't do DAC load detection yet, do it now
+				 * to verify there really is a display connected.
+				 */
+				if (link->type != dc_connection_dac_load &&
+					!link_detect_dac_load_detect(link)) {
+					if (prev_sink)
+						dc_sink_release(prev_sink);
+					link_disconnect_sink(link);
+					return false;
+				}
+
+				DC_LOG_INFO("%s detected analog display without EDID\n", __func__);
+				link->type = dc_connection_dac_load;
+				sink->edid_caps.analog = true;
+				break;
+			}
+
 			DC_LOG_ERROR("No EDID read.\n");
+
 			/*
 			 * Abort detection for non-DP connectors if we have
 			 * no EDID
@@ -1303,6 +1357,11 @@ static bool link_detect_analog(struct dc_link *link, enum dc_connection_type *ty
 		return true;
 	}
 
+	if (link_detect_dac_load_detect(link)) {
+		*type = dc_connection_dac_load;
+		return true;
+	}
+
 	*type = dc_connection_none;
 	return true;
 }
@@ -1324,7 +1383,7 @@ bool link_detect_connection_type(struct dc_link *link, enum dc_connection_type *
 	}
 
 	/* Ignore the HPD pin (if any) for analog connectors.
-	 * Instead rely on DDC.
+	 * Instead rely on DDC and DAC.
 	 *
 	 * - VGA connectors don't have any HPD at all.
 	 * - Some DVI-A cables don't connect the HPD pin.
-- 
2.51.0

[PATCH 21/23] drm/amd/display: Add common modes to analog displays without EDID

[Timur Kristóf]

When the EDID of an analog display is not available, we can't
know the possible modes supported by the display. However, we
still need to offer the user to select from a variety of common
modes. It will be up to the user to select the best one, though.

This is how it works on other operating systems as well as the
legacy display code path in amdgpu.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 46 +++++++++++--------
 1 file changed, 28 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 09248ac2f37d..2773436d49d1 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8282,7 +8282,7 @@ static void amdgpu_dm_get_native_mode(struct drm_connector *connector)
 
 static struct drm_display_mode *
 amdgpu_dm_create_common_mode(struct drm_encoder *encoder,
-			     char *name,
+			     const char *name,
 			     int hdisplay, int vdisplay)
 {
 	struct drm_device *dev = encoder->dev;
@@ -8304,6 +8304,24 @@ amdgpu_dm_create_common_mode(struct drm_encoder *encoder,
 
 }
 
+static const struct amdgpu_dm_mode_size {
+	char name[DRM_DISPLAY_MODE_LEN];
+	int w;
+	int h;
+} common_modes[] = {
+	{  "640x480",  640,  480},
+	{  "800x600",  800,  600},
+	{ "1024x768", 1024,  768},
+	{ "1280x720", 1280,  720},
+	{ "1280x800", 1280,  800},
+	{"1280x1024", 1280, 1024},
+	{ "1440x900", 1440,  900},
+	{"1680x1050", 1680, 1050},
+	{"1600x1200", 1600, 1200},
+	{"1920x1080", 1920, 1080},
+	{"1920x1200", 1920, 1200}
+};
+
 static void amdgpu_dm_connector_add_common_modes(struct drm_encoder *encoder,
 						 struct drm_connector *connector)
 {
@@ -8314,23 +8332,6 @@ static void amdgpu_dm_connector_add_common_modes(struct drm_encoder *encoder,
 				to_amdgpu_dm_connector(connector);
 	int i;
 	int n;
-	struct mode_size {
-		char name[DRM_DISPLAY_MODE_LEN];
-		int w;
-		int h;
-	} common_modes[] = {
-		{  "640x480",  640,  480},
-		{  "800x600",  800,  600},
-		{ "1024x768", 1024,  768},
-		{ "1280x720", 1280,  720},
-		{ "1280x800", 1280,  800},
-		{"1280x1024", 1280, 1024},
-		{ "1440x900", 1440,  900},
-		{"1680x1050", 1680, 1050},
-		{"1600x1200", 1600, 1200},
-		{"1920x1080", 1920, 1080},
-		{"1920x1200", 1920, 1200}
-	};
 
 	if ((connector->connector_type != DRM_MODE_CONNECTOR_eDP) &&
 	    (connector->connector_type != DRM_MODE_CONNECTOR_LVDS))
@@ -8554,6 +8555,15 @@ static int amdgpu_dm_connector_get_modes(struct drm_connector *connector)
 		if (dc->link_srv->dp_get_encoding_format(verified_link_cap) == DP_128b_132b_ENCODING)
 			amdgpu_dm_connector->num_modes +=
 				drm_add_modes_noedid(connector, 1920, 1080);
+
+		if (amdgpu_dm_connector->dc_sink->edid_caps.analog) {
+			/* Analog monitor connected by DAC load detection.
+			 * Add common modes. It will be up to the user to select one that works.
+			 */
+			for (int i = 0; i < ARRAY_SIZE(common_modes); i++)
+				amdgpu_dm_connector->num_modes += drm_add_modes_noedid(
+					connector, common_modes[i].w, common_modes[i].h);
+		}
 	} else {
 		amdgpu_dm_connector_ddc_get_modes(connector, drm_edid);
 		if (encoder)
-- 
2.51.0

[PATCH 22/23] drm/amd/display: Don't add freesync modes to analog displays (v2)

[Timur Kristóf]

VRR is not supported on analog signals.
Don't add freesync modes to analog displays or when
VRR is unsupported by DC.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2773436d49d1..7dd8baf49460 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8532,6 +8532,10 @@ static void amdgpu_dm_connector_add_freesync_modes(struct drm_connector *connect
 	if (!(amdgpu_freesync_vid_mode && drm_edid))
 		return;
 
+	if (!amdgpu_dm_connector->dc_sink || amdgpu_dm_connector->dc_sink->edid_caps.analog ||
+		!dc_supports_vrr(amdgpu_dm_connector->dc_sink->ctx->dce_version))
+		return;
+
 	if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10)
 		amdgpu_dm_connector->num_modes +=
 			add_fs_modes(amdgpu_dm_connector);
-- 
2.51.0

[PATCH 23/23] drm/amdgpu: Use DC by default for Bonaire

[Timur Kristóf]

Now that DC supports analog connectors, there is nothing stopping
us from using it by default on Bonaire.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a77000c2e0bb..6fe715da88e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4184,7 +4184,6 @@ bool amdgpu_device_asic_has_dc_support(struct pci_dev *pdev,
 #else
 		return false;
 #endif
-	case CHIP_BONAIRE:
 	case CHIP_KAVERI:
 	case CHIP_KABINI:
 	case CHIP_MULLINS:
-- 
2.51.0

Re: [PATCH 13/23] drm/amd/display: Support DAC in dce110_hwseq

[Harry Wentland]

On 2025-09-26 14:01, Timur Kristóf wrote:
> The dce110_hwseq is used by all DCE hardware,
> so add the DAC support here.
> 
> When enabling/disabling a stream for a RGB signal,
> this will call the VBIOS to enable/disable the DAC.
> Additionally, when applying the controller context,
> call SelectCRTC_Source from VBIOS in order to
> direct the CRTC output to the DAC.
> 
> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
> ---
>  .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 75 ++++++++++++++++++-
>  1 file changed, 73 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
> index 24184b4eb352..975913375d05 100644
> --- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
> @@ -659,6 +659,20 @@ void dce110_update_info_frame(struct pipe_ctx *pipe_ctx)
>  	}
>  }
>  
> +static void
> +dce110_dac_encoder_control(struct pipe_ctx *pipe_ctx, bool enable)
> +{
> +	struct dc_link *link = pipe_ctx->stream->link;
> +	struct dc_bios *bios = link->ctx->dc_bios;
> +	struct bp_encoder_control encoder_control = {0};
> +
> +	encoder_control.action = enable ? ENCODER_CONTROL_ENABLE : ENCODER_CONTROL_DISABLE;
> +	encoder_control.engine_id = link->link_enc->analog_engine;
> +	encoder_control.pixel_clock = pipe_ctx->stream->timing.pix_clk_100hz / 10;
> +
> +	bios->funcs->encoder_control(bios, &encoder_control);
> +}
> +
>  void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
>  {
>  	enum dc_lane_count lane_count =
> @@ -689,6 +703,9 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
>  		early_control = lane_count;
>  
>  	tg->funcs->set_early_control(tg, early_control);
> +
> +	if (dc_is_rgb_signal(pipe_ctx->stream->signal))
> +		dce110_dac_encoder_control(pipe_ctx, true);
>  }
>  
>  static enum bp_result link_transmitter_control(
> @@ -1176,7 +1193,8 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
>  		pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(
>  			pipe_ctx->stream_res.stream_enc);
>  
> -	dc->hwss.disable_audio_stream(pipe_ctx);
> +	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
> +		dc->hwss.disable_audio_stream(pipe_ctx);

Nit: this hunk would fit better in Patch 7.

Harry

>  
>  	link_hwss->reset_stream_encoder(pipe_ctx);
>  
> @@ -1196,6 +1214,9 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
>  		dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
>  					       link_enc->transmitter - TRANSMITTER_UNIPHY_A);
>  	}
> +
> +	if (dc_is_rgb_signal(pipe_ctx->stream->signal))
> +		dce110_dac_encoder_control(pipe_ctx, false);
>  }
>  
>  void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
> @@ -1581,6 +1602,51 @@ static enum dc_status dce110_enable_stream_timing(
>  	return DC_OK;
>  }
>  
> +static void
> +dce110_select_crtc_source(struct pipe_ctx *pipe_ctx)
> +{
> +	struct dc_link *link = pipe_ctx->stream->link;
> +	struct dc_bios *bios = link->ctx->dc_bios;
> +	struct bp_crtc_source_select crtc_source_select = {0};
> +	enum engine_id engine_id = link->link_enc->preferred_engine;
> +	uint8_t bit_depth;
> +
> +	if (dc_is_rgb_signal(pipe_ctx->stream->signal))
> +		engine_id = link->link_enc->analog_engine;
> +
> +	switch (pipe_ctx->stream->timing.display_color_depth) {
> +	case COLOR_DEPTH_UNDEFINED:
> +		bit_depth = 0;
> +		break;
> +	case COLOR_DEPTH_666:
> +		bit_depth = 6;
> +		break;
> +	default:
> +	case COLOR_DEPTH_888:
> +		bit_depth = 8;
> +		break;
> +	case COLOR_DEPTH_101010:
> +		bit_depth = 10;
> +		break;
> +	case COLOR_DEPTH_121212:
> +		bit_depth = 12;
> +		break;
> +	case COLOR_DEPTH_141414:
> +		bit_depth = 14;
> +		break;
> +	case COLOR_DEPTH_161616:
> +		bit_depth = 16;
> +		break;
> +	}
> +
> +	crtc_source_select.controller_id = CONTROLLER_ID_D0 + pipe_ctx->stream_res.tg->inst;
> +	crtc_source_select.bit_depth = bit_depth;
> +	crtc_source_select.engine_id = engine_id;
> +	crtc_source_select.sink_signal = pipe_ctx->stream->signal;
> +
> +	bios->funcs->select_crtc_source(bios, &crtc_source_select);
> +}
> +
>  enum dc_status dce110_apply_single_controller_ctx_to_hw(
>  		struct pipe_ctx *pipe_ctx,
>  		struct dc_state *context,
> @@ -1600,6 +1666,10 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
>  		hws->funcs.disable_stream_gating(dc, pipe_ctx);
>  	}
>  
> +	if (pipe_ctx->stream->signal == SIGNAL_TYPE_RGB) {
> +		dce110_select_crtc_source(pipe_ctx);
> +	}
> +
>  	if (pipe_ctx->stream_res.audio != NULL) {
>  		struct audio_output audio_output = {0};
>  
> @@ -1679,7 +1749,8 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
>  		pipe_ctx->stream_res.tg->funcs->set_static_screen_control(
>  				pipe_ctx->stream_res.tg, event_triggers, 2);
>  
> -	if (!dc_is_virtual_signal(pipe_ctx->stream->signal))
> +	if (!dc_is_virtual_signal(pipe_ctx->stream->signal) &&
> +		!dc_is_rgb_signal(pipe_ctx->stream->signal))
>  		pipe_ctx->stream_res.stream_enc->funcs->dig_connect_to_otg(
>  			pipe_ctx->stream_res.stream_enc,
>  			pipe_ctx->stream_res.tg->inst);

Re: [PATCH 00/23] Analog connector support in DC (v2)

[Harry Wentland]

On 2025-09-26 14:01, Timur Kristóf wrote:
> This series adds support for analog connectors to DC for DCE6-10.
> There are two reasons to add this support:
> 
> 1. GPUs that already use DC by default and have analog connectors.
> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
> and their analog part doesn't work with DC. This functionality
> regressed when switching from the amdgpu legacy display code to DC.
> 
> 2. GPUs that don't use amdgpu by default yet.
> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default
> yet, and missing analog connector support in DC is cited as one
> of the main reasons why not.
> 
> Before starting this work, I asked Harry and Alex about how best
> to do it and we agreed that we'd like to use the VBIOS to set up
> the DAC. So I used the amdgpu legacy display code as a reference.
> The first few commits add some minor changes to DC to prepare for
> supporting analog stream and link encoders, then analog link
> detection is added along with polling, and finally DAC load
> detection support, which is useful for old displays and adapters.
> 
> With this analog support added to DC, we could already fully switch
> CIK discrete GPUs to use DC and switch them to the amdgpu driver
> by default. This series switches Bonaire to DC by default, we
> can do the switch to amdgpu in a later series.
> 
> For SI dGPUs, there are other pending patches to make DC work
> well, afterwards we could switch to DC by default, but missing
> VCE1 support is the blocker from using amdgpu by default.
> 
> For GFX7 APUs, further work is needed before enabling DC by
> default, specifically with regards to the TRAVIS and NUTMEG
> external encoders which are not supported by DC at all.
> 
> Changes in v2 of the series:
> Fixed regression on RDNA2 and newer APUs.
> Fixed flickering caused by polling analog connectors.
> Fixed crash on Kaveri.
> Fixed bug when HPD was high without a connected display.
> Reduced code churn by reusing same link encoder.
> Addressed other feedback from the review of v1.

Thanks for the series.

Patches 1-13 are
Reviewed-by: Harry Wentland <harry.wentland@amd.com>

I'll hope to find time for the rest tomorrow or Friday.

Harry

> 
> Timur Kristóf (23):
>   drm/amd/display: Determine DVI-I connector type (v2)
>   drm/amd/display: Add analog bit to edid_caps (v2)
>   drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
>   drm/amd/display: Hook up DAC to bios_parser_encoder_control
>   drm/amd/display: Add SelectCRTC_Source to BIOS parser
>   drm/amd/display: Get maximum pixel clock from VBIOS
>   drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
>   drm/amd/display: Don't try to enable/disable HPD when unavailable
>   drm/amd/display: Determine early if a link has supported encoders (v2)
>   drm/amd/display: Add concept of analog encoders (v2)
>   drm/amd/display: Implement DCE analog stream encoders
>   drm/amd/display: Implement DCE analog link encoders (v2)
>   drm/amd/display: Support DAC in dce110_hwseq
>   drm/amd/display: Add analog link detection (v2)
>   drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
>   drm/amd/display: Poll analog connectors (v2)
>   drm/amd/display: Add DCE BIOS_SCRATCH_0 register
>   drm/amd/display: Make get_support_mask_for_device_id reusable
>   drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
>   drm/amd/display: Use DAC load detection on analog connectors (v2)
>   drm/amd/display: Add common modes to analog displays without EDID
>   drm/amd/display: Don't add freesync modes to analog displays (v2)
>   drm/amdgpu: Use DC by default for Bonaire
> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
>  .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
>  .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
>  .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
>  .../drm/amd/display/dc/bios/command_table.h   |   6 +
>  .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
>  .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
>  .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
>  drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
>  .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
>  .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
>  .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
>  .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
>  .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
>  .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
>  .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
>  drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
>  .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
>  .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
>  .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
>  .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
>  .../dc/resource/dce100/dce100_resource.c      |  31 +-
>  .../dc/resource/dce110/dce110_resource.c      |   2 +
>  .../dc/resource/dce112/dce112_resource.c      |   2 +
>  .../dc/resource/dce120/dce120_resource.c      |   1 +
>  .../dc/resource/dce60/dce60_resource.c        |  29 +-
>  .../dc/resource/dce80/dce80_resource.c        |  26 +-
>  .../amd/display/include/bios_parser_types.h   |  11 +-
>  .../display/include/grph_object_ctrl_defs.h   |   1 +
>  .../drm/amd/display/include/grph_object_id.h  |   7 +
>  .../drm/amd/display/include/signal_types.h    |  12 +
>  35 files changed, 1117 insertions(+), 86 deletions(-)
> 

Re: [PATCH 00/23] Analog connector support in DC (v2)

[Harry Wentland]

On 2025-10-08 17:11, Harry Wentland wrote:
> On 2025-09-26 14:01, Timur Kristóf wrote:
>> This series adds support for analog connectors to DC for DCE6-10.
>> There are two reasons to add this support:
>>
>> 1. GPUs that already use DC by default and have analog connectors.
>> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
>> and their analog part doesn't work with DC. This functionality
>> regressed when switching from the amdgpu legacy display code to DC.
>>
>> 2. GPUs that don't use amdgpu by default yet.
>> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default
>> yet, and missing analog connector support in DC is cited as one
>> of the main reasons why not.
>>
>> Before starting this work, I asked Harry and Alex about how best
>> to do it and we agreed that we'd like to use the VBIOS to set up
>> the DAC. So I used the amdgpu legacy display code as a reference.
>> The first few commits add some minor changes to DC to prepare for
>> supporting analog stream and link encoders, then analog link
>> detection is added along with polling, and finally DAC load
>> detection support, which is useful for old displays and adapters.
>>
>> With this analog support added to DC, we could already fully switch
>> CIK discrete GPUs to use DC and switch them to the amdgpu driver
>> by default. This series switches Bonaire to DC by default, we
>> can do the switch to amdgpu in a later series.
>>
>> For SI dGPUs, there are other pending patches to make DC work
>> well, afterwards we could switch to DC by default, but missing
>> VCE1 support is the blocker from using amdgpu by default.
>>
>> For GFX7 APUs, further work is needed before enabling DC by
>> default, specifically with regards to the TRAVIS and NUTMEG
>> external encoders which are not supported by DC at all.
>>
>> Changes in v2 of the series:
>> Fixed regression on RDNA2 and newer APUs.
>> Fixed flickering caused by polling analog connectors.
>> Fixed crash on Kaveri.
>> Fixed bug when HPD was high without a connected display.
>> Reduced code churn by reusing same link encoder.
>> Addressed other feedback from the review of v1.
> 
> Thanks for the series.
> 
> Patches 1-13 are
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> 
> I'll hope to find time for the rest tomorrow or Friday.
> 

The rest looks good to me as well.

The whole series is
Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Dan, can we give this a spin in our weekly promotion tests
before I merge it?

Harry

> Harry
> 
>>
>> Timur Kristóf (23):
>>   drm/amd/display: Determine DVI-I connector type (v2)
>>   drm/amd/display: Add analog bit to edid_caps (v2)
>>   drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
>>   drm/amd/display: Hook up DAC to bios_parser_encoder_control
>>   drm/amd/display: Add SelectCRTC_Source to BIOS parser
>>   drm/amd/display: Get maximum pixel clock from VBIOS
>>   drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
>>   drm/amd/display: Don't try to enable/disable HPD when unavailable
>>   drm/amd/display: Determine early if a link has supported encoders (v2)
>>   drm/amd/display: Add concept of analog encoders (v2)
>>   drm/amd/display: Implement DCE analog stream encoders
>>   drm/amd/display: Implement DCE analog link encoders (v2)
>>   drm/amd/display: Support DAC in dce110_hwseq
>>   drm/amd/display: Add analog link detection (v2)
>>   drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
>>   drm/amd/display: Poll analog connectors (v2)
>>   drm/amd/display: Add DCE BIOS_SCRATCH_0 register
>>   drm/amd/display: Make get_support_mask_for_device_id reusable
>>   drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
>>   drm/amd/display: Use DAC load detection on analog connectors (v2)
>>   drm/amd/display: Add common modes to analog displays without EDID
>>   drm/amd/display: Don't add freesync modes to analog displays (v2)
>>   drm/amdgpu: Use DC by default for Bonaire
>>
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
>>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
>>  .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
>>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
>>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
>>  .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
>>  .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
>>  .../drm/amd/display/dc/bios/command_table.h   |   6 +
>>  .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
>>  .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
>>  .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
>>  drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
>>  .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
>>  .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
>>  .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
>>  .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
>>  .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
>>  .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
>>  .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
>>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
>>  drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
>>  .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
>>  .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
>>  .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
>>  .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
>>  .../dc/resource/dce100/dce100_resource.c      |  31 +-
>>  .../dc/resource/dce110/dce110_resource.c      |   2 +
>>  .../dc/resource/dce112/dce112_resource.c      |   2 +
>>  .../dc/resource/dce120/dce120_resource.c      |   1 +
>>  .../dc/resource/dce60/dce60_resource.c        |  29 +-
>>  .../dc/resource/dce80/dce80_resource.c        |  26 +-
>>  .../amd/display/include/bios_parser_types.h   |  11 +-
>>  .../display/include/grph_object_ctrl_defs.h   |   1 +
>>  .../drm/amd/display/include/grph_object_id.h  |   7 +
>>  .../drm/amd/display/include/signal_types.h    |  12 +
>>  35 files changed, 1117 insertions(+), 86 deletions(-)
>>
> 

RE: [PATCH 00/23] Analog connector support in DC (v2)

[Wheeler, Daniel]

[Public]

Sure, we can add it to next week's promotion, I'm almost through this week's candidate. Tom is scheduled to prepare next week's candidate, so I'll tag him in.

Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: Wentland, Harry <Harry.Wentland@amd.com>
Sent: Thursday, October 9, 2025 1:27 PM
To: Timur Kristóf <timur.kristof@gmail.com>; amd-gfx@lists.freedesktop.org; Wheeler, Daniel <Daniel.Wheeler@amd.com>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)



On 2025-10-08 17:11, Harry Wentland wrote:
> On 2025-09-26 14:01, Timur Kristóf wrote:
>> This series adds support for analog connectors to DC for DCE6-10.
>> There are two reasons to add this support:
>>
>> 1. GPUs that already use DC by default and have analog connectors.
>> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
>> and their analog part doesn't work with DC. This functionality
>> regressed when switching from the amdgpu legacy display code to DC.
>>
>> 2. GPUs that don't use amdgpu by default yet.
>> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default yet,
>> and missing analog connector support in DC is cited as one of the
>> main reasons why not.
>>
>> Before starting this work, I asked Harry and Alex about how best to
>> do it and we agreed that we'd like to use the VBIOS to set up the
>> DAC. So I used the amdgpu legacy display code as a reference.
>> The first few commits add some minor changes to DC to prepare for
>> supporting analog stream and link encoders, then analog link
>> detection is added along with polling, and finally DAC load detection
>> support, which is useful for old displays and adapters.
>>
>> With this analog support added to DC, we could already fully switch
>> CIK discrete GPUs to use DC and switch them to the amdgpu driver by
>> default. This series switches Bonaire to DC by default, we can do the
>> switch to amdgpu in a later series.
>>
>> For SI dGPUs, there are other pending patches to make DC work well,
>> afterwards we could switch to DC by default, but missing
>> VCE1 support is the blocker from using amdgpu by default.
>>
>> For GFX7 APUs, further work is needed before enabling DC by default,
>> specifically with regards to the TRAVIS and NUTMEG external encoders
>> which are not supported by DC at all.
>>
>> Changes in v2 of the series:
>> Fixed regression on RDNA2 and newer APUs.
>> Fixed flickering caused by polling analog connectors.
>> Fixed crash on Kaveri.
>> Fixed bug when HPD was high without a connected display.
>> Reduced code churn by reusing same link encoder.
>> Addressed other feedback from the review of v1.
>
> Thanks for the series.
>
> Patches 1-13 are
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>
> I'll hope to find time for the rest tomorrow or Friday.
>

The rest looks good to me as well.

The whole series is
Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Dan, can we give this a spin in our weekly promotion tests before I merge it?

Harry

> Harry
>
>>
>> Timur Kristóf (23):
>>   drm/amd/display: Determine DVI-I connector type (v2)
>>   drm/amd/display: Add analog bit to edid_caps (v2)
>>   drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
>>   drm/amd/display: Hook up DAC to bios_parser_encoder_control
>>   drm/amd/display: Add SelectCRTC_Source to BIOS parser
>>   drm/amd/display: Get maximum pixel clock from VBIOS
>>   drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
>>   drm/amd/display: Don't try to enable/disable HPD when unavailable
>>   drm/amd/display: Determine early if a link has supported encoders (v2)
>>   drm/amd/display: Add concept of analog encoders (v2)
>>   drm/amd/display: Implement DCE analog stream encoders
>>   drm/amd/display: Implement DCE analog link encoders (v2)
>>   drm/amd/display: Support DAC in dce110_hwseq
>>   drm/amd/display: Add analog link detection (v2)
>>   drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
>>   drm/amd/display: Poll analog connectors (v2)
>>   drm/amd/display: Add DCE BIOS_SCRATCH_0 register
>>   drm/amd/display: Make get_support_mask_for_device_id reusable
>>   drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
>>   drm/amd/display: Use DAC load detection on analog connectors (v2)
>>   drm/amd/display: Add common modes to analog displays without EDID
>>   drm/amd/display: Don't add freesync modes to analog displays (v2)
>>   drm/amdgpu: Use DC by default for Bonaire
>>
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
>>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
>>  .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
>>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
>>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
>> .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
>>  .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
>>  .../drm/amd/display/dc/bios/command_table.h   |   6 +
>>  .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
>>  .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
>>  .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
>>  drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
>>  .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
>> .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
>>  .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
>>  .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
>>  .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
>>  .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
>>  .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
>>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
>>  drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
>>  .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
>> .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
>>  .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
>>  .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
>>  .../dc/resource/dce100/dce100_resource.c      |  31 +-
>>  .../dc/resource/dce110/dce110_resource.c      |   2 +
>>  .../dc/resource/dce112/dce112_resource.c      |   2 +
>>  .../dc/resource/dce120/dce120_resource.c      |   1 +
>>  .../dc/resource/dce60/dce60_resource.c        |  29 +-
>>  .../dc/resource/dce80/dce80_resource.c        |  26 +-
>>  .../amd/display/include/bios_parser_types.h   |  11 +-
>>  .../display/include/grph_object_ctrl_defs.h   |   1 +
>>  .../drm/amd/display/include/grph_object_id.h  |   7 +
>>  .../drm/amd/display/include/signal_types.h    |  12 +
>>  35 files changed, 1117 insertions(+), 86 deletions(-)
>>
>

Re: [PATCH 00/23] Analog connector support in DC (v2)

[Harry Wentland]

On 2025-10-09 13:49, Wheeler, Daniel wrote:
> [Public]
> 
> Sure, we can add it to next week's promotion, I'm almost through this week's candidate. Tom is scheduled to prepare next week's candidate, so I'll tag him in.
> 

Great. Thanks.

Harry

> Thank you,
> 
> Dan Wheeler
> Sr. Technologist | AMD
> SW Display
> ------------------------------------------------------------------------------------------------------------------
> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
> amd.com
> 
> 
> -----Original Message-----
> From: Wentland, Harry <Harry.Wentland@amd.com>
> Sent: Thursday, October 9, 2025 1:27 PM
> To: Timur Kristóf <timur.kristof@gmail.com>; amd-gfx@lists.freedesktop.org; Wheeler, Daniel <Daniel.Wheeler@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> 
> 
> 
> On 2025-10-08 17:11, Harry Wentland wrote:
>> On 2025-09-26 14:01, Timur Kristóf wrote:
>>> This series adds support for analog connectors to DC for DCE6-10.
>>> There are two reasons to add this support:
>>>
>>> 1. GPUs that already use DC by default and have analog connectors.
>>> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
>>> and their analog part doesn't work with DC. This functionality
>>> regressed when switching from the amdgpu legacy display code to DC.
>>>
>>> 2. GPUs that don't use amdgpu by default yet.
>>> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default yet,
>>> and missing analog connector support in DC is cited as one of the
>>> main reasons why not.
>>>
>>> Before starting this work, I asked Harry and Alex about how best to
>>> do it and we agreed that we'd like to use the VBIOS to set up the
>>> DAC. So I used the amdgpu legacy display code as a reference.
>>> The first few commits add some minor changes to DC to prepare for
>>> supporting analog stream and link encoders, then analog link
>>> detection is added along with polling, and finally DAC load detection
>>> support, which is useful for old displays and adapters.
>>>
>>> With this analog support added to DC, we could already fully switch
>>> CIK discrete GPUs to use DC and switch them to the amdgpu driver by
>>> default. This series switches Bonaire to DC by default, we can do the
>>> switch to amdgpu in a later series.
>>>
>>> For SI dGPUs, there are other pending patches to make DC work well,
>>> afterwards we could switch to DC by default, but missing
>>> VCE1 support is the blocker from using amdgpu by default.
>>>
>>> For GFX7 APUs, further work is needed before enabling DC by default,
>>> specifically with regards to the TRAVIS and NUTMEG external encoders
>>> which are not supported by DC at all.
>>>
>>> Changes in v2 of the series:
>>> Fixed regression on RDNA2 and newer APUs.
>>> Fixed flickering caused by polling analog connectors.
>>> Fixed crash on Kaveri.
>>> Fixed bug when HPD was high without a connected display.
>>> Reduced code churn by reusing same link encoder.
>>> Addressed other feedback from the review of v1.
>>
>> Thanks for the series.
>>
>> Patches 1-13 are
>> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>>
>> I'll hope to find time for the rest tomorrow or Friday.
>>
> 
> The rest looks good to me as well.
> 
> The whole series is
> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> 
> Dan, can we give this a spin in our weekly promotion tests before I merge it?
> 
> Harry
> 
>> Harry
>>
>>>
>>> Timur Kristóf (23):
>>>   drm/amd/display: Determine DVI-I connector type (v2)
>>>   drm/amd/display: Add analog bit to edid_caps (v2)
>>>   drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
>>>   drm/amd/display: Hook up DAC to bios_parser_encoder_control
>>>   drm/amd/display: Add SelectCRTC_Source to BIOS parser
>>>   drm/amd/display: Get maximum pixel clock from VBIOS
>>>   drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
>>>   drm/amd/display: Don't try to enable/disable HPD when unavailable
>>>   drm/amd/display: Determine early if a link has supported encoders (v2)
>>>   drm/amd/display: Add concept of analog encoders (v2)
>>>   drm/amd/display: Implement DCE analog stream encoders
>>>   drm/amd/display: Implement DCE analog link encoders (v2)
>>>   drm/amd/display: Support DAC in dce110_hwseq
>>>   drm/amd/display: Add analog link detection (v2)
>>>   drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
>>>   drm/amd/display: Poll analog connectors (v2)
>>>   drm/amd/display: Add DCE BIOS_SCRATCH_0 register
>>>   drm/amd/display: Make get_support_mask_for_device_id reusable
>>>   drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
>>>   drm/amd/display: Use DAC load detection on analog connectors (v2)
>>>   drm/amd/display: Add common modes to analog displays without EDID
>>>   drm/amd/display: Don't add freesync modes to analog displays (v2)
>>>   drm/amdgpu: Use DC by default for Bonaire
>>>
>>>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
>>>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
>>>  .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
>>>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
>>>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
>>> .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
>>>  .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
>>>  .../drm/amd/display/dc/bios/command_table.h   |   6 +
>>>  .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
>>>  .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
>>>  .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
>>>  drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
>>>  .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
>>> .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
>>>  .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
>>>  .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
>>>  .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
>>>  .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
>>>  .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
>>>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
>>>  drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
>>>  .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
>>> .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
>>>  .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
>>>  .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
>>>  .../dc/resource/dce100/dce100_resource.c      |  31 +-
>>>  .../dc/resource/dce110/dce110_resource.c      |   2 +
>>>  .../dc/resource/dce112/dce112_resource.c      |   2 +
>>>  .../dc/resource/dce120/dce120_resource.c      |   1 +
>>>  .../dc/resource/dce60/dce60_resource.c        |  29 +-
>>>  .../dc/resource/dce80/dce80_resource.c        |  26 +-
>>>  .../amd/display/include/bios_parser_types.h   |  11 +-
>>>  .../display/include/grph_object_ctrl_defs.h   |   1 +
>>>  .../drm/amd/display/include/grph_object_id.h  |   7 +
>>>  .../drm/amd/display/include/signal_types.h    |  12 +
>>>  35 files changed, 1117 insertions(+), 86 deletions(-)
>>>
>>
> 

Re: [PATCH 00/23] Analog connector support in DC (v2)

[Timur Kristóf]

Hi,

Did you guys manage to include the series in last week's promotion?
Are there any issues?

I'd really like it to be included in Linux 6.18, are we still on time 
for that?

Thanks & best regards,
Timur

On 10/9/25 20:27, Harry Wentland wrote:
> 
> 
> On 2025-10-09 13:49, Wheeler, Daniel wrote:
>> [Public]
>>
>> Sure, we can add it to next week's promotion, I'm almost through this week's candidate. Tom is scheduled to prepare next week's candidate, so I'll tag him in.
>>
> 
> Great. Thanks.
> 
> Harry
> 
>> Thank you,
>>
>> Dan Wheeler
>> Sr. Technologist | AMD
>> SW Display
>> ------------------------------------------------------------------------------------------------------------------
>> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
>> amd.com
>>
>>
>> -----Original Message-----
>> From: Wentland, Harry <Harry.Wentland@amd.com>
>> Sent: Thursday, October 9, 2025 1:27 PM
>> To: Timur Kristóf <timur.kristof@gmail.com>; amd-gfx@lists.freedesktop.org; Wheeler, Daniel <Daniel.Wheeler@amd.com>
>> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
>> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
>>
>>
>>
>> On 2025-10-08 17:11, Harry Wentland wrote:
>>> On 2025-09-26 14:01, Timur Kristóf wrote:
>>>> This series adds support for analog connectors to DC for DCE6-10.
>>>> There are two reasons to add this support:
>>>>
>>>> 1. GPUs that already use DC by default and have analog connectors.
>>>> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
>>>> and their analog part doesn't work with DC. This functionality
>>>> regressed when switching from the amdgpu legacy display code to DC.
>>>>
>>>> 2. GPUs that don't use amdgpu by default yet.
>>>> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default yet,
>>>> and missing analog connector support in DC is cited as one of the
>>>> main reasons why not.
>>>>
>>>> Before starting this work, I asked Harry and Alex about how best to
>>>> do it and we agreed that we'd like to use the VBIOS to set up the
>>>> DAC. So I used the amdgpu legacy display code as a reference.
>>>> The first few commits add some minor changes to DC to prepare for
>>>> supporting analog stream and link encoders, then analog link
>>>> detection is added along with polling, and finally DAC load detection
>>>> support, which is useful for old displays and adapters.
>>>>
>>>> With this analog support added to DC, we could already fully switch
>>>> CIK discrete GPUs to use DC and switch them to the amdgpu driver by
>>>> default. This series switches Bonaire to DC by default, we can do the
>>>> switch to amdgpu in a later series.
>>>>
>>>> For SI dGPUs, there are other pending patches to make DC work well,
>>>> afterwards we could switch to DC by default, but missing
>>>> VCE1 support is the blocker from using amdgpu by default.
>>>>
>>>> For GFX7 APUs, further work is needed before enabling DC by default,
>>>> specifically with regards to the TRAVIS and NUTMEG external encoders
>>>> which are not supported by DC at all.
>>>>
>>>> Changes in v2 of the series:
>>>> Fixed regression on RDNA2 and newer APUs.
>>>> Fixed flickering caused by polling analog connectors.
>>>> Fixed crash on Kaveri.
>>>> Fixed bug when HPD was high without a connected display.
>>>> Reduced code churn by reusing same link encoder.
>>>> Addressed other feedback from the review of v1.
>>>
>>> Thanks for the series.
>>>
>>> Patches 1-13 are
>>> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>>>
>>> I'll hope to find time for the rest tomorrow or Friday.
>>>
>>
>> The rest looks good to me as well.
>>
>> The whole series is
>> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>>
>> Dan, can we give this a spin in our weekly promotion tests before I merge it?
>>
>> Harry
>>
>>> Harry
>>>
>>>>
>>>> Timur Kristóf (23):
>>>>    drm/amd/display: Determine DVI-I connector type (v2)
>>>>    drm/amd/display: Add analog bit to edid_caps (v2)
>>>>    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
>>>>    drm/amd/display: Hook up DAC to bios_parser_encoder_control
>>>>    drm/amd/display: Add SelectCRTC_Source to BIOS parser
>>>>    drm/amd/display: Get maximum pixel clock from VBIOS
>>>>    drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
>>>>    drm/amd/display: Don't try to enable/disable HPD when unavailable
>>>>    drm/amd/display: Determine early if a link has supported encoders (v2)
>>>>    drm/amd/display: Add concept of analog encoders (v2)
>>>>    drm/amd/display: Implement DCE analog stream encoders
>>>>    drm/amd/display: Implement DCE analog link encoders (v2)
>>>>    drm/amd/display: Support DAC in dce110_hwseq
>>>>    drm/amd/display: Add analog link detection (v2)
>>>>    drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
>>>>    drm/amd/display: Poll analog connectors (v2)
>>>>    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
>>>>    drm/amd/display: Make get_support_mask_for_device_id reusable
>>>>    drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
>>>>    drm/amd/display: Use DAC load detection on analog connectors (v2)
>>>>    drm/amd/display: Add common modes to analog displays without EDID
>>>>    drm/amd/display: Don't add freesync modes to analog displays (v2)
>>>>    drm/amdgpu: Use DC by default for Bonaire
>>>>
>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
>>>>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
>>>>   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
>>>>   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
>>>>   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
>>>> .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
>>>>   .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
>>>>   .../drm/amd/display/dc/bios/command_table.h   |   6 +
>>>>   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
>>>>   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
>>>>   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
>>>>   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
>>>>   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
>>>> .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
>>>>   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
>>>>   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
>>>>   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
>>>>   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
>>>>   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
>>>>   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
>>>>   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
>>>>   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
>>>> .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
>>>>   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
>>>>   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
>>>>   .../dc/resource/dce100/dce100_resource.c      |  31 +-
>>>>   .../dc/resource/dce110/dce110_resource.c      |   2 +
>>>>   .../dc/resource/dce112/dce112_resource.c      |   2 +
>>>>   .../dc/resource/dce120/dce120_resource.c      |   1 +
>>>>   .../dc/resource/dce60/dce60_resource.c        |  29 +-
>>>>   .../dc/resource/dce80/dce80_resource.c        |  26 +-
>>>>   .../amd/display/include/bios_parser_types.h   |  11 +-
>>>>   .../display/include/grph_object_ctrl_defs.h   |   1 +
>>>>   .../drm/amd/display/include/grph_object_id.h  |   7 +
>>>>   .../drm/amd/display/include/signal_types.h    |  12 +
>>>>   35 files changed, 1117 insertions(+), 86 deletions(-)
>>>>
>>>
>>
> 

Re: [PATCH 00/23] Analog connector support in DC (v2)

[Alex Deucher]

On Tue, Oct 21, 2025 at 12:26 PM Timur Kristóf <timur.kristof@gmail.com> wrote:
>
> Hi,
>
> Did you guys manage to include the series in last week's promotion?
> Are there any issues?
>
> I'd really like it to be included in Linux 6.18, are we still on time
> for that?

The deadline for new features for 6.18 was over a month ago
unfortunately,  We are already at 6.18-rc2.

Alex

>
> Thanks & best regards,
> Timur
>
> On 10/9/25 20:27, Harry Wentland wrote:
> >
> >
> > On 2025-10-09 13:49, Wheeler, Daniel wrote:
> >> [Public]
> >>
> >> Sure, we can add it to next week's promotion, I'm almost through this week's candidate. Tom is scheduled to prepare next week's candidate, so I'll tag him in.
> >>
> >
> > Great. Thanks.
> >
> > Harry
> >
> >> Thank you,
> >>
> >> Dan Wheeler
> >> Sr. Technologist | AMD
> >> SW Display
> >> ------------------------------------------------------------------------------------------------------------------
> >> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
> >> amd.com
> >>
> >>
> >> -----Original Message-----
> >> From: Wentland, Harry <Harry.Wentland@amd.com>
> >> Sent: Thursday, October 9, 2025 1:27 PM
> >> To: Timur Kristóf <timur.kristof@gmail.com>; amd-gfx@lists.freedesktop.org; Wheeler, Daniel <Daniel.Wheeler@amd.com>
> >> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
> >> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> >>
> >>
> >>
> >> On 2025-10-08 17:11, Harry Wentland wrote:
> >>> On 2025-09-26 14:01, Timur Kristóf wrote:
> >>>> This series adds support for analog connectors to DC for DCE6-10.
> >>>> There are two reasons to add this support:
> >>>>
> >>>> 1. GPUs that already use DC by default and have analog connectors.
> >>>> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
> >>>> and their analog part doesn't work with DC. This functionality
> >>>> regressed when switching from the amdgpu legacy display code to DC.
> >>>>
> >>>> 2. GPUs that don't use amdgpu by default yet.
> >>>> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default yet,
> >>>> and missing analog connector support in DC is cited as one of the
> >>>> main reasons why not.
> >>>>
> >>>> Before starting this work, I asked Harry and Alex about how best to
> >>>> do it and we agreed that we'd like to use the VBIOS to set up the
> >>>> DAC. So I used the amdgpu legacy display code as a reference.
> >>>> The first few commits add some minor changes to DC to prepare for
> >>>> supporting analog stream and link encoders, then analog link
> >>>> detection is added along with polling, and finally DAC load detection
> >>>> support, which is useful for old displays and adapters.
> >>>>
> >>>> With this analog support added to DC, we could already fully switch
> >>>> CIK discrete GPUs to use DC and switch them to the amdgpu driver by
> >>>> default. This series switches Bonaire to DC by default, we can do the
> >>>> switch to amdgpu in a later series.
> >>>>
> >>>> For SI dGPUs, there are other pending patches to make DC work well,
> >>>> afterwards we could switch to DC by default, but missing
> >>>> VCE1 support is the blocker from using amdgpu by default.
> >>>>
> >>>> For GFX7 APUs, further work is needed before enabling DC by default,
> >>>> specifically with regards to the TRAVIS and NUTMEG external encoders
> >>>> which are not supported by DC at all.
> >>>>
> >>>> Changes in v2 of the series:
> >>>> Fixed regression on RDNA2 and newer APUs.
> >>>> Fixed flickering caused by polling analog connectors.
> >>>> Fixed crash on Kaveri.
> >>>> Fixed bug when HPD was high without a connected display.
> >>>> Reduced code churn by reusing same link encoder.
> >>>> Addressed other feedback from the review of v1.
> >>>
> >>> Thanks for the series.
> >>>
> >>> Patches 1-13 are
> >>> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> >>>
> >>> I'll hope to find time for the rest tomorrow or Friday.
> >>>
> >>
> >> The rest looks good to me as well.
> >>
> >> The whole series is
> >> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> >>
> >> Dan, can we give this a spin in our weekly promotion tests before I merge it?
> >>
> >> Harry
> >>
> >>> Harry
> >>>
> >>>>
> >>>> Timur Kristóf (23):
> >>>>    drm/amd/display: Determine DVI-I connector type (v2)
> >>>>    drm/amd/display: Add analog bit to edid_caps (v2)
> >>>>    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
> >>>>    drm/amd/display: Hook up DAC to bios_parser_encoder_control
> >>>>    drm/amd/display: Add SelectCRTC_Source to BIOS parser
> >>>>    drm/amd/display: Get maximum pixel clock from VBIOS
> >>>>    drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
> >>>>    drm/amd/display: Don't try to enable/disable HPD when unavailable
> >>>>    drm/amd/display: Determine early if a link has supported encoders (v2)
> >>>>    drm/amd/display: Add concept of analog encoders (v2)
> >>>>    drm/amd/display: Implement DCE analog stream encoders
> >>>>    drm/amd/display: Implement DCE analog link encoders (v2)
> >>>>    drm/amd/display: Support DAC in dce110_hwseq
> >>>>    drm/amd/display: Add analog link detection (v2)
> >>>>    drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
> >>>>    drm/amd/display: Poll analog connectors (v2)
> >>>>    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
> >>>>    drm/amd/display: Make get_support_mask_for_device_id reusable
> >>>>    drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
> >>>>    drm/amd/display: Use DAC load detection on analog connectors (v2)
> >>>>    drm/amd/display: Add common modes to analog displays without EDID
> >>>>    drm/amd/display: Don't add freesync modes to analog displays (v2)
> >>>>    drm/amdgpu: Use DC by default for Bonaire
> >>>>
> >>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
> >>>>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
> >>>>   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
> >>>>   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
> >>>>   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
> >>>> .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
> >>>>   .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
> >>>>   .../drm/amd/display/dc/bios/command_table.h   |   6 +
> >>>>   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
> >>>>   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
> >>>>   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
> >>>>   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
> >>>>   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
> >>>> .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
> >>>>   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
> >>>>   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
> >>>>   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
> >>>>   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
> >>>>   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
> >>>>   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
> >>>>   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
> >>>>   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
> >>>> .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
> >>>>   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
> >>>>   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
> >>>>   .../dc/resource/dce100/dce100_resource.c      |  31 +-
> >>>>   .../dc/resource/dce110/dce110_resource.c      |   2 +
> >>>>   .../dc/resource/dce112/dce112_resource.c      |   2 +
> >>>>   .../dc/resource/dce120/dce120_resource.c      |   1 +
> >>>>   .../dc/resource/dce60/dce60_resource.c        |  29 +-
> >>>>   .../dc/resource/dce80/dce80_resource.c        |  26 +-
> >>>>   .../amd/display/include/bios_parser_types.h   |  11 +-
> >>>>   .../display/include/grph_object_ctrl_defs.h   |   1 +
> >>>>   .../drm/amd/display/include/grph_object_id.h  |   7 +
> >>>>   .../drm/amd/display/include/signal_types.h    |  12 +
> >>>>   35 files changed, 1117 insertions(+), 86 deletions(-)
> >>>>
> >>>
> >>
> >
>

RE: [PATCH 00/23] Analog connector support in DC (v2)

[Wheeler, Daniel]

[Public]

Hi Timur,

Sorry, the patches weren't added to either last week's or this week's candidate. I'm going to add the patches on top of this week's promotion and run the testing with them. I'll see about getting them merged alongside the promotion this week.

Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: Timur Kristóf <timur.kristof@gmail.com>
Sent: Tuesday, October 21, 2025 12:15 PM
To: Wentland, Harry <Harry.Wentland@amd.com>; Wheeler, Daniel <Daniel.Wheeler@amd.com>; amd-gfx@lists.freedesktop.org; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)

Hi,

Did you guys manage to include the series in last week's promotion?
Are there any issues?

I'd really like it to be included in Linux 6.18, are we still on time for that?

Thanks & best regards,
Timur

On 10/9/25 20:27, Harry Wentland wrote:
>
>
> On 2025-10-09 13:49, Wheeler, Daniel wrote:
>> [Public]
>>
>> Sure, we can add it to next week's promotion, I'm almost through this week's candidate. Tom is scheduled to prepare next week's candidate, so I'll tag him in.
>>
>
> Great. Thanks.
>
> Harry
>
>> Thank you,
>>
>> Dan Wheeler
>> Sr. Technologist | AMD
>> SW Display
>> ---------------------------------------------------------------------
>> ---------------------------------------------
>> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
>>
>>
>> -----Original Message-----
>> From: Wentland, Harry <Harry.Wentland@amd.com>
>> Sent: Thursday, October 9, 2025 1:27 PM
>> To: Timur Kristóf <timur.kristof@gmail.com>;
>> amd-gfx@lists.freedesktop.org; Wheeler, Daniel
>> <Daniel.Wheeler@amd.com>
>> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
>> <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
>> <Christian.Koenig@amd.com>
>> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
>>
>>
>>
>> On 2025-10-08 17:11, Harry Wentland wrote:
>>> On 2025-09-26 14:01, Timur Kristóf wrote:
>>>> This series adds support for analog connectors to DC for DCE6-10.
>>>> There are two reasons to add this support:
>>>>
>>>> 1. GPUs that already use DC by default and have analog connectors.
>>>> Some Tonga and Hawaii graphics cards in fact have DVI-I connectors,
>>>> and their analog part doesn't work with DC. This functionality
>>>> regressed when switching from the amdgpu legacy display code to DC.
>>>>
>>>> 2. GPUs that don't use amdgpu by default yet.
>>>> Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by default
>>>> yet, and missing analog connector support in DC is cited as one of
>>>> the main reasons why not.
>>>>
>>>> Before starting this work, I asked Harry and Alex about how best to
>>>> do it and we agreed that we'd like to use the VBIOS to set up the
>>>> DAC. So I used the amdgpu legacy display code as a reference.
>>>> The first few commits add some minor changes to DC to prepare for
>>>> supporting analog stream and link encoders, then analog link
>>>> detection is added along with polling, and finally DAC load
>>>> detection support, which is useful for old displays and adapters.
>>>>
>>>> With this analog support added to DC, we could already fully switch
>>>> CIK discrete GPUs to use DC and switch them to the amdgpu driver by
>>>> default. This series switches Bonaire to DC by default, we can do
>>>> the switch to amdgpu in a later series.
>>>>
>>>> For SI dGPUs, there are other pending patches to make DC work well,
>>>> afterwards we could switch to DC by default, but missing
>>>> VCE1 support is the blocker from using amdgpu by default.
>>>>
>>>> For GFX7 APUs, further work is needed before enabling DC by
>>>> default, specifically with regards to the TRAVIS and NUTMEG
>>>> external encoders which are not supported by DC at all.
>>>>
>>>> Changes in v2 of the series:
>>>> Fixed regression on RDNA2 and newer APUs.
>>>> Fixed flickering caused by polling analog connectors.
>>>> Fixed crash on Kaveri.
>>>> Fixed bug when HPD was high without a connected display.
>>>> Reduced code churn by reusing same link encoder.
>>>> Addressed other feedback from the review of v1.
>>>
>>> Thanks for the series.
>>>
>>> Patches 1-13 are
>>> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>>>
>>> I'll hope to find time for the rest tomorrow or Friday.
>>>
>>
>> The rest looks good to me as well.
>>
>> The whole series is
>> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
>>
>> Dan, can we give this a spin in our weekly promotion tests before I merge it?
>>
>> Harry
>>
>>> Harry
>>>
>>>>
>>>> Timur Kristóf (23):
>>>>    drm/amd/display: Determine DVI-I connector type (v2)
>>>>    drm/amd/display: Add analog bit to edid_caps (v2)
>>>>    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
>>>>    drm/amd/display: Hook up DAC to bios_parser_encoder_control
>>>>    drm/amd/display: Add SelectCRTC_Source to BIOS parser
>>>>    drm/amd/display: Get maximum pixel clock from VBIOS
>>>>    drm/amd/display: Don't use stereo sync and audio on RGB signals (v2)
>>>>    drm/amd/display: Don't try to enable/disable HPD when unavailable
>>>>    drm/amd/display: Determine early if a link has supported encoders (v2)
>>>>    drm/amd/display: Add concept of analog encoders (v2)
>>>>    drm/amd/display: Implement DCE analog stream encoders
>>>>    drm/amd/display: Implement DCE analog link encoders (v2)
>>>>    drm/amd/display: Support DAC in dce110_hwseq
>>>>    drm/amd/display: Add analog link detection (v2)
>>>>    drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
>>>>    drm/amd/display: Poll analog connectors (v2)
>>>>    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
>>>>    drm/amd/display: Make get_support_mask_for_device_id reusable
>>>>    drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
>>>>    drm/amd/display: Use DAC load detection on analog connectors (v2)
>>>>    drm/amd/display: Add common modes to analog displays without EDID
>>>>    drm/amd/display: Don't add freesync modes to analog displays (v2)
>>>>    drm/amdgpu: Use DC by default for Bonaire
>>>>
>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
>>>>   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173 ++++++++---
>>>>   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
>>>>   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
>>>>   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
>>>> .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
>>>>   .../drm/amd/display/dc/bios/command_table.c   | 286 ++++++++++++++++++
>>>>   .../drm/amd/display/dc/bios/command_table.h   |   6 +
>>>>   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
>>>>   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
>>>>   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
>>>>   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
>>>>   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
>>>> .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
>>>>   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
>>>>   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
>>>>   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
>>>>   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
>>>>   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
>>>>   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
>>>>   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
>>>>   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
>>>> .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
>>>>   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
>>>>   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
>>>>   .../dc/resource/dce100/dce100_resource.c      |  31 +-
>>>>   .../dc/resource/dce110/dce110_resource.c      |   2 +
>>>>   .../dc/resource/dce112/dce112_resource.c      |   2 +
>>>>   .../dc/resource/dce120/dce120_resource.c      |   1 +
>>>>   .../dc/resource/dce60/dce60_resource.c        |  29 +-
>>>>   .../dc/resource/dce80/dce80_resource.c        |  26 +-
>>>>   .../amd/display/include/bios_parser_types.h   |  11 +-
>>>>   .../display/include/grph_object_ctrl_defs.h   |   1 +
>>>>   .../drm/amd/display/include/grph_object_id.h  |   7 +
>>>>   .../drm/amd/display/include/signal_types.h    |  12 +
>>>>   35 files changed, 1117 insertions(+), 86 deletions(-)
>>>>
>>>
>>
>

Re: [PATCH 00/23] Analog connector support in DC (v2)

[timur.kristof]

Hi Dan,

Thanks, I'm looking forward to it. Please let me know how it goes.

Is there any way I can help?

I respect that testing and validating a huge series is non-trivial.
However, considering that we have already missed the deadline for 6.18,
I'd like to make sure, can this feature make it into 6.19?

Thanks & best regards,
Timur

On Tue, 2025-10-21 at 17:32 +0000, Wheeler, Daniel wrote:
> [Public]
> 
> Hi Timur,
> 
> Sorry, the patches weren't added to either last week's or this week's
> candidate. I'm going to add the patches on top of this week's
> promotion and run the testing with them. I'll see about getting them
> merged alongside the promotion this week.
> 
> Thank you,
> 
> Dan Wheeler
> Sr. Technologist | AMD
> SW Display
> ---------------------------------------------------------------------
> ---------------------------------------------
> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
> amd.com
> 
> 
> -----Original Message-----
> From: Timur Kristóf <timur.kristof@gmail.com>
> Sent: Tuesday, October 21, 2025 12:15 PM
> To: Wentland, Harry <Harry.Wentland@amd.com>; Wheeler, Daniel
> <Daniel.Wheeler@amd.com>; amd-gfx@lists.freedesktop.org; Chung,
> ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> <Christian.Koenig@amd.com>
> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> 
> Hi,
> 
> Did you guys manage to include the series in last week's promotion?
> Are there any issues?
> 
> I'd really like it to be included in Linux 6.18, are we still on time
> for that?
> 
> Thanks & best regards,
> Timur
> 
> On 10/9/25 20:27, Harry Wentland wrote:
> > 
> > 
> > On 2025-10-09 13:49, Wheeler, Daniel wrote:
> > > [Public]
> > > 
> > > Sure, we can add it to next week's promotion, I'm almost through
> > > this week's candidate. Tom is scheduled to prepare next week's
> > > candidate, so I'll tag him in.
> > > 
> > 
> > Great. Thanks.
> > 
> > Harry
> > 
> > > Thank you,
> > > 
> > > Dan Wheeler
> > > Sr. Technologist | AMD
> > > SW Display
> > > -----------------------------------------------------------------
> > > ----
> > > ---------------------------------------------
> > > 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
> > > 
> > > 
> > > -----Original Message-----
> > > From: Wentland, Harry <Harry.Wentland@amd.com>
> > > Sent: Thursday, October 9, 2025 1:27 PM
> > > To: Timur Kristóf <timur.kristof@gmail.com>;
> > > amd-gfx@lists.freedesktop.org; Wheeler, Daniel
> > > <Daniel.Wheeler@amd.com>
> > > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> > > <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> > > <Christian.Koenig@amd.com>
> > > Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> > > 
> > > 
> > > 
> > > On 2025-10-08 17:11, Harry Wentland wrote:
> > > > On 2025-09-26 14:01, Timur Kristóf wrote:
> > > > > This series adds support for analog connectors to DC for
> > > > > DCE6-10.
> > > > > There are two reasons to add this support:
> > > > > 
> > > > > 1. GPUs that already use DC by default and have analog
> > > > > connectors.
> > > > > Some Tonga and Hawaii graphics cards in fact have DVI-I
> > > > > connectors,
> > > > > and their analog part doesn't work with DC. This
> > > > > functionality
> > > > > regressed when switching from the amdgpu legacy display code
> > > > > to DC.
> > > > > 
> > > > > 2. GPUs that don't use amdgpu by default yet.
> > > > > Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by
> > > > > default
> > > > > yet, and missing analog connector support in DC is cited as
> > > > > one of
> > > > > the main reasons why not.
> > > > > 
> > > > > Before starting this work, I asked Harry and Alex about how
> > > > > best to
> > > > > do it and we agreed that we'd like to use the VBIOS to set up
> > > > > the
> > > > > DAC. So I used the amdgpu legacy display code as a reference.
> > > > > The first few commits add some minor changes to DC to prepare
> > > > > for
> > > > > supporting analog stream and link encoders, then analog link
> > > > > detection is added along with polling, and finally DAC load
> > > > > detection support, which is useful for old displays and
> > > > > adapters.
> > > > > 
> > > > > With this analog support added to DC, we could already fully
> > > > > switch
> > > > > CIK discrete GPUs to use DC and switch them to the amdgpu
> > > > > driver by
> > > > > default. This series switches Bonaire to DC by default, we
> > > > > can do
> > > > > the switch to amdgpu in a later series.
> > > > > 
> > > > > For SI dGPUs, there are other pending patches to make DC work
> > > > > well,
> > > > > afterwards we could switch to DC by default, but missing
> > > > > VCE1 support is the blocker from using amdgpu by default.
> > > > > 
> > > > > For GFX7 APUs, further work is needed before enabling DC by
> > > > > default, specifically with regards to the TRAVIS and NUTMEG
> > > > > external encoders which are not supported by DC at all.
> > > > > 
> > > > > Changes in v2 of the series:
> > > > > Fixed regression on RDNA2 and newer APUs.
> > > > > Fixed flickering caused by polling analog connectors.
> > > > > Fixed crash on Kaveri.
> > > > > Fixed bug when HPD was high without a connected display.
> > > > > Reduced code churn by reusing same link encoder.
> > > > > Addressed other feedback from the review of v1.
> > > > 
> > > > Thanks for the series.
> > > > 
> > > > Patches 1-13 are
> > > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > > 
> > > > I'll hope to find time for the rest tomorrow or Friday.
> > > > 
> > > 
> > > The rest looks good to me as well.
> > > 
> > > The whole series is
> > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > 
> > > Dan, can we give this a spin in our weekly promotion tests before
> > > I merge it?
> > > 
> > > Harry
> > > 
> > > > Harry
> > > > 
> > > > > 
> > > > > Timur Kristóf (23):
> > > > >    drm/amd/display: Determine DVI-I connector type (v2)
> > > > >    drm/amd/display: Add analog bit to edid_caps (v2)
> > > > >    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
> > > > >    drm/amd/display: Hook up DAC to
> > > > > bios_parser_encoder_control
> > > > >    drm/amd/display: Add SelectCRTC_Source to BIOS parser
> > > > >    drm/amd/display: Get maximum pixel clock from VBIOS
> > > > >    drm/amd/display: Don't use stereo sync and audio on RGB
> > > > > signals (v2)
> > > > >    drm/amd/display: Don't try to enable/disable HPD when
> > > > > unavailable
> > > > >    drm/amd/display: Determine early if a link has supported
> > > > > encoders (v2)
> > > > >    drm/amd/display: Add concept of analog encoders (v2)
> > > > >    drm/amd/display: Implement DCE analog stream encoders
> > > > >    drm/amd/display: Implement DCE analog link encoders (v2)
> > > > >    drm/amd/display: Support DAC in dce110_hwseq
> > > > >    drm/amd/display: Add analog link detection (v2)
> > > > >    drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
> > > > >    drm/amd/display: Poll analog connectors (v2)
> > > > >    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
> > > > >    drm/amd/display: Make get_support_mask_for_device_id
> > > > > reusable
> > > > >    drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
> > > > >    drm/amd/display: Use DAC load detection on analog
> > > > > connectors (v2)
> > > > >    drm/amd/display: Add common modes to analog displays
> > > > > without EDID
> > > > >    drm/amd/display: Don't add freesync modes to analog
> > > > > displays (v2)
> > > > >    drm/amdgpu: Use DC by default for Bonaire
> > > > > 
> > > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
> > > > >   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173
> > > > > ++++++++---
> > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
> > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
> > > > >   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
> > > > > .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
> > > > >   .../drm/amd/display/dc/bios/command_table.c   | 286
> > > > > ++++++++++++++++++
> > > > >   .../drm/amd/display/dc/bios/command_table.h   |   6 +
> > > > >   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
> > > > >   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
> > > > >   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
> > > > >   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
> > > > >   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
> > > > > .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
> > > > >   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
> > > > >   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
> > > > >   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
> > > > >   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
> > > > >   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
> > > > >   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
> > > > >   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
> > > > >   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
> > > > > .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
> > > > >   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
> > > > >   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
> > > > >   .../dc/resource/dce100/dce100_resource.c      |  31 +-
> > > > >   .../dc/resource/dce110/dce110_resource.c      |   2 +
> > > > >   .../dc/resource/dce112/dce112_resource.c      |   2 +
> > > > >   .../dc/resource/dce120/dce120_resource.c      |   1 +
> > > > >   .../dc/resource/dce60/dce60_resource.c        |  29 +-
> > > > >   .../dc/resource/dce80/dce80_resource.c        |  26 +-
> > > > >   .../amd/display/include/bios_parser_types.h   |  11 +-
> > > > >   .../display/include/grph_object_ctrl_defs.h   |   1 +
> > > > >   .../drm/amd/display/include/grph_object_id.h  |   7 +
> > > > >   .../drm/amd/display/include/signal_types.h    |  12 +
> > > > >   35 files changed, 1117 insertions(+), 86 deletions(-)
> > > > > 
> > > > 
> > > 
> > 

RE: [PATCH 00/23] Analog connector support in DC (v2)

[Wheeler, Daniel]

[Public]

Hi Timur,

I tested the series on top of the promotion for this week, and it tested fine. So it should be merged alongside, and I can validate that next week. With that, I don't see why it wouldn't make it into 6.19. If there's anyone who's more knowledgeable on the release timelines who can confirm, that would be helpful.

Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: timur.kristof@gmail.com <timur.kristof@gmail.com>
Sent: Friday, October 24, 2025 3:07 PM
To: Wheeler, Daniel <Daniel.Wheeler@amd.com>; Wentland, Harry <Harry.Wentland@amd.com>; amd-gfx@lists.freedesktop.org; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)

Hi Dan,

Thanks, I'm looking forward to it. Please let me know how it goes.

Is there any way I can help?

I respect that testing and validating a huge series is non-trivial.
However, considering that we have already missed the deadline for 6.18, I'd like to make sure, can this feature make it into 6.19?

Thanks & best regards,
Timur

On Tue, 2025-10-21 at 17:32 +0000, Wheeler, Daniel wrote:
> [Public]
>
> Hi Timur,
>
> Sorry, the patches weren't added to either last week's or this week's
> candidate. I'm going to add the patches on top of this week's
> promotion and run the testing with them. I'll see about getting them
> merged alongside the promotion this week.
>
> Thank you,
>
> Dan Wheeler
> Sr. Technologist | AMD
> SW Display
> ---------------------------------------------------------------------
> ---------------------------------------------
> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
>
>
> -----Original Message-----
> From: Timur Kristóf <timur.kristof@gmail.com>
> Sent: Tuesday, October 21, 2025 12:15 PM
> To: Wentland, Harry <Harry.Wentland@amd.com>; Wheeler, Daniel
> <Daniel.Wheeler@amd.com>; amd-gfx@lists.freedesktop.org; Chung,
> ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> <Christian.Koenig@amd.com>
> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
>
> Hi,
>
> Did you guys manage to include the series in last week's promotion?
> Are there any issues?
>
> I'd really like it to be included in Linux 6.18, are we still on time
> for that?
>
> Thanks & best regards,
> Timur
>
> On 10/9/25 20:27, Harry Wentland wrote:
> >
> >
> > On 2025-10-09 13:49, Wheeler, Daniel wrote:
> > > [Public]
> > >
> > > Sure, we can add it to next week's promotion, I'm almost through
> > > this week's candidate. Tom is scheduled to prepare next week's
> > > candidate, so I'll tag him in.
> > >
> >
> > Great. Thanks.
> >
> > Harry
> >
> > > Thank you,
> > >
> > > Dan Wheeler
> > > Sr. Technologist | AMD
> > > SW Display
> > > -----------------------------------------------------------------
> > > ----
> > > ---------------------------------------------
> > > 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
> > >
> > >
> > > -----Original Message-----
> > > From: Wentland, Harry <Harry.Wentland@amd.com>
> > > Sent: Thursday, October 9, 2025 1:27 PM
> > > To: Timur Kristóf <timur.kristof@gmail.com>;
> > > amd-gfx@lists.freedesktop.org; Wheeler, Daniel
> > > <Daniel.Wheeler@amd.com>
> > > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> > > <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> > > <Christian.Koenig@amd.com>
> > > Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> > >
> > >
> > >
> > > On 2025-10-08 17:11, Harry Wentland wrote:
> > > > On 2025-09-26 14:01, Timur Kristóf wrote:
> > > > > This series adds support for analog connectors to DC for
> > > > > DCE6-10.
> > > > > There are two reasons to add this support:
> > > > >
> > > > > 1. GPUs that already use DC by default and have analog
> > > > > connectors.
> > > > > Some Tonga and Hawaii graphics cards in fact have DVI-I
> > > > > connectors, and their analog part doesn't work with DC. This
> > > > > functionality regressed when switching from the amdgpu legacy
> > > > > display code to DC.
> > > > >
> > > > > 2. GPUs that don't use amdgpu by default yet.
> > > > > Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by
> > > > > default yet, and missing analog connector support in DC is
> > > > > cited as one of the main reasons why not.
> > > > >
> > > > > Before starting this work, I asked Harry and Alex about how
> > > > > best to do it and we agreed that we'd like to use the VBIOS to
> > > > > set up the DAC. So I used the amdgpu legacy display code as a
> > > > > reference.
> > > > > The first few commits add some minor changes to DC to prepare
> > > > > for supporting analog stream and link encoders, then analog
> > > > > link detection is added along with polling, and finally DAC
> > > > > load detection support, which is useful for old displays and
> > > > > adapters.
> > > > >
> > > > > With this analog support added to DC, we could already fully
> > > > > switch CIK discrete GPUs to use DC and switch them to the
> > > > > amdgpu driver by default. This series switches Bonaire to DC
> > > > > by default, we can do the switch to amdgpu in a later series.
> > > > >
> > > > > For SI dGPUs, there are other pending patches to make DC work
> > > > > well, afterwards we could switch to DC by default, but missing
> > > > > VCE1 support is the blocker from using amdgpu by default.
> > > > >
> > > > > For GFX7 APUs, further work is needed before enabling DC by
> > > > > default, specifically with regards to the TRAVIS and NUTMEG
> > > > > external encoders which are not supported by DC at all.
> > > > >
> > > > > Changes in v2 of the series:
> > > > > Fixed regression on RDNA2 and newer APUs.
> > > > > Fixed flickering caused by polling analog connectors.
> > > > > Fixed crash on Kaveri.
> > > > > Fixed bug when HPD was high without a connected display.
> > > > > Reduced code churn by reusing same link encoder.
> > > > > Addressed other feedback from the review of v1.
> > > >
> > > > Thanks for the series.
> > > >
> > > > Patches 1-13 are
> > > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > >
> > > > I'll hope to find time for the rest tomorrow or Friday.
> > > >
> > >
> > > The rest looks good to me as well.
> > >
> > > The whole series is
> > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > >
> > > Dan, can we give this a spin in our weekly promotion tests before
> > > I merge it?
> > >
> > > Harry
> > >
> > > > Harry
> > > >
> > > > >
> > > > > Timur Kristóf (23):
> > > > >    drm/amd/display: Determine DVI-I connector type (v2)
> > > > >    drm/amd/display: Add analog bit to edid_caps (v2)
> > > > >    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
> > > > >    drm/amd/display: Hook up DAC to bios_parser_encoder_control
> > > > >    drm/amd/display: Add SelectCRTC_Source to BIOS parser
> > > > >    drm/amd/display: Get maximum pixel clock from VBIOS
> > > > >    drm/amd/display: Don't use stereo sync and audio on RGB
> > > > > signals (v2)
> > > > >    drm/amd/display: Don't try to enable/disable HPD when
> > > > > unavailable
> > > > >    drm/amd/display: Determine early if a link has supported
> > > > > encoders (v2)
> > > > >    drm/amd/display: Add concept of analog encoders (v2)
> > > > >    drm/amd/display: Implement DCE analog stream encoders
> > > > >    drm/amd/display: Implement DCE analog link encoders (v2)
> > > > >    drm/amd/display: Support DAC in dce110_hwseq
> > > > >    drm/amd/display: Add analog link detection (v2)
> > > > >    drm/amd/display: Refactor amdgpu_dm_connector_detect (v2)
> > > > >    drm/amd/display: Poll analog connectors (v2)
> > > > >    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
> > > > >    drm/amd/display: Make get_support_mask_for_device_id
> > > > > reusable
> > > > >    drm/amd/display: Add DAC_LoadDetection to BIOS parser (v2)
> > > > >    drm/amd/display: Use DAC load detection on analog
> > > > > connectors (v2)
> > > > >    drm/amd/display: Add common modes to analog displays
> > > > > without EDID
> > > > >    drm/amd/display: Don't add freesync modes to analog
> > > > > displays (v2)
> > > > >    drm/amdgpu: Use DC by default for Bonaire
> > > > >
> > > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
> > > > >   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173
> > > > > ++++++++---
> > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
> > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
> > > > >   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
> > > > > .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
> > > > >   .../drm/amd/display/dc/bios/command_table.c   | 286
> > > > > ++++++++++++++++++
> > > > >   .../drm/amd/display/dc/bios/command_table.h   |   6 +
> > > > >   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
> > > > >   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
> > > > >   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
> > > > >   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
> > > > >   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85 ++++++
> > > > > .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
> > > > >   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
> > > > >   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
> > > > >   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
> > > > >   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
> > > > >   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
> > > > >   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
> > > > >   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
> > > > >   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
> > > > > .../drm/amd/display/dc/link/link_detection.c  | 147 ++++++++-
> > > > >   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
> > > > >   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
> > > > >   .../dc/resource/dce100/dce100_resource.c      |  31 +-
> > > > >   .../dc/resource/dce110/dce110_resource.c      |   2 +
> > > > >   .../dc/resource/dce112/dce112_resource.c      |   2 +
> > > > >   .../dc/resource/dce120/dce120_resource.c      |   1 +
> > > > >   .../dc/resource/dce60/dce60_resource.c        |  29 +-
> > > > >   .../dc/resource/dce80/dce80_resource.c        |  26 +-
> > > > >   .../amd/display/include/bios_parser_types.h   |  11 +-
> > > > >   .../display/include/grph_object_ctrl_defs.h   |   1 +
> > > > >   .../drm/amd/display/include/grph_object_id.h  |   7 +
> > > > >   .../drm/amd/display/include/signal_types.h    |  12 +
> > > > >   35 files changed, 1117 insertions(+), 86 deletions(-)
> > > > >
> > > >
> > >
> >

Re: [PATCH 00/23] Analog connector support in DC (v2)

[Timur Kristóf]

Hi Daniel,

Thank you, I really appreciate your work!

Out of curiosity, can you share what your testing methodology is?
What kind of functionality do you test in general, and how much of it
can you automate? Do you test on Linux or Windows? Or both?

(If you are not comfortable answering that in public, we can also
continue this off the mailing list.)

Best regards,
Timur

On Fri, 2025-10-24 at 21:28 +0000, Wheeler, Daniel wrote:
> [Public]
> 
> Hi Timur,
> 
> I tested the series on top of the promotion for this week, and it
> tested fine. So it should be merged alongside, and I can validate
> that next week. With that, I don't see why it wouldn't make it into
> 6.19. If there's anyone who's more knowledgeable on the release
> timelines who can confirm, that would be helpful.
> 
> Thank you,
> 
> Dan Wheeler
> Sr. Technologist | AMD
> SW Display
> ---------------------------------------------------------------------
> ---------------------------------------------
> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
> amd.com
> 
> 
> -----Original Message-----
> From: timur.kristof@gmail.com <timur.kristof@gmail.com>
> Sent: Friday, October 24, 2025 3:07 PM
> To: Wheeler, Daniel <Daniel.Wheeler@amd.com>; Wentland, Harry
> <Harry.Wentland@amd.com>; amd-gfx@lists.freedesktop.org; Chung,
> ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> <Christian.Koenig@amd.com>
> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> 
> Hi Dan,
> 
> Thanks, I'm looking forward to it. Please let me know how it goes.
> 
> Is there any way I can help?
> 
> I respect that testing and validating a huge series is non-trivial.
> However, considering that we have already missed the deadline for
> 6.18, I'd like to make sure, can this feature make it into 6.19?
> 
> Thanks & best regards,
> Timur
> 
> On Tue, 2025-10-21 at 17:32 +0000, Wheeler, Daniel wrote:
> > [Public]
> > 
> > Hi Timur,
> > 
> > Sorry, the patches weren't added to either last week's or this
> > week's
> > candidate. I'm going to add the patches on top of this week's
> > promotion and run the testing with them. I'll see about getting
> > them
> > merged alongside the promotion this week.
> > 
> > Thank you,
> > 
> > Dan Wheeler
> > Sr. Technologist | AMD
> > SW Display
> > -------------------------------------------------------------------
> > --
> > ---------------------------------------------
> > 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
> > 
> > 
> > -----Original Message-----
> > From: Timur Kristóf <timur.kristof@gmail.com>
> > Sent: Tuesday, October 21, 2025 12:15 PM
> > To: Wentland, Harry <Harry.Wentland@amd.com>; Wheeler, Daniel
> > <Daniel.Wheeler@amd.com>; amd-gfx@lists.freedesktop.org; Chung,
> > ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
> > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> > <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> > <Christian.Koenig@amd.com>
> > Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> > 
> > Hi,
> > 
> > Did you guys manage to include the series in last week's promotion?
> > Are there any issues?
> > 
> > I'd really like it to be included in Linux 6.18, are we still on
> > time
> > for that?
> > 
> > Thanks & best regards,
> > Timur
> > 
> > On 10/9/25 20:27, Harry Wentland wrote:
> > > 
> > > 
> > > On 2025-10-09 13:49, Wheeler, Daniel wrote:
> > > > [Public]
> > > > 
> > > > Sure, we can add it to next week's promotion, I'm almost
> > > > through
> > > > this week's candidate. Tom is scheduled to prepare next week's
> > > > candidate, so I'll tag him in.
> > > > 
> > > 
> > > Great. Thanks.
> > > 
> > > Harry
> > > 
> > > > Thank you,
> > > > 
> > > > Dan Wheeler
> > > > Sr. Technologist | AMD
> > > > SW Display
> > > > ---------------------------------------------------------------
> > > > --
> > > > ----
> > > > ---------------------------------------------
> > > > 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
> > > > 
> > > > 
> > > > -----Original Message-----
> > > > From: Wentland, Harry <Harry.Wentland@amd.com>
> > > > Sent: Thursday, October 9, 2025 1:27 PM
> > > > To: Timur Kristóf <timur.kristof@gmail.com>;
> > > > amd-gfx@lists.freedesktop.org; Wheeler, Daniel
> > > > <Daniel.Wheeler@amd.com>
> > > > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> > > > <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> > > > <Christian.Koenig@amd.com>
> > > > Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> > > > 
> > > > 
> > > > 
> > > > On 2025-10-08 17:11, Harry Wentland wrote:
> > > > > On 2025-09-26 14:01, Timur Kristóf wrote:
> > > > > > This series adds support for analog connectors to DC for
> > > > > > DCE6-10.
> > > > > > There are two reasons to add this support:
> > > > > > 
> > > > > > 1. GPUs that already use DC by default and have analog
> > > > > > connectors.
> > > > > > Some Tonga and Hawaii graphics cards in fact have DVI-I
> > > > > > connectors, and their analog part doesn't work with DC.
> > > > > > This
> > > > > > functionality regressed when switching from the amdgpu
> > > > > > legacy
> > > > > > display code to DC.
> > > > > > 
> > > > > > 2. GPUs that don't use amdgpu by default yet.
> > > > > > Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by
> > > > > > default yet, and missing analog connector support in DC is
> > > > > > cited as one of the main reasons why not.
> > > > > > 
> > > > > > Before starting this work, I asked Harry and Alex about how
> > > > > > best to do it and we agreed that we'd like to use the VBIOS
> > > > > > to
> > > > > > set up the DAC. So I used the amdgpu legacy display code as
> > > > > > a
> > > > > > reference.
> > > > > > The first few commits add some minor changes to DC to
> > > > > > prepare
> > > > > > for supporting analog stream and link encoders, then analog
> > > > > > link detection is added along with polling, and finally DAC
> > > > > > load detection support, which is useful for old displays
> > > > > > and
> > > > > > adapters.
> > > > > > 
> > > > > > With this analog support added to DC, we could already
> > > > > > fully
> > > > > > switch CIK discrete GPUs to use DC and switch them to the
> > > > > > amdgpu driver by default. This series switches Bonaire to
> > > > > > DC
> > > > > > by default, we can do the switch to amdgpu in a later
> > > > > > series.
> > > > > > 
> > > > > > For SI dGPUs, there are other pending patches to make DC
> > > > > > work
> > > > > > well, afterwards we could switch to DC by default, but
> > > > > > missing
> > > > > > VCE1 support is the blocker from using amdgpu by default.
> > > > > > 
> > > > > > For GFX7 APUs, further work is needed before enabling DC by
> > > > > > default, specifically with regards to the TRAVIS and NUTMEG
> > > > > > external encoders which are not supported by DC at all.
> > > > > > 
> > > > > > Changes in v2 of the series:
> > > > > > Fixed regression on RDNA2 and newer APUs.
> > > > > > Fixed flickering caused by polling analog connectors.
> > > > > > Fixed crash on Kaveri.
> > > > > > Fixed bug when HPD was high without a connected display.
> > > > > > Reduced code churn by reusing same link encoder.
> > > > > > Addressed other feedback from the review of v1.
> > > > > 
> > > > > Thanks for the series.
> > > > > 
> > > > > Patches 1-13 are
> > > > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > > > 
> > > > > I'll hope to find time for the rest tomorrow or Friday.
> > > > > 
> > > > 
> > > > The rest looks good to me as well.
> > > > 
> > > > The whole series is
> > > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > > 
> > > > Dan, can we give this a spin in our weekly promotion tests
> > > > before
> > > > I merge it?
> > > > 
> > > > Harry
> > > > 
> > > > > Harry
> > > > > 
> > > > > > 
> > > > > > Timur Kristóf (23):
> > > > > >    drm/amd/display: Determine DVI-I connector type (v2)
> > > > > >    drm/amd/display: Add analog bit to edid_caps (v2)
> > > > > >    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
> > > > > >    drm/amd/display: Hook up DAC to
> > > > > > bios_parser_encoder_control
> > > > > >    drm/amd/display: Add SelectCRTC_Source to BIOS parser
> > > > > >    drm/amd/display: Get maximum pixel clock from VBIOS
> > > > > >    drm/amd/display: Don't use stereo sync and audio on RGB
> > > > > > signals (v2)
> > > > > >    drm/amd/display: Don't try to enable/disable HPD when
> > > > > > unavailable
> > > > > >    drm/amd/display: Determine early if a link has supported
> > > > > > encoders (v2)
> > > > > >    drm/amd/display: Add concept of analog encoders (v2)
> > > > > >    drm/amd/display: Implement DCE analog stream encoders
> > > > > >    drm/amd/display: Implement DCE analog link encoders (v2)
> > > > > >    drm/amd/display: Support DAC in dce110_hwseq
> > > > > >    drm/amd/display: Add analog link detection (v2)
> > > > > >    drm/amd/display: Refactor amdgpu_dm_connector_detect
> > > > > > (v2)
> > > > > >    drm/amd/display: Poll analog connectors (v2)
> > > > > >    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
> > > > > >    drm/amd/display: Make get_support_mask_for_device_id
> > > > > > reusable
> > > > > >    drm/amd/display: Add DAC_LoadDetection to BIOS parser
> > > > > > (v2)
> > > > > >    drm/amd/display: Use DAC load detection on analog
> > > > > > connectors (v2)
> > > > > >    drm/amd/display: Add common modes to analog displays
> > > > > > without EDID
> > > > > >    drm/amd/display: Don't add freesync modes to analog
> > > > > > displays (v2)
> > > > > >    drm/amdgpu: Use DC by default for Bonaire
> > > > > > 
> > > > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
> > > > > >   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173
> > > > > > ++++++++---
> > > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
> > > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
> > > > > >   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
> > > > > > .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
> > > > > >   .../drm/amd/display/dc/bios/command_table.c   | 286
> > > > > > ++++++++++++++++++
> > > > > >   .../drm/amd/display/dc/bios/command_table.h   |   6 +
> > > > > >   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
> > > > > >   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
> > > > > >   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
> > > > > >   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
> > > > > >   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85
> > > > > > ++++++
> > > > > > .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
> > > > > >   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
> > > > > >   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
> > > > > >   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
> > > > > >   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
> > > > > >   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
> > > > > >   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
> > > > > >   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
> > > > > >   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
> > > > > > .../drm/amd/display/dc/link/link_detection.c  | 147
> > > > > > ++++++++-
> > > > > >   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
> > > > > >   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
> > > > > >   .../dc/resource/dce100/dce100_resource.c      |  31 +-
> > > > > >   .../dc/resource/dce110/dce110_resource.c      |   2 +
> > > > > >   .../dc/resource/dce112/dce112_resource.c      |   2 +
> > > > > >   .../dc/resource/dce120/dce120_resource.c      |   1 +
> > > > > >   .../dc/resource/dce60/dce60_resource.c        |  29 +-
> > > > > >   .../dc/resource/dce80/dce80_resource.c        |  26 +-
> > > > > >   .../amd/display/include/bios_parser_types.h   |  11 +-
> > > > > >   .../display/include/grph_object_ctrl_defs.h   |   1 +
> > > > > >   .../drm/amd/display/include/grph_object_id.h  |   7 +
> > > > > >   .../drm/amd/display/include/signal_types.h    |  12 +
> > > > > >   35 files changed, 1117 insertions(+), 86 deletions(-)
> > > > > > 
> > > > > 
> > > > 
> > > 

RE: [PATCH 00/23] Analog connector support in DC (v2)

[Wheeler, Daniel]

[Public]

Hi Timur,

It was no issue testing your patches, sorry for the delay in getting them added/tested/merged.

As for functionality, I test solely on Linux and I send out a report, usually every Monday, regarding the promotion testing. In a nutshell, I test on two dGPU systems and two APU systems, with multiple display configs (single DP/HDMI, eDP, multidisplay, MST, DSC, USB4) and a mix of automated and manual testing. The automated testing is mainly IGT testing and some scripts to automate sleep/wake/hibernate cycles, mode changes, etc. There is some feature testing that IGT is used for as well, mainly HDCP and HDR. I run some Freesync testing, some benchmarking, and then standard usage scenarios -> YouTube and local video/audio playback, change basically every display setting in the GUI, power on, reboot, display disconnect/reconnect. I currently run tests on 3 eDP panels and 7 monitors of various types and features.

Hopefully that answers your questions. Please feel free to reach out if there's anything else you'd like to know.

Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: Timur Kristóf <timur.kristof@gmail.com>
Sent: Friday, October 31, 2025 4:19 AM
To: Wheeler, Daniel <Daniel.Wheeler@amd.com>; Wentland, Harry <Harry.Wentland@amd.com>; amd-gfx@lists.freedesktop.org; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian <Christian.Koenig@amd.com>
Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)

Hi Daniel,

Thank you, I really appreciate your work!

Out of curiosity, can you share what your testing methodology is?
What kind of functionality do you test in general, and how much of it can you automate? Do you test on Linux or Windows? Or both?

(If you are not comfortable answering that in public, we can also continue this off the mailing list.)

Best regards,
Timur

On Fri, 2025-10-24 at 21:28 +0000, Wheeler, Daniel wrote:
> [Public]
>
> Hi Timur,
>
> I tested the series on top of the promotion for this week, and it
> tested fine. So it should be merged alongside, and I can validate that
> next week. With that, I don't see why it wouldn't make it into 6.19.
> If there's anyone who's more knowledgeable on the release timelines
> who can confirm, that would be helpful.
>
> Thank you,
>
> Dan Wheeler
> Sr. Technologist | AMD
> SW Display
> ---------------------------------------------------------------------
> ---------------------------------------------
> 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
>
>
> -----Original Message-----
> From: timur.kristof@gmail.com <timur.kristof@gmail.com>
> Sent: Friday, October 24, 2025 3:07 PM
> To: Wheeler, Daniel <Daniel.Wheeler@amd.com>; Wentland, Harry
> <Harry.Wentland@amd.com>; amd-gfx@lists.freedesktop.org; Chung,
> ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> <Christian.Koenig@amd.com>
> Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
>
> Hi Dan,
>
> Thanks, I'm looking forward to it. Please let me know how it goes.
>
> Is there any way I can help?
>
> I respect that testing and validating a huge series is non-trivial.
> However, considering that we have already missed the deadline for
> 6.18, I'd like to make sure, can this feature make it into 6.19?
>
> Thanks & best regards,
> Timur
>
> On Tue, 2025-10-21 at 17:32 +0000, Wheeler, Daniel wrote:
> > [Public]
> >
> > Hi Timur,
> >
> > Sorry, the patches weren't added to either last week's or this
> > week's candidate. I'm going to add the patches on top of this week's
> > promotion and run the testing with them. I'll see about getting them
> > merged alongside the promotion this week.
> >
> > Thank you,
> >
> > Dan Wheeler
> > Sr. Technologist | AMD
> > SW Display
> > -------------------------------------------------------------------
> > --
> > ---------------------------------------------
> > 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
> >
> >
> > -----Original Message-----
> > From: Timur Kristóf <timur.kristof@gmail.com>
> > Sent: Tuesday, October 21, 2025 12:15 PM
> > To: Wentland, Harry <Harry.Wentland@amd.com>; Wheeler, Daniel
> > <Daniel.Wheeler@amd.com>; amd-gfx@lists.freedesktop.org; Chung,
> > ChiaHsuan (Tom) <ChiaHsuan.Chung@amd.com>
> > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> > <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> > <Christian.Koenig@amd.com>
> > Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> >
> > Hi,
> >
> > Did you guys manage to include the series in last week's promotion?
> > Are there any issues?
> >
> > I'd really like it to be included in Linux 6.18, are we still on
> > time for that?
> >
> > Thanks & best regards,
> > Timur
> >
> > On 10/9/25 20:27, Harry Wentland wrote:
> > >
> > >
> > > On 2025-10-09 13:49, Wheeler, Daniel wrote:
> > > > [Public]
> > > >
> > > > Sure, we can add it to next week's promotion, I'm almost through
> > > > this week's candidate. Tom is scheduled to prepare next week's
> > > > candidate, so I'll tag him in.
> > > >
> > >
> > > Great. Thanks.
> > >
> > > Harry
> > >
> > > > Thank you,
> > > >
> > > > Dan Wheeler
> > > > Sr. Technologist | AMD
> > > > SW Display
> > > > ---------------------------------------------------------------
> > > > --
> > > > ----
> > > > ---------------------------------------------
> > > > 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com
> > > >
> > > >
> > > > -----Original Message-----
> > > > From: Wentland, Harry <Harry.Wentland@amd.com>
> > > > Sent: Thursday, October 9, 2025 1:27 PM
> > > > To: Timur Kristóf <timur.kristof@gmail.com>;
> > > > amd-gfx@lists.freedesktop.org; Wheeler, Daniel
> > > > <Daniel.Wheeler@amd.com>
> > > > Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Hung, Alex
> > > > <Alex.Hung@amd.com>; siqueira@igalia.com; Koenig, Christian
> > > > <Christian.Koenig@amd.com>
> > > > Subject: Re: [PATCH 00/23] Analog connector support in DC (v2)
> > > >
> > > >
> > > >
> > > > On 2025-10-08 17:11, Harry Wentland wrote:
> > > > > On 2025-09-26 14:01, Timur Kristóf wrote:
> > > > > > This series adds support for analog connectors to DC for
> > > > > > DCE6-10.
> > > > > > There are two reasons to add this support:
> > > > > >
> > > > > > 1. GPUs that already use DC by default and have analog
> > > > > > connectors.
> > > > > > Some Tonga and Hawaii graphics cards in fact have DVI-I
> > > > > > connectors, and their analog part doesn't work with DC.
> > > > > > This
> > > > > > functionality regressed when switching from the amdgpu
> > > > > > legacy display code to DC.
> > > > > >
> > > > > > 2. GPUs that don't use amdgpu by default yet.
> > > > > > Currently, SI (GFX6) and CIK (GFX7) don't use amdgpu by
> > > > > > default yet, and missing analog connector support in DC is
> > > > > > cited as one of the main reasons why not.
> > > > > >
> > > > > > Before starting this work, I asked Harry and Alex about how
> > > > > > best to do it and we agreed that we'd like to use the VBIOS
> > > > > > to set up the DAC. So I used the amdgpu legacy display code
> > > > > > as a reference.
> > > > > > The first few commits add some minor changes to DC to
> > > > > > prepare for supporting analog stream and link encoders, then
> > > > > > analog link detection is added along with polling, and
> > > > > > finally DAC load detection support, which is useful for old
> > > > > > displays and adapters.
> > > > > >
> > > > > > With this analog support added to DC, we could already fully
> > > > > > switch CIK discrete GPUs to use DC and switch them to the
> > > > > > amdgpu driver by default. This series switches Bonaire to DC
> > > > > > by default, we can do the switch to amdgpu in a later
> > > > > > series.
> > > > > >
> > > > > > For SI dGPUs, there are other pending patches to make DC
> > > > > > work well, afterwards we could switch to DC by default, but
> > > > > > missing
> > > > > > VCE1 support is the blocker from using amdgpu by default.
> > > > > >
> > > > > > For GFX7 APUs, further work is needed before enabling DC by
> > > > > > default, specifically with regards to the TRAVIS and NUTMEG
> > > > > > external encoders which are not supported by DC at all.
> > > > > >
> > > > > > Changes in v2 of the series:
> > > > > > Fixed regression on RDNA2 and newer APUs.
> > > > > > Fixed flickering caused by polling analog connectors.
> > > > > > Fixed crash on Kaveri.
> > > > > > Fixed bug when HPD was high without a connected display.
> > > > > > Reduced code churn by reusing same link encoder.
> > > > > > Addressed other feedback from the review of v1.
> > > > >
> > > > > Thanks for the series.
> > > > >
> > > > > Patches 1-13 are
> > > > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > > >
> > > > > I'll hope to find time for the rest tomorrow or Friday.
> > > > >
> > > >
> > > > The rest looks good to me as well.
> > > >
> > > > The whole series is
> > > > Reviewed-by: Harry Wentland <harry.wentland@amd.com>
> > > >
> > > > Dan, can we give this a spin in our weekly promotion tests
> > > > before I merge it?
> > > >
> > > > Harry
> > > >
> > > > > Harry
> > > > >
> > > > > >
> > > > > > Timur Kristóf (23):
> > > > > >    drm/amd/display: Determine DVI-I connector type (v2)
> > > > > >    drm/amd/display: Add analog bit to edid_caps (v2)
> > > > > >    drm/amd/display: Introduce MAX_LINK_ENCODERS (v2)
> > > > > >    drm/amd/display: Hook up DAC to
> > > > > > bios_parser_encoder_control
> > > > > >    drm/amd/display: Add SelectCRTC_Source to BIOS parser
> > > > > >    drm/amd/display: Get maximum pixel clock from VBIOS
> > > > > >    drm/amd/display: Don't use stereo sync and audio on RGB
> > > > > > signals (v2)
> > > > > >    drm/amd/display: Don't try to enable/disable HPD when
> > > > > > unavailable
> > > > > >    drm/amd/display: Determine early if a link has supported
> > > > > > encoders (v2)
> > > > > >    drm/amd/display: Add concept of analog encoders (v2)
> > > > > >    drm/amd/display: Implement DCE analog stream encoders
> > > > > >    drm/amd/display: Implement DCE analog link encoders (v2)
> > > > > >    drm/amd/display: Support DAC in dce110_hwseq
> > > > > >    drm/amd/display: Add analog link detection (v2)
> > > > > >    drm/amd/display: Refactor amdgpu_dm_connector_detect
> > > > > > (v2)
> > > > > >    drm/amd/display: Poll analog connectors (v2)
> > > > > >    drm/amd/display: Add DCE BIOS_SCRATCH_0 register
> > > > > >    drm/amd/display: Make get_support_mask_for_device_id
> > > > > > reusable
> > > > > >    drm/amd/display: Add DAC_LoadDetection to BIOS parser
> > > > > > (v2)
> > > > > >    drm/amd/display: Use DAC load detection on analog
> > > > > > connectors (v2)
> > > > > >    drm/amd/display: Add common modes to analog displays
> > > > > > without EDID
> > > > > >    drm/amd/display: Don't add freesync modes to analog
> > > > > > displays (v2)
> > > > > >    drm/amdgpu: Use DC by default for Bonaire
> > > > > >
> > > > > >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |   1 -
> > > > > >   .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 173
> > > > > > ++++++++---
> > > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   5 +-
> > > > > >   .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |   1 +
> > > > > >   .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |  20 ++
> > > > > > .../gpu/drm/amd/display/dc/bios/bios_parser.c |  95 +++++-
> > > > > >   .../drm/amd/display/dc/bios/command_table.c   | 286
> > > > > > ++++++++++++++++++
> > > > > >   .../drm/amd/display/dc/bios/command_table.h   |   6 +
> > > > > >   .../drm/amd/display/dc/core/dc_link_enc_cfg.c |   4 +-
> > > > > >   .../gpu/drm/amd/display/dc/core/dc_resource.c |   8 +
> > > > > >   .../gpu/drm/amd/display/dc/dc_bios_types.h    |   9 +
> > > > > >   drivers/gpu/drm/amd/display/dc/dc_types.h     |   8 +-
> > > > > >   .../drm/amd/display/dc/dce/dce_link_encoder.c |  85
> > > > > > ++++++
> > > > > > .../drm/amd/display/dc/dce/dce_link_encoder.h |  16 +-
> > > > > >   .../amd/display/dc/dce/dce_stream_encoder.c   |  14 +
> > > > > >   .../amd/display/dc/dce/dce_stream_encoder.h   |   5 +
> > > > > >   .../amd/display/dc/hwss/dce110/dce110_hwseq.c |  75 ++++-
> > > > > >   .../gpu/drm/amd/display/dc/inc/core_types.h   |   8 +-
> > > > > >   .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |  24 ++
> > > > > >   .../drm/amd/display/dc/inc/hw/link_encoder.h  |   2 +
> > > > > >   drivers/gpu/drm/amd/display/dc/inc/resource.h |   1 +
> > > > > >   .../amd/display/dc/link/hwss/link_hwss_dio.c  |  19 +-
> > > > > > .../drm/amd/display/dc/link/link_detection.c  | 147
> > > > > > ++++++++-
> > > > > >   .../gpu/drm/amd/display/dc/link/link_dpms.c   |   9 +-
> > > > > >   .../drm/amd/display/dc/link/link_factory.c    |  60 +++-
> > > > > >   .../dc/resource/dce100/dce100_resource.c      |  31 +-
> > > > > >   .../dc/resource/dce110/dce110_resource.c      |   2 +
> > > > > >   .../dc/resource/dce112/dce112_resource.c      |   2 +
> > > > > >   .../dc/resource/dce120/dce120_resource.c      |   1 +
> > > > > >   .../dc/resource/dce60/dce60_resource.c        |  29 +-
> > > > > >   .../dc/resource/dce80/dce80_resource.c        |  26 +-
> > > > > >   .../amd/display/include/bios_parser_types.h   |  11 +-
> > > > > >   .../display/include/grph_object_ctrl_defs.h   |   1 +
> > > > > >   .../drm/amd/display/include/grph_object_id.h  |   7 +
> > > > > >   .../drm/amd/display/include/signal_types.h    |  12 +
> > > > > >   35 files changed, 1117 insertions(+), 86 deletions(-)
> > > > > >
> > > > >
> > > >
> > >