* [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling
@ 2020-08-24 16:15 Alex Deucher
2020-08-24 16:15 ` [PATCH 2/8] drm/amdgpu: add an asic callback for pre asic init Alex Deucher
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
Properly define this register using a relative offset rather
than an absolute offset and use the proper SOC15 macros to
access it. It's also DCN, not DCE, so remove it from the
DCE12 header.
No functional change.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++++--
drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h | 2 --
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6a780b674018..624f7fcf5eba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -67,6 +67,9 @@
#define HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_HEIGHT__SHIFT 0x10
#define HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_WIDTH_MASK 0x00003FFFL
#define HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_HEIGHT_MASK 0x3FFF0000L
+#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x049d
+#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
+
static const u32 golden_settings_vega10_hdp[] =
{
@@ -1282,7 +1285,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev)
static void gmc_v9_0_restore_registers(struct amdgpu_device *adev)
{
if (adev->asic_type == CHIP_RAVEN)
- WREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
+ WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
}
/**
@@ -1394,7 +1397,7 @@ static int gmc_v9_0_hw_init(void *handle)
static void gmc_v9_0_save_registers(struct amdgpu_device *adev)
{
if (adev->asic_type == CHIP_RAVEN)
- adev->gmc.sdpif_register = RREG32(mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);
+ adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);
}
/**
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
index 27bb8c1ab858..b6f74bf4af02 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
@@ -7376,8 +7376,6 @@
#define mmCRTC4_CRTC_DRR_CONTROL 0x0f3e
#define mmCRTC4_CRTC_DRR_CONTROL_BASE_IDX 2
-#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x395d
-#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
// addressBlock: dce_dc_fmt4_dispdec
// base address: 0x2000
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/8] drm/amdgpu: add an asic callback for pre asic init
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-24 16:15 ` [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI Alex Deucher
` (5 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
This callback can be used by asics that need to
do something special prior to calling atom asic init.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 54666eea1863..4746b60b5327 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -617,6 +617,8 @@ struct amdgpu_asic_funcs {
uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
/* device supports BACO */
bool (*supports_baco)(struct amdgpu_device *adev);
+ /* pre asic_init quirks */
+ void (*pre_asic_init)(struct amdgpu_device *adev);
};
/*
@@ -1129,6 +1131,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
#define amdgpu_asic_need_reset_on_init(adev) (adev)->asic_funcs->need_reset_on_init((adev))
#define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev)))
#define amdgpu_asic_supports_baco(adev) (adev)->asic_funcs->supports_baco((adev))
+#define amdgpu_asic_pre_asic_init(adev) (adev)->asic_funcs->pre_asic_init((adev))
#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
2020-08-24 16:15 ` [PATCH 2/8] drm/amdgpu: add an asic callback for pre asic init Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-28 8:06 ` Christian König
2020-08-24 16:15 ` [PATCH 4/8] drm/amdgpu: add pre_asic_init callback for CIK Alex Deucher
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
Nothing to do for this family.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/si.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index eaa2f071b139..455d5e366c69 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1871,6 +1871,10 @@ static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
return 0;
}
+static void si_pre_asic_init(struct amdgpu_device *adev)
+{
+}
+
static const struct amdgpu_asic_funcs si_asic_funcs =
{
.read_disabled_bios = &si_read_disabled_bios,
@@ -1892,6 +1896,7 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
.need_reset_on_init = &si_need_reset_on_init,
.get_pcie_replay_count = &si_get_pcie_replay_count,
.supports_baco = &si_asic_supports_baco,
+ .pre_asic_init = &si_pre_asic_init,
};
static uint32_t si_get_rev_id(struct amdgpu_device *adev)
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/8] drm/amdgpu: add pre_asic_init callback for CIK
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
2020-08-24 16:15 ` [PATCH 2/8] drm/amdgpu: add an asic callback for pre asic init Alex Deucher
2020-08-24 16:15 ` [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-24 16:15 ` [PATCH 5/8] drm/amdgpu: add pre_asic_init callback for VI Alex Deucher
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
Nothing to do for this family.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/cik.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 7e71ffbca93d..03ff8bd1fee8 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1921,6 +1921,10 @@ static uint64_t cik_get_pcie_replay_count(struct amdgpu_device *adev)
return (nak_r + nak_g);
}
+static void cik_pre_asic_init(struct amdgpu_device *adev)
+{
+}
+
static const struct amdgpu_asic_funcs cik_asic_funcs =
{
.read_disabled_bios = &cik_read_disabled_bios,
@@ -1941,6 +1945,7 @@ static const struct amdgpu_asic_funcs cik_asic_funcs =
.need_reset_on_init = &cik_need_reset_on_init,
.get_pcie_replay_count = &cik_get_pcie_replay_count,
.supports_baco = &cik_asic_supports_baco,
+ .pre_asic_init = &cik_pre_asic_init,
};
static int cik_common_early_init(void *handle)
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 5/8] drm/amdgpu: add pre_asic_init callback for VI
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
` (2 preceding siblings ...)
2020-08-24 16:15 ` [PATCH 4/8] drm/amdgpu: add pre_asic_init callback for CIK Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-24 16:15 ` [PATCH 6/8] drm/amdgpu: add pre_asic_init callback for SOC15 Alex Deucher
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
Nothing to do for this family.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index a92880c67841..9bcd0eebc6d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1068,6 +1068,10 @@ static bool vi_need_reset_on_init(struct amdgpu_device *adev)
return false;
}
+static void vi_pre_asic_init(struct amdgpu_device *adev)
+{
+}
+
static const struct amdgpu_asic_funcs vi_asic_funcs =
{
.read_disabled_bios = &vi_read_disabled_bios,
@@ -1088,6 +1092,7 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
.need_reset_on_init = &vi_need_reset_on_init,
.get_pcie_replay_count = &vi_get_pcie_replay_count,
.supports_baco = &vi_asic_supports_baco,
+ .pre_asic_init = &vi_pre_asic_init,
};
#define CZ_REV_BRISTOL(rev) \
--
2.25.4
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 6/8] drm/amdgpu: add pre_asic_init callback for SOC15
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
` (3 preceding siblings ...)
2020-08-24 16:15 ` [PATCH 5/8] drm/amdgpu: add pre_asic_init callback for VI Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-24 16:15 ` [PATCH 7/8] drm/amdgpu: add pre_asic_init callback for navi Alex Deucher
2020-08-24 16:15 ` [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init Alex Deucher
6 siblings, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
We need to restore some registers prior to running asic
init to work around a firmware bug.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 35 +++++++++++++--------------
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h | 2 ++
drivers/gpu/drm/amd/amdgpu/soc15.c | 7 ++++++
3 files changed, 26 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 624f7fcf5eba..bcd201926bf4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1075,6 +1075,20 @@ static int gmc_v9_0_gart_init(struct amdgpu_device *adev)
return amdgpu_gart_table_vram_alloc(adev);
}
+/**
+ * gmc_v9_0_save_registers - saves regs
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * This saves potential register values that should be
+ * restored upon resume
+ */
+static void gmc_v9_0_save_registers(struct amdgpu_device *adev)
+{
+ if (adev->asic_type == CHIP_RAVEN)
+ adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);
+}
+
static int gmc_v9_0_sw_init(void *handle)
{
int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
@@ -1229,6 +1243,8 @@ static int gmc_v9_0_sw_init(void *handle)
amdgpu_vm_manager_init(adev);
+ gmc_v9_0_save_registers(adev);
+
return 0;
}
@@ -1282,7 +1298,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev)
*
* This restores register values, saved at suspend.
*/
-static void gmc_v9_0_restore_registers(struct amdgpu_device *adev)
+void gmc_v9_0_restore_registers(struct amdgpu_device *adev)
{
if (adev->asic_type == CHIP_RAVEN)
WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register);
@@ -1386,20 +1402,6 @@ static int gmc_v9_0_hw_init(void *handle)
return r;
}
-/**
- * gmc_v9_0_save_registers - saves regs
- *
- * @adev: amdgpu_device pointer
- *
- * This saves potential register values that should be
- * restored upon resume
- */
-static void gmc_v9_0_save_registers(struct amdgpu_device *adev)
-{
- if (adev->asic_type == CHIP_RAVEN)
- adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0);
-}
-
/**
* gmc_v9_0_gart_disable - gart disable
*
@@ -1440,8 +1442,6 @@ static int gmc_v9_0_suspend(void *handle)
if (r)
return r;
- gmc_v9_0_save_registers(adev);
-
return 0;
}
@@ -1450,7 +1450,6 @@ static int gmc_v9_0_resume(void *handle)
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- gmc_v9_0_restore_registers(adev);
r = gmc_v9_0_hw_init(adev);
if (r)
return r;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
index e0585e8c6c1b..c415c439f690 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
@@ -26,4 +26,6 @@
extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
+
+void gmc_v9_0_restore_registers(struct amdgpu_device *adev);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 3cd98c144bc6..a239261e4990 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1029,6 +1029,11 @@ static uint64_t soc15_get_pcie_replay_count(struct amdgpu_device *adev)
return (nak_r + nak_g);
}
+static void soc15_pre_asic_init(struct amdgpu_device *adev)
+{
+ gmc_v9_0_restore_registers(adev);
+}
+
static const struct amdgpu_asic_funcs soc15_asic_funcs =
{
.read_disabled_bios = &soc15_read_disabled_bios,
@@ -1049,6 +1054,7 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs =
.need_reset_on_init = &soc15_need_reset_on_init,
.get_pcie_replay_count = &soc15_get_pcie_replay_count,
.supports_baco = &soc15_supports_baco,
+ .pre_asic_init = &soc15_pre_asic_init,
};
static const struct amdgpu_asic_funcs vega20_asic_funcs =
@@ -1072,6 +1078,7 @@ static const struct amdgpu_asic_funcs vega20_asic_funcs =
.need_reset_on_init = &soc15_need_reset_on_init,
.get_pcie_replay_count = &soc15_get_pcie_replay_count,
.supports_baco = &soc15_supports_baco,
+ .pre_asic_init = &soc15_pre_asic_init,
};
static int soc15_common_early_init(void *handle)
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 7/8] drm/amdgpu: add pre_asic_init callback for navi
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
` (4 preceding siblings ...)
2020-08-24 16:15 ` [PATCH 6/8] drm/amdgpu: add pre_asic_init callback for SOC15 Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-24 16:15 ` [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init Alex Deucher
6 siblings, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
Nothing to do for this family.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 54e941e0db60..33a6d2d5fc16 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -691,6 +691,10 @@ static void nv_init_doorbell_index(struct amdgpu_device *adev)
adev->doorbell_index.sdma_doorbell_range = 20;
}
+static void nv_pre_asic_init(struct amdgpu_device *adev)
+{
+}
+
static const struct amdgpu_asic_funcs nv_asic_funcs =
{
.read_disabled_bios = &nv_read_disabled_bios,
@@ -710,6 +714,7 @@ static const struct amdgpu_asic_funcs nv_asic_funcs =
.need_reset_on_init = &nv_need_reset_on_init,
.get_pcie_replay_count = &nv_get_pcie_replay_count,
.supports_baco = &nv_asic_supports_baco,
+ .pre_asic_init = &nv_pre_asic_init,
};
static int nv_common_early_init(void *handle)
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
` (5 preceding siblings ...)
2020-08-24 16:15 ` [PATCH 7/8] drm/amdgpu: add pre_asic_init callback for navi Alex Deucher
@ 2020-08-24 16:15 ` Alex Deucher
2020-08-24 18:13 ` Nirmoy
6 siblings, 1 reply; 12+ messages in thread
From: Alex Deucher @ 2020-08-24 16:15 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
This allows us to add asic specific workarounds for atom
asic init while keeping the adev specifics out of the
atombios parser code.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 6573e1112462..e41aa1e885ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -653,6 +653,20 @@ static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev,
BUG();
}
+/**
+ * amdgpu_device_asic_init - Wrapper for atom asic_init
+ *
+ * @dev: drm_device pointer
+ *
+ * Does any asic specific work and then calls atom asic init.
+ */
+static int amdgpu_device_asic_init(struct amdgpu_device *adev)
+{
+ amdgpu_asic_pre_asic_init(adev);
+
+ return amdgpu_atom_asic_init(adev->mode_info.atom_context);
+}
+
/**
* amdgpu_device_vram_scratch_init - allocate the VRAM scratch page
*
@@ -3203,7 +3217,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
goto failed;
}
DRM_INFO("GPU posting now...\n");
- r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
+ r = amdgpu_device_asic_init(adev);
if (r) {
dev_err(adev->dev, "gpu post error!\n");
goto failed;
@@ -3552,7 +3566,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
/* post card */
if (amdgpu_device_need_post(adev)) {
- r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
+ r = amdgpu_device_asic_init(adev);
if (r)
DRM_ERROR("amdgpu asic init failed\n");
}
@@ -4109,7 +4123,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
if (need_full_reset) {
/* post card */
- if (amdgpu_atom_asic_init(tmp_adev->mode_info.atom_context))
+ if (amdgpu_device_asic_init(tmp_adev))
DRM_WARN("asic atom init failed!");
if (!r) {
--
2.25.4
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init
2020-08-24 16:15 ` [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init Alex Deucher
@ 2020-08-24 18:13 ` Nirmoy
0 siblings, 0 replies; 12+ messages in thread
From: Nirmoy @ 2020-08-24 18:13 UTC (permalink / raw)
To: amd-gfx
Series is Acked-by: Nirmoy Das <nirmoy.das@amd.com>
On 8/24/20 6:15 PM, Alex Deucher wrote:
> This allows us to add asic specific workarounds for atom
> asic init while keeping the adev specifics out of the
> atombios parser code.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 6573e1112462..e41aa1e885ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -653,6 +653,20 @@ static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev,
> BUG();
> }
>
> +/**
> + * amdgpu_device_asic_init - Wrapper for atom asic_init
> + *
> + * @dev: drm_device pointer
> + *
> + * Does any asic specific work and then calls atom asic init.
> + */
> +static int amdgpu_device_asic_init(struct amdgpu_device *adev)
> +{
> + amdgpu_asic_pre_asic_init(adev);
> +
> + return amdgpu_atom_asic_init(adev->mode_info.atom_context);
> +}
> +
> /**
> * amdgpu_device_vram_scratch_init - allocate the VRAM scratch page
> *
> @@ -3203,7 +3217,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> goto failed;
> }
> DRM_INFO("GPU posting now...\n");
> - r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
> + r = amdgpu_device_asic_init(adev);
> if (r) {
> dev_err(adev->dev, "gpu post error!\n");
> goto failed;
> @@ -3552,7 +3566,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
>
> /* post card */
> if (amdgpu_device_need_post(adev)) {
> - r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
> + r = amdgpu_device_asic_init(adev);
> if (r)
> DRM_ERROR("amdgpu asic init failed\n");
> }
> @@ -4109,7 +4123,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
> list_for_each_entry(tmp_adev, device_list_handle, gmc.xgmi.head) {
> if (need_full_reset) {
> /* post card */
> - if (amdgpu_atom_asic_init(tmp_adev->mode_info.atom_context))
> + if (amdgpu_device_asic_init(tmp_adev))
> DRM_WARN("asic atom init failed!");
>
> if (!r) {
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI
2020-08-24 16:15 ` [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI Alex Deucher
@ 2020-08-28 8:06 ` Christian König
2020-08-28 13:38 ` Alex Deucher
0 siblings, 1 reply; 12+ messages in thread
From: Christian König @ 2020-08-28 8:06 UTC (permalink / raw)
To: Alex Deucher, amd-gfx; +Cc: Alex Deucher
Am 24.08.20 um 18:15 schrieb Alex Deucher:
> Nothing to do for this family.
Uff, no. Can't we just make the callback optional?
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/si.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
> index eaa2f071b139..455d5e366c69 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si.c
> @@ -1871,6 +1871,10 @@ static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
> return 0;
> }
>
> +static void si_pre_asic_init(struct amdgpu_device *adev)
> +{
> +}
> +
> static const struct amdgpu_asic_funcs si_asic_funcs =
> {
> .read_disabled_bios = &si_read_disabled_bios,
> @@ -1892,6 +1896,7 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
> .need_reset_on_init = &si_need_reset_on_init,
> .get_pcie_replay_count = &si_get_pcie_replay_count,
> .supports_baco = &si_asic_supports_baco,
> + .pre_asic_init = &si_pre_asic_init,
> };
>
> static uint32_t si_get_rev_id(struct amdgpu_device *adev)
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI
2020-08-28 8:06 ` Christian König
@ 2020-08-28 13:38 ` Alex Deucher
2020-08-28 14:30 ` Christian König
0 siblings, 1 reply; 12+ messages in thread
From: Alex Deucher @ 2020-08-28 13:38 UTC (permalink / raw)
To: Christian Koenig; +Cc: Alex Deucher, amd-gfx list
On Fri, Aug 28, 2020 at 4:06 AM Christian König
<ckoenig.leichtzumerken@gmail.com> wrote:
>
> Am 24.08.20 um 18:15 schrieb Alex Deucher:
> > Nothing to do for this family.
>
> Uff, no. Can't we just make the callback optional?
>
I guess we could, but all of the other asic callbacks are assumed to be present.
Alex
> >
> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/si.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
> > index eaa2f071b139..455d5e366c69 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/si.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/si.c
> > @@ -1871,6 +1871,10 @@ static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
> > return 0;
> > }
> >
> > +static void si_pre_asic_init(struct amdgpu_device *adev)
> > +{
> > +}
> > +
> > static const struct amdgpu_asic_funcs si_asic_funcs =
> > {
> > .read_disabled_bios = &si_read_disabled_bios,
> > @@ -1892,6 +1896,7 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
> > .need_reset_on_init = &si_need_reset_on_init,
> > .get_pcie_replay_count = &si_get_pcie_replay_count,
> > .supports_baco = &si_asic_supports_baco,
> > + .pre_asic_init = &si_pre_asic_init,
> > };
> >
> > static uint32_t si_get_rev_id(struct amdgpu_device *adev)
>
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI
2020-08-28 13:38 ` Alex Deucher
@ 2020-08-28 14:30 ` Christian König
0 siblings, 0 replies; 12+ messages in thread
From: Christian König @ 2020-08-28 14:30 UTC (permalink / raw)
To: Alex Deucher; +Cc: Alex Deucher, amd-gfx list
Am 28.08.20 um 15:38 schrieb Alex Deucher:
> On Fri, Aug 28, 2020 at 4:06 AM Christian König
> <ckoenig.leichtzumerken@gmail.com> wrote:
>> Am 24.08.20 um 18:15 schrieb Alex Deucher:
>>> Nothing to do for this family.
>> Uff, no. Can't we just make the callback optional?
>>
> I guess we could, but all of the other asic callbacks are assumed to be present.
Yeah, but those aren't empty. Aren't they?
When we got an empty callback we really should make it optional, except
if it is extremely performance critical.
Christian.
>
> Alex
>
>>> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>>> ---
>>> drivers/gpu/drm/amd/amdgpu/si.c | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
>>> index eaa2f071b139..455d5e366c69 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/si.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/si.c
>>> @@ -1871,6 +1871,10 @@ static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
>>> return 0;
>>> }
>>>
>>> +static void si_pre_asic_init(struct amdgpu_device *adev)
>>> +{
>>> +}
>>> +
>>> static const struct amdgpu_asic_funcs si_asic_funcs =
>>> {
>>> .read_disabled_bios = &si_read_disabled_bios,
>>> @@ -1892,6 +1896,7 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
>>> .need_reset_on_init = &si_need_reset_on_init,
>>> .get_pcie_replay_count = &si_get_pcie_replay_count,
>>> .supports_baco = &si_asic_supports_baco,
>>> + .pre_asic_init = &si_pre_asic_init,
>>> };
>>>
>>> static uint32_t si_get_rev_id(struct amdgpu_device *adev)
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-08-28 14:30 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-08-24 16:15 [PATCH 1/8] drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling Alex Deucher
2020-08-24 16:15 ` [PATCH 2/8] drm/amdgpu: add an asic callback for pre asic init Alex Deucher
2020-08-24 16:15 ` [PATCH 3/8] drm/amdgpu: add pre_asic_init callback for SI Alex Deucher
2020-08-28 8:06 ` Christian König
2020-08-28 13:38 ` Alex Deucher
2020-08-28 14:30 ` Christian König
2020-08-24 16:15 ` [PATCH 4/8] drm/amdgpu: add pre_asic_init callback for CIK Alex Deucher
2020-08-24 16:15 ` [PATCH 5/8] drm/amdgpu: add pre_asic_init callback for VI Alex Deucher
2020-08-24 16:15 ` [PATCH 6/8] drm/amdgpu: add pre_asic_init callback for SOC15 Alex Deucher
2020-08-24 16:15 ` [PATCH 7/8] drm/amdgpu: add pre_asic_init callback for navi Alex Deucher
2020-08-24 16:15 ` [PATCH 8/8] drm/amdgpu: add a wrapper for atom asic_init Alex Deucher
2020-08-24 18:13 ` Nirmoy
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