From: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Evan Quan <evan.quan-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 07/10] drm/amdgpu: reduce the idle period that RLC has to wait before request CGCG
Date: Thu, 5 Jul 2018 17:09:32 +0800 [thread overview]
Message-ID: <20180705090935.9638-7-evan.quan@amd.com> (raw)
In-Reply-To: <20180705090935.9638-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
Gfxoff feature may depends on the CGCG(on vega12, that's the case). This
change will help to enable gfxoff feature more frequently.
Change-Id: I021577e331b7beb19796bd6f5465b867f6038974
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index ee537423af11..cb7f2efa9882 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3629,9 +3629,11 @@ static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,
/* update CGCG and CGLS override bits */
if (def != data)
WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);
- /* enable 3Dcgcg FSM(0x0020003f) */
+
+ /* enable 3Dcgcg FSM(0x0000363f) */
def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);
- data = (0x2000 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |
+
+ data = (0x36 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |
RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK;
if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGLS)
data |= (0x000F << RLC_CGCG_CGLS_CTRL_3D__CGLS_REP_COMPANSAT_DELAY__SHIFT) |
@@ -3678,9 +3680,10 @@ static void gfx_v9_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
if (def != data)
WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);
- /* enable cgcg FSM(0x0020003F) */
+ /* enable cgcg FSM(0x0000363F) */
def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL);
- data = (0x2000 << RLC_CGCG_CGLS_CTRL__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |
+
+ data = (0x36 << RLC_CGCG_CGLS_CTRL__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |
RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK;
if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS)
data |= (0x000F << RLC_CGCG_CGLS_CTRL__CGLS_REP_COMPANSAT_DELAY__SHIFT) |
--
2.18.0
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next prev parent reply other threads:[~2018-07-05 9:09 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-05 9:09 [PATCH 01/10] drm/amdgpu: pin the csb buffer on hw init Evan Quan
[not found] ` <20180705090935.9638-1-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-05 9:09 ` [PATCH 02/10] drm/amdgpu: init CSIB regardless of rlc version and pg status Evan Quan
[not found] ` <20180705090935.9638-2-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-09 3:56 ` Quan, Evan
[not found] ` <SN6PR12MB265670B1B3AAC47773CBA7A9E4440-kxOKjb6HO/FeL/N0e1LXkAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-07-10 17:17 ` Alex Deucher
2018-07-05 9:09 ` [PATCH 03/10] drm/amdgpu: init rlc save restore as long as the lists exist Evan Quan
[not found] ` <20180705090935.9638-3-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-05 15:19 ` Huang Rui
2018-07-06 9:14 ` Quan, Evan
2018-07-06 10:14 ` Huang Rui
2018-07-09 3:46 ` Quan, Evan
2018-07-05 9:09 ` [PATCH 04/10] drm/amdgpu: correct direct reg list length for v2_0 rlc Evan Quan
[not found] ` <20180705090935.9638-4-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-05 15:06 ` Huang Rui
2018-07-09 4:00 ` Quan, Evan
2018-07-05 9:09 ` [PATCH 05/10] drm/amdgpu: drop mmRLC_PG_CNTL clear Evan Quan
[not found] ` <20180705090935.9638-5-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-05 15:07 ` Huang Rui
2018-07-05 15:33 ` Alex Deucher
[not found] ` <CADnq5_Mkjuj9hLahht=s70wwXKNqnRcaFMJNjOjR8HSh_DWpUw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-06 10:04 ` Huang Rui
2018-07-05 9:09 ` [PATCH 06/10] drm/amdgpu: no touch for the reserved bit of RLC_CGTT_MGCG_OVERRIDE Evan Quan
[not found] ` <20180705090935.9638-6-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-09 4:06 ` Quan, Evan
[not found] ` <SN6PR12MB2656F298CDBE1A2607BA5B36E4440-kxOKjb6HO/FeL/N0e1LXkAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-07-10 17:18 ` Alex Deucher
2018-07-05 9:09 ` Evan Quan [this message]
[not found] ` <20180705090935.9638-7-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-09 4:06 ` [PATCH 07/10] drm/amdgpu: reduce the idle period that RLC has to wait before request CGCG Quan, Evan
[not found] ` <SN6PR12MB2656009EA5F895E6F2B399B5E4440-kxOKjb6HO/FeL/N0e1LXkAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-07-10 17:19 ` Alex Deucher
[not found] ` <CADnq5_NhmSk62EE3VG+V-=9M-pWZo-jJzzrLKL_K0By2_OaQ7g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-11 6:44 ` Quan, Evan
2018-07-05 9:09 ` [PATCH 08/10] drm/amdgpu: use the accessible target rlc safe mode Apis directly Evan Quan
[not found] ` <20180705090935.9638-8-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-09 4:08 ` Quan, Evan
[not found] ` <SN6PR12MB26569BE03C4B86F63E161B94E4440-kxOKjb6HO/FeL/N0e1LXkAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-07-10 17:23 ` Alex Deucher
[not found] ` <CADnq5_OkzpNCaGBNsB5uOCutr9+m6szm6O6QpmkoEvBSh7Ux5A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-11 6:44 ` Quan, Evan
2018-07-05 9:09 ` [PATCH 09/10] drm/amd/powerplay: add vega12 SMU gfxoff support Evan Quan
[not found] ` <20180705090935.9638-9-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-05 15:21 ` Huang Rui
2018-07-05 9:09 ` [PATCH 10/10] drm/amd/powerplay: no need to mask workable gfxoff feature for vega12 Evan Quan
[not found] ` <20180705090935.9638-10-evan.quan-5C7GfCeVMHo@public.gmane.org>
2018-07-09 4:36 ` Quan, Evan
[not found] ` <SN6PR12MB2656713C37BA977A41CB04CEE4440-kxOKjb6HO/FeL/N0e1LXkAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-07-10 17:24 ` Alex Deucher
2018-07-05 15:25 ` [PATCH 01/10] drm/amdgpu: pin the csb buffer on hw init Huang Rui
2018-07-05 15:25 ` Alex Deucher
[not found] ` <CADnq5_ObbDpsjt1-gC5oOJLe-89jU2L1VBs4sOr1-4tgq8n=3Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-06 9:10 ` Quan, Evan
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