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From: <sunpeng.li-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Leo Li <sunpeng.li-5C7GfCeVMHo@public.gmane.org>,
	Eric Yang <eric.yang2-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 29/49] drm/amd/display: Enable type C hotplug
Date: Fri, 9 Aug 2019 17:37:22 -0400	[thread overview]
Message-ID: <20190809213742.30301-30-sunpeng.li@amd.com> (raw)
In-Reply-To: <20190809213742.30301-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>

From: Eric Yang <Eric.Yang2@amd.com>

[Why and How]
We want to change where timing is done for alt mode.
Some of the commented out #ifs are needed for DCN20
so we enable them for that case.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 59 +++++++++++++++++++
 .../amd/display/dc/dcn10/dcn10_link_encoder.h |  1 +
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |  1 +
 3 files changed, 61 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index ca12c66a4e06..1a30066ac605 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -682,6 +682,56 @@ static bool is_same_edid(struct dc_edid *old_edid, struct dc_edid *new_edid)
 	return (memcmp(old_edid->raw_edid, new_edid->raw_edid, new_edid->length) == 0);
 }
 
+bool wait_for_alt_mode(struct dc_link *link)
+{
+
+	/**
+	 * something is terribly wrong if time out is > 200ms. (5Hz)
+	 * 500 microseconds * 400 tries us 200 ms
+	 **/
+	unsigned int sleep_time_in_microseconds = 500;
+	unsigned int tries_allowed = 400;
+	bool is_in_alt_mode;
+	unsigned long long enter_timestamp;
+	unsigned long long finish_timestamp;
+	unsigned long long time_taken_in_ns;
+	int tries_taken;
+
+	DC_LOGGER_INIT(link->ctx->logger);
+
+	if (link->link_enc->funcs->is_in_alt_mode == NULL)
+		return true;
+
+	is_in_alt_mode = link->link_enc->funcs->is_in_alt_mode(link->link_enc);
+	DC_LOG_WARNING("DP Alt mode state on HPD: %d\n", is_in_alt_mode);
+
+	if (is_in_alt_mode)
+		return true;
+
+	enter_timestamp = dm_get_timestamp(link->ctx);
+
+	for (tries_taken = 0; tries_taken < tries_allowed; tries_taken++) {
+		udelay(sleep_time_in_microseconds);
+		/* ask the link if alt mode is enabled, if so return ok */
+		if (link->link_enc->funcs->is_in_alt_mode(link->link_enc)) {
+
+			finish_timestamp = dm_get_timestamp(link->ctx);
+			time_taken_in_ns = dm_get_elapse_time_in_ns(
+				link->ctx, finish_timestamp, enter_timestamp);
+			DC_LOG_WARNING("Alt mode entered finished after %llu ms\n",
+				       time_taken_in_ns / 1000000);
+			return true;
+		}
+
+	}
+	finish_timestamp = dm_get_timestamp(link->ctx);
+	time_taken_in_ns = dm_get_elapse_time_in_ns(link->ctx, finish_timestamp,
+						    enter_timestamp);
+	DC_LOG_WARNING("Alt mode has timed out after %llu ms\n",
+			time_taken_in_ns / 1000000);
+	return false;
+}
+
 /**
  * dc_link_detect() - Detect if a sink is attached to a given link
  *
@@ -770,6 +820,15 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
 		}
 
 		case SIGNAL_TYPE_DISPLAY_PORT: {
+			/* wa HPD high coming too early*/
+			if (link->link_enc->features.flags.bits.DP_IS_USB_C == 1) {
+
+				/* if alt mode times out, return false */
+				if (wait_for_alt_mode(link) == false) {
+					return false;
+				}
+			}
+
 			if (!detect_dp(
 				link,
 				&sink_caps,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
index 33b2af1a181c..f3e57343417c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h
@@ -337,6 +337,7 @@ struct dcn10_link_enc_registers {
 		type RDPCS_TX_FIFO_ERROR_MASK;\
 		type RDPCS_DPALT_DISABLE_TOGGLE_MASK;\
 		type RDPCS_DPALT_4LANE_TOGGLE_MASK;\
+		type RDPCS_PHY_DPALT_DISABLE;\
 		type RDPCS_PHY_DPALT_DISABLE_ACK;\
 		type RDPCS_PHY_DP_MPLLB_V2I;\
 		type RDPCS_PHY_DP_MPLLB_FREQ_VCO;\
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
index e5e8640a9ef3..7001bfbd6681 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
@@ -183,6 +183,7 @@ struct link_encoder_funcs {
 
 	bool (*fec_is_active)(struct link_encoder *enc);
 #endif
+	bool (*is_in_alt_mode) (struct link_encoder *enc);
 };
 
 #endif /* LINK_ENCODER_H_ */
-- 
2.22.0

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  parent reply	other threads:[~2019-08-09 21:37 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-09 21:36 [PATCH 00/49] DC Patches 09 Aug, 2019 sunpeng.li-5C7GfCeVMHo
     [not found] ` <20190809213742.30301-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-08-09 21:36   ` [PATCH 01/49] drm/amd/display: Add PIXEL_RATE control regs for more instances sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36   ` [PATCH 02/49] drm/amd/display: Add DFS reference clock field sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36   ` [PATCH 03/49] drm/amd/display: reset drr programming on pipe reset sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36   ` [PATCH 04/49] drm/amd/display: reset hdmi tmds rate and data scramble " sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36   ` [PATCH 05/49] drm/amd/display: fix issue where 252-255 values are clipped sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36   ` [PATCH 06/49] drm/amd/display: Fix frames_to_insert math sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 07/49] drm/amd/display: Add 22, 24, and 26 degamma sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 08/49] drm/amd/display: Improve sharing of HUBBUB register lists sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 09/49] drm/amd/display: Synchronous DisplayPort Link Training sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 10/49] drm/amd/display: make firmware info only load once during dc_bios create sunpeng.li-5C7GfCeVMHo
     [not found]     ` <20190809213742.30301-11-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-08-20 13:59       ` Mike Lothian
2019-08-09 21:37   ` [PATCH 11/49] drm/amd/display: fixup DPP programming sequence sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 12/49] drm/amd/display: Add work-around option to skip DCN20 clock updates sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 13/49] drm/amd/display: refactor gpio to allocate hw_container in constructor sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 14/49] drm/amd/display: wait for pending complete when enabling a plane sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 15/49] drm/amd/display: 3.2.43 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 16/49] drm/amd/display: Make init_hw and init_pipes generic for seamless boot sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 17/49] drm/amd/display: fix dcn-specific clk_mgr init_clocks sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 18/49] drm/amd/display: enabling seamless boot sequence for dcn2 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 19/49] drm/amd/display: clean up DML for DCN2x sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 20/49] drm/amd/display: Add HLG support in color module sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 21/49] drm/amd/display: Change DSC policy from slices per column to minimum slice height sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 22/49] drm/amd/display: Set DSC before DIG front-end is connected to its back-end sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 23/49] drm/amd/display: 3.2.44 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 24/49] drm/amd/display: fix pipe selection logic in validate sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 25/49] drm/amd/display: Remove duplicate interface for programming FB sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 26/49] drm/amd/display: Update DML parameters sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 27/49] drm/amd/display: update optc odm interface for more than 2 opps sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 28/49] drm/amd/display: HUBP/HUBBUB register programming fixes sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` sunpeng.li-5C7GfCeVMHo [this message]
2019-08-09 21:37   ` [PATCH 30/49] drm/amd/display: reprogram VM config when system resume sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 31/49] drm/amd/display: Remove 4:2:2 DSC support sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 32/49] drm/amd/display: Add Logging for Gamma Related information (1/2) sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 33/49] drm/amd/display: Fix type of ODMCombineType field sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 34/49] drm/amd/display: Check if set_blank_data_double_buffer exists before call sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 35/49] drm/amd/display: Correct DSC PPS log sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 36/49] drm/amd/display: wake up ogam mem pwr before programming ocsc sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 37/49] drm/amd/display: Register VUPDATE_NO_LOCK interrupts for DCN2 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 38/49] drm/amd/display: Add enum for H-timing divider mode sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 39/49] drm/amd/display: Remove redundant definition of dwb_source enums sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 40/49] drm/amd/display: Add Logging for Gamma Related information (2/2) sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 41/49] drm/amd/display: Add and refine DSC logs in enable sequence sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 42/49] drm/amd/display: 3.2.45 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 43/49] drm/amd/display: fix dcn20 global sync dml param extraction sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 44/49] drm/amd/display: 3.2.46 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 45/49] drm/amd/display: enable dcn_mem_pwr as golden setting updates sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 46/49] drm/amd/display: check hpd before retry verify link cap sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 47/49] drm/amd/display: audio cannot switch to internal when display turns off sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 48/49] drm/amd/display: Enable MPO with pre-blend color processing (RGB) sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37   ` [PATCH 49/49] drm/amd/display: Load NV12 SOC BB from firmware sunpeng.li-5C7GfCeVMHo

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