From: <sunpeng.li-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Leo Li <sunpeng.li-5C7GfCeVMHo@public.gmane.org>,
Chris Park <Chris.Park-5C7GfCeVMHo@public.gmane.org>,
Wenjing Liu <Wenjing.Liu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 04/49] drm/amd/display: reset hdmi tmds rate and data scramble on pipe reset
Date: Fri, 9 Aug 2019 17:36:57 -0400 [thread overview]
Message-ID: <20190809213742.30301-5-sunpeng.li@amd.com> (raw)
In-Reply-To: <20190809213742.30301-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
From: Wenjing Liu <Wenjing.Liu@amd.com>
[why]
hdmi data scramble and tmds rate is not reset during pipe reset.
[how]
reset hdmi tmds rate and data scramble on pipe reset
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
---
.../amd/display/dc/dce/dce_stream_encoder.c | 19 +++++++++++++++++++
.../display/dc/dce110/dce110_hw_sequencer.c | 5 ++++-
.../display/dc/dcn10/dcn10_stream_encoder.c | 14 ++++++++++++++
.../display/dc/dcn10/dcn10_stream_encoder.h | 3 +++
.../display/dc/dcn20/dcn20_stream_encoder.c | 1 +
.../amd/display/dc/inc/hw/stream_encoder.h | 3 +++
.../dc/virtual/virtual_stream_encoder.c | 5 +++++
7 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index fb2fd141e16a..c8fea079e917 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -1036,6 +1036,24 @@ static void dce110_stream_encoder_set_avmute(
}
+static void dce110_reset_hdmi_stream_attribute(
+ struct stream_encoder *enc)
+{
+ struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);
+ if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN)
+ REG_UPDATE_5(HDMI_CONTROL,
+ HDMI_PACKET_GEN_VERSION, 1,
+ HDMI_KEEPOUT_MODE, 1,
+ HDMI_DEEP_COLOR_ENABLE, 0,
+ HDMI_DATA_SCRAMBLE_EN, 0,
+ HDMI_CLOCK_CHANNEL_RATE, 0);
+ else
+ REG_UPDATE_3(HDMI_CONTROL,
+ HDMI_PACKET_GEN_VERSION, 1,
+ HDMI_KEEPOUT_MODE, 1,
+ HDMI_DEEP_COLOR_ENABLE, 0);
+}
+
#define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000
#define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1
@@ -1616,6 +1634,7 @@ static const struct stream_encoder_funcs dce110_str_enc_funcs = {
.setup_stereo_sync = setup_stereo_sync,
.set_avmute = dce110_stream_encoder_set_avmute,
.dig_connect_to_otg = dig_connect_to_otg,
+ .hdmi_reset_stream_attribute = dce110_reset_hdmi_stream_attribute,
};
void dce110_stream_encoder_construct(
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 46dfab749679..919647166bce 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1037,9 +1037,12 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option)
struct dc_link *link = stream->link;
struct dc *dc = pipe_ctx->stream->ctx->dc;
- if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
+ if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) {
pipe_ctx->stream_res.stream_enc->funcs->stop_hdmi_info_packets(
pipe_ctx->stream_res.stream_enc);
+ pipe_ctx->stream_res.stream_enc->funcs->hdmi_reset_stream_attribute(
+ pipe_ctx->stream_res.stream_enc);
+ }
if (dc_is_dp_signal(pipe_ctx->stream->signal))
pipe_ctx->stream_res.stream_enc->funcs->stop_dp_info_packets(
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index a098287d71ae..00aa9dde5538 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -1003,6 +1003,19 @@ void enc1_stream_encoder_set_avmute(
REG_UPDATE(HDMI_GC, HDMI_GC_AVMUTE, value);
}
+void enc1_reset_hdmi_stream_attribute(
+ struct stream_encoder *enc)
+{
+ struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
+
+ REG_UPDATE_5(HDMI_CONTROL,
+ HDMI_PACKET_GEN_VERSION, 1,
+ HDMI_KEEPOUT_MODE, 1,
+ HDMI_DEEP_COLOR_ENABLE, 0,
+ HDMI_DATA_SCRAMBLE_EN, 0,
+ HDMI_CLOCK_CHANNEL_RATE, 0);
+}
+
#define DP_SEC_AUD_N__DP_SEC_AUD_N__DEFAULT 0x8000
#define DP_SEC_TIMESTAMP__DP_SEC_TIMESTAMP_MODE__AUTO_CALC 1
@@ -1562,6 +1575,7 @@ static const struct stream_encoder_funcs dcn10_str_enc_funcs = {
.setup_stereo_sync = enc1_setup_stereo_sync,
.set_avmute = enc1_stream_encoder_set_avmute,
.dig_connect_to_otg = enc1_dig_connect_to_otg,
+ .hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute,
};
void dcn10_stream_encoder_construct(
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
index f585e7b620cc..8b8921e75984 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
@@ -615,4 +615,7 @@ void get_audio_clock_info(
uint32_t actual_pixel_clock_100Hz,
struct audio_clock_info *audio_clock_info);
+void enc1_reset_hdmi_stream_attribute(
+ struct stream_encoder *enc);
+
#endif /* __DC_STREAM_ENCODER_DCN10_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
index 403f1f865a06..b2c1cad3c94f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
@@ -586,6 +586,7 @@ static const struct stream_encoder_funcs dcn20_str_enc_funcs = {
.dp_set_dsc_config = enc2_dp_set_dsc_config,
#endif
.set_dynamic_metadata = enc2_set_dynamic_metadata,
+ .hdmi_reset_stream_attribute = enc1_reset_hdmi_stream_attribute,
};
void dcn20_stream_encoder_construct(
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
index ed7d9588b309..38e2c3e7412e 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
@@ -211,6 +211,9 @@ struct stream_encoder_funcs {
struct stream_encoder *enc,
int tg_inst);
+ void (*hdmi_reset_stream_attribute)(
+ struct stream_encoder *enc);
+
#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
void (*dp_set_dsc_config)(
diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
index 768bc8c75b6a..0c6d502da8a6 100644
--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
@@ -75,6 +75,10 @@ static void virtual_audio_mute_control(
struct stream_encoder *enc,
bool mute) {}
+static void virtual_stream_encoder_reset_hdmi_stream_attribute(
+ struct stream_encoder *enc)
+{}
+
#ifdef CONFIG_DRM_AMD_DC_DCN2_0
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
static void virtual_enc_dp_set_odm_combine(
@@ -114,6 +118,7 @@ static const struct stream_encoder_funcs virtual_str_enc_funcs = {
.audio_mute_control = virtual_audio_mute_control,
.set_avmute = virtual_stream_encoder_set_avmute,
+ .hdmi_reset_stream_attribute = virtual_stream_encoder_reset_hdmi_stream_attribute,
};
bool virtual_stream_encoder_construct(
--
2.22.0
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next prev parent reply other threads:[~2019-08-09 21:36 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-09 21:36 [PATCH 00/49] DC Patches 09 Aug, 2019 sunpeng.li-5C7GfCeVMHo
[not found] ` <20190809213742.30301-1-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-08-09 21:36 ` [PATCH 01/49] drm/amd/display: Add PIXEL_RATE control regs for more instances sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36 ` [PATCH 02/49] drm/amd/display: Add DFS reference clock field sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36 ` [PATCH 03/49] drm/amd/display: reset drr programming on pipe reset sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36 ` sunpeng.li-5C7GfCeVMHo [this message]
2019-08-09 21:36 ` [PATCH 05/49] drm/amd/display: fix issue where 252-255 values are clipped sunpeng.li-5C7GfCeVMHo
2019-08-09 21:36 ` [PATCH 06/49] drm/amd/display: Fix frames_to_insert math sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 07/49] drm/amd/display: Add 22, 24, and 26 degamma sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 08/49] drm/amd/display: Improve sharing of HUBBUB register lists sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 09/49] drm/amd/display: Synchronous DisplayPort Link Training sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 10/49] drm/amd/display: make firmware info only load once during dc_bios create sunpeng.li-5C7GfCeVMHo
[not found] ` <20190809213742.30301-11-sunpeng.li-5C7GfCeVMHo@public.gmane.org>
2019-08-20 13:59 ` Mike Lothian
2019-08-09 21:37 ` [PATCH 11/49] drm/amd/display: fixup DPP programming sequence sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 12/49] drm/amd/display: Add work-around option to skip DCN20 clock updates sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 13/49] drm/amd/display: refactor gpio to allocate hw_container in constructor sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 14/49] drm/amd/display: wait for pending complete when enabling a plane sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 15/49] drm/amd/display: 3.2.43 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 16/49] drm/amd/display: Make init_hw and init_pipes generic for seamless boot sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 17/49] drm/amd/display: fix dcn-specific clk_mgr init_clocks sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 18/49] drm/amd/display: enabling seamless boot sequence for dcn2 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 19/49] drm/amd/display: clean up DML for DCN2x sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 20/49] drm/amd/display: Add HLG support in color module sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 21/49] drm/amd/display: Change DSC policy from slices per column to minimum slice height sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 22/49] drm/amd/display: Set DSC before DIG front-end is connected to its back-end sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 23/49] drm/amd/display: 3.2.44 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 24/49] drm/amd/display: fix pipe selection logic in validate sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 25/49] drm/amd/display: Remove duplicate interface for programming FB sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 26/49] drm/amd/display: Update DML parameters sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 27/49] drm/amd/display: update optc odm interface for more than 2 opps sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 28/49] drm/amd/display: HUBP/HUBBUB register programming fixes sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 29/49] drm/amd/display: Enable type C hotplug sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 30/49] drm/amd/display: reprogram VM config when system resume sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 31/49] drm/amd/display: Remove 4:2:2 DSC support sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 32/49] drm/amd/display: Add Logging for Gamma Related information (1/2) sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 33/49] drm/amd/display: Fix type of ODMCombineType field sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 34/49] drm/amd/display: Check if set_blank_data_double_buffer exists before call sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 35/49] drm/amd/display: Correct DSC PPS log sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 36/49] drm/amd/display: wake up ogam mem pwr before programming ocsc sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 37/49] drm/amd/display: Register VUPDATE_NO_LOCK interrupts for DCN2 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 38/49] drm/amd/display: Add enum for H-timing divider mode sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 39/49] drm/amd/display: Remove redundant definition of dwb_source enums sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 40/49] drm/amd/display: Add Logging for Gamma Related information (2/2) sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 41/49] drm/amd/display: Add and refine DSC logs in enable sequence sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 42/49] drm/amd/display: 3.2.45 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 43/49] drm/amd/display: fix dcn20 global sync dml param extraction sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 44/49] drm/amd/display: 3.2.46 sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 45/49] drm/amd/display: enable dcn_mem_pwr as golden setting updates sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 46/49] drm/amd/display: check hpd before retry verify link cap sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 47/49] drm/amd/display: audio cannot switch to internal when display turns off sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 48/49] drm/amd/display: Enable MPO with pre-blend color processing (RGB) sunpeng.li-5C7GfCeVMHo
2019-08-09 21:37 ` [PATCH 49/49] drm/amd/display: Load NV12 SOC BB from firmware sunpeng.li-5C7GfCeVMHo
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