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From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Eric Yang <eric.yang2@amd.com>,
	Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	roman.li@amd.com, Aurabindo.Pillai@amd.com,
	Jacky Liao <ziyu.liao@amd.com>,
	Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 10/18] drm/amd/display: Add BLNDGAM memory shutdown support
Date: Fri, 20 Nov 2020 15:19:50 -0500	[thread overview]
Message-ID: <20201120201958.2455002-11-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20201120201958.2455002-1-Rodrigo.Siqueira@amd.com>

From: Jacky Liao <ziyu.liao@amd.com>

[Why]
The BLNDGAM memory blocks should be powered down when they're not in
use. This will reduce power consumption.

[How]
1. Write to BLNDGAM_MEM_PWR_FORCE to put memory to shutdown when BLNDGAM
   is not used.
2. Added a debug option to allow this behaviour to be turned off

Signed-off-by: Jacky Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 13 ++++++++++---
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h |  4 +++-
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
index 29231528f052..052bab3e5e8e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
@@ -500,9 +500,14 @@ static void dpp3_power_on_blnd_lut(
 {
 	struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
 
-	REG_SET(CM_MEM_PWR_CTRL, 0,
-			BLNDGAM_MEM_PWR_FORCE, power_on == true ? 0:1);
-
+	if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm) {
+		REG_UPDATE(CM_MEM_PWR_CTRL, BLNDGAM_MEM_PWR_FORCE, power_on ? 0 : 3);
+		if (power_on)
+			REG_WAIT(CM_MEM_PWR_STATUS, BLNDGAM_MEM_PWR_STATE, 0, 1, 5);
+	} else {
+		REG_SET(CM_MEM_PWR_CTRL, 0,
+				BLNDGAM_MEM_PWR_FORCE, power_on == true ? 0 : 1);
+	}
 }
 
 static void dpp3_configure_blnd_lut(
@@ -675,6 +680,8 @@ bool dpp3_program_blnd_lut(
 
 	if (params == NULL) {
 		REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_MODE, 0);
+		if (dpp_base->ctx->dc->debug.enable_mem_low_power.bits.cm)
+			dpp3_power_on_blnd_lut(dpp_base, false);
 		return false;
 	}
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h
index 81bf2ecc2831..2ae5e1f93dd4 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h
@@ -343,6 +343,7 @@
 	TF_SF(DSCL0_DSCL_MEM_PWR_CTRL, LUT_MEM_PWR_FORCE, mask_sh)
 
 #define DPP_REG_LIST_SH_MASK_DCN30_UPDATED(mask_sh)\
+	TF_SF(CM0_CM_MEM_PWR_STATUS, BLNDGAM_MEM_PWR_STATE, mask_sh), \
 	TF_SF(CM0_CM_BLNDGAM_CONTROL, CM_BLNDGAM_MODE, mask_sh), \
 	TF_SF(CM0_CM_BLNDGAM_CONTROL, CM_BLNDGAM_MODE_CURRENT, mask_sh), \
 	TF_SF(CM0_CM_BLNDGAM_CONTROL, CM_BLNDGAM_SELECT_CURRENT, mask_sh), \
@@ -446,7 +447,8 @@
 	type CM_BLNDGAM_MODE_CURRENT; \
 	type CM_BLNDGAM_SELECT_CURRENT; \
 	type CM_BLNDGAM_SELECT; \
-	type GAMCOR_MEM_PWR_STATE
+	type GAMCOR_MEM_PWR_STATE; \
+	type BLNDGAM_MEM_PWR_STATE
 
 struct dcn3_dpp_shift {
 	DPP_REG_FIELD_LIST_DCN3(uint8_t);
-- 
2.29.2

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  parent reply	other threads:[~2020-11-20 20:20 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-20 20:19 [PATCH 00/18] DC 3.2.113 Patches, November 20, 2020 Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 01/18] drm/amd/display: add i2c speed arbitration for dc_i2c and hdcp_i2c Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 02/18] drm/amd/display: Source minimum HBlank support Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 03/18] drm/amd/display: Update panel register Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 04/18] drm/amd/display: Enable stutter for dcn3.01 Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 05/18] drm/amd/display: Add DMCU memory low power support Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 06/18] drm/amd/display: intermittent underflow observed when PIP is toggled in Full screen Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 07/18] drm/amd/display: expose clk_mgr functions for reuse Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 08/18] drm/amd/display: change hw sequence Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 09/18] drm/amd/display: Clear sticky vsc sdp error bit Rodrigo Siqueira
2020-11-20 20:19 ` Rodrigo Siqueira [this message]
2020-11-20 20:19 ` [PATCH 11/18] drm/amd/display: Add internal display info Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 12/18] drm/amd/display: Check multiple internal displays for power optimization Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 13/18] drm/amd/display: remove macro which is in header already Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 14/18] drm/amd/display: Add GAMCOR memory shutdown support Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 15/18] drm/amd/display: enable pipe power gating by default Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 16/18] drm/amd/display: 3.2.113 Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 17/18] drm/amd/display: To update backlight restore mechanism Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 18/18] drm/amd/display: init soc bounding box for dcn3.01 Rodrigo Siqueira

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