From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Aric Cyr <Aric.Cyr@amd.com>,
Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, Tashfique Abdullah <Tashfique.Abdullah@amd.com>,
Aurabindo.Pillai@amd.com, Tashfique Abdullah <tabdullah@amd.com>,
Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 06/18] drm/amd/display: intermittent underflow observed when PIP is toggled in Full screen
Date: Fri, 20 Nov 2020 15:19:46 -0500 [thread overview]
Message-ID: <20201120201958.2455002-7-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20201120201958.2455002-1-Rodrigo.Siqueira@amd.com>
From: Tashfique Abdullah <tabdullah@amd.com>
[Why]
The MPCC may change and request data when the pipes are switching from 2
to 1 or 1 to 2. During the switch there is a possibility of underflow
and flicker/missing data.
[How]
During VBlank the MPCC won't request data. The trick is to delay and
wait on VBlank, ONLY when pipes are either turning on or off, right
before MPCC is reset for the pipes.
Signed-off-by: Tashfique Abdullah <Tashfique.Abdullah@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index b9c20e30d99d..abcb06044e6e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1695,6 +1695,15 @@ void dcn20_program_front_end_for_ctx(
&& context->res_ctx.pipe_ctx[i].stream)
hws->funcs.blank_pixel_data(dc, &context->res_ctx.pipe_ctx[i], true);
+ /* wait for outstanding pending changes before adding or removing planes */
+ for (i = 0; i < dc->res_pool->pipe_count; i++) {
+ if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable ||
+ context->res_ctx.pipe_ctx[i].update_flags.bits.enable) {
+ dc->hwss.wait_for_pending_cleared(dc, context);
+ break;
+ }
+ }
+
/* Disconnect mpcc */
for (i = 0; i < dc->res_pool->pipe_count; i++)
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable
--
2.29.2
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2020-11-20 20:20 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 20:19 [PATCH 00/18] DC 3.2.113 Patches, November 20, 2020 Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 01/18] drm/amd/display: add i2c speed arbitration for dc_i2c and hdcp_i2c Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 02/18] drm/amd/display: Source minimum HBlank support Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 03/18] drm/amd/display: Update panel register Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 04/18] drm/amd/display: Enable stutter for dcn3.01 Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 05/18] drm/amd/display: Add DMCU memory low power support Rodrigo Siqueira
2020-11-20 20:19 ` Rodrigo Siqueira [this message]
2020-11-20 20:19 ` [PATCH 07/18] drm/amd/display: expose clk_mgr functions for reuse Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 08/18] drm/amd/display: change hw sequence Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 09/18] drm/amd/display: Clear sticky vsc sdp error bit Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 10/18] drm/amd/display: Add BLNDGAM memory shutdown support Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 11/18] drm/amd/display: Add internal display info Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 12/18] drm/amd/display: Check multiple internal displays for power optimization Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 13/18] drm/amd/display: remove macro which is in header already Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 14/18] drm/amd/display: Add GAMCOR memory shutdown support Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 15/18] drm/amd/display: enable pipe power gating by default Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 16/18] drm/amd/display: 3.2.113 Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 17/18] drm/amd/display: To update backlight restore mechanism Rodrigo Siqueira
2020-11-20 20:19 ` [PATCH 18/18] drm/amd/display: init soc bounding box for dcn3.01 Rodrigo Siqueira
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201120201958.2455002-7-Rodrigo.Siqueira@amd.com \
--to=rodrigo.siqueira@amd.com \
--cc=Aric.Cyr@amd.com \
--cc=Aurabindo.Pillai@amd.com \
--cc=Bhawanpreet.Lakha@amd.com \
--cc=Eryk.Brol@amd.com \
--cc=Harry.Wentland@amd.com \
--cc=Sunpeng.Li@amd.com \
--cc=Tashfique.Abdullah@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=bindu.r@amd.com \
--cc=qingqing.zhuo@amd.com \
--cc=roman.li@amd.com \
--cc=tabdullah@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox