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From: Stylon Wang <stylon.wang@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Stylon Wang <stylon.wang@amd.com>,
	Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	Wenjing Liu <wenjing.liu@amd.com>,
	Anson.Jacob@amd.com, Aurabindo.Pillai@amd.com,
	George Shen <George.Shen@amd.com>,
	Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 09/20] drm/amd/display: determine dp link encoding format from link settings
Date: Fri, 14 May 2021 12:49:52 +0800	[thread overview]
Message-ID: <20210514045003.3069681-10-stylon.wang@amd.com> (raw)
In-Reply-To: <20210514045003.3069681-1-stylon.wang@amd.com>

From: Wenjing Liu <wenjing.liu@amd.com>

[how]
Implement a function that determines link encoding format
based on the link settings passed in.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 7 +++++++
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h     | 5 +++++
 drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h  | 1 +
 3 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 69d511717828..396ac89a3c0e 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -4870,4 +4870,11 @@ bool is_edp_ilr_optimization_required(struct dc_link *link, struct dc_crtc_timin
 	return false;
 }
 
+enum dp_link_encoding dp_get_link_encoding_format(const struct dc_link_settings *link_settings)
+{
+	if ((link_settings->link_rate >= LINK_RATE_LOW) &&
+			(link_settings->link_rate <= LINK_RATE_HIGH3))
+		return DP_8b_10b_ENCODING;
+	return DP_UNKNOWN_ENCODING;
+}
 
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index fcfde2e04292..1948cd9427d7 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -98,6 +98,11 @@ enum dc_dp_training_pattern {
 	DP_TRAINING_PATTERN_VIDEOIDLE,
 };
 
+enum dp_link_encoding {
+	DP_UNKNOWN_ENCODING = 0,
+	DP_8b_10b_ENCODING = 1,
+};
+
 struct dc_link_settings {
 	enum dc_lane_count lane_count;
 	enum dc_link_rate link_rate;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
index 428842511c03..ffc3f2c63db8 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
@@ -105,4 +105,5 @@ enum link_training_result dp_check_link_loss_status(
 		struct dc_link *link,
 		const struct link_training_settings *link_training_setting);
 
+enum dp_link_encoding dp_get_link_encoding_format(const struct dc_link_settings *link_settings);
 #endif /* __DC_LINK_DP_H__ */
-- 
2.25.1

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  parent reply	other threads:[~2021-05-14  4:51 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-14  4:49 [PATCH 00/20] DC Patches May 17, 2021 Stylon Wang
2021-05-14  4:49 ` [PATCH 01/20] drm/amd/display: treat memory as a single-channel for asymmetric memory V3 Stylon Wang
2021-05-14  4:49 ` [PATCH 02/20] drm/amd/display: Add get_current_time interface to dmub_srv Stylon Wang
2021-05-14  4:49 ` [PATCH 03/20] drm/amd/display: Add documentation for power gate plane Stylon Wang
2021-05-14  4:49 ` [PATCH 04/20] drm/amd/display: Remove legacy comments Stylon Wang
2021-05-14  4:49 ` [PATCH 05/20] drm/amd/display: Add kernel-doc to some hubp functions Stylon Wang
2021-05-14  4:49 ` [PATCH 06/20] drm/amd/display: Document set RECOUT operation Stylon Wang
2021-05-14  4:49 ` [PATCH 07/20] drm/amd/display: Minor refactor of DP PHY test automation Stylon Wang
2021-05-14  4:49 ` [PATCH 08/20] drm/amd/display: Disconnect non-DP with no EDID Stylon Wang
2021-05-14  4:49 ` Stylon Wang [this message]
2021-05-14  4:49 ` [PATCH 10/20] drm/amd/display: decide link training settings based on channel coding Stylon Wang
2021-05-14  4:49 ` [PATCH 11/20] drm/amd/display: rename perform_link_training_int function Stylon Wang
2021-05-14  4:49 ` [PATCH 12/20] drm/amd/display: consider channel coding in configure lttpr mode Stylon Wang
2021-05-14  4:49 ` [PATCH 13/20] drm/amd/display: Refactor suspend/resume of Secure display Stylon Wang
2021-05-14  4:49 ` [PATCH 14/20] drm/amd/display: Add Overflow check to skip MALL Stylon Wang
2021-05-14  4:49 ` [PATCH 15/20] drm/amd/display: Correct DPCD revision for eDP v1.4 Stylon Wang
2021-05-14  4:49 ` [PATCH 16/20] drm/amd/display: Avoid get/put vblank when stream disabled Stylon Wang
2021-05-14  4:50 ` [PATCH 17/20] drm/amd/display: Use the correct max downscaling value for DCN3.x family Stylon Wang
2021-05-14  4:50 ` [PATCH 18/20] drm/amd/display: Refactor and add visual confirm for HW Flip Queue Stylon Wang
2021-05-14  4:50 ` [PATCH 19/20] drm/amd/display: [FW Promotion] Release 0.0.66 Stylon Wang
2021-05-14  4:50 ` [PATCH 20/20] drm/amd/display: 3.2.136 Stylon Wang
2021-05-14 19:32 ` [PATCH 00/20] DC Patches May 17, 2021 Wheeler, Daniel

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