From: Stylon Wang <stylon.wang@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Stylon Wang <stylon.wang@amd.com>,
Charlene Liu <Charlene.Liu@amd.com>,
Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
Nikola Cornij <nikola.cornij@amd.com>,
Anson.Jacob@amd.com, Aurabindo.Pillai@amd.com,
Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 17/20] drm/amd/display: Use the correct max downscaling value for DCN3.x family
Date: Fri, 14 May 2021 12:50:00 +0800 [thread overview]
Message-ID: <20210514045003.3069681-18-stylon.wang@amd.com> (raw)
In-Reply-To: <20210514045003.3069681-1-stylon.wang@amd.com>
From: Nikola Cornij <nikola.cornij@amd.com>
[why]
As per spec, DCN3.x can do 6:1 downscaling and DCN2.x can do 4:1. The
max downscaling limit value for DCN2.x is 250, which means it's
calculated as 1000 / 4 = 250. For DCN3.x this then gives 1000 / 6 = 167.
[how]
Set maximum downscaling limit to 167 for DCN3.x
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 7 ++++---
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 7 ++++---
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 7 ++++---
3 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 45f96221a094..9109e2433965 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -826,10 +826,11 @@ static const struct dc_plane_cap plane_cap = {
.fp16 = 16000
},
+ /* 6:1 downscaling ratio: 1000/6 = 166.666 */
.max_downscale_factor = {
- .argb8888 = 600,
- .nv12 = 600,
- .fp16 = 600
+ .argb8888 = 167,
+ .nv12 = 167,
+ .fp16 = 167
}
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
index 2127399cf464..63b09c1124c4 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
@@ -843,10 +843,11 @@ static const struct dc_plane_cap plane_cap = {
.fp16 = 16000
},
+ /* 6:1 downscaling ratio: 1000/6 = 166.666 */
.max_downscale_factor = {
- .argb8888 = 600,
- .nv12 = 600,
- .fp16 = 600
+ .argb8888 = 167,
+ .nv12 = 167,
+ .fp16 = 167
},
64,
64
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index fc2dea243d1b..a33f0365329b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
@@ -284,10 +284,11 @@ static const struct dc_plane_cap plane_cap = {
.nv12 = 16000,
.fp16 = 16000
},
+ /* 6:1 downscaling ratio: 1000/6 = 166.666 */
.max_downscale_factor = {
- .argb8888 = 600,
- .nv12 = 600,
- .fp16 = 600
+ .argb8888 = 167,
+ .nv12 = 167,
+ .fp16 = 167
},
16,
16
--
2.25.1
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next prev parent reply other threads:[~2021-05-14 4:51 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-14 4:49 [PATCH 00/20] DC Patches May 17, 2021 Stylon Wang
2021-05-14 4:49 ` [PATCH 01/20] drm/amd/display: treat memory as a single-channel for asymmetric memory V3 Stylon Wang
2021-05-14 4:49 ` [PATCH 02/20] drm/amd/display: Add get_current_time interface to dmub_srv Stylon Wang
2021-05-14 4:49 ` [PATCH 03/20] drm/amd/display: Add documentation for power gate plane Stylon Wang
2021-05-14 4:49 ` [PATCH 04/20] drm/amd/display: Remove legacy comments Stylon Wang
2021-05-14 4:49 ` [PATCH 05/20] drm/amd/display: Add kernel-doc to some hubp functions Stylon Wang
2021-05-14 4:49 ` [PATCH 06/20] drm/amd/display: Document set RECOUT operation Stylon Wang
2021-05-14 4:49 ` [PATCH 07/20] drm/amd/display: Minor refactor of DP PHY test automation Stylon Wang
2021-05-14 4:49 ` [PATCH 08/20] drm/amd/display: Disconnect non-DP with no EDID Stylon Wang
2021-05-14 4:49 ` [PATCH 09/20] drm/amd/display: determine dp link encoding format from link settings Stylon Wang
2021-05-14 4:49 ` [PATCH 10/20] drm/amd/display: decide link training settings based on channel coding Stylon Wang
2021-05-14 4:49 ` [PATCH 11/20] drm/amd/display: rename perform_link_training_int function Stylon Wang
2021-05-14 4:49 ` [PATCH 12/20] drm/amd/display: consider channel coding in configure lttpr mode Stylon Wang
2021-05-14 4:49 ` [PATCH 13/20] drm/amd/display: Refactor suspend/resume of Secure display Stylon Wang
2021-05-14 4:49 ` [PATCH 14/20] drm/amd/display: Add Overflow check to skip MALL Stylon Wang
2021-05-14 4:49 ` [PATCH 15/20] drm/amd/display: Correct DPCD revision for eDP v1.4 Stylon Wang
2021-05-14 4:49 ` [PATCH 16/20] drm/amd/display: Avoid get/put vblank when stream disabled Stylon Wang
2021-05-14 4:50 ` Stylon Wang [this message]
2021-05-14 4:50 ` [PATCH 18/20] drm/amd/display: Refactor and add visual confirm for HW Flip Queue Stylon Wang
2021-05-14 4:50 ` [PATCH 19/20] drm/amd/display: [FW Promotion] Release 0.0.66 Stylon Wang
2021-05-14 4:50 ` [PATCH 20/20] drm/amd/display: 3.2.136 Stylon Wang
2021-05-14 19:32 ` [PATCH 00/20] DC Patches May 17, 2021 Wheeler, Daniel
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